TCN75 2-Wire Serial Temperature Sensor and Thermal Monitor Features Package Type • Solid-StateTemperatureSensing; SOIC 0.5°CAccuracy(Typ.) (cid:127) Operatesfrom-55°Cto+125°C SDA 1 8 VDD (cid:127) OperatingSupplyRange:2.7Vto5.5V SCL 2 7 A0 (cid:127) ProgrammableTripPointandHysteresiswith TCN75MOA Power-upDefaults INT/CMPTR 3 6 A1 (cid:127) Standard2-WireSerialInterface GND 4 5 A2 (cid:127) ThermalEventAlarmOutputFunctionsas InterruptorComparator/ThermostatOutput MSOP (cid:127) Upto8TCN75smaySharetheSameBus (cid:127) ShutdownModeforLowStandbyPower SDA 1 8 VDD Consumption SCL 2 7 A0 (cid:127) 5VTolerantI/OatV =3V TCN75MUA DD (cid:127) LowPower: INT/CMPTR 3 6 A1 - 250µA(Typ.)Operating GND 4 5 A2 - 1µA(Typ.)ShutdownMode (cid:127) 8-PinSOICandMSOPPackaging General Description Applications The TCN75 is a serially programmable temperature (cid:127) ThermalProtectionforHighPerformanceCPUs sensor that notifies the host controller when ambient temperature exceeds a user programmed set point. (cid:127) Solid-StateThermometer Hysteresis is also programmable. The INT/CMPTR (cid:127) Fire/HeatAlarms outputisprogrammableaseitherasimplecomparator (cid:127) ThermalManagementinElectronicSystems: for thermostat operation or as a temperature event - Computers interrupt. Communication with the TCN75 is - TelecomRacks accomplishedviaatwo-wirebusthatiscompatiblewith industry standard protocols. This permits reading the - PowerSupplies/UPS/Amplifiers current temperature, programming the set point and (cid:127) Copiers/OfficeElectronics hysteresis,andconfiguringthedevice. (cid:127) ConsumerElectronics The TCN75 powers up in Comparator mode with a (cid:127) ProcessControl default set pointof80°Cwith5°Chysteresis. Defaults allow independent operation as a stand-alone thermostat.Ashutdowncommandmaybesentviathe 2-wire bus to activate the low power Standby mode. Address selection inputs allow up to eight TCN75s to sharethesame2-wirebusformultizonemonitoring. All registers can be read by the host and the INT/ CMPTR output's polarity is user programmable. Both polled and interrupt driven systems are easily accommodated.Smallphysicalsize,lowinstalledcost, and ease of use make the TCN75 anideal choice for implementing sophisticated system management schemes.  2002MicrochipTechnologyInc. DS21490B-page 1

TCN75 Device Selection Table PartNumber SupplyVoltage Package JunctionTemperatureRange TCN75-3.3MOA 3.3 8-PinSOIC -55°Cto+125°C TCN75-5.0MOA 5.0 8-PinSOIC -55°Cto+125°C TCN75-3.3MUA 3.3 8-PinMSOP -55°Cto+125°C TCN75-5.0MUA 5.0 8-PInMSOP -55°Cto+125°C FunctionalBlock Diagram TCN75 INT/CMPTR 9-Bit ∆Σ Control A/D Logic Converter Temp Sensor VDD Register Set Configuration TSET Temperature THYST SDA SCL Two Wire Serial Port A0 Interface A1 A2  DS21490B-page 2 2002MicrochipTechnologyInc.

TCN75 1.0 ELECTRICAL *Stressesabovethoselistedunder"AbsoluteMaximumRat- ings"maycausepermanentdamagetothedevice.Theseare CHARACTERISTICS stressratings only and functional operation of the device at these or any other conditions above those indicated in the Absolute Maximum Ratings* operationsectionsofthespecificationsisnotimplied.Expo- sure to Absolute Maximum Rating conditions for extended SupplyVoltage(V )............................................6.0V DD periodsmayaffectdevicereliability. ESDSusceptibility(Note3)...............................1000V VoltageonPins: A0,A1,A2..........(GND–0.3V)to(V +0.3V) DD VoltageonPins: SDA,SCL,INT/CMPTR..(GND–0.3V)to5.5V ThermalResistance(JunctiontoAmbient) 8-PinSOIC..........................................170°C/W 8-PinMSOP.......................................250°C//W OperatingTemperatureRange(T ): -55°Cto+125°C J StorageTemperatureRange(T ):-65°Cto+150°C STG TCN75ELECTRICALSPECIFICATIONS ElectricalCharacteristics:V =2.7V–5.5V,-55°C≤(T =T ) ≤125°C,unlessotherwisenoted. DD A J Symbol Parameter Min Typ Max Units TestConditions PowerSupply V PowerSupplyVoltage 2.7 — 5.5 — DD I OperatingCurrent — 0.250 — mA SerialPortInactive(T =T =25°C) DD A J — — 1.0 SerialPortActive I StandbySupplyCurrent — 1 — µA ShutdownMode,SerialPort DD1 Inactive(T =T =25°C) A J INT/CMPTROutput I SinkCurrent:INT/CMPTR, — 1 4 mA Note1 OL SDAOutputs t INT/CMPTRResponseTime 1 — 6 t UserProgrammable TRIP CONV V OutputLowVoltage — — 0.8 V I =4.0mA OL OL Temp-to-BitsConverter ∆T TemperatureAccuracy(Note2) — ±3 — °C -55°C≤T ≤+125°C A V =3.3V:TCN75-3.3MOA, DD TCN75-3.3MUA V =5.0V:TCN75-5.0MOA, DD TCN75-5.0MUA — ±0.5 ±3 °C 25°C≤T ≤100°C A t ConversionTime — 55 — msec CONV T TEMPDefaultValue — 80 — °C Power-up SET(PU) T T DefaultValue — 75 — °C Power-up HYST(PU) HYST 2-WireSerialBusInterface V LogicInputHigh V x0.7 — — V IH DD V LogicInputLow — — V x0.3 V IL DD V LogicOutputLow — — 0.4 V I =3mA OL OL C InputCapacitanceSDA,SCL — 15 — pF IN I I/OLeakage — ±100 — pA (T =T =25°C) LEAK A J I SDAOutputLowCurrent — — 6 mA OL(SDA)  2002MicrochipTechnologyInc. DS21490B-page 3

TCN75 TCN75ELECTRICALSPECIFICATIONS(CONTINUED) ElectricalCharacteristics: 2.7V ≤V ≤ 5.5V;-55°C ≤(T =T ) ≤125°C,C =80pF,unlessotherwisenoted. DD A J L Symbol Parameter Min Typ Max Unit TestConditions SerialPortTiming f SerialPortFrequency 0 100 400 kHz SC t LowClockPeriod 1250 — — nsec LOW t HighClockPeriod 1250 — — nsec HIGH t SCLandSDARiseTime — — 250 nsec R t SCLandSDAFallTime — — 250 nsec F t STARTConditionSetupTime(for 1250 — — nsec SU(START) repeatedSTARTCondition) t SCLClockPeriod 2.5 — — µsec SC t STARTConditionHoldTime 100 — — nsec H(START) t DatainSetupTimetoSCLHigh 100 — — nsec DSU t DatainHoldTimeafterSCLLow 0 — — nsec DH t STOPConditionSetupTime 100 — — nsec SU(STOP) t BusFreeTimePriortoNewTransi- 1250 — — nsec IDLE tion Note 1: Outputcurrentshouldbeminimizedforbesttemperatureaccuracy.PowerdissipationwithintheTCN75willcauseself-heatingand temperaturedrift.Atmaximumratedoutputcurrentandsaturationvoltage,4mAand0.8V,respectively,theerroramountsto0.544°Cfor theSOIC. 2: AllparttypesoftheTCN75willoperateproperlyoverthewiderpowersupplyrangeof2.7Vto5.5V.Eachparttypeistestedandspecified forratedaccuracyatitsnominalsupplyvoltage.AsVDDvariesfromthenominalvalue,accuracywilldegrade1°C/VofVDDchange. 3: Humanbodymodel,100pFdischargedthrougha1.5kresistor. TIMINGDIAGRAM tSC SCL tH (START) tSU (STOP) SDA Data In tDSU SDA Data Out tDH  DS21490B-page 4 2002MicrochipTechnologyInc.

TCN75 2.0 PIN DESCRIPTIONS ThedescriptionsofthepinsarelistedinTable2-1. TABLE 2-1: PINFUNCTION TABLE PinNumber (8-PinSOIC) Symbol Description 8-PinMSOP) 1 SDA Bi-directionalSerialData. 2 SCL SerialDataClockInput. 3 INT/CMPTR InterruptorComparatorOutput. 4 GND SystemGround. 5 A AddressSelectPin(MSB). 2 6 A AddressSelectPin. 1 7 A AddressSelectPin(LSB). 0 8 V PowerSupplyInput DD  2002MicrochipTechnologyInc. DS21490B-page 5

TCN75 3.0 DETAILED DESCRIPTION A typical TCN75 hardware connection is shown in Figure3-1. FIGURE3-1: TYPICALAPPLICATION +VDD (3V to 5.5V) CBypass 0.1µF Recommended Unless Device is Mounted Close to CPU 8 Address A0 7 (Set as Desired) A1 6 A2 5 3 To Controller TCN75 INT/CMPTR I2C™ InterfaceSDA 1 SCL 2 4 3.1 Serial Data (SDA) 3.4 Address (A2,A1,A0) Bi-directional. Serial data is transferred in both Inputs. Sets the three Least Significant bits of the directionsusingthispin. TCN75 8-bit address. A match between the TCN75's address and the address specified in the serial bit 3.2 Serial Clock (SCL) stream must be made to initiate communication with the TCN75. Many protocol-compatible devices with Input.ClocksdataintoandoutoftheTCN75. otheraddressesmaysharethesame2-wirebus. 3.3 INT/CMPTR 3.5 Slave Address OpenCollector,ProgrammablePolarity.InComparator ThefourMostSignificantbitsoftheAddressByte(A6, mode, unconditionally driven active any time A5,A4,A3)arefixedto1001[B]. ThestatesofA2, A1 temperature exceeds the value programmed into the andA0intheserialbitstreammustmatchthestatesof T register. INT/CMPTR will become inactive when SET the A2, A1 and A0 address inputs for the TCN75 to temperature subsequently falls below the T set- HYST respondwithanAcknowledge(indicatingtheTCN75is ting.(SeeSection5.0,RegisterSetandProgrammer's on the bus and ready to accept data). The Slave Model). In Interrupt mode, INT/CMPTR is also made AddressisrepresentedinTable3-1. active by TEMP exceeding T ; it is unconditionally SET RESETtoitsinactivestatebyreadinganyregistervia the 2-wire bus. If and when temperature falls below TABLE 3-1: TCN75 SLAVE ADDRESS T ,INT/CMPTRisagaindrivenactive.Readingany HYST 1 0 0 1 A2 A1 A0 registerwillcleartheT interrupt.InInterruptmode, HYST MSB LSBS theINT/CMPTRoutputisunconditionallyRESETupon enteringShutdownmode.Ifprogrammedasanactive- low output, it can be wire-ORed with any number of 3.6 Comparator/Interrupt Modes otheropencollectordevices.Mostsystemswillrequire INT/CMPTRbehavesdifferentlydependingonwhether apull-upresistorforthisconfiguration. the TCN75 is in Comparator mode or Interrupt mode. Note that current sourced from the pull-up resistor Comparator modeis designedfor simplethermostatic causespowerdissipationandmaycauseinternalheat- operation. INT/CMPTR will go active anytime TEMP ing of the TCN75. To avoid affecting the accuracy of exceeds T . When in Comparator mode, INT/ SET ambient temperature readings, the pull-up resistor CMPTR will remain active until TEMP falls below should be made as large as possible. INT/CMPTR's T , whereupon it will RESET to its inactive state. HYST output polarity may be programmed by writing to the The state of INT/CMPTR is maintained in Shutdown INT/CMPTR POLARITY bit in the CONFIG register. mode when the TCN75 is in Comparator mode. In Thedefaultisactivelow. Interrupt mode, INT/CMPTR will remain active indefinitely, even if TEMP falls below T , until any HYST register is read via the 2-wire bus. Interrupt mode is better suitedtointerrupt driven microprocessor-based  DS21490B-page 6 2002MicrochipTechnologyInc.

TCN75 systems. The INT/CMPTR output may be wire-OR'ed TABLE 4-1: SERIALBUSCONVENTIONS withotherinterruptsourcesinsuchsystems.Notethat apull-upresistorisnecessaryonthispinsinceitisan Term Explanation open-drain output. Entering Shutdown mode will Transmitter Thedevicesendingdatatothebus. unconditionally RESET INT/CMPTR when in Interrupt Receiver Thedevicereceivingdatafromthebus. mode. Master Thedevicewhichcontrolsthebus:initiating transfers(START),generatingtheclock,and 4.0 SHUTDOWN MODE terminatingtransfers(STOP). Slave Thedeviceaddressedbythemaster. Whentheappropriatebitissetintheconfigurationreg- ister(CONFIG)theTCN75entersitslowpower Shut- START Auniqueconditionsignalingthebeginningof down mode(I = 1µA, typical) and the temperature- atransferindicatedbySDAfalling(High- DD Low)whileSCLishigh. to-digital conversion process is halted. The TCN75's bus interface remains active and TEMP, T , and STOP Auniqueconditionsignalingtheendofa SET T maybereadfromandwrittento.Transitionson transferindicatedbySDArising(Low-High) HYST whileSCLishigh. SDAorSCLduetoexternalbusactivitymayincrease the standby power consumption. If the TCN75 is in ACK AReceiveracknowledgesthereceiptofeach Interruptmode,thestateofINT/CMPTRwillbeRESET bytewiththisuniquecondition.TheReceiver drivesSDAlowduringSCLhighoftheACK uponenteringShutdownmode. clock-pulse.TheMasterprovidestheclock pulsefortheACKcycle. 4.1 Fault Queue NOTBusy Whenthebusisidle,bothSDA&SCLwill Tolessentheprobabilityofspuriousactivationof INT/ remainhigh. CMPTR the TCN75 may be programmed to filter out DataValid ThestateofSDAmustremainstableduring transient events. This is done by programming the theHighperiodofSCLinorderforadatabit desired value into the Fault Queue. Logic inside the tobeconsideredvalid.SDAonlychanges TCN75 will prevent the device from triggering INT/ statewhileSCLislowduringnormaldata CMPTRunlesstheprogrammednumberofsequential transfers.(SeeSTARTandSTOPcondi- tions). temperature-to-digital conversions yield the same qualitativeresult.Inotherwords,thevaluereportedin Alltransferstakeplaceundercontrolofahost,usually TEMPmustremainaboveT orbelowT forthe SET HYST a CPU or microcontroller, acting as the Master, which consecutivenumberofcyclesprogrammedintheFault provides the clock signal for all transfers. The TCN75 Queue.Uptoasix-cycle"filter" maybeselected. See always operates as a Slave. This serial protocol is Section5.0,RegisterSetandProgrammer'sModel. illustrated in Figure5-1. All data transfers have two phases; and all bytes are transferred MSB first. 4.2 Serial Port Operation AccessesareinitiatedbyaSTARTcondition,followed The Serial Clock input (SCL) and bi-directional data byadeviceaddressbyteandoneormoredatabytes. port (SDA) form a 2-wire bi-directional serial port for The device address byte includes a Read/Write programming and interrogating the TCN75. The selection bit. Each access must be terminated by a STOP condition. A convention called Acknowledge following table indicates TCN75 conventions that are (ACK)confirmsreceiptofeachbyte.NotethatSDAcan usedinthisbusscheme. change only during periods when SCL is LOW (SDA changes while SCL is HIGH are reserved for START andSTOPconditions). 4.3 START Condition (START) The TCN75 continuously monitors the SDA and SCL linesforaSTARTcondition(aHIGHtoLOWtransition of SDAwhileSCLisHIGH),andwillnotresponduntil thisconditionismet.  2002MicrochipTechnologyInc. DS21490B-page 7

TCN75 4.3.1 ADDRESSBYTE 4.3.4 STOPCONDITION(STOP) Immediately following the START condition, the host Communications must be terminated by a STOP mustnexttransmittheaddressbytetotheTCN75.The condition(aLOWtoHIGHtransitionofSDAwhileSCL fourMostSignificantbitsoftheAddressByte(A6,A5, isHIGH).TheSTOPconditionmustbecommunicated A4,A3)arefixedto1001(B).ThestatesofA2,A1and bythetransmittertotheTCN75. A0intheserialbitstreammustmatchthestatesofthe A2, A1 and A0 address inputs for the TCN75 to 4.3.5 POWERSUPPLY respondwithanAcknowledge(indicatingtheTCN75is To minimize temperature measurement error, the onthebusandreadytoacceptdata).Theeighthbitin TCN75-3.3MOA and TCN75-3.3MUA are factory cali- theAddressByteisaRead/WriteBit.Thisbitisa‘1’for bratedatasupplyvoltageof3.3V±5%andtheTCN75- areadoperationor‘0’forawriteoperation. 5.0MOAandTCN75-5.0MUAarefactorycalibratedat a supply voltage of 5V ±5%. Either device is fully 4.3.2 ACKNOWLEDGE(ACK) operational over the power supply voltage range of Acknowledge (ACK) provides a positive handshake 2.7Vto5.5V,butwithalowermeasurementaccuracy. between the host and the TCN75. The host releases The typical value of this power supply-related error is SDAaftertransmittingeightbitsthengeneratesaninth ±2°C. clock cycle to allow the TCN75 to pull the SDA line LOW toacknowledgethat it successfullyreceivedthe previouseightbitsofdataoraddress. 4.3.3 DATABYTE After a successful ACK of the address byte, the host mustnexttransmitthedatabytetobewrittenorclock out the data to be read. (See the appropriate timing diagrams.) ACK will be generated after a successful writeofadatabyteintotheTCN75.  DS21490B-page 8 2002MicrochipTechnologyInc.

TCN75 5.0 REGISTER SET AND D3 - D4: Fault Queue: Number of sequential PROGRAMMER'S MODEL temperature-to-digitalconversionswiththesameresult beforetheINT/CMPTRoutputisupdated: TABLE 5-1: REGISTER(POINT),8BITS, WRITEONLY D4 D3 NumberofConversions 0 0 1(Power-updefault) D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0] MustBeSetToZero Pointer 0 1 2 1 0 4 1 1 6 RegisterSelectionViathePointerRegister D1 D0 RegisterSelection 0 0 TEMP 0 1 CONFIG 1 0 T HYST 1 1 T SET TABLE 5-2: CONFIGURATIONREGISTER (CONFIG),8BITS,READ/ WRITE D D D D D D D D [7] [6] [5] [4] [3] [2] [1] [0] MustBeSet Fault INT/ COMP Shut- ToZero Queue CMPTR, /INT down Polarity D0:Shutdown: 0=NormalOperation 1=ShutdownMode D1:CMPTR/INT: 0=ComparatorMode 1=InterruptMode D2:INT/CMPTRPOLARITY: 0=ActiveLow 1=ActiveHigh  2002MicrochipTechnologyInc. DS21490B-page 9

TCN75 TABLE 5-3: TEMPERATURE (TEMP)REGISTER,16BITS,READONLY Thebinaryvalueinthisregisterrepresentsambienttemperaturefollowingaconversioncycle. D[15] D[14] D[13] D[12] D[11] D[10] D[9] D[8] D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0] MSB D7 D6 D5 D4 D3 D2 D1 LSB X X X X X X X TABLE 5-4: TEMPERATURE SET POINT(T )REGISTER,16BITS,READ/WRITE SET D[15] D[14] D[13] D[12] D[11] D[10] D[9] D[8] D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0] MSB D7 D6 D5 D4 D3 D2 D1 LSB X X X X X X X TABLE 5-5: HYSTERESIS (T )REGISTER,16BITS,READ/WRITE HYST D[15] D[14] D[13] D[12] D[11] D[10] D[9] D[8] D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0] MSB D7 D6 D5 D4 D3 D2 D1 LSB X X X X X X X In the TEMP, T , and T registers, each unit SET HYST valuerepresentsone-half degree(Celsius). Thevalue isin2's-complementbinaryformatsuchthatareading of 000000000b corresponds to 0°C. Examples of this temperature to binary value relationship are shown in Table5-6. TABLE 5-6: TEMPERATURE TODIGITAL VALUECONVERSION Temperature BinaryValue HEXValue +125°C 011111010 0FA +25°C 000110010 032 +0.5°C 000000001 001 0°C 000000000 00 0.5°C 111111111 1FF -25°C 111001110 1CE -40°C 110110000 1B0 -55°C 110010010 192 TABLE 5-7: TCN75’S REGISTERSETSUMMARY Name Description Width Read Write Notes TEMP AmbientTemperature 16 X 2'sComplementFormat TSET TemperatureSetpoint 16 X X 2'sComplementFormat T TemperatureHysteresis 16 X X 2'sComplementFormat HYST POINT RegisterPointer 8 X X CONFIG ConfigurationRegister 8 X X  DS21490B-page 10 2002MicrochipTechnologyInc.

TCN75 FIGURE5-1: TIMINGDIAGRAMS 1 9 1 9 1 9 1 0 0 1 A2 A1 A0R/W D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4D3 D2 D1 D0 STOP START Ack Ack No Ack Cond by Address Byte by Most Significant Data Byte by Least Significant Data Byte by by Master TCN75 Master Master Master (a) Typical 2-Byte Read From Preset Pointer Location Such as Temp, TOS, THYST 1 9 1 9 . . . . . 1 0 0 1 A2 A1 A0R/W 0 0 0 0 0 0 D1 D0 . . . . . START Ack Ack by Address Byte by Pointer Byte by Master TCN75 TCN75 1 9 1 9 1 9 1 0 0 1 A2 A1 A0R/W D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4D3 D2 D1 D0 STOP Repeat Ack Ack No Ack Cond START Address Byte by Most Significant Data Byte by Least Significant Data Byte by by by TCN75 Master Master Master Master (b) Typical Pointer Set Followed by Immediate Read for 2-Byte Register Such as Temp, TOS, THYST 1 9 1 9 1 0 0 1 A2 A1 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 STOP START Ack No Ack Cond by Address Byte by Data Byte by by Master TCN75T Master Master (c) Typical 1-Byte Read From Configuration Register with Preset Pointer  2002MicrochipTechnologyInc. DS21490B-page11

TCN75 TIMING DIAGRAMS (CONTINUED) Pd er STOConbyMast Pd er ck er STOConbyMast 9 No AbyMast 75 D0 9 AckbyCN T D1 D0 e D2 D1 Byt e 2 a D3 Byt D Dat D4 ata D3 ant D5 D D4 nific 91 D7D6 AckbyCN75 STOPCondbyMaster75 1 D7D6D5 Least Sig75 R/W T 9 AckbyCN 9 AckbyCN 0 0 T 0 T A D D e A1 e D1 D1 Byt 0A21 Address Byt D4D2D3 guration Byte D4D2D3 nificant Data 0 0 onfi D5 Sig 19 D01 RepeatAckSTARTbybyTCN75Masteron Register 19 D000 AckCbyTCN75 19 D0D6D7 AckMost byTCN75 0 urati D1 D1 g 0 e nfi 0 e 0 e 0 Byt Co 0 Byt 0 Byt 0 nter rom 0 nter 0 nter 0 Poi ad f 0 Poi 0 Poi e R 0 e 0 0 19 0 AckbyCN75 mmediat 19 0 AckbyCN75T 19 0 AckbyCN75 R/W T by I R/W T R/W T A0 wed A0 rite A0 1 o 1 W 1 A2A s Byte et Foll A2A s Byte gister A2A s Byte Write 001 Addres al Pointer S 100 Addres guration Re 100 Addres nd T HYST 1 1 pic 1 1 nfi 1 1 aS STARTbyMaster (d) Ty STARTbyMaster (e) Co STARTbyMaster (f) TO  DS21490B-page 12 2002MicrochipTechnologyInc.

TCN75 6.0 PACKAGING INFORMATION 6.1 Package Marking Information Packagemarkingdatanotavailableatthistime. 6.2 Taping Form Component Taping Orientation for 8-Pin MSOP Devices User Direction of Feed PIN 1 W P Standard Reel Component Orientation for TR Suffix Device Carrier Tape, Number of Components Per Reel and Reel Size Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 8-Pin MSOP 12 mm 8 mm 2500 13 in Component Taping Orientation for 8-Pin SOIC (Narrow) Devices User Direction of Feed PIN 1 W P Standard Reel Component Orientation for TR Suffix Device Carrier Tape, Number of Components Per Reel and Reel Size Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 8-Pin SOIC (N) 12 mm 8 mm 2500 13 in  2002MicrochipTechnologyInc. DS21490B-page13

TCN75 6.3 Package Dimensions 8-Pin MSOP PIN 1 .122 (3.10) .197 (5.00) .114 (2.90) .189 (4.80) .026 (0.65) TYP. .122 (3.10) .114 (2.90) .043 (1.10) MAX. 6° MAX. .008 (0.20) .005 (0.13) .016 (0.40) .006 (0.15) .028 (0.70) .010 (0.25) .002 (0.05) .016 (0.40) Dimensions: inches (mm) 8-Pin SOIC PIN1 .157 (3.99) .244 (6.20) .150 (3.81) .228 (5.79) .050 (1.27) TYP. .197 (5.00) .189 (4.80) .069 (1.75) .053 (1.35) 8°MAX.. .010 (0.25) .007 (0.18) .020 (0.51) .010 (0.25) .013 (0.33) .004 (0.10) .050 (1.27) .016 (0.40) Dimensions: inches (mm)  DS21490B-page 14 2002MicrochipTechnologyInc.

TCN75 SALES AND SUPPORT DataSheets ProductssupportedbyapreliminaryDataSheetmayhaveanerratasheetdescribingminoroperationaldifferencesandrecom- mendedworkarounds.Todetermineifanerratasheetexistsforaparticulardevice,pleasecontactoneofthefollowing: 1. YourlocalMicrochipsalesoffice 2. TheMicrochipCorporateLiteratureCenterU.S.FAX:(480)792-7277 3. TheMicrochipWorldwideSite(www.microchip.com) Pleasespecifywhichdevice,revisionofsiliconandDataSheet(includeLiterature#)youareusing. NewCustomerNotificationSystem Registeronourwebsite(www.microchip.com/cn)toreceivethemostcurrentinformationonourproducts.  2002MicrochipTechnologyInc. DS21490B-page15

TCN75 NOTES:  DS21490B-page 16 2002MicrochipTechnologyInc.

TCN75 Information contained in this publication regarding device Trademarks applicationsandthelikeisintendedthroughsuggestiononly andmaybesupersededbyupdates.Itisyourresponsibilityto The Microchip name and logo, the Microchip logo, FilterLab, ensure that your application meets with your specifications. KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER, No representation or warranty is given and no liability is PICSTART,PROMATE, SEEVAL and TheEmbedded Control assumedbyMicrochipTechnologyIncorporatedwithrespect SolutionsCompanyareregisteredtrademarksofMicrochipTech- totheaccuracyoruseofsuchinformation,orinfringementof nologyIncorporatedintheU.S.A.andothercountries. patentsorotherintellectualpropertyrightsarisingfromsuch dsPIC,ECONOMONITOR,FanSense,FlexROM,fuzzyLAB, useorotherwise.UseofMicrochip’sproductsascriticalcom- In-Circuit Serial Programming, ICSP, ICEPIC, microPort, ponentsinlifesupportsystemsisnotauthorizedexceptwith Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, expresswritten approvalbyMicrochip.Nolicensesarecon- MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode veyed,implicitlyorotherwise,underanyintellectualproperty andTotalEndurancearetrademarksofMicrochipTechnology rights. IncorporatedintheU.S.A. SerializedQuickTurnProgramming(SQTP)isaservicemark ofMicrochipTechnologyIncorporatedintheU.S.A. All other trademarks mentioned herein are property of their respectivecompanies. © 2002, Microchip Technology Incorporated, Printed in the U.S.A.,AllRightsReserved. Printedonrecycledpaper. MicrochipreceivedQS-9000qualitysystem certificationforitsworldwideheadquarters, designandwaferfabricationfacilitiesin ChandlerandTempe,ArizonainJuly1999 andMountainView,CaliforniainMarch2002. TheCompany’squalitysystemprocessesand proceduresareQS-9000compliantforits PICmicro®8-bitMCUs,KEELOQ®codehopping devices,SerialEEPROMs,microperipherals, non-volatilememoryandanalogproducts.In addition,Microchip’squalitysystemforthe designandmanufactureofdevelopment systemsisISO9001certified.  2002MicrochipTechnologyInc. DS21490B-page17

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