TC664/TC665 SMBus™ PWM Fan Speed Controllers With Fan Fault Detection Features Description • Temperature Proportional Fan Speed for Reduced The TC664/TC665 devices are PWM mode fan speed Acoustic Noise and Longer Fan Life controllers with FanSense technology for use with • FanSense™ Protects against Fan Failure and brushless DC fans. These devices implement temper- Eliminates the Need for 3-wire Fans ature proportional fan speed control which lowers acoustic fan noise and increases fan life. The voltage • Over Temperature Detection (TC665) at V (Pin1) represents temperature and is typically • Efficient PWM Fan Drive IN provided by an external thermistor or voltage output • Provides RPM Data temperature sensor. The PWM output (V ) is OUT • 2-Wire SMBus™-Compatible Interface adjusted between 30% and 100%, based on the volt- • Supports Any Fan Voltage age at VIN. The PWM duty cycle can also be pro- • Software Controlled Shutdown Mode for "Green" grammed via SMBus to allow fan speed control without Systems the need for an external thermistor. If VIN is not con- nected, the TC664/TC665 will start driving the fan at a • Supports Low Cost NTC/PTC Thermistors default duty cycle of 39.33%. See Section4.3, "Fan • Space Saving 10-Pin MSOP Package Startup", for more details). • Temperature Range: -40°C to +85ºC In normal fan operation, a pulse train is present at the Applications SENSE pin (Pin 8). The TC664/TC665 use these pulses to calculate the fan revolutions per minute • Personal Computers & Servers (RPM). The fan RPM data is used to detect a worn out, • LCD Projectors stalled, open or unconnected fan. An RPM level below the user-programmable threshold causes the TC664/ • Datacom & Telecom Equipment TC665 to assert a logic low alert signal (FAULT). The • Fan Trays default threshold value is 500RPM. Also, if this condi- • File Servers tion occurs, FF (bit 0<0>) in the Status Register will also • Workstations be set to a ‘1’. • General Purpose Fan Speed Control An over-temperature condition is indicated when the voltage at V exceeds 2.6V (typical). The TC664/ Package Type IN TC665 devices indicate this by setting OTF(bit 5<X>) in the Status Register to a '1'. The TC665 device also 10-Pin MSOP pulls the FAULT line low during an over-temperature condition. VIN 1 10 VDD The TC664/TC665 devices are available in a 10-Pin MSOP package and consume 150µA during opera- CF 2 9 VOUT tion. The devices can also enter a low-power shutdown TC664 mode (5µA, typ.) by setting the appropriate bit in the SCLK 3 TC665 8 SENSE Configuration Register. The operating temperature SDA 4 7 NC range for these devices is -40°C to +85ºC. GND 5 6 FAULT  2002-2013 Microchip Technology Inc. DS21737B-page 1

TC664/TC665 Functional Block Diagram TC664/TC665 – Note V VIN – OTF + VDD OTF + Control + V Logic OUT – Start-up FAULT Timer C F Missing V Pulse MIN Clock Detect Generator 50k  SENSE SCLK – Serial Port Interface 100mV (typ.) SDA NC GND Note: OTF condition applies for the TC665 device only. DS21737B-page 2  2002-2013 Microchip Technology Inc.

TC664/TC665 1.0 ELECTRICAL PIN FUNCTION TABLE CHARACTERISTICS Name Function Absolute Maximum Ratings * V Analog Input IN VDD..................................................................................6.5V CF Analog Output Input Voltages ....................................-0.3V to (V + 0.3V) SCLK Serial Clock Input DD Output Voltages ..................................-0.3V to (V + 0.3V) SDA Serial Data In/Out (Open Drain) DD Storage temperature.....................................-65°C to +150°C GND Ground Ambient temp. with power applied................-40°C to +125°C FAULT Digital (Open Drain) Output Maximum Junction Temperature, TJ.............................150°C NC No Connection ESD protection on all pins4kV SENSE Analog Input *Notice: Stresses above those listed under “Maximum rat- V Digital Output ings” may cause permanent damage to the device. This is a OUT stress rating only and functional operation of the device at VDD Power Supply Input those or any other conditions above those indicated in the operational listings of this specification is not implied. Expo- sure to maximum rating conditions for extended periods may affect device reliability. ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise noted, all limits are specified for V = 3.0V to 5.5V, -40°C <T < +85°C. DD A Parameters Sym Min Typ Max Units Conditions Supply Voltage V 3.0 — 5.5 V DD Operating Supply Current I — 150 300 µA Pins 8, 9 Open DD Shutdown Mode Supply Current I — 5 10 µA Pins 8, 9 Open DDSHDN V PWM Output OUT V Rise Time t — — 50 µsec I = 5mA, Note1 OUT R OH V Fall Time t — — 50 µsec I = 1mA, Note1 OUT F OL Sink Current at V Output I 1.0 — — mA V = 10% of V OUT OL OL DD Source Current at V Output I 5.0 — — mA V = 80% of V OUT OH OH DD PWM Frequency F 26 30 34 Hz C = 1µF F V Input IN V Input Voltage for 100% PWM duty-cycle V 2.45 2.6 2.75 V IN C(MAX) V - V V 1.25 1.4 1.55 V C(MAX) C(MIN) CRANGE V Input Resistance — 10M —  V = 5.0V IN DD V Input Leakage Current I -1.0 — +1.0 µA IN IN SENSE Input SENSE Input Threshold Voltage with V 80 100 120 mV THSENSE Respect to GND FAULT Output FAULT Output LOW Voltage V — — 0.3 V I = 2.5mA OL OL FAULT Output Response Time t — 2.4 — sec FAULT Fan RPM-to-Digital Output Fan RPM ERROR -15 — +15 % RPM > 1600 2-Wire Serial Bus Interface Logic Input High V 2.1 — — V Note2 IH Logic Input Low V — — 0.8 V IL Logic Output Low V — — 0.4 V I = 3mA OL OL Input Capacitance SDA, SCLK C — 10 15 pF Note1 IN I/O Leakage Current I -1.0 — +1.0 µA LEAK SDA Output Low Current I 6 — — mA V = 0.6V OLSDA OL Note 1: Not production tested, ensured by design, tested during characterization. 2: For 5.0V < V  5.5V, the limit for V = 2.2V. DD IH  2002-2013 Microchip Technology Inc. DS21737B-page 3

TC664/TC665 TEMPERATURE SPECIFICATIONS Electrical Characteristics: Unless otherwise noted, all parameters apply at V = 3.0V to 5.5V DD Parameters Symbol Min Typ Max Units Conditions Temperature Ranges: Specified Temperature Range T -40 — +85 °C A Operating Temperature Range T -40 — +125 °C A Storage Temperature Range T -65 — +150 °C A Thermal Package Resistances: Thermal Resistance, 10 Pin MSOP  — 113 — °C/W JA TIMING SPECIFICATIONS Electrical Characteristics: Unless otherwise noted, all limits are specified for V = 3.0V to 5.5V, DD -40°C <T < +85°C A Parameters Sym Min Typ Max Units Conditions SMBus Interface (See Figure1-1) Serial Port Frequency f 0 — 100 kHz Note1 SC Low Clock Period t 4.7 — — µsec Note1 LOW High Clock Period t 4.7 — — µsec Note1 HIGH SCLK and SDA Rise Time t — — 1000 nsec Note1 R SCLK and SDA Fall Time t — — 300 nsec Note1 F Start Condition Setup Time t 4.7 — — µsec Note1 SU(START) SCLK Clock Period Time t 10 — — µsec Note1 SC Start Condition Hold Time t 4.0 — — µsec Note1 H(START) Data in SetupTime to SCLK t 250 — — nsec Note1 SU-DATA High Data in Hold Time after SCLK t 300 — — nsec Note1 H-DATA Low Stop Condition Setup Time t 4.0 — — µsec Note1 SU(STOP) Bus Free Time Prior to New t 4.7 — µsec Note1 and Note2 IDLE Transition Note 1: Not production tested, ensured by design, tested during characterization. 2: Time the bus must be free before a new transmission can start. DS21737B-page 4  2002-2013 Microchip Technology Inc.

TC664/TC665 SMBus Write Timing Diagram A B C D EE F G H I J K L M tLOW tHIGH SCLK SDA tSU(START) tH(START) tSU-DATA tH-DATA tSU(STOP)tIDLE A = Start Condition F = Acknowledge Bit Clocked into Master J = Acknowledge Clocked into Master B = MSB of Address Clocked into Slave G = MSB of Data Clocked into Slave K = Acknowledge Clock Pulse C = LSB of Address Clocked into Slave H = LSB of Data Clocked into Slave L = Stop Condition, Data Executed by Slave D = R/W Bit Clocked into Slave I = Slave Pulls SDA Line Low M = New Start Condition E = Slave Pulls SDA Line Low SMBus Read Timing Diagram A B C D E F G H I J K tLOW tHIGH SCLK SDA tSU(START)tH(START) tSU-DATA tSU(STOP) tIDLE A = Start Condition E = Slave Pulls SDA Line Low I = Acknowledge Clock Pulse B = MSB of Address Clocked into Slave F = Acknowledge Bit Clocked into Master J = Stop Condition C = LSB of Address Clocked into Slave G = MSB of Data Clocked into Master K = New Start Condition D = R/W Bit Clocked into Slave H = LSB of Data Clocked into Master FIGURE 1-1: Bus Timing Data.  2002-2013 Microchip Technology Inc. DS21737B-page 5

TC664/TC665 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 180 14 175 Pins 8 and 9 Open VDD = 5.5 V VOL = 0.1VDD 12 170 A) 165 VDD = 3.0 V m 10 VDD = 5.5 V (µA)DD 111556050 Current ( 8 VDD = 5.0 V I 145 nk 6 140 Si VDD = 4.0 V 4 135 VDD = 3.0 V 130 2 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C) Temperature (°C) FIGURE 2-1: I vs. Temperature. FIGURE 2-4: PWM, Sink Current vs. DD Temperature. 9.000 50 8.000 45 IOL = 2.5 mA A) 7.000 VDD = 3.0 V (µD6.000 VDD = 5.5 V mV) 40 n ID5.000 (OL 35 w V Shutdo 34..000000 VDD = 3.0 V Fault 2350 VDD = 4.0 V VDVDD =D =5. 55 .0V V 2.000 20 1.000 15 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (ºC) Temperature (ºC) FIGURE 2-2: I Shutdown vs. FIGURE 2-5: Fault V vs. Temperature. DD OL Temperature. 32 35 CF = 1.0 µF A) 30 VOH = 0.8VDD Hz) 31 nt (m 25 VDD = 5.5 V ncy ( 30 VDD = 5.5 V ce Curre 1250 VDD = 5.0 V VDD = 4.0 V M Freque 29 VDD = 3.0 V ur W So 10 VDD = 3.0 V P 28 5 27 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C) Temperature (ºC) FIGURE 2-3: PWM, Source Current vs. FIGURE 2-6: PWM Frequency vs. Temperature. Temperature. DS21737B-page 6  2002-2013 Microchip Technology Inc.

TC664/TC665 50 10 VOL = 0.4 V 9 CF = 1.0 uF 45 8 A I (mA)OL3450 VDD = 5.5 V VDD = 5.0 V M Error (%) 4567 VDD = 3.0 V SD 30 RP 3 25 VDD = 4.0 V 2 VDD = 5.0 V VDD = 3.0 V 1 VDD = 5.5 V 20 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (ºC) Temperature (ºC) FIGURE 2-7: SDA I vs. Temperature. FIGURE 2-10: RPM %error vs. OL Temperature. 2.620 45 2.615 VDD = 5.5 V V) 2.610 m 40 V) 2.605 esis ( 35 V (CMax22..569050 VDD = 5.0 V Hyster 30 VDD = 3.0V 2.590 VDD = 4.0 V SE N 2.585 HSE 25 VDD = 5.5V 2.580 VDD = 3.0 V VT 2.575 20 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (ºC) Temperature (ºC) FIGURE 2-8: V vs. Temperature. FIGURE 2-11: Sense Threshold CMAX (V ) Hysteresis vs. Temperature. THSENSE 1.205 150 V) m 1.200 VDD = 3.0 V s ( 140 esi 130 VDD = 3.0 V (V)N1.195 VDD = 5.5 V VDD = 5.0 V yster 120 MI H VC1.190 K 110 VDD = 5.0 V L C S 100 1.185 VDD = 4.0 V & A 90 D 1.180 S 80 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (ºC) Temperature (ºC) FIGURE 2-9: VCMIN vs. Temperature. FIGURE 2-12: SDA, SCLK Hysteresis vs. Temperature.  2002-2013 Microchip Technology Inc. DS21737B-page 7

TC664/TC665 3.0 PIN FUNCTIONS 3.6 Analog Input (SENSE) The descriptions of the pins are listed in Table3-1. Fan current pulses are detected at this pin. These pulses are counted and used in the calculation of the TABLE 3-1: PIN FUNCTION TABLE fan RPM. 3.7 Digital Output (V ) Name Function OUT V Analog Input This active high complimentary output drives the base IN of an external transistor or the gate of a MOSFET. C Analog Output F SCLK Serial Clock Input 3.8 Power Supply Input (V ) DD SDA Serial Data In/Out (Open Drain) The V pin with respect to GND provides power to the DD GND Ground device. This bias supply voltage may be independent of FAULT Digital (Open Drain) Output the fan power supply. NC No Connection SENSE Analog Input V Digital Output OUT V Power Supply Input DD 3.1 Analog Input (V ) IN A voltage range of 1.62V to 2.6V (typical) on this pin drives an active duty-cycle of 30% to 100% on the V pin. OUT 3.2 Analog Output (C ) F Positive terminal for the PWM ramp generator timing capacitor. The recommended C is 1µF for 30Hz F PWM operation. 3.3 SMBus Serial Clock Input (SCLK) Clocks data into and out of the TC664/TC665. See Section5.0 for more information on the serial interface. 3.4 Serial Data (Bi-directional) (SDA) Serial data is transferred on the SMBus in both direc- tions using this pin. See Section5.0 for more informa- tion on the serial interface. 3.5 Digital (Open Drain) Output (FAULT) When the fan’s RPM falls below the user-set RPM threshold (or OTF occurs with TC665), a logic low signal is asserted. DS21737B-page 8  2002-2013 Microchip Technology Inc.

TC664/TC665 4.0 DEVICE OPERATION can be set to provide a predictive fan failure feature. This feature can be used to give a system warning and, The TC664/TC665 devices allow you to control, moni- in many cases, help to avoid a system thermal shut- tor and communicate (via SMBus) fan speed for 2-wire down condition. The fan RPM data and threshold reg- and 3-wire DC brushless fans. By pulse width modulat- isters are available over the SMBus interface which ing (PWM) the voltage across the fan, the TC664/ allows for complete system control. TC665 controls fan speed according to the system tem- The TC664/TC665 devices are identical in every perature.The goal of temperature proportional fan aspect except for how they indicate an over-tempera- speed control is to reduce fan power consumption, ture condition. When V voltage exceeds 2.6V (typi- increase fan life and reduce system acoustic noise. IN cal), both devices will set OTF (bit 5<X>) in the Status With the TC664/TC665 devices, fan speed can be con- Register to a '1'. The TC665 will additionally pull the trolled by the analog input V or the SMBus interface, IN FAULT output low during an over-temperature allowing for high system flexibility. condition. The TC664/TC665 devices also measure and monitor fan revolutions per minute (RPM). A fan’s speed (RPM) is a measure of its health. As a fan’s bearings wear out, the fan slows down and eventually stops (locked rotor). By monitoring the fan’s RPM level, the TC664/TC665 devices can detect open, shorted, unconnected and locked rotor fan conditions. The fan speed threshold +5V +12V C 2 1µF R1 NTC Thermistor FAN 34.8k 100k @ 25°C 10 R 1 9 ISO VIN VDD VOUT C 1 715 R2 0.01µF 14.7k C 2 8 SENSE CF SENSE CF 1.0µF 0.1µF R SENSE TC664 R TC665 7 SCLK +5V NC 20k 3 SCLK +5V PIC® +5V RFAULT Microcontroller 4 FAULT 6 20k SDA GND 5 R SDA 20k Note: Refer to Table7-1 for R value. SENSE FIGURE 4-1: Typical Application Circuit.  2002-2013 Microchip Technology Inc. DS21737B-page 9

TC664/TC665 4.1 Fan Speed Control Methods The speed of a DC brushless fan is proportional to the T voltage across it. For example, if a fan’s rating is 5000RPM at 12V, it’s speed would be 2500RPM at 6V. This, of course, will not be exact, but should be close. There are two main methods for fan speed control. The Ton Toff first is pulse width modulation (PWM) and the second is linear. Using either method the total system power requirement to run the fan is equal. The difference D = Duty Cycle T = Period between the two methods is where the power is con- D = Ton / T T = 1/F F = Frequency sumed. The following example compares the two methods for FIGURE 4-2: Duty Cycle Of A PWM a 12V, 120mA fan running at 50% speed. With 6V Waveform. applied across the fan, the fan draws an average cur- rent of 68mA. Using a linear control method, there is The TC664/TC665 devices generate a pulse train with 6V across the fan and 6V across the drive element. a typical frequency of 30Hz (CF = 1µF). The duty cycle With 6V and 68mA, the drive element is dissipating can be varied from 30% to 100%. The pulse train gen- 410mW of power. Using the PWM approach, the fan is erated by the TC664/TC665 devices drives the gate of modulated at a 50% duty cycle, with most of the 12V an external N-channel MOSFET or the base of an NPN being dropped across the fan. With 50% duty cycle, the transistor (Figure4-3). See Section7.5 for more infor- fan draws an RMS current of 110mA and an average mation on output drive device selection. current of 72mA. Using a MOSFET with a 1 RDS (on) (a fairly typical value for this low current) the power dis- 12V sipation in the drive element would be: 12mW (Irms2 * RDS ). Using a standard 2N2222A NPN transistor (on) (assuming a Vce-sat of 0.8V), the power dissipation FAN would be 58mW (Iavg* Vce-sat). V DD The PWM approach to fan speed control causes much less power dissipation in the drive element. This allows D smaller devices to be used and will not require any spe- Qdrive cial heatsinking to get rid of the power being dissipated TC664 VOUT G in the package. TC665 S GND The other advantage to the PWM approach is that the voltage being applied to the fan is always near 12V. This eliminates any concern about not supplying a high FIGURE 4-3: PWM Fan Drive. enough voltage to run the internal fan components which is very relevant in linear fan speed control. By modulating the voltage applied to the gate of the MOSFET Qdrive, the voltage applied to the fan is also 4.2 PWM Fan Speed Control modulated. When the V pulse is high, the gate of OUT the MOSFET is turned on, pulling the voltage at the The TC664/TC665 devices implement PWM fan speed drain of Qdrive to zero volts. This places the full 12V control by varying the duty cycle of a fixed frequency across the fan for the Ton period of the pulse. When the pulse train. The duty cycle of a waveform is the on time duty cycle of the drive pulse is 100% (full on, Ton = T), divided by the total period of the pulse. For example, the fan will run at full speed. As the duty cycle is given a 100Hz waveform (10msec.) with an on time of decreased (pulse on time “Ton” is lowered), the fan will 5.0msec., the duty cycle of this waveform is 50% slow down proportionally. With the TC664/TC665 (5.0msec./10.0msec.). An example of this is shown in devices, the duty cycle can be controlled through the Figure4-2. analog input pin (V ), or through the SMBus interface, IN by using the Duty-Cycle Register. See Section4.5 for more details on duty cycle control. DS21737B-page 10  2002-2013 Microchip Technology Inc.

TC664/TC665 4.3 Fan Startup linear. If a frequency of 15Hz is desired, a capacitor value of 2.0µF should be used. The frequency should Often overlooked in fan speed control is the actual be kept in the range of 15Hz to 35Hz. See Section7.2 startup control period. When starting a fan from a non- for more details. operating condition (fan speed is zero RPM), the desired PWM duty cycle or average fan voltage can not 4.5 Duty Cycle Control (V and Duty- IN be applied immediately. Since the fan is at a rest posi- Cycle Register) tion, the fan’s inertia must be overcome to get it started. The best way to accomplish this is to apply the full rated The duty cycle of the V PWM drive signal can be OUT voltage to the fan for one second. This will ensure that controlled by either the V analog input pin or by the IN in all operating environments, the fan will start and Duty-Cycle Register, which is accessible via the operate properly. SMBus interface. The control method is selectable via DUTYC (bit 5<0>) of the Configuration Register. The The TC664/TC665 devices implement this fan control default state is for V control. If V control is selected feature without any user programming. During a power IN IN and the V pin is open, the PWM duty cycle will default up or release from shutdown condition, the TC664/ IN to 39.33%. The duty cycle control method can be TC665 devices force the V output to a 100% duty OUT changed at any time via the SMBus interface. cycle, turning the fan full on for one second (C = F 1.0µF). Once the one second period is over, the V is an analog input pin. A voltage in the range of IN TC664/TC665 devices will look to see if SMBus or V 1.62V to 2.6V (typical) at this pin commands a 30% to IN control has been selected in the Configuration Register 100% duty cycle on the V output, respectively. If the OUT (DUTYC bit 5<0>). Based on this register, the device voltage at V falls below the 1.62V level, the duty IN will choose which input will control the V duty cycle. cycle will not go below 30%. The relationship between OUT Duty cycle control based on V is the default state. If the voltage at V and the PWM duty cycle is shown in IN IN V control is selected and the V pin is open (nothing Figure4-5. IN IN is connected to the V pin), then the TC664/TC665 will IN default to a duty cycle of 39.33%. This sequence is 100 shown in Figure4-4. This integrated one second 90 startup feature will ensure the fan starts up every time. 80 %) 70 e ( 60 Power Up or Release ycl 50 from SHDN C y 40 Dut 30 One Second Pulse 20 10 0 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 YES Select SMBus Input Voltage (V ) IN NO FIGURE 4-5: PWM Duty Cycle vs. Input Default PWM: 39.33% SMBus PWM Duty Cycle Control Voltage, VIN (Typical). YES VIN Open? For the TC665 device, if the voltage at VIN exceeds the 2.6V (typical) level, an over temperature fault indica- NO tion will be given by asserting a low at the FAULT output VIN PWM Duty and setting OTF (bit 5<X>) in the Status Register to a Cycle Control ‘1’. A thermistor network or any other voltage output ther- FIGURE 4-4: Power-up Flow Chart. mal sensor can be used to provide the voltage to the V input. The voltage supplied to the V pin can actu- IN IN 4.4 PWM Drive Frequency (C ) ally be thought of as a temperature. For example, the F circuit shown in Figure4-6 represents a typical solution As previously discussed, the TC664/TC665 devices for a thermistor based temperature sensing network. operate with a fixed PWM frequency. The frequency of See Section7.3 for more details. the PWM drive output (V ) is set by a capacitor at the OUT C pin. With a 1µF capacitor at the C pin, the typical F F drive frequency is 30Hz. This frequency can be raised, by decreasing the capacitor value, or lowered, by increasing the capacitor value. The relationship between the capacitor value and the PWM frequency is  2002-2013 Microchip Technology Inc. DS21737B-page 11

TC664/TC665 This method of control allows for more sophisticated algorithms to be implemented by utilizing microcon- +5V trollers or microprocessors in the system. In this way, multiple system temperatures can be taken into account for determining the necessary fan speed. As shown in Table4-1, the duty cycle has more of a R NTC Thermistor 1 step function look than did the V control approach. 34.8k 100k @ 25°C IN Because the step changes in duty cycle are small, they are rarely audibly noticeable, especially when the fans V IN are integrated into the system. C 1 TC664 R2 0.01µF TC665 4.6 PWM Output (VOUT) 14.7k GND The V pin is designed to drive a low cost NPN tran- OUT sistor or N-channel MOSFET as the low side switching element in the system, as is shown in Figure4-7. The switching element is used to turn the fan on and off at FIGURE 4-6: NTC Thermistor Sensor the PWM duty cycle commanded by the V output OUT Network. This output has complementary drive (pull up and pull The second method for controlling the duty cycle of the down) and is optimized for driving NPN transistors or PWM output (VOUT) is via the SMBus interface. In order N-channel MOSFETs (see typical characteristic curves to control the PWM duty cycle via the SMBus, DUTYC for sink and source current capability of the V drive OUT (bit 5<0>) of the Configuration Register (Register6.3) stage). must be set to a ‘1’. This tells the TC664/TC665 device The external device needs to be chosen to fit the volt- that the duty cycle should be controlled by the Duty age and current rating of the fan in a particular applica- Cycle Register. Next, the Duty Cycle Register must be tion (Refer to Section7.5 Output Drive Device programmed to the desired value. The Duty Cycle Reg- Selection). NPN transistors are often a good choice for ister is a 4 Bit read/write register that allows duty cycles low current fans. If a NPN transistor is chosen, a base from 30% to 100% to be programmed. Table4-1 shows current limiting resistor should be used. When using a the binary codes for each possible duty cycle. MOSFET as the switching element, it is sometimes a good idea to have a gate resistor to help slow down the TABLE 4-1: DUTY-CYCLE REGISTER turn on and turn off of the MOSFET. As with any switch- (DUTY-CYCLE) 4-BITS, ing waveform, fast rising and falling edges can READ/WRITE sometimes lead to noise problems. Duty-Cycle Register (Duty Cycle) As previously stated, the V output will go to 100% OUT duty cycle during power up and release from shutdown D(3) D(2) D(1) D(0) Duty-Cycle conditions. The V output only shuts down when OUT 0 0 0 0 30% commanded to do so via the Configuration Register 0 0 0 1 34.67% (SDM (bit 0<0>)). Even when a locked rotor condition 0 0 1 0 39.33% (default for VIN is detected, the VOUT output will continue to pulse at open and when SMBus the programmed duty cycle. is not selected) 4.7 Sensing Fan Operation (SENSE) 0 0 1 1 44% 0 1 0 0 48.67% The TC664/TC665 devices also feature Microchip’s 0 1 0 1 53.33% proprietary FanSense technology. During normal fan operation, commutation occurs as each pole of the fan 0 1 1 0 58% is energized. The fan current pulses created by the fan 0 1 1 1 62.67% commutation are sensed using a low value current 1 0 0 0 67.33% sense resistor in the ground return leg of the fan circuit. 1 0 0 1 72% The voltage pulses across the sense resistor are then 1 0 1 0 76.67% AC coupled through a capacitor to the SENSE pin of the TC664/TC665 device. These pulses are utilized for 1 0 1 1 81.33% calculating the RPM of the fan. The threshold voltage 1 1 0 0 86% for the SENSE pin is 100mV (typical). The peak of the 1 1 0 1 90.67% voltage pulse at the SENSE pin must exceed the 1 1 1 0 95.33% 100mV (typical) threshold in order for the pulse to be 1 1 1 1 100% counted in the fan RPM measurement. DS21737B-page 12  2002-2013 Microchip Technology Inc.

TC664/TC665 See Section7.4 for more details on selecting the 4.8 Fan Fault Threshold and appropriate current sense resistor and coupling Indication (FAULT) capacitor values. For the TC664/TC665 devices, a fault condition exists whenever a fan’s sensed RPM level falls below the user programmable threshold. The RPM threshold value for fan fault detection is set in the FAN_FAULT Register (8-bit, read/write). FAN The RPM threshold represents the fan speed at which the TC664/TC665 devices will indicate a fan fault. This V RISO threshold can be set at lower levels to indicate fan OUT locked rotor conditions, or set to higher levels to give indications for predictive fan failure. It is recommended that the RPM threshold be at least 10% lower than the TC664 minimum fan speed which occurs at the lowest duty TC665 cycle set point. The default value for the fan RPM threshold is 500RPM. If the fan's sensed RPM is less SENSE than the fan fault threshold for 2.4 seconds (typical), a C fan fault condition is indicated. SENSE R SENSE When a fault condition, due to low fan RPM, occurs, a GND logic low is asserted at the FAULT output and the FF (bit 0<0>) in the Status Register is set to '1'. The FAULT output and the fault bit in the Status Register can be FIGURE 4-7: Fan Current Sensing. reset by setting FFCLR (bit 7<0>) in the Configuration Register to a '1'. By selecting FPPR (bits 2-1<01>) in the Configuration Register, the TC664/TC665 devices can be pro- For the TC665 device, a fault condition is also indicated grammed to calculate RPM data for fans with 1, 2, 4 or when an Over Temperature Fault condition occurs. 8 current pulses per rotation. The default state This condition occurs when the V duty cycle OUT assumes a fan with 2 pulses per rotation. exceeds the 100% value, indicating that no additional cooling capability is available. For this condition, a logic The measured RPM data is then stored in the RPM- low is asserted at the FAULT output and OTF (bit 5<X>) OUTPUT (RPM) Register. This register is a 9-Bit read of the Status Register, the over temperature fault indi- only register which stores RPM data with 25RPM res- cator, is set to a ‘1’ (The TC664 also indicates an over olution. By setting RES (bit 6<0>) of the Configuration temperature condition via the OTF bit in the status reg- Register to a ‘1’, the RPM data can be read with ister). If the duty cycle then decreases below 100%, the 25RPM resolution. If this bit is left in the default state FAULT output will be released and OTF (bit 5<X>) of of '0', the RPM data will only be readable with resolu- the Status Register will be reset to ‘0’. tion of 50RPMs, which represents 8-bit data. The maximum fan RPM reading is 12775RPM. If this 4.9 Low Power Shutdown Mode value is exceeded, a counter overflow bit in the Status Register is set. RCO (bit 3<0>) in the Status Register Some applications may have operating conditions represents the RPM counter overflow bit for the RPM- where fan cooling is not required as a result of low OUTPUT Register. This bit will automatically be reset ambient temperature or light system load. During these to zero if the fan RPM reading has been below the max- times it may be desirable to shut the fans down to save imum value of 12775RPM for 2.4 seconds. power and reduce system noise. See Table6-1 for RPM and Status Register command The TC664/TC665 devices can be put into a low power byte assignments. shutdown mode by setting SDM (bit 0<0>) in the Con- figuration Register to a ‘1’ (this bit is the shutdown bit). When the TC664/TC665 devices are in shutdown mode, all functions except for the SMBus interface are suspended. During this mode of operation, the TC664 and TC665 devices will draw a typical supply current of only 5µA. Normal operation will resume as soon as Bit 0 in the Configuration Register is reset to ‘0’. When the TC664/TC665 devices are brought out of a shutdown mode by resetting SDM (bit 0<0>) in the Configuration Register, all of the registers, except for the Configuration and FAN_FAULT Registers assume  2002-2013 Microchip Technology Inc. DS21737B-page 13

TC664/TC665 their default power up states. The Configuration Regis- ter and the FAN_FAULT Register maintain the states they were in prior to the device being put into the shut- down mode. Since these are the registers which control the parts operation, the part does not have to be repro- grammed for operation when it comes out of shutdown mode. 4.10 SMBus Interface (SCLK & SDA) The TC664/TC665 feature an industry standard, 2-wire serial interface with factory-set addresses. By commu- nicating with the TC664/TC665 device's registers, functions like PWM duty cycle, low power shutdown mode and fan RPM threshold can be controlled. Critical information, such as fan fault, over temperature and fan RPM, can also be obtained via the device data regis- ters. The available data and control registers make the TC664/TC665 devices very flexible and easy to use. All of the available registers are detailed in Section6.0. 4.11 SMBus Slave Address The slave address of the TC664/TC665 devices is 0011 011. This is a fixed address. This address is dif- ferent from industry-standard digital temperature sen- sors (like the TCN75) and, therefore, allows the TC664/ TC665 to be utilized in systems in conjunction with these components. Please contact Microchip Technology if alternate addresses are required. DS21737B-page 14  2002-2013 Microchip Technology Inc.

TC664/TC665 5.0 SERIAL COMMUNICATION 5.1.1 DATA TRANSFER The TC664/TC665 support a bi-directional 2-Wire bus 5.1 SMBus 2-Wire Interface and data transmission protocol. The serial protocol The Serial Clock Input (SCLK) and the bi-directional sequencing is illustrated in Figure1-1. Data transfers data port (SDA) form a 2-wire bi-directional serial port are initiated by a start condition (START), followed by a for communicating with the TC664/TC665. The follow- device address byte and one or more data bytes. The ing bus protocols have been defined: device address byte includes a Read/Write selection bit. Each access must be terminated by a Stop Condi- • Data transfer may be initiated only when the bus tion (STOP). A convention call Acknowledge (ACK) is not busy. confirms the receipt of each byte. Note that SDA can • During data transfer, the data line must remain only change during periods when SCLK is LOW (SDA stable whenever the clock line is HIGH. Changes changes while SCLK is HIGH are reserved for Start and in the data line while the clock line is HIGH will be Stop conditions). All bytes are transferred MSB (most interpreted as a START or STOP condition. significant bit) first. Accordingly, the following Serial Bus conventions have 5.1.2 MASTER/SLAVE been defined. The device that sends data onto the bus is the transmit- TABLE 5-1: TC664/TC665 SERIAL BUS ter and the device receiving data is the receiver. The CONVENTIONS bus is controlled by a master device which generates Term Description the serial clock (SCLK), controls the bus access and generates the START and STOP conditions. The Transmitter The device sending data to the bus. TC664/TC665 always work as a slave device. Both Receiver The device receiving data from the master and slave devices can operate as either trans- bus. mitter or receiver, but the master device determines Master The device which controls the bus: ini- which mode is activated. tiating transfers (START), generating 5.1.3 START CONDITION (START) the clock and terminating transfers (STOP). A HIGH to LOW transition of the SDA line while the Slave The device addressed by the master. clock (SCLK) is HIGH determines a START condition. All commands must be preceded by a START condi- Start A unique condition signaling the tion. beginning of a transfer indicated by SDA falling (High to Low) while SCLK 5.1.4 ADDRESS BYTE is high. Stop A unique condition signaling the end Immediately following the Start Condition, the host of a transfer indicated by SDA rising must transmit the address byte to the TC664/TC665. (Low to High) while SCLK is high. The 7-bit SMBus address for the TC664/TC665 is 0011 011. The 7-bit address transmitted in the serial ACK A Receiver acknowledges the receipt bit stream must match for the TC664/TC665 to respond of each byte with this unique condi- with an Acknowledge (indicating the TC664/TC665 is tion. The Receiver pulls SDA low dur- on the bus and ready to accept data). The eighth bit in ing SCLK high of the ACK clock-pulse. the Address Byte is a Read-Write Bit. This bit is a ‘1’ for The Master provides the clock pulse a read operation or ‘0’ for a write operation. During the for the ACK cycle. first phase of any transfer, this bit will be set = 0 to indi- Busy Communication is not possible cate that the command byte is being written. because the bus is in use. NOT Busy When the bus is idle, both SDA and 5.1.5 STOP CONDITION (STOP) SCLK will remain high. A LOW to HIGH transition of the SDA line while the Data Valid The state of SDA must remain stable clock (SCLK) is HIGH determines a STOP condition. during the high period of SCLK in All operations must be ended with a STOP condition. order for a data bit to be considered valid. SDA only changes state while 5.1.6 DATA VALID SCLK is low during normal data trans- The state of the data line represents valid data when, fers. (See START and STOP condi- after a START condition, the data line is stable for the tions) duration of the HIGH period of the clock signal.  2002-2013 Microchip Technology Inc. DS21737B-page 15

TC664/TC665 The data on the line must be changed during the LOW period of the acknowledge related clock pulse. Setup period of the clock signal. There is one clock pulse per and hold times must be taken into account. During bit of data. Each data transfer is initiated with a START reads, a master device must signal an end of data to condition and terminated with a STOP condition. The the slave by not generating an acknowledge bit on the number of the data bytes transferred between the last byte that has been clocked out of the slave. In this START and STOP conditions is determined by the case, the slave (TC664/TC665) will leave the data line master device and is unlimited. HIGH to enable the master device to generate the STOP condition. 5.1.7 ACKNOWLEDGE (ACK) 5.2 SMBus Protocols Each receiving device, when addressed, is obliged to generate an acknowledge bit after the reception of The TC664/TC665 devices communicate with three each byte. The master device must generate an extra standard SMBus protocols. These are the write byte, clock pulse, which is associated with this acknowledge read byte and receive byte. The receive byte is a short- bit. ened method for reading from or writing to a register The device that acknowledges has to pull down the which had been selected by the previous read or write SDA line during the acknowledge clock pulse in such a command. These transmission protocols are shown in Figures 5-1, 5-2 and 5-3. way that the SDA line is stable LOW during the HIGH S ADDRESS WR ACK COMMAND ACK DATA ACK P 7 Bits 8 Bits 8 Bits Slave Address Command Byte: selects Data Byte: data goes which register you are into the register set writing to. by the command byte. FIGURE 5-1: SMBus Protocol: Write Byte Format. S ADDRESS WR ACK COMMAND ACK 7 Bits 8 Bits Slave Address Command Byte: selects which register you are writing to. S ADDRESS RD ACK DATA NACK P 7 Bits 8 Bits Slave Address: Data Byte: reads from repeated due to change the register set by the in data flow direction. command byte. FIGURE 5-2: SMBus Protocol: Read Byte Format. S ADDRESS RD ACK DATA NACK P 7 Bits 8 Bits Slave Address Data Byte: reads data from the register commanded by the last Read Byte or Write Byte transmission FIGURE 5-3: SMBus Protocol: Receive Byte Format. S = Start Condition ACK = Acknowledge = 0 P = Stop Condition NACK = Not Acknowledged = 1 Shaded = Slave Transmission WR = Write = 0 RD = Read = 1 DS21737B-page 16  2002-2013 Microchip Technology Inc.

TC664/TC665 6.0 REGISTER SET The TC664/TC665 devices contain 7 registers that pro- Of key importance is the command byte information, vide a variety of data and functionality control to the which is needed in the read and write protocols to outside system. These registers are listed in Table6-1. select the individual registers. TABLE 6-1: COMMAND BYTE ASSIGNMENTS Register Command Read Write POR Default State Function RPM 0000 0000 X — 0 0000 0000 RPM Output FAN_FAULT 0000 0010 X X 0000 1010 Fan Fault Threshold CONFIG 0000 0100 X X 0000 1010 Configuration STATUS 0000 0101 X — 00X0 0X00 Status. See Section6.4, Status Reg- ister explanation of X DUTY_CYCLE 0000 0110 X X 0000 0010 Fan Speed Duty Cycle MFR_ID 0000 0111 X — 0101 0100 Manufacturer Identification VER_ID 0000 1000 X — 0000 00XX Version Identification: (XX = ‘10’ TC664, XX = ‘11’ TC665) 6.1 RPM-OUTPUT Register (RPM) the Configuration Register, with ‘0’ = 50RPM and ‘1’=25RPM. The default state is zero (50 RPM). The As discussed in Section 4.7, fan current pulses are maximum fan RPM value that can be read is detected at the SENSE input of the TC664/TC665 12775RPM. If this value is exceeded, RCO (bit 3<0>) device. The current pulse information is used to calcu- in the Status Register will be set to a '1' to indicate that late the fan RPM. The fan RPM data is then written to a counter overflow of the RPM Register has occurred. the RPM register. RPM is a 9-bit register that provides Register6-1 shows the RPM output register 9-bit for- the RPM information in 50RPM (8-bit) or 25RPM (9- mat. bit) increments. This is selected via RES (bit 6<0>) in REGISTER 6-1: RPM OUTPUT REGISTER (RPM) D(8) D(7) D(6) D(5) D(4) D(3) D(2) D(1) D(0) RPM 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 25 0 0 0 0 0 0 0 1 0 50 . . . . . . . . . . . . . . . . . . 1 1 1 1 1 1 1 1 0 12750 1 1 1 1 1 1 1 1 1 12775  2002-2013 Microchip Technology Inc. DS21737B-page 17

TC664/TC665 6.2 FAN_FAULT Threshold Register If the measured fan RPM (stored in the RPM Register) (FAN_FAULT) drops below the value that is set in the Fan Fault Reg- ister for more than 2.4sec, FF (bit 0<0>) in the Status The FAN_FAULT Threshold Register is used to set the Register will be set to a '1' and the FAULT output will be fan fault threshold level for the fan. The Fan Fault pulled low. See Register6-2 for the Fan Fault Threshold Register is an 8-bit read/writable register Threshold Register 8-bit format. that allows the fan fault RPM threshold to be set in 50 RPM increments. The default setting for the Fan Fault Register is 500RPM (0000 1010). The maximum set point value is 12750RPM. REGISTER 6-2: FAN FAULT THRESHOLD REGISTER (FAN_FAULT) D(7) D(6) D(5) D(4) D(3) D(2) D(1) D(0) RPM 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 50 0 0 0 0 0 0 1 0 100 . . . . . . . . . . . . . . . . 1 1 1 1 1 1 1 0 12700 1 1 1 1 1 1 1 1 12750 DS21737B-page 18  2002-2013 Microchip Technology Inc.

TC664/TC665 6.3 CONFIGURATION REGISTER V duty cycle (fan speed) control method, select the OUT (CONFIG) fan current pulses per rotation for the fan (for fan RPM calculation) and put the TC664/TC665 device into a The Configuration Register is an 8-bit, read/writable, shutdown mode to reduce power consumption. See multi-function control register. This register allows the Register6-3 below for the Configuration Register bit user to clear fan faults, select RPM resolution, select descriptions. REGISTER 6-3: CONFIGURATION REGISTER (CONFIG) R/W-0 R/W-0 R/W-0 U-0 U-1 R/W-0 R/W-1 R/W-0 FFCLR RES DUTYC — — FPPR FPPR SDM bit 7 bit 0 bit 7 FFCLR: Fan Fault Clear 1 = Clear Fan Fault, this will reset the Fan Fault bit in the Status Register and the FAULT out- put. 0 = Normal Operation (default) bit 6 RES: Resolution Selection for RPM Output Register 1 = RPM Output Register (RPM) will be set for 25RPM (9-bit) resolution. 0 = RPM Output Register (RPM) will be set for 50RPM (8-bit) resolution. (default) bit 5 DUTYC: Duty-Cycle Control Method 1 = The V duty-cycle will be controlled via the SMBus interface. The value for the V OUT OUT duty-cycle will be taken from the duty-cycle register (DUTY_CYCLE). 0 = The V duty-cycle will be controlled via the V analog input pin. The V duty-cycle OUT IN OUT value will be between 30% and 100% for V values between 1.62V and 2.6V typical. If IN the V pin is open when this mode is selected, the V duty-cycle will default to 39.33%. IN OUT (default) bit 4 Unimplemented: Read as '0' bit 3 Unimplemented: Read as '1' bit 2-1 FPPR: Fan Pulses Per Rotation The TC664/TC665 device uses this setting to understand how many current pulses per revolu- tion the fan should have. It then uses this as part of the calculation for the fan RPM value for the RPM Register. See Section7.7 for application information on determining your fan’s number of current pulses per revolution. 00 = 1 01 = 2 (default) 10 = 4 11 = 8 bit 0 SDM: Shutdown Mode 1 = Shutdown Mode. See Section4.9 for more information on low power shutdown mode. 0 = Normal Operation. (default) Legend: R = Readable bit W = Writable bit U = Unimplemented bit -n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown  2002-2013 Microchip Technology Inc. DS21737B-page 19

TC664/TC665 6.4 STATUS REGISTER (STATUS) and over temperature indication are all available in the Status Register. The Status Register is an 8-bit Read The Status Register provides all the information about only register with bits 1, 4, 6 and 7 unused. See what is going on within the TC664/TC665 devices. Fan Register6-4 below for the bit descriptions. fault information, V status, RPM counter overflow IN REGISTER 6-4: STATUS REGISTER (STATUS) U-0 U-0 R-X U-0 R-0 R-X U-X R-0 — — OTF — RCO VSTAT — FF bit 7 bit 0 bit 7-6 Unimplemented: Read as ‘0’ bit 5 OTF: Over Temperature Fault Condition For the TC664/TC665 device, this bit is set to the proper state immediately at startup and is therefore treated as an unknown (X). If V is greater than the threshold required for 100% duty IN cycle on V (2.6V typical), then the bit will be set to a ‘1’. If it is less than the threshold, the OUT bit will be set to ‘0’. This is determined at power-up. 1 = Over temperature condition has occurred. 0 = Normal operation, V is less than 2.6V. IN bit 4 Unimplemented: Read as ‘0’ bit 3 RCO: RPM Counter Overflow 1 = Fault condition. The maximum RPM reading of 12775RPM in register RPM has been exceeded. This bit will automatically reset to zero when the RPM reading comes back into range. 0 = Normal operation. RPM reading is within limits (default). bit 2 VSTAT: V Input Status IN For the TC664/TC665 devices, the V pin status is checked immediately at power-up. If no IN external thermistor or voltage output network is connected (V is open), this bit is set to a ‘1’. IN If an external network is detected, this bit is set to ‘0’. If the V pin is open and SMBus operation IN has not been selected in the Configuration Register, the V duty cycle will default to 39.33%. OUT 1 = V is open. IN 0 = Normal operation. Voltage present at V . IN bit 1 Unimplemented: Read as ‘unknown’ bit 0 FF: Fan Fault 1 = Fault Condition. The value for fan RPM in the RPM Register has fallen below the value set in the FAN_FAULT Threshold Register. The speed of the fan is too low and a fault condi- tion is being indicated. The FAULT output will be pulled low at the same time. This fault bit can be cleared using the Fan Fault Clear bit (FFCLR (bit 7<0>)) in the Configuration Reg- ister. 0 = Normal Operation (default). Legend: R = Readable bit W = Writable bit U = Unimplemented bit -n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown DS21737B-page 20  2002-2013 Microchip Technology Inc.

TC664/TC665 6.5 DUTY-CYCLE Register 6.6 Manufacturer’s Identification (DUTY_CYCLE) Register (MFR_ID) The DUTY_CYCLE register is a 4-bit read/writable reg- This register allows the user to identify the manufac- ister used to control the duty cycle of the V output. turer of the part. The MFR_ID register is an 8-bit Read OUT The controllable duty cycle range via this register is only register. See Register6-6 for the Microchip manu- 30% to 100%, with programming steps of 4.67%.This facturer ID. method of duty cycle control is mainly used with the SMBus interface. However, if the VIN method of duty REGISTER 6-6: MANUFACTURER’S cycle control has been selected (or defaulted to), and IDENTIFICATION the VIN pin is open, the duty cycle will go to the default REGISTER (MFR_ID) setting for this register, which is 0010 (39.33%). The duty cycle settings are shown in Register6-5. D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0] 0 1 0 1 0 1 0 0 REGISTER 6-5: DUTY-CYCLE REGISTER (DUTY_CYCLE) 6.7 Version ID Register (VER_ID) D(3) D(2) D(1) D(0) Duty-Cycle This register is used to indicate which version of the 0 0 0 0 30% device is being used, either the TC664 or the TC665. This register is a simple 2-bit Read only register. 0 0 0 1 34.67% 0 0 1 0 39.33% (default for V IN REGISTER 6-7: VERSION ID REGISTER open and when SMBus is not selected) (VER_ID) 0 0 1 1 44% D[1] D[0] Version 0 1 0 0 48.67% 1 0 TC664 0 1 0 1 53.33% 1 1 TC665 0 1 1 0 58% 0 1 1 1 62.67% 1 0 0 0 67.33% 1 0 0 1 72% 1 0 1 0 76.67% 1 0 1 1 81.33% 1 1 0 0 86% 1 1 0 1 90.67% 1 1 1 0 95.33% 1 1 1 1 100%  2002-2013 Microchip Technology Inc. DS21737B-page 21

TC664/TC665 7.0 APPLICATIONS INFORMATION SDA SCLK 7.1 Connecting to the SMBus PIC16F876 Microcontroller The SMBus is an open collector bus, requiring pull-up resistors connected to the SDA and SCLK lines. This 24LC01 configuration is shown in Figure7-1. EEPROM V TC664/TC665 DD Fan Speed Controller TCN75 oller R R TC664/TC665 TemSepnersaotrure ®Contr SDA PIc SCLK o cr FIGURE 7-2: Multiple Devices on SMBus. Mi 7.2 Setting the PWM Frequency Range for R: 13.2kto 46k for V = 5.0V DD The PWM frequency of the V output is set by the OUT FIGURE 7-1: Pull-up Resistors On capacitor value attached to the C pin. The PWM fre- F SMBus. quency will be 30Hz (typical) for a 1µF capacitor. The relationship between frequency and capacitor value is The number of devices connected to the bus is limited linear, making alternate frequency selections easy. only by the maximum rise and fall times of the SDA and SCLK lines. Unlike I2C specifications, SMBus does not As stated in previous sections, the PWM frequency should be kept in the range of 15Hz to 35Hz. This will specify a maximum bus capacitance value. Rather, the eliminate the possibility of having audible frequencies SMBus specification calls out that the maximum current when varying the duty cycle of the fan drive. through the pull-up resistor be 350µA (minimum, 100µA, is also specified). Therefore, the value of the A very important factor to consider when selecting the pull-up resistors will vary depending on the system’s PWM frequency for the TC664/TC665 devices is the bias voltage, V . Minimizing bus capacitance is still RPM rating of the selected fan and the minimum duty DD very important as it directly effects the rise and fall times cycle that you will be operating at. For fans that have a of the SDA and SCLK lines. The range for pull-up resis- full speed rating of 3000RPM or less, it is desirable to tor values for a 5V system are shown in Figure7-1. use a lower PWM frequency. A lower PWM frequency allows for a longer time period to monitor the fan cur- Although SMBus specifications only require the SDA rent pulses. The goal is to be able to monitor at least and SCLK lines to pull down 350µA, with a maximum two fan current pulses during the on time of the V voltage drop of 0.4V, the TC664/TC665 devices have OUT output. been designed to meet a maximum voltage drop of 0.4V with 3mA of current. This allows lower values of Example: Your system design requirement is to oper- pull-up resistors to be used, which will allow higher bus ate the fan at 50% duty cycle when ambient tempera- capacitance. If this is to be done, all devices on the bus tures are below 20°C. The fan full speed RPM rating is must be able to meet the same pull down current 3000RPM and has four current pulses per rotation. At requirements as well. 50% duty cycle, the fan will be operating at approxi- mately 1500RPM. A possible configuration using multiple devices on the SMBus is shown in Figure7-2. EQUATION 601000 Time for one revolution (msec.) = ------------------------ = 40 1500 If one fan revolution occurs in 40msec, then each fan pulse occurs 10msec apart. In order to detect two fan current pulses, the on time of the V pulse must be OUT at least 20msec. With the duty cycle at 50%, the total period of one cycle must be at least 40msec, which makes the PWM frequency 25Hz. For this example, a PWM frequency of 20Hz is recommended. This would define a C capacitor value of 1.5µF. F DS21737B-page 22  2002-2013 Microchip Technology Inc.

TC664/TC665 7.3 Temperature Sensor Design EQUATION As discussed in previous sections, the V analog input V R IN Vt1 = -------------D---D--------------2---------- has a range of 1.62V to 2.6V (typical), which repre- R t1+R TEMP 2 sents a duty cycle range on the V output of 30% to OUT 1a0s 0r%ep, rreessepnetcintigv etelym. Tpheera VtuINre vso. ltTahgee s1 c.6a2n Vb ele thveolu gish tth oef Vt2 = ---------V----D---D----------R----2---------- R t2+R low temperature at which the system only requires 30% TEMP 2 fan speed for proper cooling. The 2.6V level is the high temperature, for which the system needs maximum In order to solve for the values of R1 and R2, the values cooling capability, so the fan needs to be at 100% for VIN, and the temperatures at which they are to speed. occur, need to be selected. The variables, t1 and t2, represent the selected temperatures. The value of the One of the simplest ways of sensing temperature over thermistor at these two temperatures can be found in a given range is to use a thermistor. By using an NTC the thermistor data sheet. With the values for the thermistor as shown in Figure7-3, a temperature vari- thermistor and the values for V , you now have two ant voltage can be created. IN equations from which the values for R and R can be 1 2 found. VDD Example: The following design goals are desired: • Duty Cycle = 50% (V = 1.9V) with Temperature IDIV IN (t1) = 30°C • Duty Cycle = 100% (V = 2.6V) with Tempera- IN ture (t2) = 60°C Rt R1 Using a 100k thermistor (25°C value), we look up the thermistor values at the desired temperatures: VIN • R = 79428 @ 30°C t • R = 22593 @ 60°C R2 t Substituting these numbers into the given equations, we come up with the following numbers for R and R . 1 2 • R = 34.8k FIGURE 7-3: Temperature Sensing 1 • R = 14.7k Circuit. 2 Figure7-3 represents a temperature dependent volt- 140000 4.000 age divider circuit. R is a conventional NTC thermistor, R1 and R2 are standatrd resistors. R1 and Rt form a par- (cid:2)e () 120000 VIN Voltage 33..050000 allel resistor combination that will be referred to as nc 100000 a 2.500 RinTcEreMaPs e(RsT, EthMeP v=a Rlu1e *o Rf Rt/ R d1e +c rReat)s. eAss athned ttehme pvearluaetu roef esist 80000 2.000 (V)N t R 60000 VI R will decrease with it. Accordingly, the voltage at k NTC Thermistor 1.500 VTE MinPcreases as temperature increases, giving the wor 40000 100K @ 25ºC 1.000 deINsired relationship for the VIN input. The purpose of Net 20000 RTEMP 0.500 R is to help linearize the response of the sensing net- 0 0.000 1 work. Figure7-4 shows an example of this. 20 30 40 50 60 70 80 90 100 There are many values that can be chosen for the NTC Temperature (ºC) thermistor. There are also thermistors that have a linear FIGURE 7-4: How Thermistor Resistance, resistance, instead of logarithmic, which can help to V , And R Vary With Temperature. eliminate R1. If less current draw from VDD is desired, IN TEMP then a larger value thermistor should be chosen. The Figure7-4 graphs three parameters versus tempera- voltage at the V pin can also be generated by a volt- IN ture. They are R, R in parallel with R, and V . As t 1 t IN age output temperature sensor device. The key is to described earlier, you can see that the thermistor has a get the desired V voltage to system (or component) IN logarithmic resistance variation. When put in parallel temperature relationship. with R , though, the combined resistance becomes 1 The following equations apply to the circuit in more linear, which is the desired effect. This gives us Figure7-3. the linear looking curve for VIN.  2002-2013 Microchip Technology Inc. DS21737B-page 23

TC664/TC665 7.4 FanSense Network (R & TABLE 7-1: R VS. FAN CURRENT SENSE SENSE C ) SENSE Nominal Fan Current R (ohm) (mA) SENSE The network comprised of R and C allows SENSE SENSE the TC664/TC665 devices to detect commutation of the 50 9.1 fan motor. RSENSE converts the fan current into a volt- 100 4.7 age. C AC couples this voltage signal to the SENSE 150 3.0 SENSE pin. The goal of the SENSE network is to pro- vide a voltage pulse to the SENSE pin that has a mini- 200 2.4 mum amplitude of 120mV. This will ensure that the 250 2.0 current pulse caused by the fan commutation is recog- 300 1.8 nized by the TC664/TC665 device. 350 1.5 A 0.1µF ceramic capacitor is recommended for 400 1.3 C . Smaller values will require larger sense resis- SENSE tors be used. Using a 0.1µF capacitor results in rea- 450 1.2 sonable values for RSENSE. Figure7-5 illustrates a 500 1.0 typical SENSE network. Figure7-6 shows some typical waveforms for the fan current and the voltage at the Sense pins. FAN R ISO V OUT 715 C SENSE SENSE (0.1µF typical) R SENSE Note: See Table7-1 for R value. SENSE FIGURE 7-5: Typical Sense Network. The value of R will change with the current rating SENSE of the fan. A key point is that the current rating of the FIGURE 7-6: Typical Fan Current and fan specified by the manufacturer may be a worst case Sense Pin Waveforms. rating. The actual current drawn by the fan may be lower than this rating. For the purpose of setting the value for R , the operating fan current should be 7.5 Output Drive Device Selection SENSE measured. The TC664/TC665 devices are designed to drive two Table7-1 shows values of R according to the SENSE external NPN transistors or two external N-channel nominal operating current of the fan. The fan currents MOSFETs as the fan speed modulating elements. are average values. If the fan current falls between two These two arrangements are shown in Figure7-7. For of the values listed, use the higher resistor value. lower current fans, NPN transistors are a very econom- ical choice for the fan drive device. It is recommended that, for higher current fans (500mA and above), MOS- FETs be used as the fan drive device. Table7-2 pro- vides some possible part numbers for use as the fan drive element. When using an NPN transistor as the fan drive ele- ment, a base current limiting resistor must be used. This is shown in Figure7-7. When using MOSFETs as the fan drive element, it is very easy to turn the MOSFETs on and off at very high rates. Because the gate capacitances of these small DS21737B-page 24  2002-2013 Microchip Technology Inc.

TC664/TC665 MOSFETs are very low, the TC664/TC665 devices can very little energy in this occurrence, it will probably not charge and discharge them very quickly leading to very fail the device, but it would be a long term reliability fast edges. Of key concern is the turn-off edge of the issue. The following is recommended: MOSFET. Since the fan motor winding is essentially an • Ask how the fan is designed. If the fan has clamp inductor, when the MOSFET is turned off, the current diodes internally, you will not experience this that was flowing through the motor wants to continue to problem. If the fan does not have internal clamp flow. If the fan does not have internal clamp diodes diodes, it is a good idea to put one externally around the windings of the motor, there is no path for (Figure7-8). You can also put a resistor between this current to flow through and the voltage at the drain V and the gate of the MOSFET, which will help OUT of the MOSFET may rise until the drain to source rating slow down the turn-off and limit this condition. of the MOSFET is exceeded. This will most likely cause the MOSFET to go into avalanche mode. Since there is VDD VDD FAN FAN RBASE VOUT Q1 VOUT Q1 RSENSE RSENSE GND GND a) Single Bipolar Transistor b) N-Channel MOSFET FIGURE 7-7: Output Drive Device Configurations. TABLE 7-2: FAN DRIVE DEVICE SELECTION TABLE (NOTE2) Max Vbe sat / Fan Current Suggested Device Package Min hfe Vce/V Vgs(V) DS (mA) Rbase (ohms) MMBT2222A SOT-23 1.2 50 40 150 800 MPS2222A TO-92 1.2 50 40 150 800 MPS6602 TO-92 1.2 50 40 500 301 SI2302 SOT-23 2.5 NA 20 500 Note1 MGSF1N02E SOT-23 2.5 NA 20 500 Note1 SI4410 SO-8 4.5 NA 30 1000 Note1 SI2308 SOT-23 4.5 NA 60 500 Note1 Note 1: A series gate resistor may be used in order to control the MOSFET turn-on and turn-off times. 2: These drive devices are suggestions only. Fan currents listed are for individual fans.  2002-2013 Microchip Technology Inc. DS21737B-page 25

TC664/TC665 The first piece of information required is the fan's full speed RPM rating. The fan RPM rating can then be converted to give the time for one revolution using the following equation: FAN EQUATION 601000 Time for one revolution (msec.) = ------------------------ Fan RPM The fan current can now be monitored over this time VOUT Q1 period. The number of pulses occurring in this time period is the fan's "Current Pulses per Rotation" rating which is needed in order to accurately read fan RPM. RSENSE Example: The full speed fan RPM rating is 8200RPM. From this, the time for one fan revolution is calculated to be 7.3msec, using the previously discussed equa- tion. Using a current probe, the fan current can be mon- GND itored as the fan is operating at full speed. Figure7-9 shows the fan current pulses for this example. The Q1 - N-Channel MOSFET 7.44msec window, marked by the cursors, is very near the 7.3msec calculated above and is within the toler- FIGURE 7-8: Clamp Diode For Fan Turn- ance of the fan ratings. Four current pulses occur within off. this 7.44msec time frame. Given this information, FPPR (bits 2-1<01>) in the Configuration Register 7.6 Bias Supply Bypassing and Noise should be set to '10' to indicate 4 current pulses per Filtering revolution. The bias supply (V ) for the TC664/TC665 devices DD should be bypassed with a 1µF ceramic capacitor. This capacitor will help supply the peak currents that are required to drive the base/gate of the external fan drive devices. As the V pin controls the duty cycle in a linear fashion, IN any noise on this pin can cause duty cycle jittering. For this reason, the V pin should be bypassed with a IN 0.01µF capacitor. In order to keep fan noise off of the TC664/TC665 device ground, individual ground returns for the TC664/ TC665 and the low side of the fan current sense resis- tor should be used. 7.7 Determining Current Pulses Per Revolution of Fans There are many different fan designs available in the FIGURE 7-9: Four Current Pulses Per marketplace today. The motor designs can vary and, Revolution Fan. along with it, the number of current pulses in one fan revolution. In order to correctly measure and commu- 7.8 How to Eliminate False Current nicate the fan speed, the TC664/TC665 devices must Pulse Sensing be programmed for the proper number of fan current pulses per revolution. This is done by setting the FPPR During the PWM mode of operation, some fans will bit in the Configuration Register to the proper values generate an extra current pulse. This pulse occurs (see Section6.3 for settings). A fan's current pulses when the external drive device is turned on and is, in per revolution can be determined in the following most cases, caused by the fan's electronics that control manner. the fan motor. This pulse does not represent true fan current and needs to be blanked out. This is particularly important for detecting a fan in a locked rotor condition. DS21737B-page 26  2002-2013 Microchip Technology Inc.

TC664/TC665 Figure7-10 shows the voltage pulse at the Sense pin, which is caused by the fan's "extra" current pulse during PWM output turn-on. FAN TC664 TC665 R ISO V OUT C SLOW Sense Pin Voltage "Extra Pulse" (0.1µF typical) SENSE C SENSE R VOUT PWM (0.1µF typical) SENSE GND FIGURE 7-11: Transistor Drive with C SLOW FIGURE 7-10: Extra Pulse at Sense Pin. Capacitor. This problem occurs mainly with fans that have a cur- rent waveshape like the one shown in Figure7-9. For configurations where an NPN transistor is being used as the external drive device, the typical Rsense and CSENSE scheme can continue to be used to sense the FAN TC664 fan current pulses. In order to eliminate the extra cur- TC665 rent pulse, a slow down capacitor can be placed from the base of the transistor to ground. A 0.1µF capacitor is appropriate in most cases. This arrangement is V shown in Figure7-11. This capacitor will help to slow OUT down the turn-on edge of the transistor and reduce the R SLOW amplitude of the extra current pulse. (1k typical) For configurations using an N-channel MOSFET as the SENSE drive device, the slow down capacitor does not fix all C conditions and the current sensing scheme must be SLOW R changed. Since the current for this type of fan always (1000pF SENSE returns to zero, the coupling capacitor, C , is not typical) SENSE GND needed. Instead, it will be replaced by an R-C configu- ration to eliminate the voltage pulse generated by the extra current pulse. This new sensing configuration is shown in Figure7-12. The values of the resistor/capac- FIGURE 7-12: FET Drive with R / SLOW itor combination should be adjusted so that the voltage C Sense Scheme. SLOW pulse generated by the extra current pulse is smoothed and is not registered by the TC664/TC665 as a true fan current pulse. Typical values for R and C SLOW SLOW are 1k and 1000pF, respectively.  2002-2013 Microchip Technology Inc. DS21737B-page 27

TC664/TC665 8.0 PACKAGING INFORMATION 8.1 Package Marking Information 10-Pin MSOP Device 1 10 TC664E 2 TC665E 9 YWWNNN 3 8 4 7 5 6 Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code e3 Pb-free JEDEC designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( e 3 ) can be found on the outer packaging for this package. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. DS21737B-page 28  2002-2013 Microchip Technology Inc.

TC664/TC665 8.2 Taping Form Component Taping Orientation for 10-Pin MSOP Devices User Direction of Feed PIN 1 W P Standard Reel Component Orientation for TR Suffix Device Carrier Tape, Number of Components Per Reel and Reel Size: Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 10-Pin MSOP 12 mm 8 mm 2500 13 in. 8.3 Package Information Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 10-Pin MSOP PIN 1 .122 (3.10) .201 (5.10) .114 (2.90) .183 (4.65) .012 (0.30) .006 (0.15) .122 (3.10) .114 (2.90) .043 (1.10) 6 MAX. .009 (0.23) MAX. .005 (0.13) .020 (0.50) .006 (0.15) .028 (0.70) .002 (0.05) .016 (0.40) Dimensions: inches (mm)  2002-2013 Microchip Technology Inc. DS21737B-page 29

TC664/TC665 9.0 REVISION HISTORY Revision B (January 2013) Added a note to the package outline drawing. DS21737B-page 30  2002-2013 Microchip Technology Inc.

THE MICROCHIP WEB SITE CUSTOMER SUPPORT Microchip provides online support via our WWW site at Users of Microchip products can receive assistance www.microchip.com. This web site is used as a means through several channels: to make files and information easily available to • Distributor or Representative customers. Accessible by using your favorite Internet • Local Sales Office browser, the web site contains the following • Field Application Engineer (FAE) information: • Technical Support • Product Support – Data sheets and errata, application notes and sample programs, design Customers should contact their distributor, resources, user’s guides and hardware support representative or field application engineer (FAE) for documents, latest software releases and archived support. Local sales offices are also available to help software customers. A listing of sales offices and locations is included in the back of this document. • General Technical Support – Frequently Asked Questions (FAQ), technical support requests, Technical support is available through the web site online discussion groups, Microchip consultant at: http://microchip.com/support program member listing • Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives CUSTOMER CHANGE NOTIFICATION SERVICE Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notification” and follow the registration instructions.  2002-2013 Microchip Technology Inc. DS21737B-page 31

READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480)792-4150. Please list the following information, and use this outline to provide us with your comments about this document. TO: Technical Publications Manager Total Pages Sent ________ RE: Reader Response From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ FAX: (______) _________ - _________ Application (optional): Would you like a reply? Y N Device: Literature Number: DS21737B Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs? 3. Do you find the organization of this document easy to follow? If not, why? 4. What additions to the document do you think would enhance the structure and subject? 5. What deletions from the document could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS21737B-page 32  2002-2013 Microchip Technology Inc.

TC664/TC665 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X /XX Examples: Device Temperature Package a) TC664EUN: PWM Fan Speed Controller w/ Range Fault Detection b) TC664EUNTR: PWM Fan Speed Controller w/Fault Detection (Tape and Reel) Device: TC664: PWM Fan Speed Controller w/Fault Detection c) TC665EUN: PWM Fan Speed Controller w/ TC664T: PWM Fan Speed Controller w/Fault Detection Fault Detection (Tape and Reel) TC665: PWM Fan Speed Controller w/Fault Detection d) TC665EUNTR: PWM Fan Speed Controller TC665T: PWM Fan Speed Controller w/Fault Detection w/Fault Detection (Tape and Reel) (Tape and Reel) Temperature Range: E = -40C to +85C Package: UN = Plastic Micro Small Outline (MSOP), 10-lead Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom- mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. Your local Microchip sales office 2. The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products.  2002-2013 Microchip Technology Inc. DS21737B-page33

TC664/TC665 NOTES: DS21737B-page 34  2002-2013 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, dsPIC, and may be superseded by updates. It is your responsibility to FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, ensure that your application meets with your specifications. PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash MICROCHIP MAKES NO REPRESENTATIONS OR and UNI/O are registered trademarks of Microchip Technology WARRANTIES OF ANY KIND WHETHER EXPRESS OR Incorporated in the U.S.A. and other countries. IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, INCLUDING BUT NOT LIMITED TO ITS CONDITION, MTP, SEEVAL and The Embedded Control Solutions QUALITY, PERFORMANCE, MERCHANTABILITY OR Company are registered trademarks of Microchip Technology FITNESS FOR PURPOSE. Microchip disclaims all liability Incorporated in the U.S.A. arising from this information and its use. Use of Microchip Silicon Storage Technology is a registered trademark of devices in life support and/or safety applications is entirely at Microchip Technology Inc. in other countries. the buyer’s risk, and the buyer agrees to defend, indemnify and Analog-for-the-Digital Age, Application Maestro, BodyCom, hold harmless Microchip from any and all damages, claims, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, suits, or expenses resulting from such use. No licenses are dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, conveyed, implicitly or otherwise, under any Microchip ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial intellectual property rights. Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O, Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA and Z-Scale are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. GestIC and ULPP are registered trademarks of Microchip Technology Germany II GmbH & Co. & KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2002-2013, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 9781620768952 QUALITY MANAGEMENT SYSTEM Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and CERTIFIED BY DNV Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures == ISO/TS 16949 == are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.  2002-2013 Microchip Technology Inc. DS21737B-page 35

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