TC4467/TC4468/TC4469 Logic-Input CMOS Quad Drivers Features General Description • High Peak Output Current: 1.2A The TC4467/TC4468/TC4469 devices are a family of • Wide Operating Range: four-output CMOS buffers/MOSFET drivers with 1.2A peak drive capability. Unlike other MOSFET drivers, - 4.5V to 18V these devices have two inputs for each output. The • Symmetrical Rise/Fall Times: 25nsec inputs are configured as logic gates: NAND (TC4467), • Short, Equal Delay Times: 75nsec AND (TC4468) and AND/INV (TC4469). • Latch-proof. Will Withstand 500mA Inductive The TC4467/TC4468/TC4469 drivers can continuously Kickback source up to 250mA into ground referenced loads. • 3 Input Logic Choices: These devices are ideal for direct driving low current - AND / NAND / AND + Inv motors or driving MOSFETs in a H-bridge configuration • ESD Protection on All Pins: 2kV for higher current motor drive (see Section5.0 for details). Having the logic gates onboard the driver can Applications help to reduce component count in many designs. • General Purpose CMOS Logic Buffer The TC4467/TC4468/TC4469 devices are very robust and highly latch-up resistant. They can tolerate up to • Driving All Four MOSFETs in an H-Bridge 5V of noise spiking on the ground line and can handle • Direct Small Motor Driver up to 0.5A of reverse current on the driver outputs. • Relay or Peripheral Drivers The TC4467/4468/4469 devices are available in • CCD Driver commercial, industrial and military temperature ranges. • Pin-Switching Network Driver Package Types 14-Pin PDIP/CERDIP 1A 1 14 VDD 1B 2 13 1Y 2A 3 TC4467 12 2Y 2B 4 TC4468 11 3Y TC4469 3A 5 10 4Y 3B 6 9 4B GND 7 8 4A 16-Pin SOIC (Wide) 1A 1 16 VDD 1B 2 15 VDD 2A 3 14 1Y TC4467 2B 4 13 2Y TC4468 3A 5 TC4469 12 3Y 3B 6 11 4Y GND 7 10 4B GND 8 9 4A  2001-2012 Microchip Technology Inc. DS21425C-page 1

TC4467/TC4468/TC4469 Logic Diagrams TC4467 TC4468 TC4469 TC446X V V V DD DD DD V DD 14 14 14 1A 1 13 1A 1 13 1A 1 13 1B 2 1Y 1B 2 1Y 1B 2 1Y 2A 3 12 2A 3 12 2A 3 12 Output 2B 4 2Y 2B 4 2Y 2B 4 2Y 3A 5 11 3A 5 11 3A 5 11 3B 66 3Y 3B 6 3Y 3B 6 3Y 4A 8 10 4A 8 10 4A 8 10 4B 9 4Y 4B 9 4Y 4B 9 4Y 7 7 7 GND GND GND DS21425C-page 2  2001-2012 Microchip Technology Inc.

TC4467/TC4468/TC4469 1.0 ELECTRICAL †Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is CHARACTERISTICS a stress rating only and functional operation of the device at those or any other conditions above those indicated in the Absolute Maximum Ratings† operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect Supply Voltage...............................................................+20V device reliability. Input Voltage.............................(GND – 5V) to (V + 0.3V) DD Package Power Dissipation: (T 70°C) A PDIP...................................................................800mW CERDIP.............................................................840mW SOIC..................................................................760mW Package Thermal Resistance: CERDIP R ...................................................100°C/W J-A CERDIP R .....................................................23°C/W J-C PDIP R ..........................................................80°C/W J-A PDIP R ..........................................................35°C/W J-C SOIC R ..........................................................95°C/W J-A SOIC R ..........................................................28°C/W J-C Operating Temperature Range: C Version...................................................0°C to +70°C E Version.................................................-40°C to +85°C M Version..............................................-55°C to +125°C Maximum Chip Temperature.......................................+150°C Storage Temperature Range.........................-65°C to +150°C ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise noted, T = +25°C, with 4.5V V 18V. A DD Parameters Sym Min Typ Max Units Conditions Input Logic 1, High Input Voltage V 2.4 — V V Note3 IH DD Logic 0, Low Input Voltage V — — 0.8 V Note3 IL Input Current I -1.0 — +1.0 µA 0VV V IN IN DD Output High Output Voltage V V – 0.025 — — V I = 100µA (Note1) OH DD LOAD Low Output Voltage V — — 0.15 V I = 10mA (Note1) OL LOAD Output Resistance R — 10 15  I = 10mA, V = 18V O OUT DD Peak Output Current I — 1.2 — A PK Continuous Output Current I — — 300 mA Single Output DC — — 500 Total Package Latch-Up Protection Withstand I — 500 — mA 4.5VV 16V DD Reverse Current Switching Time (Note1) Rise Time t — 15 25 nsec Figure4-1 R Fall Time t — 15 25 nsec Figure4-1 F Delay Time t — 40 75 nsec Figure4-1 D1 Delay Time t — 40 75 nsec Figure4-1 D2 Power Supply Power Supply Current I — 1.5 4 mA S Power Supply Voltage V 4.5 — 18 V Note2 DD Note 1: Totem pole outputs should not be paralleled because the propagation delay differences from one to the other could cause one driver to drive high a few nanoseconds before another. The resulting current spike, although short, may decrease the life of the device. Switching times are ensured by design. 2: When driving all four outputs simultaneously in the same direction, VDD will be limited to 16V. This reduces the chance that internal dv/dt will cause high-power dissipation in the device. 3: The input threshold has approximately 50mV of hysteresis centered at approximately 1.5V. Input rise times should be kept below 5µsec to avoid high internal peak currents during input transitions. Static input levels should also be maintained above the maximum, or below the minimum, input levels specified in the "Electrical Characteristics" to avoid increased power dissipation in the device.  2001-2012 Microchip Technology Inc. DS21425C-page 3

TC4467/TC4468/TC4469 ELECTRICAL SPECIFICATIONS (OPERATING TEMPERATURES) Electrical Characteristics: Unless otherwise noted, over operating temperature range with 4.5V V 18V. DD Parameters Sym Min Typ Max Units Conditions Input Logic 1, High Input Voltage V 2.4 — — V Note3 IH Logic 0, Low Input Voltage V — — 0.8 V Note3 IL Input Current I -10 — 10 µA 0VV V IN IN DD Output High Output Voltage V V – 0.025 — — V I = 100µA (Note1) OH DD LOAD Low Output Voltage V — — 0.30 V I = 10mA (Note1) OL LOAD Output Resistance R — 20 30  I = 10mA, V = 18V O OUT DD Peak Output Current I — 1.2 — A PK Continuous Output Current I — — 300 mA Single Output DC — — 500 Total Package Latch-Up Protection Withstand I — 500 — mA 4.5VV 16V DD Reverse Current Switching Time (Note1) Rise Time t — 15 50 nsec Figure4-1 R Fall Time t — 15 50 nsec Figure4-1 F Delay Time t — 40 100 nsec Figure4-1 D1 Delay Time t — 40 100 nsec Figure4-1 D2 Power Supply Power Supply Current I — — 8 mA S Power Supply Voltage V 4.5 — 18 V Note2 DD Note 1: Totem pole outputs should not be paralleled because the propagation delay differences from one to the other could cause one driver to drive high a few nanoseconds before another. The resulting current spike, although short, may decrease the life of the device. Switching times are ensured by design. 2: When driving all four outputs simultaneously in the same direction, VDD will be limited to 16V. This reduces the chance that internal dv/dt will cause high-power dissipation in the device. 3: The input threshold has approximately 50mV of hysteresis centered at approximately 1.5V. Input rise times should be kept below 5µsec to avoid high internal peak currents during input transitions. Static input levels should also be maintained above the maximum, or below the minimum, input levels specified in the "Electrical Characteristics" to avoid increased power dissipation in the device. TRUTH TABLE Part No. TC4467 NAND TC4468 AND TC4469 AND/INV Inputs A H H L L H H L L H H L L Inputs B H L H L H L H L H L H L Outputs TC446X L H H H H L L L L H L L Legend: H = High L = Low DS21425C-page 4  2001-2012 Microchip Technology Inc.

TC4467/TC4468/TC4469 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: T = +25°C, with 4.5V V 18V. A DD 140 140 22000 ppF 120 120 2200 pF 100 1600 ppF 100 1500 pF c) c) se 80 1000 pF se 80 n n ( ( 1000 pF tRISE 6400 470 pF tFALL 6400 470 pF 20 100 pF 20 100 ppF 0 0 3 5 7 9 11 13 15 17 19 3 5 7 9 11 13 15 17 19 VSUPPLY (V) VSUPPLY (V) FIGURE 2-1: Rise Time vs. Supply FIGURE 2-4: Fall Time vs. Supply Voltage. Voltage. 140 140 120 5 VVVV 120 5 VVVV 100 100 (nsec)tRISE 864000 1105 VV (nsec)tFALL864000 1105 VV 20 20 0 000 100 1000 10,000 100 1000 10,000 CLOAD (pF) CLOAD (pF) FIGURE 2-2: Rise Time vs. Capacitive FIGURE 2-5: Fall Time vs. Capacitive Load. Load. 25 80 VCSLUOPAPDL =Y 4=7 107 p.5F V CCLOAD = 4470 pF 20 tFALL ec) 60 s nsec)15 tRISE ME (n ttD1 ME ( Y TI 40 TI10 LA tD2 E D 20 5 0 0 -50 -25 0 25 50 75 100 125 4 6 8 10 12 14 16 18 TEMPERATURE (°C) VSUPPLY (V) FIGURE 2-3: Rise/Fall Times vs. FIGURE 2-6: Propagation Delay Time vs. Temperature. Supply Voltage.  2001-2012 Microchip Technology Inc. DS21425C-page 5

TC4467/TC4468/TC4469 2.0 TYPICAL PERFORMANCE CURVES (CONTINUED) Note: T = +25°C, with 4.5V V 18V. A DD 140 70 120 VDD=12VV VDD = 17.5 V nsec)100 INPUT RISING nsec) 60 VIN = 470 pF tD1 TIME ( 80 tD2 TIME ( 50 tD2 Y 60 Y A A 40 DEL 40 INPUT FALLING tD1 DEL 30 20 0 20 1 2 3 4 5 6 7 8 9 10 -60 -40 -20 0 20 40 60 80 100 120 VDRIVE (V) °C) FIGURE 2-7: Input Amplitude vs. Delay FIGURE 2-10: Propagation Delay Times Times. vs. Temperatures. 2.5 3.5 VVDD = 17.5 V 3.0 2.0 A) A) 2.5 m m (NT 1.5 OUTPUTS = 0 (NT 2.0 OUTPUTS = 0 E E C C S S 1.5 E 1.0 E UI UI OUTPUTS = 1 IQ IQ 1.0 0.5 OUTPUTS = 1 0.5 0 0 4 6 8 10 12 14 16 18 -60 -40 -20 0 20 40 60 80 100 120 VSUPPLY (V) TJUNCTION (°C) FIGURE 2-8: Quiescent Supply Current FIGURE 2-11: Quiescent Supply Current vs. Supply Voltage. vs. Temperature. 35 35 30 30 25 TJ = +150°C 25 ) ) ΩR(DS(ON) 1250 TJ = +25°C ΩR(DS(ON) 1250 TJ = +150°C 10 10 TJ = +25°C 5 5 0 0 4 6 8 10 12 14 16 18 4 6 8 10 12 14 16 18 VSUPPLY(V) VSUPPLY(V) FIGURE 2-9: High-State Output FIGURE 2-12: Low-State Output Resistance. Resistance. DS21425C-page 6  2001-2012 Microchip Technology Inc.

TC4467/TC4468/TC4469 2.0 TYPICAL PERFORMANCE CURVES (CONTINUED) Note: (Load on single output only). 60 60 VDD = 18 V 2MHHz VDD = 18 V 2200 pF 50 111MMMHHHzz 50 11000 pF mA) 40 mA) 40 (ISUPPLY 3200 5000 kHz (ISUPPLY 3200 100 ppF 10 200 kHz 10 20 kHz 0 0 100 1000 10,000 10 100 1000 10,000 CLOAD (pF) FREQUENCY (kHz) FIGURE 2-13: Supply Current vs. FIGURE 2-16: Supply Current vs. Capacitive Load. Frequency. 60 60 VDD=12VV 22MMHHzz VDD=12VV 2200 pF 50 50 A) 40 A) 40 m m ( 1 MHz ( 1000 pppF Y 30 Y 30 L L P P P P ISU 20 500 kHz ISU 20 10 200 kHz 10 100 pF 20 kHz 0 0 100 1000 10,000 10 100 1000 10,000 CLOAD (pF) FREQUENCY (kHz) FIGURE 2-14: Supply Current vs. FIGURE 2-17: Supply Current vs. Capacitive Load. Frequency. 60 60 VVDD = 6 VV VVDD = 6 V 50 50 A) 40 A) 40 m m ( ( 2200 pF PLY 30 2 MHz PLY 30 ISUP 20 1MHz ISUP 20 1000 pF 10 500 kHz 10 200 kHz 100 pF 20 kHz 0 0 100 1000 10,000 10 100 1000 10,000 CLOAD (pF) FREQUENCY (kHz) FIGURE 2-15: Supply Current vs. FIGURE 2-18: Supply Current vs. Capacitive Load. Frequency.  2001-2012 Microchip Technology Inc. DS21425C-page 7

TC4467/TC4468/TC4469 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table3-1. TABLE 3-1: PIN FUNCTION TABLE 14-Pin PDIP, 16-Pin SOIC CERDIP (Wide) Description Symbol Symbol 1A 1A Input A for Driver 1, TTL/CMOS Compatible Input 1B 1B Input B for Driver 1, TTL/CMOS Compatible Input 2A 2A Input A for Driver 2, TTL/CMOS Compatible Input 2B 2B Input B for Driver 2, TTL/CMOS Compatible Input 3A 3A Input A for Driver 3, TTL/CMOS Compatible Input 3B 3B Input B for Driver 3, TTL/CMOS Compatible Input GND GND Ground — GND Ground 4A 4A Input A for Driver 4, TTL/CMOS Compatible Input 4B 4B Input B for Driver 4, TTL/CMOS Compatible Input 4Y 4Y Output for Driver 4, CMOS Push-Pull Output 3Y 3Y Output for Driver 3, CMOS Push-Pull Output 2Y 2Y Output for Driver 2, CMOS Push-Pull Output 1Y 1Y Output for Driver 1, CMOS Push-Pull Output V V Supply Input, 4.5V to 18V DD DD — V Supply Input, 4.5V to 18V DD DS21425C-page 8  2001-2012 Microchip Technology Inc.

TC4467/TC4468/TC4469 4.0 DETAILED DESCRIPTION 4.4 Power Dissipation The supply current versus frequency and supply 4.1 Supply Bypassing current versus capacitive load characteristic curves will Large currents are required to charge and discharge aid in determining power dissipation calculations. large capacitive loads quickly. For example, charging a Microchip Technology's CMOS drivers have greatly 1000pF load to 18V in 25nsec requires 0.72A from reduced quiescent DC power consumption. the device's power supply. Input signal duty cycle, power supply voltage and load To ensure low supply impedance over a wide frequency type influence package power dissipation. Given power range, a 1µF film capacitor in parallel with one or two dissipation and package thermal resistance, the maxi- low-inductance, 0.1µF ceramic disk capacitors with mum ambient operating temperature is easily short lead lengths (<0.5in.) normally provide adequate calculated. The 14-pin plastic package junction-to- bypassing. ambient thermal resistance is 83.3°C/W. At +70°C, the package is rated at 800mW maximum dissipation. 4.2 Grounding Maximum allowable chip temperature is +150°C. The TC4467 and TC4469 contain inverting drivers. Three components make up total package power Potential drops developed in common ground dissipation: impedances from input to output will appear as 1. Load-caused dissipation (P ). L negative feedback and degrade switching speed 2. Quiescent power (P ). Q characteristics. Instead, individual ground returns for 3. Transition power (P ). input and output circuits, or a ground plane, should be T used. A capacitive-load-caused dissipation (driving MOSFET gates), is a direct function of frequency, capacitive load 4.3 Input Stage and supply voltage. The power dissipation is: The input voltage level changes the no-load or EQUATION quiescent supply current. The N-channel MOSFET input stage transistor drives a 2.5mA current source P = fCV2 L S load. With logic “0” outputs, maximum quiescent supply current is 4mA. Logic “1” output level signals reduce f = Switching Frequency quiescent current to 1.4mA, maximum. Unused driver C = Capacitive Load inputs must be connected to V or V . Minimum DD SS V = Supply Voltage power dissipation occurs for logic “1” outputs. S The drivers are designed with 50mV of hysteresis, A resistive-load-caused dissipation for ground- which provides clean transitions and minimizes output referenced loads is a function of duty cycle, load stage current spiking when changing states. Input volt- current and load voltage. The power dissipation is: age thresholds are approximately 1.5V, making any voltage greater than 1.5V, up to V ,a logic “1” input. DD EQUATION Input current is less than 1µA over this range. P = DV –V I L S L L D = Duty Cycle V = Supply Voltage S V = Load Voltage L I = Load Current L  2001-2012 Microchip Technology Inc. DS21425C-page 9

TC4467/TC4468/TC4469 A resistive-load-caused dissipation for supply- EQUATION referenced loads is a function of duty cycle, load –9 current and output voltage. The power dissipation is P = fV 1010  T s EQUATION C = 1000 pF Capacitive Load V = 15 V S P = DV I L O L D = 50% f = 200kHz D = Duty Cycle V = Device Output Voltage P = Package Power Dissipation O D IL = Load Current = PL+PQ+PT = 45mW+35mW+30mW Quiescent power dissipation depends on input signal = 110mW duty cycle. Logic HIGH outputs result in a lower power dissipation mode, with only 0.6mA total current drain Package power dissipation is the sum of load, (all devices driven). Logic LOW outputs raise the quiescent and transition power dissipations. An current to 4mA maximum. The quiescent power example shows the relative magnitude for each term: dissipation is: Maximum operating temperature is: EQUATION EQUATION P = V DI +1–DI  Q S H L T – P  = 141C J JA D I = Quiescent Current with all outputs LOW H T = Maximum allowable junction temperature J (4 mA max.) (+150C I = Quiescent Current with all outputs HIGH L  = Junction-to-ambient thernal resistance JA (0.6 mA max.) (83.3C/W) 14-pin plastic package D = Duty Cycle V = Supply Voltage S Note: Ambient operating temperature should not exceed +85°C for "EJD" device or +125°C Transition power dissipation arises in the complimen- for "MJD" device. tary configuration (TC446X) because the output stage N-channel and P-channel MOS transistors are ON simultaneously for a very short period when the output changes. The transition power dissipation is approximately: V DD I nput: 100kHz, s quare wave, 1µF Film 0.1µF Ceramic t = t  10nsec RISE FALL 14 1 +5V 1A 13 90% 2 VOUT 1B 470pF Input 3 2A 12 (A, B) 4 2B 0V 10% 5 3A 6 11 VDD t 90% t 90% 3B D1 D2 t t Output R F 8 4A 10 4B 9 0V 10% 10% 7 FIGURE 4-1: Switching Time Test Circuit. DS21425C-page 10  2001-2012 Microchip Technology Inc.

TC4467/TC4468/TC4469 5.0 APPLICATIONS INFORMATION +12V 14 Airpax TC4469 #M82102-P2 1 1133 Red 7.5/Step 2 Motor 3 12 4 A Gray 55 B 11 Yel 6 8 10 Blk 9 7 FIGURE 5-1: Stepper Motor Drive. +5V to +15V 14 18V TC4469 1 13 2 Direction 3 Rev 12 Fwd 4 5 PWM Speed 11 6 M Motor 8 10 9 7 FIGURE 5-2: Quad Driver For H-bridge Motor Control.  2001-2012 Microchip Technology Inc. DS21425C-page 11

TC4467/TC4468/TC4469 6.0 PACKAGING INFORMATION 6.1 Package Marking Information 14-Lead PDIP (300 mil) Example: XXXXXXXXXXXXXX TC4467CPD XXXXXXXXXXXXXX YYWWNNN YYWWNNN 14-Lead CERDIP (300 mil) Example: XXXXXXXXXXXXXX TC4468EJD XXXXXXXXXXXXXX YYWWNNN YYWWNNN 16-Lead SOIC (300 mil) Example: XXXXXXXXXXX TC4469COE XXXXXXXXXXX YYWWNNN XXXXXXXXXXX YYWWNNN Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code e3 Pb-free JEDEC designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( e 3 ) can be found on the outer packaging for this package. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. DS21425C-page 12  2001-2012 Microchip Technology Inc.

TC4467/TC4468/TC4469 14-Lead Plastic Dual In-line (P) – 300 mil (PDIP) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E1 D 2 n 1  E A A2 c L A1  B1 eB B p Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 14 14 Pitch p .100 2.54 Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32 Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68 Base to Seating Plane A1 .015 0.38 Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26 Molded Package Width E1 .240 .250 .260 6.10 6.35 6.60 Overall Length D .740 .750 .760 18.80 19.05 19.30 Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43 Lead Thickness c .008 .012 .015 0.20 0.29 0.38 Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78 Lower Lead Width B .014 .018 .022 0.36 0.46 0.56 Overall Row Spacing § eB .310 .370 .430 7.87 9.40 10.92 Mold Draft Angle Top  5 10 15 5 10 15 Mold Draft Angle Bottom  5 10 15 5 10 15 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-005  2001-2012 Microchip Technology Inc. DS21425C-page 13

TC4467/TC4468/TC4469 14-Lead Ceramic Dual In-line – 300 mil (CERDIP) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 14-Pin CERDIP (Narrow) PIN 1 .300 (7.62) .230 (5.84) .098 (2.49) MAX. .030 (0.76) MIN. .780 (19.81) .320 (8.13) .740 (18.80) .290 (7.37) .040 (1.02) .200 (5.08) .020 (0.51) .160 (4.06) .015 (0.38) 3° MIN. .200 (5.08) .150 (3.81) .008 (0.20) .125 (3.18) MIN. .400 (10.16) .320 (8.13) .020 (0.51) .110 (2.79) .065 (1.65) .016 (0.41) .090 (2.29) .045 (1.14) Dimensions: inches (mm) DS21425C-page 14  2001-2012 Microchip Technology Inc.

TC4467/TC4468/TC4469 16-Lead Plastic Small Outline (SO) – Wide, 300 mil (SOIC) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E p E1 D 2 n 1 B h  45 c A A2   L A1 Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 16 16 Pitch p .050 1.27 Overall Height A .093 .099 .104 2.36 2.50 2.64 Molded Package Thickness A2 .088 .091 .094 2.24 2.31 2.39 Standoff § A1 .004 .008 .012 0.10 0.20 0.30 Overall Width E .394 .407 .420 10.01 10.34 10.67 Molded Package Width E1 .291 .295 .299 7.39 7.49 7.59 Overall Length D .398 .406 .413 10.10 10.30 10.49 Chamfer Distance h .010 .020 .029 0.25 0.50 0.74 Foot Length L .016 .033 .050 0.41 0.84 1.27 Foot Angle  0 4 8 0 4 8 Lead Thickness c .009 .011 .013 0.23 0.28 0.33 Lead Width B .014 .017 .020 0.36 0.42 0.51 Mold Draft Angle Top  0 12 15 0 12 15 Mold Draft Angle Bottom  0 12 15 0 12 15 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-013 Drawing No. C04-102  2001-2012 Microchip Technology Inc. DS21425C-page 15

TC4467/TC4468/TC4469 7.0 REVISION HISTORY Revision C (December 2012) Added a note to each package outline drawing. DS21425C-page 16  2001-2012 Microchip Technology Inc.

TC4467/4468/4469 THE MICROCHIP WEB SITE CUSTOMER SUPPORT Microchip provides online support via our WWW site at Users of Microchip products can receive assistance www.microchip.com. This web site is used as a means through several channels: to make files and information easily available to • Distributor or Representative customers. Accessible by using your favorite Internet • Local Sales Office browser, the web site contains the following • Field Application Engineer (FAE) information: • Technical Support • Product Support – Data sheets and errata, application notes and sample programs, design Customers should contact their distributor, resources, user’s guides and hardware support representative or field application engineer (FAE) for documents, latest software releases and archived support. Local sales offices are also available to help software customers. A listing of sales offices and locations is included in the back of this document. • General Technical Support – Frequently Asked Questions (FAQ), technical support requests, Technical support is available through the web site online discussion groups, Microchip consultant at: http://microchip.com/support program member listing • Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives CUSTOMER CHANGE NOTIFICATION SERVICE Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notification” and follow the registration instructions.  2001-2012 Microchip Technology Inc. DS21425C-page 17

TC4467/4468/4469 READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480)792-4150. Please list the following information, and use this outline to provide us with your comments about this document. TO: Technical Publications Manager Total Pages Sent ________ RE: Reader Response From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ FAX: (______) _________ - _________ Application (optional): Would you like a reply? Y N Device: TC4467/4468/4469 Literature Number: DS21425C Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs? 3. Do you find the organization of this document easy to follow? If not, why? 4. What additions to the document do you think would enhance the structure and subject? 5. What deletions from the document could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS21425C-page 18  2001-2012 Microchip Technology Inc.

TC4467/TC4468/TC4469 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X XX Examples: a) TC4467COE: Commerical Temperature, Device Temperature Package SOIC package. Range b) TC4467CPD: Commercial Temperature, PDIP package. c) TC4467MJD: Military Temperature, Device: TC4467: 1.2A Quad MOSFET Driver, NAND Ceramic DIP package. TC4468: 1.2A Quad MOSFET Driver, AND TC4469: 1.2A Quad MOSFET Driver, AND/INV a) TC4468COE713: Tape and Reel, Commerical Temp., SOIC package. b) TC4468CPD: Commercial Temperature, Temperature Range: C = 0C to +70C PDIP package. E = -40C to +85C (CERDIP only) M = -55C to +125C (CERDIP only) a) TC4469COE: Commercial Temperature, SOIC package. b) TC4469CPD: Commercial Temperature, Package: PD = Plastic DIP, (300 mil body), 14-lead PDIP package. JD = Ceramic DIP, (300 mil body), 14-lead OE = SOIC (Wide), 16-lead OE713 = SOIC (Wide), 16-lead (Tape and Reel) Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom- mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. Your local Microchip sales office 2. The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products.  2001-2012 Microchip Technology Inc. DS21425C-page19

TC4467/TC4468/TC4469 NOTES: DS21425C-page 20  2001-2012 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, dsPIC, and may be superseded by updates. It is your responsibility to FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, ensure that your application meets with your specifications. PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash MICROCHIP MAKES NO REPRESENTATIONS OR and UNI/O are registered trademarks of Microchip Technology WARRANTIES OF ANY KIND WHETHER EXPRESS OR Incorporated in the U.S.A. and other countries. IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, INCLUDING BUT NOT LIMITED TO ITS CONDITION, MTP, SEEVAL and The Embedded Control Solutions QUALITY, PERFORMANCE, MERCHANTABILITY OR Company are registered trademarks of Microchip Technology FITNESS FOR PURPOSE. Microchip disclaims all liability Incorporated in the U.S.A. arising from this information and its use. Use of Microchip Silicon Storage Technology is a registered trademark of devices in life support and/or safety applications is entirely at Microchip Technology Inc. in other countries. the buyer’s risk, and the buyer agrees to defend, indemnify and Analog-for-the-Digital Age, Application Maestro, BodyCom, hold harmless Microchip from any and all damages, claims, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, suits, or expenses resulting from such use. No licenses are dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, conveyed, implicitly or otherwise, under any Microchip ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial intellectual property rights. Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O, Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA and Z-Scale are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. GestIC and ULPP are registered trademarks of Microchip Technology Germany II GmbH & Co. & KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2001-2012, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 9781620767993 QUALITY MANAGEMENT SYSTEM Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and CERTIFIED BY DNV Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures == ISO/TS 16949 == are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.  2001-2012 Microchip Technology Inc. DS21425C-page 21

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