TC1270A/70AN/71A Voltage Supervisor with Manual Reset Input Features: Package Types • Precision Voltage Monitor SOT-143 SOT-143 - 2.63V, 2.93V, 3.08V, 4.38V and 4.63V Trip Points (Typical) VSS 1 TCT4 VDD VSS 1 T 4 VDD C C 1 • Manual Reset Input 21 1 72 2 • Reset Time-Out Delay: RST 2 0A70A3 MR RST 2 71A 3 MR - Standard: 280ms (Typical) N - Optional: 2.19ms, and 35ms (Typical) • Power Consumption  15µA max SOT-23-5 SOT-23-5 • No glitches on outputs during power-up NC 1 TCT5 VSS NC 1 T 5 VSS • Active Low Output Options: 1C C - Push-Pull Output and Open-Drain Output VDD 2 2712 VDD 2 12 07 7 • Active High Output Option: MR 3 A0A4 RST MR 3 1A 4 RST N - Push-Pull Output • Replacement for (Specification compatible with): Functional Block Diagram - TC1270, TC1271 - TCM811, TCM812 • Fully Static Design VDD Voltage Reset PP RST Detector Generator (TC1271A) • Low-Voltage Operation (1.0V) Circuitry and Delay RST • ESD Protection: Timer PP (TC1270A) -  4kV Human Body Model (HBM) (2.19ms, 35ms, RST -  400V Machine Model (MM) 280ms) OD (TC1270AN) • Extended (E) Temperature Range: • Pa-c4k0a°gCe t oO p+t1io2n5s°C: MR 18.5k OutputDriver Glitch Filter - 4-Lead SOT-143 - 5-Lead SOT-23 - Pb-free Device Device Features Device TypOeutputALcetviveel eset Delay (3)ms) (Typ) eset Trip (3)oint (V) oltage ange (V) emperature ange Packages Comment R( RP VR TR SOT-143(2), Replaces TC1270 and TC1270A Push-Pull Low SOT-23-5 TCM811 4.63, 4.38, 2.19, 35, 1.0V to -40°C to SOT-143(2), New Option TC1270AN Open-Drain Low 3.08, 2.93, 280(1) 2.63(4) 5.5V +125°C SOT-23-5 SOT-143(2), Replaces TC1271 and TC1271A Push-Pull High SOT-23-5 TCM812 Note 1: The 280ms Reset delay time-out is compatible with the TC1270, TC1271, TCM811 and TCM812 devices. 2: The SOT-143 package is compatible with the TC1270, TC1271, TCM811 and TCM812 devices. 3: Custom Reset trip points and Reset delays available, contact your local Microchip sales office. 4: The TC1270/1 and TCM811/12 1.75V trip point option is not supported.  2007-2011 Microchip Technology Inc. DS22035D-page 1

TC1270A/70AN/71A NOTES: DS22035D-page 2  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A 1.0 ELECTRICAL † Notice: Stresses above those listed under “Absolute CHARACTERISTICS Maximum Ratings” may cause permanent damage to a device. The absolute maximum values are merely Absolute Maximum Ratings † stress ratings – functional operation of a device at Supply Voltage (V to V )...............................+7.0V those, or any other conditions above those indicated in DD SS the operational listing of these specifications, is not Input Current, V ..............................................10mA DD implied. Exposure to absolute maximum rating Output Current, RESET, Reset..........................10mA conditions for extended periods may affect device Voltage on all inputs and outputs reliability. w.r.t. V ............................-0.6V to (V + 1.0V) SS DD Storage Temperature Range..............-65°C to +150°C Operating Temperature Range..........-40°C to +125°C Maximum Junction Temperature, T ..................150°C S ESD protection on all pins Human Body Model  4kV Machine Model  400V ELECTRICAL CHARACTERISTICS Electrical Characteristics: Unless otherwise noted, V = 5V for L/M versions, V = 3.3V for T/S versions, DD DD V = 3V for R version, T = -40°C to +125°C. Typical values are at T = +25°C. DD A A Parameter Sym Min Typ(1) Max Units Test Conditions Operating Voltage Range V 1.0 — 5.5 V DD Supply Current I — 7 15 µA V > V , for L/M/R/S/T, DD DD TRIP V = 5.5V DD — 4.75 10 µA V > V , for R/S/T, V = 3.6V DD TRIP DD — 10 15 µA V < V , for L/M/R/S/T DD TRIP Reset Trip Point V 4.54 4.63 4.72 V TC127xAL: T = +25°C TRIP A Threshold (3) 4.50 — 4.75 V T = –40°C to +125°C A 4.30 4.38 4.46 V TC127xAM: T = +25°C A 4.25 — 4.50 V T = –40°C to +125°C A 3.03 3.08 3.14 V TC127xAT: T = +25°C A 3.00 — 3.15 V T = –40°C to +125°C A 2.88 2.93 2.98 V TC127xAS: T = +25°C A 2.85 — 3.00 V T = –40°C to +125°C A 2.72 2.77 2.82 V TC127xA:(5) T = +25°C A 2.70 — 2.85 V T = –40°C to +125°C A 2.58 2.63 2.68 V TC127xAR: T = +25°C A 2.55 — 2.70 V T = –40°C to +125°C A Note 1: Data in the Typical (“Typ”) column is at 5V, +25C, unless otherwise stated. 2: RST output for TC1270A and TC1270AN, RST output for TC1271A. 3: TC127XA refers to the TC1270A, TC1270AN or TC1271A device. 4: Hysteresis is within the V to V window. TRIP(MIN) TRIP(MAX) 5: Custom-ordered voltage trip point. Minimum order volume requirement. 6: This specification allows this device to be used in PIC® microcontroller applications that require the In-Circuit Serial Programming™ (ICSP™) feature (see device-specific programming specifications for voltage requirements). The total time that the RST pin can be above the maximum device operational voltage (5.5V) is 100s. Current into the RST pin should be limited to 2 mA. It is recommended that the device operational temperature be maintained between 0°C to +70°C (+25°C preferred). For additional information, refer to Figure2-41.  2007-2011 Microchip Technology Inc. DS22035D-page 3

TC1270A/70AN/71A ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: Unless otherwise noted, V = 5V for L/M versions, V = 3.3V for T/S versions, DD DD V = 3V for R version, T = -40°C to +125°C. Typical values are at T = +25°C. DD A A Parameter Sym Min Typ(1) Max Units Test Conditions Reset Threshold Tempco — ±30 — ppm/°C Reset Trip Point V — 0.3 — % Percentage of V Voltage HYS TRIP Hysteresis (1) MR Input High Threshold V 2.3 — — V V > V , L/M only IH DD TRIP(MAX) 0.7 V — — V V > V , R/S/T only DD DD TRIP(MAX) MR Input Low Threshold V — — 0.8 V V > V , L/M only IL DD TRIP(MAX) — — 0.25 V V V > V , R/S/T only DD DD TRIP(MAX) MR Pull-up Resistance 10 18.5 40 k Open-Drain High Voltage V — — 13.5 V Open-Drain Output pin only. ODH on Output V =3.0V, Time voltage > 5.5 DD applied  100s. Current into pin limited to 2mA +25°C operation recommended (6) Reset TC1270A/ V — — 0.3 V R/S/T only, OL Output TC1270AN I = 1.2mA, V = V SINK DD TRIP(MIN) Voltage TC1271A — — 0.3 V R/S/T only, Low (2) I = 1.2mA, V = V SINK DD TRIP(MAX) TC1270A/ — — 0.4 V L/M only, TC1270AN I = 3.2mA, V = V SINK DD TRIP(MIN) TC1271A — — 0.3 V L/M only, I = 3.2mA, V = V SINK DD TRIP(MAX) TC1270A/ — — 0.3 V L/M only, TC1270AN I = 50µA, V > 1.0V SINK DD Reset TC1270A V 0.8 V — — V R/S/T only, OH DD Output I = 500µA, V = V SOURCE DD TRIP(MAX) Voltage TC1270A V - 1.5 — — V L/M only, High (2) DD I = 800µA, V = V SOURCE DD TRIP(MAX) TC1271A 0.8 V — — V I = 500µA, V  V DD SOURCE DD TRIP(MIN) Input Leakage Current I — — ±1 µA V = V IL PIN DD Open-Drain RST Output I — — 1 µA Open-Drain configuration only. OLOD Leakage Capacitive Loading C — — 50 pF IO Specification on Output Pins Note 1: Data in the Typical (“Typ”) column is at 5V, +25C, unless otherwise stated. 2: RST output for TC1270A and TC1270AN, RST output for TC1271A. 3: TC127XA refers to the TC1270A, TC1270AN or TC1271A device. 4: Hysteresis is within the V to V window. TRIP(MIN) TRIP(MAX) 5: Custom-ordered voltage trip point. Minimum order volume requirement. 6: This specification allows this device to be used in PIC® microcontroller applications that require the In-Circuit Serial Programming™ (ICSP™) feature (see device-specific programming specifications for voltage requirements). The total time that the RST pin can be above the maximum device operational voltage (5.5V) is 100s. Current into the RST pin should be limited to 2 mA. It is recommended that the device operational temperature be maintained between 0°C to +70°C (+25°C preferred). For additional information, refer to Figure2-41. DS22035D-page 4  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A 1.1 AC CHARACTERISTICS 1.1.1 TIMING PARAMETER SYMBOLOGY The timing parameter symbols have been created following one of the following formats: 1. TppS2ppS 2. TppS T F Frequency T Time E Error Lowercase letters (pp) and their meanings: pp io Input or Output pin osc Oscillator rx Receive tx Transmit bitclk RX/TX BITCLK RST Reset drt Device Reset Timer Uppercase letters and their meanings: S F Fall P Period H High R Rise I Invalid (High-impedance) V Valid L Low Z High-impedance C = 50pF Pin L V SS FIGURE 1-1: Test Load Conditions.  2007-2011 Microchip Technology Inc. DS22035D-page 5

TC1270A/70AN/71A TIMING DIAGRAMS AND SPECIFICATIONS MR Pin and Reset Pin Waveform MR tMR tMRNI tRST t MD RST RST Device Voltage and Reset Pin (Active Low) Waveform V V TRIP(MAX) TRIP V TRIP(MIN) VDD 1V tRST t t RST RD RST(1) RST V < 1V is outside the device operating specification. The RST (or RST) output state is unknown while V < 1V. DD DD Note 1: The TC1270AN requires an external pull-up resistor. Reset and Device Reset Timer Requirements Electrical Characteristics: Unless otherwise noted, V = 5V for L/M versions, V = 3.3V for T/S versions, DD DD V = 3V for R version, T = -40°C to +125°C. Typical values are at T = +25°C. DD A A Parameter Sym Min Typ(1) Max Units Test Conditions V to Reset Delay t — 50 — µs V = V to DD RD DD TRIP(MAX) V –125mV TRIP(MIN) Reset Active TC127XAxBVyy(3) t 1.09 2.19 4.38 ms V = V RST DD TRIP(MAX) Time Out TC127XAxAVyy(3) 17.5 35 70 ms V = V Period DD TRIP(MAX) TC127XAxVyy(3) 140 280 560 ms V = V DD TRIP(MAX) MR Minimum Pulse Width t 10 — — µs MR MR Noise Immunity t — 0.1 — µs MRNI MR to Reset Propagation Delay t — 0.2 — µs MD Note 1: Unless otherwise stated, data in the Typical (“Typ”) column is at 5V, +25C. 2: RST output for TC1270A, RST output for TC1271A. 3: TC127XA refers to the TC1270A, TC1270AN or TC1271A device. “x” indicates the selected voltage trip point, while “yy” indicates the package code. DS22035D-page 6  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, V =+1.0V to +5.5V, V =GND. DD SS Parameters Sym Min Typ Max Units Conditions Temperature Ranges Specified Temperature Range T -40 — +125 °C A Operating Temperature Range T -40 — +125 °C A Storage Temperature Range T -65 — +150 °C A Thermal Package Resistances Thermal Resistance, 5L-SOT-23  — 256 — °C/W JA Thermal Resistance, 4L-SOT-143  — 426 — °C/W JA  2007-2011 Microchip Technology Inc. DS22035D-page 7

TC1270A/70AN/71A NOTES: DS22035D-page 8  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables that follow this note are the result of a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, all limits are specified for V = 1V to 5.5V, T = –40°C to +125°C. DD A 2.5 7 5.0V 5.5V 2 6.5 4.0V µA) 1.5 3.0V µA) 6 (DD 1 (DD 5.5 4.8V I 2.0V I 0.5 1.0V 5 0 4.5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 2 2 4 6 8 0 2 4 2 2 4 6 8 0 2 - - 1 1 - - 1 1 Temperature (°C) Temperature (°C) FIGURE 2-1: I vs. Temperature (Reset FIGURE 2-4: I vs. Temperature (Reset DD DD Power-up Timer Inactive) Power-up Timer Active) (TC1270AL, TC1270ANL, TC1271AL (TC1270AL, TC1270ANL, TC1271AL - 4.50V min./4.63V typ./4.75V max.). - 4.50V min./4.63V typ./4.75V max.). 3 7 2.5 5.0V 6.5 5.5V 6 2 4.0V 4.5V A) 3.0V A) 5.5 (µD 1.5 (µD 5 ID 1 2.0V ID 4.5 3.5V 4 0.5 1.0V 3.5 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 2 2 4 6 8 0 2 4 2 2 4 6 8 0 2 - - 1 1 - - 1 1 Temperature (°C) Temperature (°C) FIGURE 2-2: I vs. Temperature (Reset FIGURE 2-5: I vs. Temperature (Reset DD DD Power-up Timer Inactive) Power-up Timer Active) (TC1270AT, TC1270ANT, TC1271AT (TC1270AT, TC1270ANT, TC1271AT - 3.00V min./3.08V typ./3.15V max.). - 3.00V min./3.08V typ./3.15V max.). 3 6.5 5.0V 6 5.0V 2.5 5.5 4.0V I (µA)DD 1.152 23.0.V0V I (µA)DD 4.455 34..00VV 3.5 0.5 1.0V 3 0 2.5 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 Temperature (°C) Temperature (°C) FIGURE 2-3: I vs. Temperature (Reset FIGURE 2-6: I vs. Temperature (Reset DD DD Power-up Timer Inactive) Power-up Timer Active) (TC1270AR, TC1270ANR, TC1271AR (TC1270AR, TC1270ANR, TC1271AR - 2.55V min./2.63V typ./2.70V max.). - 2.55V min./2.63V typ./2.70V max.).  2007-2011 Microchip Technology Inc. DS22035D-page 9

TC1270A/70AN/71A Note: Unless otherwise indicated, all limits are specified for V = 1V to 5.5V, T = –40°C to +125°C. DD A 3 7 2.5 +125°C 6.5 +125°C 2 +25°C A) A) 6 I (µDD 1.15 -40°C I (µDD 5.5 +25°C -40°C 0.5 5 0 4.5 1 2 3 4 5 4.5 4.7 4.9 5.1 5.3 5.5 V (V) V (V) DD DD FIGURE 2-7: I vs. V (Reset FIGURE 2-10: I vs. V (Reset DD DD DD DD Power-up Timer Inactive) Power-up Timer Active) (TC1270AL, TC1270ANL, TC1271AL (TC1270AL, TC1270ANL, TC1271AL - 4.50V min./4.63V typ./4.75V max.). - 4.50V min./4.63V typ./4.75V max.). 3 7 6.5 2.5 +125°C 6 +125°C 2 5.5 I (µA)DD 1.15 +25-°4C0°C I (µA)DD 4.455 -40°C +25°C 3.5 0.5 3 0 2.5 1 2 3 4 5 3 3.5 4 4.5 5 5.5 V (V) V (V) DD DD FIGURE 2-8: I vs. V (Reset FIGURE 2-11: I vs. V (Reset DD DD DD DD Power-up Timer Inactive) Power-up Timer Active) (TC1270AT, TC1270ANT, TC1271AT (TC1270AT, TC1270ANT, TC1271AT - 3.00V min./3.08V typ./3.15V max.). - 3.00V min./3.08V typ./3.15V max.). 3.5 7 3 2.5 +125°C 6 +125°C (µA)D 1.52 +25°C (µA)D 5 +25°C ID ID 4 -40°C 1 -40°C 3 0.5 0 2 1 2 3 4 5 2.5 3 3.5 4 4.5 5 5.5 V (V) V (V) DD DD FIGURE 2-9: I vs. V (Reset FIGURE 2-12: I vs. V (Reset DD DD DD DD Power-up Timer Inactive) Power-up Timer Active) (TC1270AR, TC1270ANR, TC1271AR (TC1270AR, TC1270ANR, TC1271AR - 2.55V min./2.63V typ./2.70V max.). - 2.55V min./2.63V typ./2.70V max.). DS22035D-page 10  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A Note: Unless otherwise indicated, all limits are specified for V = 1V to 5.5V, T = –40°C to +125°C. DD A 4.65 0.4 0.12 4.645 VTRIP (with VDDRising) 0.38 0.1 4.64 0.36 3.0V 4.635 0.34 0.08 V (V)TRIP 444.6..662235 VHYS 000...23382 V (%)HYS V (V)OL 00..0046 2.0V 4.3V4.4V 0.26 4.615 VTRIP (with VDD Falling) 0.24 0.02 4.5V 4.61 0.22 4.605 0.2 0 -40 25 125 0.00 1.00 2.00 3.00 4.00 Temperature (°C) IOL (mA) FIGURE 2-13: V and V vs. FIGURE 2-16: V vs. I TRIP HYS OL OL Temperature (TC1270AL, TC1270ANL, TC1271AL (TC1270AL, TC1270ANL, TC1271AL - 4.50V min./4.63V typ./4.75V max.). - 4.50V min./4.63V typ./4.75V max.). 3.086 0.4 0.25 3.084 0.38 33.0.0882 VTRIP (with VDD Rising) 00..3346 0.2 3.15 3.2V V (V)TRIP 333...000777468 VHYS 000...23382 V (%)HYS V (V)OL 0.01.51 4.0V 4.5V 3.072 0.26 5.0V 3.07 VTRIP (with VDDFalling) 0.24 0.05 5.5V 3.068 0.22 3.066 0.2 0 -40 25 125 0 2 4 6 8 Temperature (°C) IOL (mA) FIGURE 2-14: V and V vs. FIGURE 2-17: V vs. I TRIP HYS OL OL Temperature (TC1270AT, TC1270ANT, TC1271AT (TC1270AT, TC1270ANT, TC1271AT - 3.00V min./3.08V typ./3.15V max.). - 3.00V min./3.08V typ./3.15V max.). 0.2 2.64 0.4 0.18 2.635 VTRIP (with VDD Rising) 0.38 0.16 0.36 0.14 2.0V 2.45V 2.63 0.34 V) 0.32 %) V) 0.12 V (TRIP 22.6.6225 VHYS 000...22368 V (HYS V (OL 00..000.681 2.5V 2.615 VTRIP (with VDD Falling) 0.24 0.04 0.22 0.02 2.61 0.2 0 -40 25 125 0 1 2 3 4 Temperature (°C) IOL (mA) FIGURE 2-15: VTRIP and VHYST vs. FIGURE 2-18: VOL vs. IOL Temperature (TC1270AR, TC1270ANR, TC1271AR (TC1270AR, TC1270ANR, TC1271AR - 2.55V min./2.63V typ./2.70V max.). - 2.55V min./2.63V typ./2.70V max.).  2007-2011 Microchip Technology Inc. DS22035D-page 11

TC1270A/70AN/71A Note: Unless otherwise indicated, all limits are specified for V = 1V to 5.5V, T = –40°C to +125°C. DD A 0.12 5.6 0.1 5.4 5.5V 4 mA 5.2 0.08 V) V) 5 (OL 0.06 2 mA (OH 4.8 5.0V V V 4.8V 0.04 1 mA 0.5 0.35 mA 4.6 0.2 0.02 A 4.4 4.75V 0 4.2 -40 10 60 110 0.00 1.00 2.00 3.00 4.00 5.00 Temperature (°C) IOH (mA) FIGURE 2-19: V vs. Temperature FIGURE 2-22: V vs. I OL OH OL (TC1270AL, TC1270ANL, TC1271AL (TC1270AL, TC1270ANL, TC1271AL - 4.50V min./4.63V typ./4.75V max.). - 4.50V min./4.63V typ./4.75V max.) @ V = 4.5V). @ +25°C). DD 0.35 2.9 0.3 8 mA 2.7 0.25 2.9V V) 0.2 6 mA V) 2.5 2.7V V (OL 0.15 4 mA V (OH 2.3 2.5V 0.1 2 mA 1 mA0.5 2.1 A 0.05 1.9 0 1.7 -40 10 60 110 0 1 2 3 4 5 Temperature (°C) I (mA) OH FIGURE 2-20: V vs. Temperature FIGURE 2-23: V vs. I OL OH OH (TC1270AT, TC1270ANT, TC1271AT (TC1270AT, TC1270ANT, TC1271AT - 3.00V min./3.08V typ./3.15V max.). - 3.00V min./3.08V typ./3.15V max.) @ V = 2.7V). @ +25°C). DD 6 0.2 5.5V 5.5 5 5.0V 0.15 4 mA 4.5 4.5V V) V) V (OL 0.1 2 mA V (OH 3.45 4.0V 0.05 0.2 1 mA0.5 0.35 mA 3 3.0V A 2.5 2.8V 0 2 -40 10 60 110 0 1 2 3 4 5 Temperature (°C) I (mA) OH FIGURE 2-21: V vs. Temperature FIGURE 2-24: V vs. I OL OH OH (TC1270AR, TC1270ANR, TC1271AR (TC1270AR, TC1270ANR, TC1271AR - 2.55V min./2.63V typ./2.70V max.). - 2.55V min./2.63V typ./2.70V max.) @ V = 1.8V). @ +25°C). DD DS22035D-page 12  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A Note: Unless otherwise indicated, all limits are specified for V = 1V to 5.5V, T = –40°C to +125°C. DD A 55 320 315 54 310 53 305 µs) 52 ms) 300 (RPD 51 (RST 295 t t 290 5.0V 50 49 285 4.75V 5.5V 280 48 275 -40 10 60 110 -40 10 60 110 Temperature (°C) Temperature (°C) FIGURE 2-25: V Falling to Reset FIGURE 2-28: Reset Time-Out Period (t ) DD RST Propagation Delay (t ) vs. Temperature vs. Temperature RPD (TC1270AL, TC1270ANL, TC1271AL (TC1270AL, TC1270ANL, TC1271AL - 4.50V min./4.63V typ./4.75V max.). - 4.50V min./4.63V typ./4.75V max.). 55 325 320 54 315 3.2V 53 310 3.15 µs) 52 ms) 305 t (RPD 51 t (RST 239050 4.5V4.0V 50 290 5.0V 285 5.5V 49 280 48 275 -40 10 60 110 -40 10 60 110 Temperature (°C) Temperature (°C) FIGURE 2-26: V Falling to Reset FIGURE 2-29: Reset Time-Out Period (t ) DD RST Propagation Delay (t ) vs. Temperature vs. Temperature RPD (TC1270AT, TC1270ANT, TC1271AT (TC1270AT, TC1270ANT, TC1271AT - 3.00V min./3.08V typ./3.15V max.). - 3.00V min./3.08V typ./3.15V max.). 55 320 54 315 3.0V 310 53 305 µs) 52 ms) 300 (RPD 51 (RST 295 5.04V.5V t t 290 50 2.8V 5.5V 285 49 280 4.0V 48 275 -40 10 60 110 -40 10 60 110 Temperature (°C) Temperature (°C) FIGURE 2-27: V Falling to Reset FIGURE 2-30: Reset Time-Out Period (t ) DD RST Propagation Delay (t ) vs. Temperature vs. Temperature RPD (TC1270AR, TC1270ANR, TC1271AR (TC1270AR, TC1270ANR, TC1271AR - 2.55V min./2.63V typ./2.70V max.). - 2.55V min./2.63V typ./2.70V max.).  2007-2011 Microchip Technology Inc. DS22035D-page 13

TC1270A/70AN/71A Note: Unless otherwise indicated, all limits are specified for V = 1V to 5.5V, T = –40°C to +125°C. DD A 40 2.5 2.45 39 2.4 38 s) s) 2.35 m m (RST37 (RST2.22.53 5.0V t 36 5.0V t 35 4.75V 5.5V 2.2 4.75V 5.5V 2.15 34 2.1 -40 10 60 110 -40 10 60 110 Temperature (°C) Temperature (°C) FIGURE 2-31: Reset Time-Out Period (t ) FIGURE 2-34: Reset Time-Out Period (t ) RST RST (C time out option) vs. Temperature (B time out option) vs. Temperature (TC1270AL, TC1270ANL, TC1271AL (TC1270AL, TC1270ANL, TC1271AL - 4.50V min./4.63V typ./4.75V max.). - 4.50V min./4.63V typ./4.75V max.). 40 2.5 3.2V 2.45 3.2V 39 3.15V 2.4 3.15V 38 ms) 4.0V ms) 2.35 4.0V (ST37 4.5V (ST 2.3 4.5V tR36 5.0V tR2.25 5.0V 5.5V 5.5V 2.2 35 2.15 34 2.1 -40 10 60 110 -40 10 60 110 Temperature (°C) Temperature (°C) FIGURE 2-32: Reset Time-Out Period (t ) FIGURE 2-35: Reset Time-Out Period (t ) RST RST (C time out option) vs. Temperature (B time out option) vs. Temperature (TC1270AT, TC1270ANT, TC1271AT (TC1270AT, TC1270ANT, TC1271AT - 3.00V min./3.08V typ./3.15V max.). - 3.00V min./3.08V typ./3.15V max.). 40 2.5 3.0V 3.0V 39 2.45 2.4 38 s) s) 2.35 (mRST37 5.04V.5V (mRST2.22.53 5.0V4.5V t 36 t 2.8V 2.8V 5.5V 2.2 5.5V 35 2.15 4.0V 4.0V 34 2.1 -40 10 60 110 -40 10 60 110 Temperature (°C) Temperature (°C) FIGURE 2-33: Reset Time-Out Period (t ) FIGURE 2-36: Reset Time-Out Period (t ) RST RST (C time out option) vs. Temperature (B time out option) vs. Temperature (TC1270AR, TC1270ANR, TC1271AR (TC1270AR, TC1270ANR, TC1271AR - 2.55V min./2.63V typ./2.70V max.). - 2.55V min./2.63V typ./2.70V max.). DS22035D-page 14  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A Note: Unless otherwise indicated, all limits are specified for V = 1V to 5.5V, T = –40°C to +125°C. DD A 0.22 60 s) 50 Above Line, Reset Occurs 2.63V 0.21 µ on ( 40 3.08V s) 0.2 ati (µD 4.75V 4.8V Dur 30 tM 0.19 ent 20 si 0.18 5.0V an 10 4.63V 5.5V Tr Below Line, No Reset Occurs 0.17 0 -40 10 60 110 0.001 0.01 0.1 1 10 Temperature (°C) VTRIPMIN - VDD (V) FIGURE 2-37: MR Low to Reset FIGURE 2-40: V Transient Duration vs. DD Propagation Delay (t ) vs. Temperature Reset Threshold Overdrive MD (TC1270AL, TC1270ANL, TC1271AL (V (minimum) - V ). TRIP DD - 4.50V min./4.63V typ./4.75V max.). 0.22 1.E-02 0.21 A)1.E-04 nt (1.E-06 13.5V t (µs)MD 00.1.92 4.50.V0V 54..55VV kage Curre11..EE--1008 +12+52°5C°C 0.18 Lea1.E-12 -40°C 0.17 1.E-14 -40 10 60 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Output Voltage (V) Temperature (°C) FIGURE 2-38: MR Low to Reset FIGURE 2-41: Open-Drain Leakage Propagation Delay (t ) vs. Temperature Current vs. Voltage Applied to RST Pin MD (TC1270AT, TC1270ANT, TC1271AT (TC1270AR, TC1270ANR, TC1271AR - 3.00V min./3.08V typ./3.15V max.). - 2.55Vminimum). 0.22 0.21 4.0V s) 0.2 µ (D M 0.19 t 5.0V 4.5V 0.18 5.5V 0.17 -40 10 60 110 Temperature (°C) FIGURE 2-39: MR Low to Reset Propagation Delay (t ) vs. Temperature MD (TC1270AR, TC1270ANR, TC1271AR - 2.55V min./2.63V typ./2.70V max.).  2007-2011 Microchip Technology Inc. DS22035D-page 15

TC1270A/70AN/71A NOTES: DS22035D-page 16  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table3-1. TABLE 3-1: PINOUT DESCRIPTION Pin Number TC1270A TC1270AN TC1271A Pin (Push-Pull, (Open-Drain, (Push-Pull, active-low) active-low) active-high) Sym Standard Function 4 4 4 5 - 5 - 5 - 3- 43 3- 43 3- 43 Buffer / 2 1 2 1 2 1 Type T- T- T- T- T- T- Driver O O O O O O S S S S S S 5 1 1 5 1 V — Power Ground SS 4 2 — — — — RST O Push- Reset output (Push-Pull), active-low Pull H = V > V , Reset pin is inactive DD TRIP (after Reset Delay Timer completes) L = V < V , Reset pin is active DD TRIP Goes active (Low) if one of these conditions occurs: 1. If V falls below the selected Reset DD voltage threshold. 2. If the MR pin is forced low. 3. During power-up. — — 4 2 — — RST O Open- Reset output (Open-Drain), active-low Drain Float = V > V , Reset pin is inactive DD TRIP (after Reset Delay Timer completes) L = V < V , Reset pin is active DD TRIP Goes active (Low) if one of these conditions occurs: 1. If V falls below the selected Reset DD voltage threshold. 2. If the MR pin is forced low. 3. During power-up. — — — — 4 2 RST O Push- Reset output (Push-Pull), active-high Pull H = V < V , Reset pin is active DD TRIP L = V > V , Reset pin is inactive DD TRIP (after Reset Delay Timer completes) Goes active (High) if one of these conditions occurs: 1. If V falls below the selected Reset DD voltage threshold. 2. If the MR pin is forced low. 3. During power-up. Note 1: The MR pin has an internal weak pull-up (18.5k typical).  2007-2011 Microchip Technology Inc. DS22035D-page 17

TC1270A/70AN/71A TABLE 3-1: PINOUT DESCRIPTION (CONTINUED) Pin Number TC1270A TC1270AN TC1271A Pin (Push-Pull, (Open-Drain, (Push-Pull, active-low) active-low) active-high) Sym Standard Function 4 4 4 3-5 43- 3-5 43- 3-5 43- Buffer / 2 1 2 1 2 1 Type T- T- T- T- T- T- Driver O O O O O O S S S S S S 3 3 3 3 3 3 MR I ST(1) Manual Reset Input Pin This input allows a push button switch to be directly connected to a TC1270A/70AN/71A device’s MR pin, which can be used to force a system Reset. The input filter ignores noise pulses that occur on the MR pin. H = Switch is open (internal pull-up resistor pulls signal high). State of the RST/RST pin is determined by other system condi- tions. L = Switch is depressed (shorted to ground). This forces the RST/RST pin Active. 2 4 2 4 2 4 V — Power Supply Voltage DD 1 — 1 — 1 — NC — — No Connection Note 1: The MR pin has an internal weak pull-up (18.5k typical). 3.1 Ground Terminal (V ) 3.3.2 ACTIVE-HIGH (RST) – PUSH-PULL SS VSS provides the negative reference for the analog The RST push-pull output remains high while VDD is input voltage. Typically, the circuit ground is used. below the Reset voltage threshold (VTRIP). The time that the RST pin is held high after the device voltage (V ) returns to a high level (> V ) is typically 3.2 Supply Voltage (V ) DD TRIP DD 280ms. After the Reset Delay Timer expires, the RST V can be used for power supply monitoring or a pin will be driven to the low state. DD voltage level that requires monitoring. 3.3.3 ACTIVE-LOW (RST) – OPEN-DRAIN 3.3 Reset Output (RST and RST) The RST open-drain output remains low while V is DD below the Reset voltage threshold (V ). The time TRIP There are three types of Reset output pins. These are: that the RST pin is held low after the device voltage 1. Push-Pull active-low Reset (V ) returns to a high level (> V ) depends on the DD TRIP 2. Push-Pull active-high Reset Reset time-out selected. After the Reset Delay Timer expires, the RST pin will float. 3. Open-Drain active-low Reset, external pull-up resistor required. 3.4 Manual Reset Input (MR) 3.3.1 ACTIVE-LOW (RST) – PUSH-PULL The Manual Reset (MR) input pin allows a push button The RST push-pull output remains low while VDD is switch to easily be connected to the system. When the below the Reset voltage threshold (VTRIP). The time push button is depressed, it forces a system Reset. that the RST pin is held low after the device voltage This pin has circuitry that filters noise that may be (VDD) returns to a high level (> VTRIP) is typically present on the MR signal. 280ms. After the Reset Delay Timer expires, the RST The MR pin is active-low and has an internal pull-up pin will be driven to the high state. resistor. DS22035D-page 18  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A 4.0 DEVICE OPERATION Figure4-2 shows a typical circuit for a push-pull device and Figure4-3 shows a typical circuit for an open-drain device. 4.1 General Description For many of today’s microcontroller applications, care must be taken to prevent low-power conditions that can cause many different system problems. The most VDD Voltage VRST common causes are brown-out conditions, where the Detect system supply drops below the operating level Circuit Reset RST momentarily. The second most common cause is when Generator or a slowly decaying power supply causes the Manual Reset Circuit RST MR microcontroller to begin executing instructions without with Glitch MRRST sufficient voltage to sustain volatile memory (RAM), Filter Circuit thus producing indeterminate results. The TC127XA family (TC1270A, TC1270AN and TC1271A) are cost-effective voltage supervisor FIGURE 4-1: TC127XA High Level Block devices designed to keep a microcontroller in Reset Diagram. until the system voltage has reached and stabilized at the proper level for reliable system operation. These devices also operate as protection from brown-out V DD conditions when the system supply voltage drops below a safe operating level. 0.1µF V V DD DD A Manual Reset input (MR pin) is provided. This allows TC1270A/1A a push button switch to be directly connected to the RST TC127XA device, and is suitable for use as a push MR or Reset Input Push button Reset. This allows the system to easily be reset RST Button from the external control of the push button switch. No V V SS SS external components are required. The Reset pin (RST or RST) will be forced active, if any of the following occur: FIGURE 4-2: Typical Push-Pull • During device power-up Application Circuit. • V goes below the device threshold voltage DD • The Manual Reset input (MR) goes low V DD Figure4-1 shows a high level block diagram of the 0.1µF V V devices. The device can be described with three DD DD functional blocks. These are: TC1270AN • Voltage detect circuit MR RST Reset Input • Manual Reset with glitch filter circuit Push • Reset generator circuit Button V V SS SS The Reset generator circuit controls the Reset delay time of the Reset output signal. There are three Reset Delay Timer options. Depending FIGURE 4-3: Typical Open-Drain on the option, the Reset signal (RST/RST pin) will be Application Circuit. held active for a minimum of 1.09ms, 17.5ms, or 140ms. The TC1270A and TC1271A devices are available in a 4-Pin SOT-143 package (to maintain footprint The TC1271A has an active-high RST output while the compatibility with the TC1270, TC1271, TCM811 and TC1270A and TC1270AN have an active-low RST TCM812 devices) and a SOT-23-5 package. The output. TC1270AN is only available in the SOT-23-5 package. The TC1270A and TC1271A have a push-pull output Low supply current makes these devices suitable for driver, while the TC1270AN has an open-drain output. battery-powered applications. Device specific block diagrams are presented in Figure4-4 through Figure4-6.  2007-2011 Microchip Technology Inc. DS22035D-page 19

TC1270A/70AN/71A 4.2 Voltage Detect Circuit V DD The voltage detect circuit monitors V . The device’s DD Reset voltage trip point (V ) is selected when the TRIP Comparator + Output device is ordered. The voltage on the device’s VDD pin Driver determines the output state of the RST/RST pin. (Push- RST – Pull) V voltages above the V force the RST/RST Reference DD TRIP(MAX) pin inactive. V voltages below the V force Voltage DD TRIP(MIN) Delay the RST/RST pin active. The state of the RST/RST pin is unknown for V voltages between V and MR DD TRIP(MAX) Noise Filter V . This is shown in Table4-1 TRIP(MIN) TABLE 4-1: V LEVELS TO RST/RST DD OUTPUT STATES FIGURE 4-4: TC1270A Block Diagram. Output State V Voltage Level DD V RST RST DD V  V H(1, 2) L(1) Comparator DD TRIP(MAX) + Output Driver VTRIP(MIN) < VDD < VTRIP(MAX) U U (Open- RST – Drain) V  V L H Reference DD TRIP(MIN) Voltage Legend: H = Driven High L = Driven Low Delay U = Unknown, driven either High or Low MR Noise Filter Note 1: The RST/RST pin will be driven inactive VSS after the Reset Delay Timer (tRST) times out. 2: The TC1270AN RST pin will be floated FIGURE 4-5: TC1270AN Block Diagram. after the Reset Delay Timer (t ) times RST out. The term V will be used as the general term for the V TRIP DD trip point voltage where the device actually trips. Comparator In the case where V is falling (for voltages starting DD + Output above V ): Driver TRIP(MAX) (Push- RST – • Voltages above V will never cause the Pull) TRIP(MAX) Reference RST/RST output pin to be driven active. Voltage Delay • Voltages below V will always cause the TRIP(MIN) RST/RST output pin to be driven active. MR Noise Filter In the case where V is rising (for voltages starting DD below V ): TRIP(MIN) • Voltages above V will always cause the TRIP(MAX) FIGURE 4-6: TC1271A Block Diagram. RST/RST output pin to be driven inactive, (or floated, in the TC1270AN) after the Reset Delay Timer (t ), times out. RST DS22035D-page 20  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A Table4-2 shows the various device trip point options 4.2.1 HYSTERESIS and their V and V voltages. The neg- TRIP(MAX) TRIP(MIN) There is also a minimal hysteresis (V ) on the trip ative percentage change from common regulated HYS point. This is so that small noise signals on the device voltages is also shown. voltage (V ) do not cause the Reset pin (RST/RST) to DD If the VDD is falling from the regulated voltage as it “jitter” (oscillate between active and inactive levels). crosses the V voltage, the RST/RST pin is driven TRIP The characterization graphs shown in Figures 2-13 active. Then, the desired circuitry is forced into Reset, through 2-15 show the device hysteresis as a or the circuitry has the indication that the V is below DD percentage of the voltage trip point (V ). the selected V . TRIP TRIP The Reset Delay Timer (t ) gives a time-based If the V is rising as it crosses the V voltage, the RST DD TRIP hysteresis for the system. RST/RST pin is driven inactive after the Reset Delay Timer elapses. Then, the desired circuitry is released 4.2.2 POWER-UP/RISING V DD from Reset and will start to operate in its Normal mode, or the circuitry has the indication that the VDD is above As the device VDD rises, the device’s Reset circuit will the selected V . remain active until the voltage rises above the “actual” TRIP trip point (V ). TRIP TABLE 4-2: SELECTING THE TRIP POINT Figure4-7 shows a power-up sequence and the waveform of the RST and RST pins. As the device - % From VoTlrtiapg e VVTRIP(MAX)((21)) / Regulated Voltage popoewreartsin gu pv,o lttahgee voofl tathgee dwevilli ces.t aArtt btheislo wvo ltthaeg e,v athlide Selection TRIP(MIN) 5.0V 3.3V 3.0V RST/RST output is not valid. Once the voltage is above the minimum operating voltage (1V) and below the L 4.75V 5.0% — — selected V , the Reset output will be active. TRIP 4.50V 10.0% — — Once the device voltage rises above the V voltage, TRIP M 4.50V 10.0% — — the Reset Delay Timer (t ) starts. When the Reset RST 4.25V 15.0% — — Delay Timer times out, the Reset output (RST/RST) is driven inactive. T 3.15V — 4.5% — 3.00V — 9.2% — S 3.00V — 9.2% — V 2.85V — 13.7% — TRIP R 2.70V — — 10.0% 2.55V — — 15.0% VDD 1V tRST(1) Note 1: Voltage regulator circuit must have tighter tolerance (%) than V % from TRIP(MAX) regulated voltage. RST(2) 2: Circuitry being reset must have a wider tolerance (%) than V % from TRIP(MIN) regulated voltage. RST The TC1270A/TC1270AN/TC1271A devices are optimized to reject fast transient glitches on the V DD line. If the low input signal (which is below V ) is not TRIP rejected, the Reset output is driven active within 50µs Note1: Additional system current is consumed of V falling through the Reset voltage threshold. during the t time. DD RST After the device exits the Reset condition, the delay 2: The TC1270AN requires an external circuitry will hold the RST/RST pin active until the pull-up resistor. appropriate Reset delay time (t ) has elapsed. RST During device power-up, the input voltage is below the FIGURE 4-7: RST/RST Pin Operation trip point voltage. The device must enter the valid oper- Power-up. ating range for the device to start operation.  2007-2011 Microchip Technology Inc. DS22035D-page 21

TC1270A/70AN/71A 4.2.3 POWER-DOWN/BROWN-OUT Figure4-8 shows the waveform of the RST pin as determined by the V voltage. As the V voltage falls As the device powers-down/browns-out, the V falls DD DD DD from the normal operating point, the device “enters” from a voltage above the devices trip point (V ). The TRIP Reset by crossing the V voltage (between device will trip at a voltage between the maximum trip TRIP V and V ). Then, when V voltage point (V ) and the minimum trip point TRIP(MAX) TRIP(MIN) DD TRIP(MAX) rises, the device “exits” Reset by crossing the V (V ). Once the device voltage (V ) goes TRIP TRIP(MIN) DD voltage (below, or at, V ). After the “exit” state below this voltage, the RST/RST pin will be forced to TRIP(MAX) has been detected, the Reset Delay Timer (t ) starts. the active state. Table4-3 shows the state of the RST RST When the t time completes, the Reset pin is driven or RST pins. RST inactive. TABLE 4-3: RESET PIN STATES State of RST Pin when: State of RST Pin when: Device Output Driver V < V V > V (1) V < V V > V (1) DD TRIP DD TRIP DD TRIP DD TRIP TC1270A L H — — Push-Pull TC1271A — — H L Push-Pull Note 1: The RST/RST pin will be driven inactive after the Reset Delay Timer (t ) times out. RST V TRIP V DD (with V Rising) V DD TRIP (with V Falling) DD 1V RST(1) t RST t < 1V is outside the RST tRD device specifications tRD Note 1: The TC1270AN requires an external pull-up resistor. FIGURE 4-8: RST Operation as determined by the V . TRIP DS22035D-page 22  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A 4.3 Negative-Going V Transients 4.4 Manual Reset with Glitch Filter DD Circuit The minimum pulse width (time) required to cause a Reset may be an important criteria in the The Manual Reset input pin (MR) allows the Reset pins implementation of a Power-on Reset (POR) circuit. (RST/RST) to be manually forced to their active states. This time is referred to as transient duration. The The MR pin has circuitry to filter noise pulses that may TC127XA devices are designed to reject a level of be present on the pin. Figure4-10 shows a block negative-going transients (glitches) on the power diagram for using the TC127XA with a push button supply line. switch. To minimize the required external components, Transient duration is the amount of time needed for the MR input has an internal pull-up resistor. these supervisory devices to respond to a drop in VDD. A mechanical push button or active logic signal can The transient duration time (tTRAN) is dependent on the drive the MR input. magnitude of V – V (overdrive). Any combination TRIP DD Once MR has been low for a time, t (the manual of duration and overdrive that lies under the duration/ MD Reset delay time), the Reset output pins are forced overdrive curve will not generate a Reset signal. active. The Reset output pins will remain in their active Generally speaking, the transient duration time states for the Reset Delay Timer time-out period (t ). decreases with an increase in the V – V voltage. RST TRIP DD Figure4-11 shows a waveform for the manual Reset Figure4-9 shows an example transient duration vs. switch input and the Reset pins output. Reset comparator overdrive. It shows that the farther below the trip point the transient pulse goes, the shorter the duration of the pulse required to cause a Reset +5V gets. So, any combination of duration and overdrive that lays under the curve will not generate a Reset signal. Combinations above the curve are detected as VDD a brown-out or power-down. MR Transient immunity can be improved by adding a bypass capacitor (typically 0.1µF) as close as possible TC127XA PIC® MCU to the V pin of the TC127XA device. DD RST MCLR V SS 5V V TRIP(MAX) ge VTRIP(MIN) FIGURE 4-10: Push Button Reset. olta VTRIP(MIN) - VDD V (Overdrive) y pl t (Duration) up TRAN tMR S 0V Time (µs) MR tMD V IH s) m Area above curve will VIL n ( generate a Reset signal tRST o ati RST r u nt D Anoret ag ebneelorawt ec uar vRee wseiltl signal RST e si n Tra The MR input typically ignores input pulses of 100ns. Transient Overdrive Voltage (mV) FIGURE 4-11: MR Input – Push Button. FIGURE 4-9: Example of Typical 4.4.1 NOISE FILTER Transient Duration Waveform. The noise filter filters out noise spikes (glitches) on the Manual Reset pin (MR). Noise spikes less than 100ns (typical) are filtered.  2007-2011 Microchip Technology Inc. DS22035D-page 23

TC1270A/70AN/71A 4.5 Reset Generator Circuit 4.5.2 EFFECT OF TEMPERATURE ON RESET POWER-UP TIMER (t ) The output signals from the voltage detect circuit and RPU the manual Reset with glitch filter circuit are OR’d The Reset Delay Timer time-out period (tRST) together and used to activate the Reset generator determines how long the device remains in the Reset module. condition. This time out is affected by the device VDD and the temperature. Typical responses for varying After the Reset conditions have been removed (the MR V values and temperatures are presented in pin is no longer forced low and the input voltage is DD Figures 2-28, 2-29 and 2-30. greater than the trip point voltage), the Reset generator circuit determines the Reset delay time-out required. TABLE 4-4: RESET DELAY TIMER There are three options for the delay circuit. These are: TIME OUTS • 2.19ms (typical) delay t RST • 35ms (typical) delay Units • 280ms (typical) delay Min Typ Max 1.09 2.19 4.38 ms 4.5.1 RESET DELAY TIMER 17.5 35 70 ms The Reset Delay Timer ensures that the TC127XA 140 280 560 ms device will “hold” the embedded system in Reset until the system voltage has stabilized. The Reset Delay   Timer time-out is shown in Table4-4. This is the This is the The Reset Delay Timer starts when the voltage detect minimum time that maximum time that circuit output AND the manual Reset with glitch filter the Reset Delay the Reset Delay circuit output become inactive. While the Reset Delay Timer will “hold” Timer will “hold” Timer is active, the RST or RST pin is driven to the the Reset pin the Reset pin active state. When the Reset Delay Timer times out, active after VDD active after VDD the RST or RST pin is driven inactive. rises above VTRIP rises above VTRIP The Reset Delay Timer (tRST) starts after the device Note 1: Shaded rows are custom-ordered time voltage rises above the “actual” trip point (VTRIP). outs. When the Reset Delay Timer times out, the Reset out- put pin (RST/RST) is driven inactive. The Reset Delay Timer is cleared if either, or both, the voltage detector circuit output and the manual Reset VDD with glitch filter circuit output become active. The RST V or RST pin continues to be driven to the active state. TRIP Figure4-12 illustrates when the Reset Delay Timer (tRST) is active or inactive. RST tRST ye av elcti Reset Reset Delay set Dmer A DTiemlaeyr e Timer Inactive RTi Inactive See Figures 2-9, See Figures 2-9, 2-7 and 2-8 2-7 and 2-8 See Figures 2-12, 2-11 and 2-10 FIGURE 4-12: Reset Power-up Timer Waveform. DS22035D-page 24  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A 5.0 APPLICATION INFORMATION 5.3 Using in PIC® Microcontroller, ICSP™ Applications This section presents application-related information that may be useful for your particular design require- ments. Note: This operation can only be done using the device that has an Open-Drain RST pin 5.1 Supply Monitor Noise Sensitivity (TC1270AN). The TC127XA devices are optimized for fast responses Figure5-4 shows the typical application circuit for using to negative-going changes in V . A system with an the TC1270AN for voltage supervisory function when DD inordinate amount of electrical noise on V (such as a the PIC microcontroller will be programmed via the DD system using relays) may require a 0.01µF or 0.1µF In-Circuit Serial Programming™ (ICSP™) feature. bypass capacitor to reduce detection sensitivity. This Additional information is available in the Microchip capacitor should be installed as close to the TC127XA Technical Brief TB087, “Using Voltage Supervisors with as possible to keep the capacitor lead length short. PICmicro® Microcontroller Systems which Implement In-Circuit Serial Programming™” (DS91087). Note: It is recommended that the current into the RST pin is current that is limited by a 1k 0.1µF resistor. V DD TC127XA RST V /V MR RST DD PP VSS 0.1µF V DD VDD RPU PIC® TC1270AN Microcontroller FIGURE 5-1: Typical Application Circuit MCLR with Bypass Capacitor. RST Reset input) 1k (Active-Low) V 5.2 Conventional Voltage Monitoring SS V SS Figure5-2 and Figure5-3 show the TC127XA in conventional voltage monitoring applications. FIGURE 5-4: Typical Application Circuit + for PIC Microcontroller with the ICSP Feature. V DD –– TC127XA BATLOW RST V SS FIGURE 5-2: Battery Voltage Monitor. V DD + RST Pwr Sply TC127XA Power Good – V SS FIGURE 5-3: Power Good Monitor.  2007-2011 Microchip Technology Inc. DS22035D-page 25

TC1270A/70AN/71A 5.4 Modifying The Trip Point, V 5.5 MOSFET Low-Drive Protection TRIP Although the TC127XA device has a fixed voltage trip Low operating power and small physical size make the point (V ), it can be necessary to make custom TC1270AN series ideal for many voltage detector TRIP adjustments. This is accomplished by connecting an applications. Figure5-6 shows a low-voltage gate drive external resistor divider to the TC127XA V pin. This protection circuit that prevents the logic-level MOSFET DD causes the V voltage to be higher than it is from overheating due to insufficient gate voltage. When SOURCE when the TC127XA input equals its V voltage the input signal is below the threshold of the TRIP (Figure5-5). TC1270AN, its output grounds the gate of the MOSFET. To maintain detector accuracy, the bleeder current through the divider should be significantly higher than the 15µA maximum operating current required by the TC127XA. A reasonable value for this bleeder current V is 1mA (67 times the 10µA required by the TC127XA). TRIP 270(1) V For example, if V = 2V and the desired trip point is DD TRIP 2.5V, the value of R + R is 2.5k (2.5V/1mA). The 1 2 value of R1 + R2 can be rounded to the nearest VDD R standard value and plugged into the equation shown in L Figure5-5 to calculate values for R1 and R2. RST TC1270AN MTP3055EL 1% tolerance resistors are recommended. V SS V SOURCE R Note 1: This resistance should be sized appro- 2 priately for the selected trip point volt- V DD TC127XA RST age related to the VOL operation. or RST FIGURE 5-6: MOSFET Low-Drive R 1 V Protection. SS R V  -----------1---------  V SOURCE R +R TRIP 1 2 Where: V = Voltage to be monitored SOURCE V = Threshold Voltage setting TRIP Note: In this example, V must be greater SOURCE than V . TRIP FIGURE 5-5: Modifying Trip-Point using External Resistor Divider. DS22035D-page 26  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A 5.6 Controllers and Processors With 5.8 Reset Signal Integrity During Bidirectional I/O Pins Power-Down Some microcontrollers have bidirectional Reset pins. The TC1270A and TC1271A Reset output is valid Depending on the current drive capability of the down to V = 1.0V. Below this voltage the output DD controller pin, an indeterminate logic level may result if becomes an “open circuit” and does not sink current. there is a logic conflict. This can be avoided by adding This means CMOS logic inputs to the microcontroller a 4.7k resistor in series with the output of the will be floating at an undetermined voltage. Most digital TC127XA (Figure5-7). If there are other components systems are completely shut down well above this volt- in the system that require a Reset signal, they should age. However, in situations where the Reset signal be buffered so as not to load the Reset line. If the other must be maintained valid to V = 0V, external circuitry DD components are required to follow the Reset I/O of the is required. microcontroller, the buffer should be connected as For devices where the Reset signal is active-low, a shown with the solid line. pull-down resistor must be connected from the TC1270A RST pin to ground to discharge stray capacitances and hold the output low (Figure5-9). Buffered Similarly for devices where the Reset signal is Reset to active-high, a pull-up resistor to V is required to V system DD DD ensure a valid high RST signal for V below 1.0V DD (Figure5-10). V V DD DD This resistor value, though not critical, should be TC1270A/71A chosen such that it does not appreciably load the Reset pin under normal operation (100k should be suitable RST MR or Reset I/O for most applications). RST 4.7k V V SS SS V DD V DD TC1270A FIGURE 5-7: Interfacing the TC1270A or TC1271A Push-Pull Output to a Bidirectional MR RST Reset I/O pin. V R SS 1 100k 5.7 Migration Paths Figure5-8 shows the 5-pin SOT-23 footprint of the TC1270A, TC1270AN and TC1271A devices. Devices FIGURE 5-9: Ensuring a valid active-low that are in the 3-pin SOT-23 package could be used in Reset pin output state as V approaches 0V. that circuit with the loss of manual Reset functionality. DD Examples of compatible footprint devices in the SOT- 23-3 package are the MCP111, MCP112, TC54 and V TC51 devices. This allows the system to be designed DD to offer a “base” functionality and a higher end system V with the “enhanced” functionality, which includes a DD manual Reset. TC1271A R1 100k MR RST SOT-23-5 SOT-23-3 V SS NC 1 5 VSS 2 VSS V 2 V 3 DD DD RST RST MR 3 4 or 1 or FIGURE 5-10: Ensuring a valid active-high RST RST Reset pin output state as V approaches 0V. DD FIGURE 5-8: SOT-23 5-pin to 3-pin Comparison.  2007-2011 Microchip Technology Inc. DS22035D-page 27

TC1270A/70AN/71A NOTES: DS22035D-page 28  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A 6.0 STANDARD DEVICES Configurations can include the following options: • Voltage Trip Point (V ) Table6-1 shows the standard devices, with order TRIP • Reset Time Out (t ) numbers, as well as the corresponding configurations. RST TABLE 6-1: STANDARD VERSIONS Reset Threshold (V) Reset Time Out (ms) e Device mum cal mum de mum cal mum (1)e ckag Order Number Replaces Mini Typi Maxi Co Mini Typi Maxi Cod Pa SOT-23-5 TC1270ALVCTTR — TC1270A 4.50 4.63 4.75 L 140 280 560 “blank” TC1270LERC/ SOT-143 TC1270ALVRCTR TCM811LERC SOT-23-5 TC1270AMVCTTR — TC1270A 4.25 4.38 4.50 M 140 280 560 “blank” TC1270MERC/ SOT-143 TC1270AMVRCTR TCM811MERC SOT-23-5 TC1270ATVCTTR — TC1270A 3.00 3.08 3.15 T 140 280 560 “blank” TC1270TERC/ SOT-143 TC1270ATVRCTR TCM811TERC SOT-23-5 TC1270ASVCTTR — TC1270A 2.85 2.93 3.00 S 140 280 560 “blank” TC1270SERC/ SOT-143 TC1270ASVRCTR TCM811SERC SOT-23-5 TC1270ARVCTTR — TC1270A 2.55 2.63 2.70 R 140 280 560 “blank” TC1270RERC/ SOT-143 TC1270ARVRCTR TCM811RERC SOT-23-5 TC1270ANLVCTTR — TC1270AN 4.50 4.63 4.75 L 140 280 560 “blank” SOT-143 TC1270ANLVRCTR — SOT-23-5 TC1270ANMVCTTR — TC1270AN 4.25 4.38 4.50 M 140 280 560 “blank” SOT-143 TC1270ANMVRCTR — SOT-23-5 TC1270ANTVCTTR — TC1270AN 3.00 3.08 3.15 T 140 280 560 “blank” SOT-143 TC1270ANTVRCTR — SOT-23-5 TC1270ANSVCTTR — TC1270AN 2.85 2.93 3.00 S 140 280 560 “blank” SOT-143 TC1270ANSVRCTR — SOT-23-5 TC1270ANRVCTTR — TC1270AN 2.55 2.63 2.70 R 140 280 560 “blank” SOT-143 TC1270ANRVRCTR — SOT-23-5 TC1271ALVCTTR — TC1271A 4.50 4.63 4.75 L 140 280 560 “blank” TC1271LERC/ SOT-143 TC1271ALVRCTR TCM812LERC SOT-23-5 TC1271AMVCTTR — TC1271A 4.25 4.38 4.50 M 140 280 560 “blank” TC1271MERC/ SOT-143 TC1271AMVRCTR TCM812MERC SOT-23-5 TC1271ATVCTTR — TC1271A 3.00 3.08 3.15 T 140 280 560 “blank” TC1271TERC/ SOT-143 TC1271ATVRCTR TCM812TERC SOT-23-5 TC1271ASVCTTR — TC1271A 2.85 2.93 3.00 S 140 280 560 “blank” TC1271SERC/ SOT-143 TC1271ASVRCTR TCM812SERC SOT-23-5 TC1271ARVCTTR — TC1271A 2.55 2.63 2.70 R 140 280 560 “blank” TC1271RERC/ SOT-143 TC1271ARVRCTR TCM812RERC Note 1: “A” time-out delay options are only standard in the SOT-23-5 package. SOT-143 package is a custom request.  2007-2011 Microchip Technology Inc. DS22035D-page 29

TC1270A/70AN/71A NOTES: DS22035D-page 30  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A 7.0 CUSTOM CONFIGURATIONS The following Custom Reset Trip Point is available (see Table7-1). TABLE 7-1: CUSTOM TRIP POINT - % From Trip Voltage VTRIP(MAX)/ Regulated Voltage V Selection TRIP(MIN) 3.0V (1) 2.85V 5.0% 2.70V 10.0% Note 1: Contact your local Microchip sales office for additional information. Table7-2 shows the codes that specify the desired Reset time out (t ) for custom devices. RST TABLE 7-2: DELAY TIME OUT ORDERING CODES Code Reset Delay Comment Time (Typ) (ms) A 35 Note1 B 2.19 Note1 “blank” 280 Delay timings for standard device offerings Note 1: This delay timing option is not the standard offering. For information on ordering devices with these delay times, contact your local Microchip sales office. Minimum purchase volumes are required.  2007-2011 Microchip Technology Inc. DS22035D-page 31

TC1270A/70AN/71A NOTES: DS22035D-page 32  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A 8.0 DEVELOPMENT TOOLS The SOIC-14 Evaluation Board (SOIC14EV) has a SOT-23-6 footprint that can be jumpered into any por- tion of the circuit. This will allow any footprint that the 8.1 Evaluation/Demonstration Boards TC1270A requires in the SOT-23-5 package. The SOT-23-5/6 Evaluation Board (VSUPEV2) can be used to evaluate the characteristics of the TC127XA devices. This blank PCB has footprints for: • Pull-up Resistor • Pull-down Resistor • Loading Capacitor • In-line Resistor There is also a power supply filtering capacitor. For evaluating the TC127XA devices, the selected device should be installed into the Option A footprint. FIGURE 8-2: SOIC-14 Evaluation Board (Microchip Part Number SOIC14EV). The PCB number, 102-00094, appears on the lower left side of the board. These evaluation boards can be pur- chased directly from the Microchip web site at www.microchip.com. FIGURE 8-1: SOT-23-5/6 Voltage Supervisor Evaluation Board (VSUPEV2).  2007-2011 Microchip Technology Inc. DS22035D-page 33

TC1270A/70AN/71A NOTES: DS22035D-page 34  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A 9.0 PACKAGING INFORMATION 9.1 Package Marking Information 5-Pin SOT-23 Example: Part Number Code Part Number Code TC1270ALVCTTR F1NN TC1271ALVCTTR J1NN XXNN TC1270AMVCTTR F2NN TC1271AMVCTTR J2NN F125 TC1270ATVCTTR F3NN TC1271ATVCTTR J3NN TC1270ASVCTTR F4NN TC1271ASVCTTR J4NN TC1270ARVCTTR F5NN TC1271ARVCTTR J5NN TC1270ANLVCTTR FSNN TC1270ANMVCTTR FTNN TC1270ANTVCTTR FUNN TC1270ANSVCTTR FVNN TC1270ANRVCTTR FWNN 4-Lead SOT-143 Example: Part Number Code Part Number Code TC1270ALVRCTR D1NN TC1271ALVRCTR C1NN XXNN C125 TC1270AMVRCTR D2NN TC1271AMVRCTR C2NN TC1270ATVRCTR D3NN TC1271ATVRCTR C3NN TC1270ASVRCTR D4NN TC1271ASVRCTR C4NN TC1270ARVRCTR D5NN TC1271ARVRCTR C5NN TC1270ANLVRCTR E1NN TC1270ANMVRCTR E2NN TC1270ANTVRCTR E3NN TC1270ANSVRCTR E4NN TC1270ANRVRCTR E5NN Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NN Alphanumeric traceability code e3 Pb-free JEDEC designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( e 3 ) can be found on the outer packaging for this package. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.  2007-2011 Microchip Technology Inc. DS22035D-page 35

TC1270A/70AN/71A (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)(cid:15)(cid:16)(cid:6)(cid:10)(cid:10)(cid:8)(cid:17)(cid:18)(cid:12)(cid:10)(cid:13)(cid:19)(cid:5)(cid:8)(cid:20)(cid:21)(cid:6)(cid:19)(cid:11)(cid:13)(cid:11)(cid:12)(cid:22)(cid:21)(cid:8)(cid:23)(cid:24)(cid:20)(cid:25)(cid:8)(cid:26)(cid:15)(cid:17)(cid:20)(cid:3)(cid:27)(cid:28)(cid:29) (cid:30)(cid:22)(cid:12)(cid:5)(cid:31) .(cid:10)(cid:9)(cid:2)$(cid:11)(cid:14)(cid:2) (cid:10)!$(cid:2)(cid:8)%(cid:9)(cid:9)(cid:14)(cid:15)$(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)"(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)!0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28)!(cid:14)(cid:2)!(cid:14)(cid:14)(cid:2)$(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)&(cid:7)(cid:8)(cid:28)$(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)$(cid:14)"(cid:2)(cid:28)$(cid:2) (cid:11)$$(cid:12)+22---(cid:20) (cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10) 2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) b N E E1 1 2 3 e e1 D A A2 c φ A1 L L1 3(cid:15)(cid:7)$! (cid:6)(cid:19)44(cid:19)(cid:6)#(cid:13)#(cid:26)(cid:22) (cid:21)(cid:7) (cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:2)4(cid:7) (cid:7)$! (cid:6)(cid:19)5 56(cid:6) (cid:6)(cid:25)7 5% 8(cid:14)(cid:9)(cid:2)(cid:10)&(cid:2)1(cid:7)(cid:15)! 5 (cid:30) 4(cid:14)(cid:28)"(cid:2)1(cid:7)$(cid:8)(cid:11) (cid:14) (cid:4)(cid:20)(cid:24)(cid:30)(cid:2))(cid:22)* 6%$!(cid:7)"(cid:14)(cid:2)4(cid:14)(cid:28)"(cid:2)1(cid:7)$(cid:8)(cid:11) (cid:14)(cid:31) (cid:31)(cid:20)(cid:24)(cid:4)(cid:2))(cid:22)* 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)9(cid:14)(cid:7)(cid:17)(cid:11)$ (cid:25) (cid:4)(cid:20)(cid:24)(cid:4) : (cid:31)(cid:20)(cid:23)(cid:30) (cid:6)(cid:10)(cid:16)"(cid:14)"(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14)!! (cid:25)(cid:3) (cid:4)(cid:20);(cid:24) : (cid:31)(cid:20)(cid:29)(cid:4) (cid:22)$(cid:28)(cid:15)"(cid:10)&& (cid:25)(cid:31) (cid:4)(cid:20)(cid:4)(cid:4) : (cid:4)(cid:20)(cid:31)(cid:30) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)<(cid:7)"$(cid:11) # (cid:3)(cid:20)(cid:3)(cid:4) : (cid:29)(cid:20)(cid:3)(cid:4) (cid:6)(cid:10)(cid:16)"(cid:14)"(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)<(cid:7)"$(cid:11) #(cid:31) (cid:31)(cid:20)(cid:29)(cid:4) : (cid:31)(cid:20);(cid:4) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)4(cid:14)(cid:15)(cid:17)$(cid:11) (cid:21) (cid:3)(cid:20)(cid:5)(cid:4) : (cid:29)(cid:20)(cid:31)(cid:4) .(cid:10)(cid:10)$(cid:2)4(cid:14)(cid:15)(cid:17)$(cid:11) 4 (cid:4)(cid:20)(cid:31)(cid:4) : (cid:4)(cid:20)=(cid:4) .(cid:10)(cid:10)$(cid:12)(cid:9)(cid:7)(cid:15)$ 4(cid:31) (cid:4)(cid:20)(cid:29)(cid:30) : (cid:4)(cid:20);(cid:4) .(cid:10)(cid:10)$(cid:2)(cid:25)(cid:15)(cid:17)(cid:16)(cid:14) (cid:3) (cid:4)> : (cid:29)(cid:4)> 4(cid:14)(cid:28)"(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14)!! (cid:8) (cid:4)(cid:20)(cid:4); : (cid:4)(cid:20)(cid:3)= 4(cid:14)(cid:28)"(cid:2)<(cid:7)"$(cid:11) 8 (cid:4)(cid:20)(cid:3)(cid:4) : (cid:4)(cid:20)(cid:30)(cid:31) (cid:30)(cid:22)(cid:12)(cid:5)(cid:11)(cid:31) (cid:31)(cid:20) (cid:21)(cid:7) (cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)!(cid:2)(cid:21)(cid:2)(cid:28)(cid:15)"(cid:2)#(cid:31)(cid:2)"(cid:10)(cid:2)(cid:15)(cid:10)$(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)%"(cid:14)(cid:2) (cid:10)(cid:16)"(cid:2)&(cid:16)(cid:28)!(cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)$(cid:9)%!(cid:7)(cid:10)(cid:15)!(cid:20)(cid:2)(cid:6)(cid:10)(cid:16)"(cid:2)&(cid:16)(cid:28)!(cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)$(cid:9)%!(cid:7)(cid:10)(cid:15)!(cid:2)!(cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)$(cid:2)(cid:14)’(cid:8)(cid:14)(cid:14)"(cid:2)(cid:4)(cid:20)(cid:31)(cid:3)(cid:5)(cid:2) (cid:2)(cid:12)(cid:14)(cid:9)(cid:2)!(cid:7)"(cid:14)(cid:20) (cid:3)(cid:20) (cid:21)(cid:7) (cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)"(cid:2)$(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6)#(cid:2)((cid:31)(cid:23)(cid:20)(cid:30)(cid:6)(cid:20) )(cid:22)*+ )(cid:28)!(cid:7)(cid:8)(cid:2)(cid:21)(cid:7) (cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)$(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)’(cid:28)(cid:8)$(cid:2),(cid:28)(cid:16)%(cid:14)(cid:2)!(cid:11)(cid:10)-(cid:15)(cid:2)-(cid:7)$(cid:11)(cid:10)%$(cid:2)$(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14)!(cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)*(cid:4)(cid:23)(cid:27)(cid:4)(cid:24)(cid:31)) DS22035D-page 36  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A 5-Lead Plastic Small Outline Transistor (CT) [SOT-23] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2007-2011 Microchip Technology Inc. DS22035D-page 37

TC1270A/70AN/71A (cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)(cid:15)(cid:16)(cid:6)(cid:10)(cid:10)(cid:8)(cid:17)(cid:18)(cid:12)(cid:10)(cid:13)(cid:19)(cid:5)(cid:8)(cid:20)(cid:21)(cid:6)(cid:19)(cid:11)(cid:13)(cid:11)(cid:12)(cid:22)(cid:21)(cid:8)(cid:23)!(cid:24)(cid:25)(cid:8)(cid:26)(cid:15)(cid:17)(cid:20)(cid:3)" (cid:28)(cid:29) (cid:30)(cid:22)(cid:12)(cid:5)(cid:31) .(cid:10)(cid:9)(cid:2)$(cid:11)(cid:14)(cid:2) (cid:10)!$(cid:2)(cid:8)%(cid:9)(cid:9)(cid:14)(cid:15)$(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)"(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)!0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28)!(cid:14)(cid:2)!(cid:14)(cid:14)(cid:2)$(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)&(cid:7)(cid:8)(cid:28)$(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)$(cid:14)"(cid:2)(cid:28)$(cid:2) (cid:11)$$(cid:12)+22---(cid:20) (cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10) 2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) D e e/2 N E E1 1 2 e1 A A2 φ c A1 b2 3X b L1 L 3(cid:15)(cid:7)$! (cid:6)(cid:19)44(cid:19)(cid:6)#(cid:13)#(cid:26)(cid:22) (cid:21)(cid:7) (cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:2)4(cid:7) (cid:7)$! (cid:6)(cid:19)5 56(cid:6) (cid:6)(cid:25)7 5% 8(cid:14)(cid:9)(cid:2)(cid:10)&(cid:2)1(cid:7)(cid:15)! 5 (cid:23) 1(cid:7)$(cid:8)(cid:11) (cid:14) (cid:31)(cid:20)(cid:24)(cid:3)(cid:2))(cid:22)* 4(cid:14)(cid:28)"(cid:2)(cid:31)(cid:2)6&&!(cid:14)$ (cid:14)(cid:31) (cid:4)(cid:20)(cid:3)(cid:4)(cid:2))(cid:22)* 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)9(cid:14)(cid:7)(cid:17)(cid:11)$ (cid:25) (cid:4)(cid:20);(cid:4) : (cid:31)(cid:20)(cid:3)(cid:3) (cid:6)(cid:10)(cid:16)"(cid:14)"(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14)!! (cid:25)(cid:3) (cid:4)(cid:20)(cid:5)(cid:30) (cid:4)(cid:20)(cid:24)(cid:4) (cid:31)(cid:20)(cid:4)(cid:5) (cid:22)$(cid:28)(cid:15)"(cid:10)&&(cid:2)(cid:2)? (cid:25)(cid:31) (cid:4)(cid:20)(cid:4)(cid:31) : (cid:4)(cid:20)(cid:31)(cid:30) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)<(cid:7)"$(cid:11) # (cid:3)(cid:20)(cid:31)(cid:4) : (cid:3)(cid:20)=(cid:23) (cid:6)(cid:10)(cid:16)"(cid:14)"(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)<(cid:7)"$(cid:11) #(cid:31) (cid:31)(cid:20)(cid:3)(cid:4) (cid:31)(cid:20)(cid:29)(cid:4) (cid:31)(cid:20)(cid:23)(cid:4) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)4(cid:14)(cid:15)(cid:17)$(cid:11) (cid:21) (cid:3)(cid:20)=(cid:5) (cid:3)(cid:20)(cid:24)(cid:4) (cid:29)(cid:20)(cid:4)(cid:30) .(cid:10)(cid:10)$(cid:2)4(cid:14)(cid:15)(cid:17)$(cid:11) 4 (cid:4)(cid:20)(cid:31)(cid:29) (cid:4)(cid:20)(cid:30)(cid:4) (cid:4)(cid:20)=(cid:4) .(cid:10)(cid:10)$(cid:12)(cid:9)(cid:7)(cid:15)$ 4(cid:31) (cid:4)(cid:20)(cid:30)(cid:23)(cid:2)(cid:26)#. .(cid:10)(cid:10)$(cid:2)(cid:25)(cid:15)(cid:17)(cid:16)(cid:14) (cid:3) (cid:4)> : ;> 4(cid:14)(cid:28)"(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14)!! (cid:8) (cid:4)(cid:20)(cid:4); : (cid:4)(cid:20)(cid:3)(cid:4) 4(cid:14)(cid:28)"(cid:2)(cid:31)(cid:2)<(cid:7)"$(cid:11) 8(cid:31) (cid:4)(cid:20)(cid:5)= : (cid:4)(cid:20)(cid:24)(cid:23) 4(cid:14)(cid:28)"!(cid:2)(cid:3)0(cid:2)(cid:29)(cid:2)@(cid:2)(cid:23)(cid:2)<(cid:7)"$(cid:11) 8 (cid:4)(cid:20)(cid:29)(cid:4) : (cid:4)(cid:20)(cid:30)(cid:23) (cid:30)(cid:22)(cid:12)(cid:5)(cid:11)(cid:31) (cid:31)(cid:20) ?(cid:2)(cid:22)(cid:7)(cid:17)(cid:15)(cid:7)&(cid:7)(cid:8)(cid:28)(cid:15)$(cid:2)*(cid:11)(cid:28)(cid:9)(cid:28)(cid:8)$(cid:14)(cid:9)(cid:7)!$(cid:7)(cid:8)(cid:20) (cid:3)(cid:20) (cid:21)(cid:7) (cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)!(cid:2)(cid:21)(cid:2)(cid:28)(cid:15)"(cid:2)#(cid:31)(cid:2)"(cid:10)(cid:2)(cid:15)(cid:10)$(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)%"(cid:14)(cid:2) (cid:10)(cid:16)"(cid:2)&(cid:16)(cid:28)!(cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)$(cid:9)%!(cid:7)(cid:10)(cid:15)!(cid:20)(cid:2)(cid:6)(cid:10)(cid:16)"(cid:2)&(cid:16)(cid:28)!(cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)$(cid:9)%!(cid:7)(cid:10)(cid:15)!(cid:2)!(cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)$(cid:2)(cid:14)’(cid:8)(cid:14)(cid:14)"(cid:2)(cid:4)(cid:20)(cid:3)(cid:30)(cid:2) (cid:2)(cid:12)(cid:14)(cid:9)(cid:2)!(cid:7)"(cid:14)(cid:20) (cid:29)(cid:20) (cid:21)(cid:7) (cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)"(cid:2)$(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6)#(cid:2)((cid:31)(cid:23)(cid:20)(cid:30)(cid:6)(cid:20) )(cid:22)*+ )(cid:28)!(cid:7)(cid:8)(cid:2)(cid:21)(cid:7) (cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)$(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)’(cid:28)(cid:8)$(cid:2),(cid:28)(cid:16)%(cid:14)(cid:2)!(cid:11)(cid:10)-(cid:15)(cid:2)-(cid:7)$(cid:11)(cid:10)%$(cid:2)$(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14)!(cid:20) (cid:26)#.+ (cid:26)(cid:14)&(cid:14)(cid:9)(cid:14)(cid:15)(cid:8)(cid:14)(cid:2)(cid:21)(cid:7) (cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)0(cid:2)%!%(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)-(cid:7)$(cid:11)(cid:10)%$(cid:2)$(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14)0(cid:2)&(cid:10)(cid:9)(cid:2)(cid:7)(cid:15)&(cid:10)(cid:9) (cid:28)$(cid:7)(cid:10)(cid:15)(cid:2)(cid:12)%(cid:9)(cid:12)(cid:10)!(cid:14)!(cid:2)(cid:10)(cid:15)(cid:16)(cid:18)(cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)*(cid:4)(cid:23)(cid:27)(cid:4)(cid:29)(cid:31)) DS22035D-page 38  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A (cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)(cid:15)(cid:16)(cid:6)(cid:10)(cid:10)(cid:8)(cid:17)(cid:18)(cid:12)(cid:10)(cid:13)(cid:19)(cid:5)(cid:8)(cid:20)(cid:21)(cid:6)(cid:19)(cid:11)(cid:13)(cid:11)(cid:12)(cid:22)(cid:21)(cid:8)(cid:23)!(cid:24)(cid:25)(cid:8)(cid:26)(cid:15)(cid:17)(cid:20)(cid:3)" (cid:28)(cid:29) (cid:30)(cid:22)(cid:12)(cid:5)(cid:31) .(cid:10)(cid:9)(cid:2)$(cid:11)(cid:14)(cid:2) (cid:10)!$(cid:2)(cid:8)%(cid:9)(cid:9)(cid:14)(cid:15)$(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)"(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)!0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28)!(cid:14)(cid:2)!(cid:14)(cid:14)(cid:2)$(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)&(cid:7)(cid:8)(cid:28)$(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)$(cid:14)"(cid:2)(cid:28)$(cid:2) (cid:11)$$(cid:12)+22---(cid:20) (cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10) 2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)  2007-2011 Microchip Technology Inc. DS22035D-page 39

TC1270A/70AN/71A 9.2 Product Tape and Reel Specifications FIGURE 9-1: EMBOSSED CARRIER DIMENSIONS (8MM TAPE ONLY) TABLE 1: CARRIER TAPE/CAVITY DIMENSIONS Carrier Cavity Dimensions Dimensions Output Reel Case Package Quantity Diameter in Outline Type W P A0 B0 K0 Units mm mm mm mm mm mm CT SOT-23 5L 8 4 3.23 3.17 1.37 3000 180 RC SOT-143 4L 8 4 3.1 2.69 1.3 3000 330 FIGURE 9-2: 5-LEAD SOT-23 DEVICE TAPE AND REEL SPECIFICATIONS DS22035D-page 40  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A FIGURE 9-3: 4-LEAD SOT-143 DEVICE TAPE AND REEL SPECIFICATIONS Component Taping Orientation for 4-Pin SOT-143 Devices Carrier Tape, Number of Components Per Reel and Reel Size: Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 4-Pin SOT-143 8 mm 4 mm 3000 7 in.  2007-2011 Microchip Technology Inc. DS22035D-page 41

TC1270A/70AN/71A NOTES: DS22035D-page 42  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A APPENDIX A: REVISION HISTORY Revision D (August 2011) The following is the list of modifications: 1. Added the SOT-143 package to the TC1270AN device and related information throughout the document. Revision C (October 2010) The following is the list of modifications: 1. Modified the Product Identification System section to reflect the custom manufacturing code used for devices with a Reset Delay time out of 35ms (was a “C”, now is an “A”). 2. Clarified information presented in Section4.2 “Voltage Detect Circuit” (page 21). Revision B (June 2007) The following is the list of modifications: 1. Added new options: - Open-Drain output - New Reset Delay time outs. 2. Updated Package Outline Drawings 3. Updated Revision History 4. Added new options to Product Identification System Revision A (March 2007) • Original Release of this Document.  2007-2011 Microchip Technology Inc. DS22035D-page 43

TC1270A/70AN/71A NOTES: DS22035D-page 44  2007-2011 Microchip Technology Inc.

TC1270A/70AN/71A PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. XX X X XX X Examples: a) TC1270ASVCTTR: Device V Reset Delay Temperature Package Tape/Reel TRIP 2.85V min./2.93V typ./3.00V max. Options Options Range Option voltage trip point, Push-pull active-low Reset, Reset Delay Timer = 280ms, Device: TC1270A: Voltage Supervisor with Manual Reset 5-LD SOT-23, Tape and Reel, TC1270AN: Voltage Supervisor with Manual Reset -40°C to +125°C TC1271A: Voltage Supervisor with Manual Reset b) TC1270ALVRCTR: 4.50V min./4.63V typ./4.75V max. V Options: R = 2.55V (min.) / 2.63V (typ.) / 2.70V (max.) voltage trip point, TRIP S = 2.85V (min.) / 2.93V (typ.) / 3.00V (max.) Push-pull active-low Reset, T = 3.00V (min.) / 3.08V (typ.) / 3.15V (max.) Reset Delay Timer = 280ms, M = 4.25V (min.) / 4.38V (typ.) / 4.50V (max.) 4-LD SOT-143, Tape and Reel, L = 4.50V (min.) / 4.63V (typ.) / 4.75V (max.) -40°C to +125°C c) TC1270ANMBVCTTR: 4.25V min./4.38V typ./4.50V max. Time-Out Options: “blank”= t = 280ms (typ) RST Open-drain active-low Reset, A = t = 35ms (typ) RST Reset Delay Timer = 2.19ms, B = t = 2.19ms (typ) RST 5-Lead SOT-23, Tape and Reel, -40°C to +125°C Temperature Range:V = -40°C to +125°C d) TC1270ANLAVCT: 4.50V min./4.63V typ./4.75V max. Open-drain active-low Reset, Package: CT = Plastic Small Outline Transistor, SOT-23, 5-lead Reset Delay Timer = 35ms, RC = Plastic Small Outline Transistor, SOT-143, 5-Lead SOT-23, 4-lead -40°C to +125°C e) TC1271ARVCTTR: Tape/Reel Option: TR = Tape and Reel 2.55V min./2.63V typ./2.70V max. voltage trip point, Push-pull active-high Reset, Reset Delay Timer = 280ms, 5-LD SOT-23, Tape and Reel, -40°C to +125°C f) TC1271ATVRCTR: 3.00V min./3.08V typ./3.15V max. voltage trip point, Push-pull active-high Reset, Reset Delay Timer = 280ms, 4-LD SOT-143, Tape and Reel, -40°C to +125°C  2007-2011 Microchip Technology Inc. DS22035D-page 45

TC1270A/70AN/71A NOTES: DS22035D-page 46  2007-2011 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, dsPIC, and may be superseded by updates. It is your responsibility to KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, ensure that your application meets with your specifications. PIC32 logo, rfPIC and UNI/O are registered trademarks of MICROCHIP MAKES NO REPRESENTATIONS OR Microchip Technology Incorporated in the U.S.A. and other WARRANTIES OF ANY KIND WHETHER EXPRESS OR countries. IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, INCLUDING BUT NOT LIMITED TO ITS CONDITION, MXDEV, MXLAB, SEEVAL and The Embedded Control QUALITY, PERFORMANCE, MERCHANTABILITY OR Solutions Company are registered trademarks of Microchip FITNESS FOR PURPOSE. Microchip disclaims all liability Technology Incorporated in the U.S.A. arising from this information and its use. Use of Microchip Analog-for-the-Digital Age, Application Maestro, chipKIT, devices in life support and/or safety applications is entirely at chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, the buyer’s risk, and the buyer agrees to defend, indemnify and dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, hold harmless Microchip from any and all damages, claims, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, suits, or expenses resulting from such use. No licenses are Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, conveyed, implicitly or otherwise, under any Microchip MPLINK, mTouch, Omniscient Code Generation, PICC, intellectual property rights. PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2007-2011, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-61341-466-8 Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.  2007-2011 Microchip Technology Inc. DS22035D-page 47

Worldwide Sales and Service AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office Asia Pacific Office India - Bangalore Austria - Wels 2355 West Chandler Blvd. Suites 3707-14, 37th Floor Tel: 91-80-3090-4444 Tel: 43-7242-2244-39 Chandler, AZ 85224-6199 Tower 6, The Gateway Fax: 91-80-3090-4123 Fax: 43-7242-2244-393 Tel: 480-792-7200 Harbour City, Kowloon India - New Delhi Denmark - Copenhagen Fax: 480-792-7277 Hong Kong Tel: 91-11-4160-8631 Tel: 45-4450-2828 Technical Support: Tel: 852-2401-1200 Fax: 91-11-4160-8632 Fax: 45-4485-2829 http://www.microchip.com/ support Fax: 852-2401-3431 India - Pune France - Paris Web Address: Australia - Sydney Tel: 91-20-2566-1512 Tel: 33-1-69-53-63-20 www.microchip.com Tel: 61-2-9868-6733 Fax: 91-20-2566-1513 Fax: 33-1-69-30-90-79 Atlanta Fax: 61-2-9868-6755 Japan - Yokohama Germany - Munich Duluth, GA China - Beijing Tel: 81-45-471- 6166 Tel: 49-89-627-144-0 Tel: 86-10-8569-7000 Fax: 49-89-627-144-44 Tel: 678-957-9614 Fax: 81-45-471-6122 Fax: 678-957-1455 Fax: 86-10-8528-2104 Korea - Daegu Italy - Milan Boston China - Chengdu Tel: 82-53-744-4301 Tel: 39-0331-742611 Westborough, MA Tel: 86-28-8665-5511 Fax: 82-53-744-4302 Fax: 39-0331-466781 Tel: 774-760-0087 Fax: 86-28-8665-7889 Korea - Seoul Netherlands - Drunen Fax: 774-760-0088 China - Chongqing Tel: 82-2-554-7200 Tel: 31-416-690399 Chicago Tel: 86-23-8980-9588 Fax: 82-2-558-5932 or Fax: 31-416-690340 Itasca, IL Fax: 86-23-8980-9500 82-2-558-5934 Spain - Madrid Tel: 630-285-0071 China - Hangzhou Malaysia - Kuala Lumpur Tel: 34-91-708-08-90 Fax: 630-285-0075 Tel: 86-571-2819-3187 Tel: 60-3-6201-9857 Fax: 34-91-708-08-91 Cleveland Fax: 86-571-2819-3189 Fax: 60-3-6201-9859 UK - Wokingham Independence, OH China - Hong Kong SAR Malaysia - Penang Tel: 44-118-921-5869 Tel: 216-447-0464 Tel: 852-2401-1200 Tel: 60-4-227-8870 Fax: 44-118-921-5820 Fax: 216-447-0643 Fax: 852-2401-3431 Fax: 60-4-227-4068 Dallas China - Nanjing Philippines - Manila Addison, TX Tel: 86-25-8473-2460 Tel: 63-2-634-9065 Tel: 972-818-7423 Fax: 86-25-8473-2470 Fax: 63-2-634-9069 Fax: 972-818-2924 China - Qingdao Singapore Detroit Tel: 86-532-8502-7355 Tel: 65-6334-8870 Farmington Hills, MI Fax: 86-532-8502-7205 Fax: 65-6334-8850 Tel: 248-538-2250 Fax: 248-538-2260 China - Shanghai Taiwan - Hsin Chu Tel: 86-21-5407-5533 Tel: 886-3-5778-366 Indianapolis Fax: 86-21-5407-5066 Fax: 886-3-5770-955 Noblesville, IN Tel: 317-773-8323 China - Shenyang Taiwan - Kaohsiung Fax: 317-773-5453 Tel: 86-24-2334-2829 Tel: 886-7-536-4818 Fax: 86-24-2334-2393 Fax: 886-7-330-9305 Los Angeles Mission Viejo, CA China - Shenzhen Taiwan - Taipei Tel: 86-755-8203-2660 Tel: 886-2-2500-6610 Tel: 949-462-9523 Fax: 949-462-9608 Fax: 86-755-8203-1760 Fax: 886-2-2508-0102 China - Wuhan Thailand - Bangkok Santa Clara Santa Clara, CA Tel: 86-27-5980-5300 Tel: 66-2-694-1351 Tel: 408-961-6444 Fax: 86-27-5980-5118 Fax: 66-2-694-1350 Fax: 408-961-6445 China - Xian Tel: 86-29-8833-7252 Toronto Mississauga, Ontario, Fax: 86-29-8833-7256 Canada China - Xiamen Tel: 905-673-0699 Tel: 86-592-2388138 Fax: 905-673-6509 Fax: 86-592-2388130 China - Zhuhai Tel: 86-756-3210040 08/02/11 Fax: 86-756-3210049 DS22035D-page 48  2007-2011 Microchip Technology Inc.

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: M icrochip: TC1270ANSVCTTR TC1270ASVRCTR TC1270ATVRCTR TC1271ALVCTTR TC1271ALVRCTR TC1271AMVCTTR TC1271AMVRCTR TC1271ARVCTTR TC1271ARVRCTR TC1271ASVCTTR TC1271ASVRCTR TC1271ATVCTTR TC1271ATVRCTR