STW11NK100Z STW13NK100Z Ω N-channel 1000V - 0.56 - 13A - TO-247 Zener - Protected SuperMESH™ PowerMOSFET General features V Type DSS R I P (@Tjmax) DS(on) D W STW13NK100Z 1000 V < 0.70 Ω 13 A 350W ■ Extremely high dv/dt capability ■ 100% avalanche tested ■ Gate charge minimized TO-247 ■ Very low intrinsic capacitances ■ Very good manufacturing repeatibility Description The SuperMESH™ series is obtained through an Internal schematic diagram extreme optimization of ST’s well established strip-based PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh™ products. Applications ■ Switching application Order codes Part number Marking Package Packaging STW13NK100Z W13NK100Z TO-247 Tube August 2006 Rev 5 1/14 www.st.com 14

Contents STW13NK100Z Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Protection features of gate-to-source zener diodes . . . . . . . . . . . . . . . . . . 4 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2/14

STW13NK100Z Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit V Drain-source voltage (V = 0) 1000 V DS GS V Drain-gate voltage (R = 20KΩ) 1000 V DGR GS V Gate-source voltage ± 30 V GS I Drain current (continuous) at T = 25°C 13 A D C I Drain current (continuous) at T =100°C 8.2 A D C I (1) Drain current (pulsed) 52 A DM P Total dissipation at T = 25°C 350 W TOT C Derating Factor 2.7 W/°C V Gate source ESD(HBM-C=100pF, R=1,5KΩ) 6000 V ESD (G-S) dv/dt(2) Peak diode recovery voltage slope 4 V/ns TJ Operating junction temperature -55 to 150 °C T Storage temperature stg 1. Pulse width limited by safe operating area 2. I ≤ 8.3 A, di/dt ≤ 200A/µs, V ≤ V , T ≤ T SD DD (BR)DSS j JMAX Table 2. Thermal data Symbol Parameter Value Unit R Thermal resistance junction-case Max 0.36 °C/W thj-case R Thermal resistance junction-ambient Max 50 °C/W thj-a Maximum lead temperature for soldering T 300 °C l purpose Table 3. Avalanche characteristics Symbol Parameter Value Unit Avalanche current, repetitive or not-repetitive I 13 A AR (pulse width limited by Tj Max) Single pulse avalanche energy E 700 mJ AS (starting Tj=25°C, Id=Iar, Vdd=50V) 3/14

Electrical ratings STW13NK100Z Table 4. Gate-source zener diode Symbol Parameter Test conditions Min. Typ. Max. Unit BV Gate-source breakdown voltage Igs=± 1mA (Open Drain) 30 V GSO 1.1 Protection features of gate-to-source zener diodes The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. 4/14

STW13NK100Z Electrical characteristics 2 Electrical characteristics (T =25°C unless otherwise specified) CASE Table 5. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit Drain-source breakdown V I = 1mA, V = 0 1000 V (BR)DSS voltage D GS V = Max rating, Zero gate voltage drain DS 1 µA I V = Max rating, DSS current (VGS = 0) DS 10 µA Tc = 125°C Gate body leakage current IGSS (V = 0) VGS = ± 20V ±10 µA GS V Gate threshold voltage V = V , I = 150 µA 3 3.75 4.5 V GS(th) DS GS D Static drain-source on R V = 10V, I = 6.5 A 0.56 0.70 Ω DS(on) resistance GS D Table 6. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit g (1) Forward transconductance V =15V, I = 6.5 A 14 S fs DS D Input capacitance C 6000 pF iss Output capacitance C V =25V, f=1 MHz, V =0 455 pF oss DS GS Reverse transfer C 100 pF rss capacitance Equivalent output C (2) V =0, V =0V to 800V 227 pF osseq . capacitance GS DS t Turn-on delay time 45 ns d(on) V =500 V, I = 7A, t Rise time DD D 35 ns r R =4.7Ω, V =10V t Off-voltage rise time G GS 145 ns d(off) (see Figure16) t Fall time 45 ns f Q Total gate charge 190 266 nC g V =800V, I = 13A Q Gate-source charge DD D 30 nC gs V =10V Q Gate-drain charge GS 100 nC gd 1. Pulsed: pulse duration=300µs, duty cycle 1.5% 2. C is defined as a constant equivalent capacitance giving the same charging time as C when V oss eq. oss DS increases from 0 to 80% V DSS 5/14

Electrical characteristics STW13NK100Z Table 7. Source drain diode Symbol Parameter Test conditions Min Typ. Max Unit I Source-drain current 13 A SD I (1) Source-drain current (pulsed) 52 A SDM V (2) Forward on voltage I =8.3A, V =0 1.6 V SD SD GS I =13 A, t Reverse recovery time SD 820 ns rr di/dt = 100A/µs, Q Reverse recovery charge 12.7 µC rr V =100 V, Tj=25°C I Reverse recovery current DD 31 A RRM (see Figure18) I =13 A, t Reverse recovery time SD 1050 ns rr di/dt = 100A/µs, Q Reverse recovery charge 17.8 µC rr V =100V, Tj=150°C I Reverse recovery current DD 34 A RRM (see Figure18) 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300µs, duty cycle 1.5% 6/14

STW13NK100Z Electrical characteristics 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance Figure 3. Output characterisics Figure 4. Transfer characteristics 7/14

Electrical characteristics STW13NK100Z Figure 5. Transconductance Figure 6. Static drain-source on resistance Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations Figure 9. Normalized gate threshold voltage Figure 10. Normalized on resistance vs vs temperature temperature 8/14

STW13NK100Z Electrical characteristics Figure 11. Source-drain diode forward Figure 12. Normalized B vs temperature VDSS characteristics Figure 13. Maximum avalanche energy vs temperature 9/14

Test circuit STW13NK100Z 3 Test circuit Figure 14. Unclamped Inductive load test Figure 15. Unclamped Inductive waveform circuit Figure 16. Switching times test circuit for Figure 17. Gate charge test circuit resistive load Figure 18. Test circuit for inductive load switching and diode recovery times 10/14

STW13NK100Z Package mechanical data 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 11/14

Package mechanical data STW13NK100Z TO-247 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 4.85 5.15 0.19 0.20 A1 2.20 2.60 0.086 0.102 b 1.0 1.40 0.039 0.055 b1 2.0 2.40 0.079 0.094 b2 3.0 3.40 0.118 0.134 c 0.40 0.80 0.015 0.03 D 19.85 20.15 0.781 0.793 E 15.45 15.75 0.608 0.620 e 5.45 0.214 L 14.20 14.80 0.560 0.582 L1 3.70 4.30 0.14 0.17 L2 18.50 0.728 øP 3.55 3.65 0.140 0.143 øR 4.50 5.50 0.177 0.216 S 5.50 0.216 12/14

STW13NK100Z Revision history 5 Revision history Table 8. Revision history Date Revision Changes 22-Jun-2004 1 Target document 09-Sep-2004 2 Preliminary document 28-Jan-2005 3 Complete version with curves 18-Sep-2005 4 Figure12 changed 01-Aug-2006 5 New template, no content change 13/14

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