STS6NF20V Datasheet N-channel 20 V, 30 mΩ typ., 6 A, 2.7 V drive, STripFET™ II Power MOSFET in an SO-8 package Features Order code VDS RDS(on) max. ID 40 mΩ (@4.5 V) STS6NF20V 20 V 6 A 4 45 mΩ (@2.7 V) 1 • Ultra low threshold gate drive SO-8 • 100% avalanche tested • Low gate charge 1 8 S D Applications 2 7 • Switching applications S D Description S D 3 6 This Power MOSFET series has been developed using STMicroelectronics' unique STripFET™ process, which is specifically designed to minimize input capacitance and gate charge. This renders the device suitable for use as primary switch in G D advanced high-efficiency isolated DC-DC converters for telecom and computer 4 5 applications, and applications with low gate charge driving requirements. SC12830N Product status link STS6NF20V Product summary Order code STS6NF20V Marking 6F20V- Package SO-8 Packing Tape and reel DS2184 - Rev 4 - April 2018 www.st.com For further information contact your local STMicroelectronics sales office.

STS6NF20V Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 20 V VGS Gate-source voltage ±12 V Drain current (continuous) at Tamb = 25 °C 6 A ID Drain current (continuous) at Tamb = 100 °C 3.8 A IDM(1) Drain current (pulsed) 24 A PTOT Total dissipation at Tamb = 25 °C 2.5 W Tstg Storage temperature range °C -55 to 150 Tj Operating junction temperature range °C 1. Pulse width limited by safe operating area. Table 2. Thermal data Symbol Parameter Value Unit Rthj-amb Thermal resistance junction-ambient 50 °C/W DS2184 - Rev 4 page 2/13

STS6NF20V Electrical characteristics 2 Electrical characteristics T = 25 °C unless otherwise specified C Table 3. On-/off-states Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage VGS = 0 V, ID = 250 μA 20 V VGS = 0 V, VDS = 20 V 1 µA IDSS Zero gate voltage drain current VGS = 0 V, VDS = 20 V 10 µA TC = 125 °C (1) IGSS Gate body leakage current VDS = 0 V, VGS = ±12 V ±100 nA VGS(th) Gate threshold voltage VDD = VGS, ID = 250 µA 0.6 V VGS = 4.5 V, ID = 3 A 30 40 Static drain-source RDS(on) on-resistance VGS = 2.7 V, ID = 3 A 37 45 mΩ VGS = 1.95 V, ID = 0.9 A 90 1. Defined by design, not subject to production test. Table 4. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit gfs Forward transconductance 6.5 10 15 S Ciss Input capacitance 320 460 640 pF VDS = 15 V, f = 1 MHz, Coss Output capacitance 130 200 280 pF VGS = 0 V Crss Reverse transfer capacitance 33 50 68 pF Qg Total gate charge VDD = 16 V, ID = 6 A 5.5 8.5 11.5 nC Qgs Gate-source charge VGS = 0 to 4.5 V 1.2 1.8 2.5 nC (see Figure 12. Test circuit for Qgd Gate-drain charge gate charge behavior) 1.6 2.4 3.4 nC Table 5. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD = 10 V, ID = 3 A, - 7 20 ns tr Rise time RG = 4.7 Ω, VGS = 4.5 V - 33 45 ns td(off) Turn-off delay time (see Figure 11. Test circuit for - 27 40 ns resistive load switching times and Figure 16. Switching time tf Fall time waveform) - 10 20 ns DS2184 - Rev 4 page 3/13

STS6NF20V Electrical characteristics Table 6. Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current - 6 A ISDM(1) Source-drain current (pulsed) - 24 A VSD(2) Forward on voltage ISD = 6 A, VGS = 0 V - 1.5 V trr Reverse recovery time ISD = 6 A, di/dt = 100 A/µs, - 26 ns Qrr Reverse recovery charge VDD = 10 V, TJ = 150 °C - 13 nC (see Figure 16. Switching time IRRM Reverse recovery current waveform) - 1 A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% DS2184 - Rev 4 page 4/13

STS6NF20V Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance Zth = k Rthj-amb Figure 3. Output characteristics Figure 4. Transfer characteristics DS2184 - Rev 4 page 5/13

STS6NF20V Electrical characteristics (curves) Figure 5. Source-drain diode forward characteristics Figure 6. Static drain-source on-resistance Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations Figure 9. Normalized gate threshold voltage vs Figure 10. Normalized on-resistance vs temperature temperature DS2184 - Rev 4 page 6/13

STS6NF20V Test circuits 3 Test circuits Figure 11. Test circuit for resistive load switching times Figure 12. Test circuit for gate charge behavior VDD 12 V 47 kΩ 1 kΩ 100 nF RL 2200 3.3 + μF μF VDD VD VGS IG= CONST 100 Ω D.U.T. VGS RG D.U.T. pulse width 2200+ 2.7 kΩ VG pulse width μF 47 kΩ 1 kΩ AM01468v1 AM01469v1 Figure 13. Test circuit for inductive load switching and Figure 14. Unclamped inductive load test circuit diode recovery times L D A A A VD G D.U.T. fdaiostde 100 µH +2µ2F00 3µ.F3 VDD 25 Ω S B B B D µ3F.3 +1µ0F00 VDD ID G D.U.T. + RG S Vi D.U.T. _ pulse width AM01471v1 AM01470v1 Figure 15. Unclamped inductive waveform Figure 16. Switching time waveform V(BR)DSS VD ton toff td(on) tr td(off) tf IDM 90% 90% 10% ID 0 10% VDS VDD VDD VGS 90% 0 10% AM01472v1 AM01473v1 DS2184 - Rev 4 page 7/13

STS6NF20V Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 SO-8 package information Figure 17. SO-8 package outline 0016023_So-807_fig2_Rev10 DS2184 - Rev 4 page 8/13

STS6NF20V SO-8 package information Table 7. SO-8 mechanical data mm Dim. Min. Typ. Max. A 1.75 A1 0.10 0.25 A2 1.25 b 0.31 0.51 b1 0.28 0.48 c 0.10 0.25 c1 0.10 0.23 D 4.80 4.90 5.00 E 5.80 6.00 6.20 E1 3.80 3.90 4.00 e 1.27 h 0.25 0.50 L 0.40 1.27 L1 1.04 L2 0.25 k 0° 8° ccc 0.10 Figure 18. SO-8 recommended footprint (dimensions are in mm) 0016023_So-807_footprint_Rev10 DS2184 - Rev 4 page 9/13

STS6NF20V SO-8 packing information 4.2 SO-8 packing information Figure 19. SO-8 tape and reel dimensions A D N T Po Bo Ko Ao P 0016023_SO-8_O7_T_R Table 8. SO-8 tape and reel mechanical data mm Dim. Min. Typ. Max. A 330 C 12.8 13.2 D 20.2 N 60 T 22.4 - Ao 8.1 8.5 Bo 5.5 5.9 Ko 2.1 2.3 Po 3.9 4.1 P 7.9 8.1 DS2184 - Rev 4 page 10/13

STS6NF20V Revision history Table 9. Document revision history Date Version Changes 07-Feb-2008 1 Initial release. 18-Nov-2009 2 Added new RDS(on) value on Table 4: On /off states Max values have been added in Table 5: Dynamic and Table 6: Switching times. 29-Nov-2012 3 Section 4: Package mechanical data has been updated. Minor text changes. Removed maturity status indication from cover page. The document status is production data. Updated product marking on cover page. 04-Apr-2018 4 Updated Table 3. On-/off-states. Updated Section 4 Package information. Minor text changes DS2184 - Rev 4 page 11/13

STS6NF20V Contents Contents 1 Electrical ratings ..................................................................2 2 Electrical characteristics...........................................................3 2.1 Electrical characteristics (curves).................................................5 3 Test circuits .......................................................................7 4 Package information...............................................................8 4.1 SO-8 package information.......................................................8 4.2 SO-8 packing information .......................................................9 Revision history .......................................................................11 DS2184 - Rev 4 page 12/13

STS6NF20V IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS2184 - Rev 4 page 13/13

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