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STS5NF60L产品简介:
ICGOO电子元器件商城为您提供STS5NF60L由STMicroelectronics设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 STS5NF60L价格参考。STMicroelectronicsSTS5NF60L封装/规格:晶体管 - FET,MOSFET - 单, 表面贴装 N 沟道 60V 5A(Tc) 2.5W(Tc) 8-SO。您可以下载STS5NF60L参考资料、Datasheet数据手册功能说明书,资料中有STS5NF60L 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | |
ChannelMode | Enhancement |
描述 | MOSFET N-CH 60V 5A 8-SOICMOSFET N-Ch 60 Volt 5 Amp |
产品分类 | FET - 单分离式半导体 |
FET功能 | 逻辑电平门 |
FET类型 | MOSFET N 通道,金属氧化物 |
Id-ContinuousDrainCurrent | 5 A |
Id-连续漏极电流 | 5 A |
品牌 | STMicroelectronics |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 晶体管,MOSFET,STMicroelectronics STS5NF60LSTripFET™ |
数据手册 | |
产品型号 | STS5NF60L |
Pd-PowerDissipation | 2.5 W |
Pd-功率耗散 | 2.5 W |
RdsOn-Drain-SourceResistance | 55 mOhms |
RdsOn-漏源导通电阻 | 55 mOhms |
Vds-Drain-SourceBreakdownVoltage | 60 V |
Vds-漏源极击穿电压 | 60 V |
Vgs-Gate-SourceBreakdownVoltage | +/- 20 V |
Vgs-栅源极击穿电压 | 20 V |
上升时间 | 28 ns |
下降时间 | 10 ns |
不同Id时的Vgs(th)(最大值) | 2.5V @ 250µA |
不同Vds时的输入电容(Ciss) | 1250pF @ 25V |
不同Vgs时的栅极电荷(Qg) | 17nC @ 5V |
不同 Id、Vgs时的 RdsOn(最大值) | 55 毫欧 @ 2.5A,10V |
产品培训模块 | http://www.digikey.cn/PTM/IndividualPTM.page?site=cn&lang=zhs&ptm=26067 |
产品目录页面 | |
产品种类 | MOSFET |
供应商器件封装 | 8-SO |
其它名称 | 497-8044-2 |
其它有关文件 | http://www.st.com/web/catalog/sense_power/FM100/CL824/SC1165/PF64941?referrer=70071840 |
典型关闭延迟时间 | 45 ns |
功率-最大值 | 2.5W |
包装 | 带卷 (TR) |
单位重量 | 85 mg |
商标 | STMicroelectronics |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
封装 | Reel |
封装/外壳 | 8-SOIC(0.154",3.90mm 宽) |
封装/箱体 | SO-8 |
工厂包装数量 | 2500 |
晶体管极性 | N-Channel |
最大工作温度 | + 150 C |
最小工作温度 | - 55 C |
标准包装 | 2,500 |
正向跨导-最小值 | 25 S |
漏源极电压(Vdss) | 60V |
电流-连续漏极(Id)(25°C时) | 5A (Tc) |
系列 | STS5NF60L |
通道模式 | Enhancement |
配置 | Single Quad Drain Triple Source |
STS5NF60L Ω N-channel 60V - 0.045 - 5A - SO-8 STripFET™ Power MOSFET General features Type V R I DSS DS(on) D STS5NF60L 60V <0.055Ω 5A ■ Standard outline for easy automated surface mount assembly ■ Low threshold drive Description SO-8 This Power MOSFET is the latest development of STMicroelectronis unique "Single Feature Size™" strip-based process. The resulting transistor shows extremely high packing density for low on- Internal schematic diagram resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. Applications ■ Switching application Order codes Part number Marking Package Packaging STS5NF60L S5NF60L SO-8 Tape&reel January 2007 Rev 4 1/12 www.st.com 12
Contents STS5NF60L Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2/12
STS5NF60L Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit V Drain-source voltage (v = 0) 60 V DS gs V Gate- source voltage ±20 V GS I Drain current (continuous) at T = 25°C 5 A D C I Drain current (continuous) at T = 100°C 3 A D C I (1) Drain current (pulsed) 20 A DM P Total dissipation at T = 25°C 2.5 W TOT C Derating factor 0.02 W/°C dv/dt (2) Peak diode recovery voltage slope 5.5 V/ns T Storage Temperature -55 to 150 °C stg T Max operating junction temperature 150 °C j 1. Pulse width limited by safe operating area 2. I ≤ 5A, di/dt ≤ 100A/µs, V ≤ V , T ≤ T SD DD (BR)DSS j JMAX Table 2. Thermal data R (1)Thermal resistance junction-ambient Max 50 °C/W thj-a Maximum lead temperature for soldering purpose T 150 °C l Typ 1. Mounted on FR-4 board (t 10 sec.). 3/12
Electrical characteristics STS5NF60L 2 Electrical characteristics (T =25°C unless otherwise specified) CASE T able 3. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit Drain-source V I = 250 µA, V = 0 60 V (BR)DSS Breakdown voltage D GS V = Max rating 1 µA DS Zero gate voltage IDSS Drain current (VGS = 0) VDS= Max rating, 10 µA T =125°C C Gate-body leakage I V = ± 20V ±100 nA GSS current (V = 0) GS DS V Gate threshold voltage V = V , I = 250µA 1 1.7 2.5 V GS(th) DS GS D R Static drain-source on VGS = 10V, ID = 2.5A 0.045 0.055 Ω DS(on) resistance V = 4.5V, I = 2.5A 0.050 0.065 Ω GS D T able 4. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit g (1) Forward transconductance V = 15V, I =2.5 A 7 S fs DS D C Input capacitance 1250 pF iss Coss Output capacitance VDS = 25V, f = 1 MHz, 130 pF V = 0 Reverse transfer GS C 26 pF rss capacitance Q Total gate charge 17 nC g V = 48V, I = 5A, DD D Q Gate-source charge V = 5V 4.5 nC gs GS (see Figure 13) Q Gate-drain charge 6 nC gd 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5. T able 5. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit V =30 V, I =2.5A, t Turn-on delay time DD D 13 ns d(on) R =4.7Ω, V = 4.5V t Rise time G GS 28 ns r (see Figure 12) Turn-off Delay Time V = 30 V, I = 2.5A t DD D 45 ns d(off) Fall Time R =4.7Ω, V = 4.5V tf (sGee Figure 1G2S) 10 ns 4/12
STS5NF60L Electrical characteristics T able 6. Source drain diode Symbol Parameter Test conditions Min Typ. Max Unit I Source-drain current 5 A SD I (1) Source-drain current (pulsed) 20 A SDM V (2) Forward on voltage I = 5A, V = 0 1.2 V SD SD GS I = 5A, V = 40V t Reverse recovery time SD DD 85 ns rr di/dt = 100A/µs, Q Reverse recovery charge 85 nC rr T = 150°C I Reverse recovery current j 2 A RRM (see Figure 14) 1. Pulse width limited by safe operating area. 2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5% 5/12
Electrical characteristics STS5NF60L 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance Figure 3. Output characteristics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance 6/12
STS5NF60L Electrical characteristics Figure 7. Gate charge vs. gate-source voltage Figure 8. Capacitance variations Figure 9. Normalized gate threshold voltage Figure 10. Normalized on resistance vs. vs. temperature temperature Figure 11. Source-drain diode forward characteristics 7/12
Test circuit STS5NF60L 3 Test circuit Figure 12. Switching times test circuit for Figure 13. Gate charge test circuit resistive load Figure 14. Test circuit for inductive load Figure 15. Unclamped Inductive load test switching and diode recovery times circuit Figure 16. Unclamped inductive waveform Figure 17. Switching time waveform 8/12
STS5NF60L Package mechanical data 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at : www.st.com 9/12
Package mechanical data STS5NF60L SO-8 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 1.75 0.068 a1 0.1 0.25 0.003 0.009 a2 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.019 c1 45 (typ.) D 4.8 5.0 0.188 0.196 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 F 3.8 4.0 0.14 0.157 L 0.4 1.27 0.015 0.050 M 0.6 0.023 S 8 (max.) 10/12
STS5NF60L Revision history 5 Revision history T able 7. Revision history Date Revision Changes 21-Jun-2004 2 First release 06-Nov-2006 3 The document has been reformatted 30-Jan-2007 4 Typo mistake on Table1. 11/12
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