STM32F030x4 STM32F030x6 STM32F030x8 STM32F030xC ® Value-line ARM -based 32-bit MCU with up to 256 KB Flash, timers, ADC, communication interfaces, 2.4-3.6 V operation Datasheet - production data Features • Core: ARM® 32-bit Cortex®-M0 CPU, frequency up to 48 MHz • Memories LQFP64 (10x10 mm) TSSOP20 (6.4x4.4mm) – 16 to 256 Kbytes of Flash memory LQFP48 (7x7 mm) LQFP32 (7x7 mm) – 4 to 32 Kbytes of SRAM with HW parity • Communication interfaces • CRC calculation unit – Up to two I2C interfaces • Reset and power management – Fast Mode Plus (1 Mbit/s) support on – Digital & I/Os supply: V = 2.4 V to 3.6 V DD one or two I/Fs, with 20 mA current sink – Analog supply: V = V to 3.6 V DDA DD – SMBus/PMBus support (on single I/F) – Power-on/Power down reset (POR/PDR) – Up to six USARTs supporting master – Low power modes: Sleep, Stop, Standby synchronous SPI and modem control; one • Clock management with auto baud rate detection – 4 to 32 MHz crystal oscillator – Up to two SPIs (18 Mbit/s) with 4 to 16 programmable bit frames – 32 kHz oscillator for RTC with calibration – Internal 8 MHz RC with x6 PLL option • Serial wire debug (SWD) ® – Internal 40 kHz RC oscillator • All packages ECOPACK 2 • Up to 55 fast I/Os Table 1. Device summary – All mappable on external interrupt vectors – Up to 55 I/Os with 5V tolerant capability Reference Part number • 5-channel DMA controller STM32F030x4 STM32F030F4 • One 12-bit, 1.0 µs ADC (up to 16 channels) STM32F030x6 STM32F030C6, STM32F030K6 – Conversion range: 0 to 3.6 V STM32F030x8 STM32F030C8, STM32F030R8 – Separate analog supply: 2.4 V to 3.6 V STM32F030xC STM32F030CC, STM32F030RC • Calendar RTC with alarm and periodic wakeup from Stop/Standby • 11 timers – One 16-bit advanced-control timer for six-channel PWM output – Up to seven 16-bit timers, with up to four IC/OC, OCN, usable for IR control decoding – Independent and system watchdog timers – SysTick timer January 2017 DocID024849 Rev 3 1/91 This is information on a product in full production. www.st.com

Contents STM32F030x4/x6/x8/xC Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.1 ARM®-Cortex®-M0 core with embedded Flash and SRAM . . . . . . . . . . . 12 3.2 Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.3 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.4 Cyclic redundancy check calculation unit (CRC) . . . . . . . . . . . . . . . . . . . 13 3.5 Power management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.5.1 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.5.2 Power supply supervisors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.5.3 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.5.4 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.6 Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.7 General-purpose inputs/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.8 Direct memory access controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.9 Interrupts and events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.9.1 Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 16 3.9.2 Extended interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . 16 3.10 Analog to digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.10.1 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.10.2 Internal voltage reference (V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 REFINT 3.11 Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.11.1 Advanced-control timer (TIM1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.11.2 General-purpose timers (TIM3, TIM14..17) . . . . . . . . . . . . . . . . . . . . . . 19 3.11.3 Basic timers TIM6 and TIM7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.11.4 Independent watchdog (IWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.11.5 System window watchdog (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.11.6 SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.12 Real-time clock (RTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.13 Inter-integrated circuit interfaces (I2C) . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.14 Universal synchronous/asynchronous receiver/transmitter (USART) . . . 21 2/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Contents 3.15 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.16 Serial wire debug port (SW-DP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4 Pinouts and pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 6.1 Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 6.1.1 Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 6.1.2 Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 6.1.3 Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 6.1.4 Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 6.1.5 Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 6.1.6 Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 6.1.7 Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 6.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 6.3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 6.3.1 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 6.3.2 Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . 44 6.3.3 Embedded reset and power control block characteristics . . . . . . . . . . . 44 6.3.4 Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 6.3.5 Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 6.3.6 Wakeup time from low-power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 6.3.7 External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 6.3.8 Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 6.3.9 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 6.3.10 Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 6.3.11 EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 6.3.12 Electrical sensitivity characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 6.3.13 I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 6.3.14 I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 6.3.15 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 6.3.16 12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 6.3.17 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 6.3.18 Timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 6.3.19 Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 DocID024849 Rev 3 3/91 4

Contents STM32F030x4/x6/x8/xC 7 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 7.1 LQFP64 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 7.2 LQFP48 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 7.3 LQFP32 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 7.4 TSSOP20 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 7.5 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 7.5.1 Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 8 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 4/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC List of tables List of tables Table 1. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. STM32F030x4/x6/x8/xC family device features and peripheral counts . . . . . . . . . . . . . . . 10 Table 3. Temperature sensor calibration values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 4. Internal voltage reference calibration values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 5. Timer feature comparison. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 6. Comparison of I2C analog and digital filters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 7. STM32F030x4/x6/x8/xC I2C implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 8. STM32F0x0 USART implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 9. STM32F030x4/x6/x8/xC SPI implementation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 10. Legend/abbreviations used in the pinout table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 11. STM32F030x4/6/8/C pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 12. Alternate functions selected through GPIOA_AFR registers for port A . . . . . . . . . . . . . . . 33 Table 13. Alternate functions selected through GPIOB_AFR registers for port B . . . . . . . . . . . . . . . 34 Table 14. Alternate functions selected through GPIOC_AFR registers for port C . . . . . . . . . . . . . . . 36 Table 15. Alternate functions selected through GPIOD_AFR registers for port D . . . . . . . . . . . . . . . 36 Table 16. Alternate functions selected through GPIOF_AFR registers for port F. . . . . . . . . . . . . . . . 36 Table 17. STM32F030x4/x6/x8/xC peripheral register boundary addresses . . . . . . . . . . . . . . . . . . . 38 Table 18. Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 19. Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 20. Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 21. General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 22. Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 23. Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 24. Embedded internal reference voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 25. Typical and maximum current consumption from V supply at V = 3.6 V . . . . . . . . . . 46 DD DD Table 26. Typical and maximum current consumption from the V supply . . . . . . . . . . . . . . . . . . 47 DDA Table 27. Typical and maximum consumption in Stop and Standby modes . . . . . . . . . . . . . . . . . . . 48 Table 28. Typical current consumption in Run mode, code with data processing running from Flash. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Table 29. Switching output I/O current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Table 30. Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Table 31. High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Table 32. Low-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 33. HSE oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 34. LSE oscillator characteristics (f = 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 LSE Table 35. HSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Table 36. HSI14 oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Table 37. LSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Table 38. PLL characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Table 39. Flash memory characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Table 40. Flash memory endurance and data retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Table 41. EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Table 42. EMI characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Table 43. ESD absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Table 44. Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Table 45. I/O current injection susceptibility. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Table 46. I/O static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Table 47. Output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 DocID024849 Rev 3 5/91 6

List of tables STM32F030x4/x6/x8/xC Table 48. I/O AC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Table 49. NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Table 50. ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 Table 51. R max for f = 14 MHz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 AIN ADC Table 52. ADC accuracy. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 Table 53. TS characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Table 54. TIMx characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Table 55. IWDG min/max timeout period at 40 kHz (LSI). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Table 56. WWDG min/max timeout value at 48 MHz (PCLK). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Table 57. I2C analog filter characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 Table 58. SPI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 Table 59. LQFP64 mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Table 60. LQFP48 mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 Table 61. LQFP32 mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 Table 62. TSSOP20 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 Table 63. Package thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Table 64. Ordering information scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 Table 65. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 6/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC List of figures List of figures Figure 1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 2. Clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 3. LQFP64 64-pin package pinout (top view), for STM32F030x4/6/8 devices . . . . . . . . . . . . 24 Figure 4. LQFP64 64-pin package pinout (top view), for STM32F030RC devices . . . . . . . . . . . . . . 24 Figure 5. LQFP48 48-pin package pinout (top view), for STM32F030x4/6/8 devices . . . . . . . . . . . . 25 Figure 6. LQFP48 48-pin package pinout (top view), for STM32F030CC devices . . . . . . . . . . . . . . 25 Figure 7. LQFP32 32-pin package pinout (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 8. TSSOP20 20-pin package pinout (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 9. STM32F030x4/x6/x8/xC memory map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Figure 10. Pin loading conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Figure 11. Pin input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Figure 12. Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Figure 13. Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Figure 14. High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Figure 15. Low-speed external clock source AC timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Figure 16. Typical application with an 8 MHz crystal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Figure 17. Typical application with a 32.768 kHz crystal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Figure 18. TC and TTa I/O input characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 19. Five volt tolerant (FT and FTf) I/O input characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 20. I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Figure 21. Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 Figure 22. ADC accuracy characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Figure 23. Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Figure 24. SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Figure 25. SPI timing diagram - slave mode and CPHA = 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Figure 26. SPI timing diagram - master mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 Figure 27. LQFP64 outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Figure 28. LQFP64 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Figure 29. LQFP64 marking example (package top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Figure 30. LQFP48 outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 Figure 31. LQFP48 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Figure 32. LQFP48 marking example (package top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 Figure 33. LQFP32 outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 Figure 34. LQFP32 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 Figure 35. LQFP32 marking example (package top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 Figure 36. TSSOP20 outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 Figure 37. TSSOP20 footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Figure 38. TSSOP20 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 DocID024849 Rev 3 7/91 7

Introduction STM32F030x4/x6/x8/xC 1 Introduction This datasheet provides the ordering information and mechanical device characteristics of the STM32F030x4/x6/x8/xC microcontrollers. This document should be read in conjunction with the STM32F0x0xx reference manual (RM0360). The reference manual is available from the STMicroelectronics website www.st.com. For information on the ARM® Cortex®-M0 core, please refer to the Cortex®-M0 Technical Reference Manual, available from the www.arm.com website. 8/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Description 2 Description The STM32F030x4/x6/x8/xC microcontrollers incorporate the high-performance ARM® Cortex®-M0 32-bit RISC core operating at a 48 MHz frequency, high-speed embedded memories (up to 256 Kbytes of Flash memory and up to 32 Kbytes of SRAM), and an extensive range of enhanced peripherals and I/Os. All devices offer standard communication interfaces (up to two I2Cs, up to two SPIs and up to six USARTs), one 12-bit ADC, seven general-purpose 16-bit timers and an advanced-control PWM timer. The STM32F030x4/x6/x8/xC microcontrollers operate in the -40 to +85 °C temperature range from a 2.4 to 3.6V power supply. A comprehensive set of power-saving modes allows the design of low-power applications. The STM32F030x4/x6/x8/xC microcontrollers include devices in four different packages ranging from 20 pins to 64 pins. Depending on the device chosen, different sets of peripherals are included. The description below provides an overview of the complete range of STM32F030x4/x6/x8/xC peripherals proposed. These features make the STM32F030x4/x6/x8/xC microcontrollers suitable for a wide range of applications such as application control and user interfaces, handheld equipment, A/V receivers and digital TV, PC peripherals, gaming and GPS platforms, industrial applications, PLCs, inverters, printers, scanners, alarm systems, video intercoms, and HVACs. DocID024849 Rev 3 9/91 23

Description STM32F030x4/x6/x8/xC Table 2. STM32F030x4/x6/x8/xC family device features and peripheral counts STM32 STM32 STM32 STM32 STM32 STM32 STM32 Peripheral F030F4 F030K6 F030C6 F030C8 F030CC F030R8 F030RC Flash (Kbytes) 16 32 32 64 256 64 256 SRAM (Kbytes) 4 8 32 8 32 Advanced 1 (16-bit) control Timers General 4 (16-bit)(1) 5 (16-bit) purpose Basic - 1 (16-bit)(2) 2 (16-bit) 1 (16-bit)(2) 2 (16-bit) SPI 1(3) 2 Comm. I2C 1(4) 2 interfaces USART 1(5) 2(6) 6 2(6) 6 1 1 1 1 1 1 1 12-bit ADC (9 ext. (10 ext. (10 ext. (10 ext. (10 ext. (16 ext. (16 ext. (number of channels) +2 int.) +2 int.) +2 int.) +2 int.) +2 int.) +2 int.) +2 int.) GPIOs 15 26 39 39 37 55 51 Max. CPU frequency 48 MHz Operating voltage 2.4 to 3.6 V Ambient operating temperature: -40°C to 85°C Operating temperature Junction temperature: -40°C to 105°C Packages TSSOP20 LQFP32 LQFP48 LQFP64 1. TIM15 is not present. 2. TIM7 is not present. 3. SPI2 is not present. 4. I2C2 is not present. 5. USART2 to USART6 are not present. 6. USART3 to USART6 are not present 10/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Description Figure 1. Block diagram (cid:54)(cid:58)(cid:38)(cid:47)(cid:46)(cid:3) (cid:54)(cid:72)(cid:85)(cid:76)(cid:68)(cid:79)(cid:3)(cid:58)(cid:76)(cid:85)(cid:72)(cid:3) (cid:51)(cid:50)(cid:58)(cid:40)(cid:53) (cid:54)(cid:58)(cid:68)(cid:86)(cid:39)(cid:3)(cid:36)(cid:44)(cid:50)(cid:41) (cid:39)(cid:72)(cid:69)(cid:88)(cid:74) (cid:69)(cid:79) (cid:57)(cid:39)(cid:39)(cid:20)(cid:27) (cid:22)(cid:57)(cid:17)(cid:22)(cid:50)(cid:3)(cid:57)(cid:47)(cid:3)(cid:55)(cid:87)(cid:82)(cid:17)(cid:53)(cid:3)(cid:20)(cid:40)(cid:17)(cid:27)(cid:42)(cid:3)(cid:3)(cid:57) (cid:57)(cid:57)(cid:39)(cid:54)(cid:54)(cid:39)(cid:3)(cid:3)(cid:32)(cid:3)(cid:21)(cid:17)(cid:23)(cid:3)(cid:87)(cid:82)(cid:3)(cid:22)(cid:17)(cid:25)(cid:3)(cid:57) (cid:38)(cid:50)(cid:73)(cid:48)(cid:53)(cid:36)(cid:55)(cid:59)(cid:3)(cid:40)(cid:32)(cid:59)(cid:3)(cid:23)(cid:16)(cid:27)(cid:48)(cid:3)(cid:48)(cid:19)(cid:3)(cid:43)(cid:38)(cid:93)(cid:51)(cid:56)(cid:3) (cid:50)(cid:41)(cid:79)(cid:68)(cid:86)(cid:75)(cid:3)(cid:80)(cid:72)(cid:80)(cid:82)(cid:85)(cid:92)(cid:3)(cid:76)(cid:81)(cid:87)(cid:72)(cid:85)(cid:73)(cid:68)(cid:70)(cid:72) (cid:20)(cid:25)(cid:18)(cid:41)(cid:22)(cid:21)(cid:79)(cid:68)(cid:22)(cid:18)(cid:86)(cid:25)(cid:21)(cid:75)(cid:23)(cid:16)(cid:3)(cid:18)(cid:69)(cid:42)(cid:21)(cid:76)(cid:87)(cid:24)(cid:51)(cid:25)(cid:47)(cid:3)(cid:3)(cid:46)(cid:37)(cid:3) (cid:35)(cid:3)(cid:57)(cid:54)(cid:39)(cid:39)(cid:56)(cid:51)(cid:51)(cid:47)(cid:60)(cid:3) (cid:54)(cid:56)(cid:51)(cid:40)(cid:53)(cid:57)(cid:44)(cid:54)(cid:44)(cid:50)(cid:49) (cid:49)(cid:57)(cid:44)(cid:38) (cid:37)(cid:88)(cid:86)(cid:3)(cid:80)(cid:68)(cid:87)(cid:85)(cid:76)(cid:91) (cid:54)(cid:53)(cid:36)(cid:48)(cid:3)(cid:70)(cid:82)(cid:81)(cid:87)(cid:85)(cid:82)(cid:79)(cid:79)(cid:72)(cid:85) (cid:23)(cid:18)(cid:54)(cid:27)(cid:18)(cid:53)(cid:22)(cid:36)(cid:21)(cid:43)(cid:3)(cid:48)(cid:46)(cid:54)(cid:3)(cid:37)(cid:44)(cid:20)(cid:23) (cid:35)(cid:3)(cid:53)(cid:57)(cid:38)(cid:39)(cid:39)(cid:3)(cid:20)(cid:36)(cid:23)(cid:3)(cid:48)(cid:43)(cid:93)(cid:53)(cid:51)(cid:72)(cid:50)(cid:86)(cid:44)(cid:81)(cid:72)(cid:53)(cid:87)(cid:87) (cid:51)(cid:50)(cid:53)(cid:18)(cid:51)(cid:39)(cid:53) (cid:49)(cid:57)(cid:57)(cid:57)(cid:39)(cid:54)(cid:39)(cid:53)(cid:54)(cid:39)(cid:39)(cid:54)(cid:36)(cid:3)(cid:36)(cid:3)(cid:55) (cid:43)(cid:54)(cid:44) (cid:51)(cid:47)(cid:47)(cid:38)(cid:47)(cid:46) (cid:53)(cid:51)(cid:38)(cid:47)(cid:3)(cid:27)(cid:47)(cid:3)(cid:48)(cid:43)(cid:93) (cid:35)(cid:3)(cid:57)(cid:39)(cid:39)(cid:36) (cid:35)(cid:3)(cid:57)(cid:39)(cid:39) (cid:47)(cid:54)(cid:44) (cid:42)(cid:51)(cid:3)(cid:39)(cid:48)(cid:36)(cid:3) (cid:53)(cid:38)(cid:3)(cid:23)(cid:19)(cid:3)(cid:78)(cid:43)(cid:93) (cid:59)(cid:55)(cid:36)(cid:47)(cid:3)(cid:50)(cid:54)(cid:38)(cid:3) (cid:50)(cid:54)(cid:38)(cid:66)(cid:44)(cid:49) (cid:24)(cid:3)(cid:70)(cid:75)(cid:68)(cid:81)(cid:81)(cid:72)(cid:79)(cid:86) (cid:23)(cid:16)(cid:22)(cid:21)(cid:3)(cid:48)(cid:43)(cid:93) (cid:50)(cid:54)(cid:38)(cid:66)(cid:50)(cid:56)(cid:55) (cid:44)(cid:81)(cid:71)(cid:17)(cid:3)(cid:58)(cid:76)(cid:81)(cid:71)(cid:82)(cid:90)(cid:3)(cid:58)(cid:39)(cid:42) (cid:51)(cid:36)(cid:62)(cid:20)(cid:24)(cid:29)(cid:19)(cid:64) (cid:42)(cid:51)(cid:44)(cid:50)(cid:3)(cid:83)(cid:82)(cid:85)(cid:87)(cid:3)(cid:36) (cid:51)(cid:82)(cid:90)(cid:72)(cid:85)(cid:3) (cid:53)(cid:40)(cid:54)(cid:40)(cid:55)(cid:3)(cid:9)(cid:3)(cid:38)(cid:47)(cid:50)(cid:38)(cid:46)(cid:3) (cid:38)(cid:82)(cid:81)(cid:87)(cid:85)(cid:82)(cid:79)(cid:79)(cid:72)(cid:85) (cid:38)(cid:50)(cid:49)(cid:55)(cid:53)(cid:50)(cid:47) (cid:51)(cid:37)(cid:62)(cid:20)(cid:24)(cid:29)(cid:19)(cid:64) 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(cid:20)(cid:25)(cid:91)(cid:3)(cid:3) (cid:36)(cid:39)(cid:3)(cid:76)(cid:81)(cid:83)(cid:88)(cid:87) (cid:20)(cid:21)(cid:16)(cid:69)(cid:76)(cid:87)(cid:3)(cid:36)(cid:39)(cid:38) (cid:44)(cid:41) (cid:54)(cid:38)(cid:47)(cid:15)(cid:3)(cid:54)(cid:39)(cid:36)(cid:15)(cid:3)(cid:54)(cid:48)(cid:37)(cid:36)(cid:3) (cid:55)(cid:44)(cid:48)(cid:40)(cid:53)(cid:3)(cid:25) (cid:44)(cid:21)(cid:38)(cid:20) (cid:11)(cid:21)(cid:19)(cid:3)(cid:80)(cid:36)(cid:3)(cid:41)(cid:48)(cid:14)(cid:12)(cid:15)(cid:3)(cid:68)(cid:86)(cid:3)(cid:36)(cid:41) (cid:57)(cid:57)(cid:39)(cid:54)(cid:39)(cid:54)(cid:36)(cid:36) (cid:55)(cid:44)(cid:48)(cid:40)(cid:53)(cid:3)(cid:26) (cid:44)(cid:21)(cid:38)(cid:21) (cid:54)(cid:38)(cid:47)(cid:15)(cid:3)(cid:54)(cid:39)(cid:36)(cid:15)(cid:3)(cid:68)(cid:86)(cid:3)(cid:36)(cid:41) (cid:35)(cid:3)(cid:57)(cid:39)(cid:39)(cid:36) (cid:51)(cid:82)(cid:90)(cid:72)(cid:85)(cid:3)(cid:71)(cid:82)(cid:80)(cid:68)(cid:76)(cid:81)(cid:3)(cid:82)(cid:73)(cid:3)(cid:68)(cid:81)(cid:68)(cid:79)(cid:82)(cid:74)(cid:3)(cid:69)(cid:79)(cid:82)(cid:70)(cid:78)(cid:86)(cid:3)(cid:29) (cid:57)(cid:39)(cid:39) (cid:57)(cid:39)(cid:39)(cid:36) (cid:48)(cid:54)(cid:89)(cid:22)(cid:21)(cid:20)(cid:22)(cid:26)(cid:57)(cid:22) 1. TIMER6, TIMER15, SPI, USART2 and I2C2 are available on STM32F030x8/C devices only. 2. USART3, USART4, USART5, USART6 and TIMER7 are available on STM32F030xC devices only. DocID024849 Rev 3 11/91 23

Functional overview STM32F030x4/x6/x8/xC 3 Functional overview ® ® 3.1 ARM -Cortex -M0 core with embedded Flash and SRAM The ARM® Cortex®-M0 processor is the latest generation of ARM processors for embedded systems. It has been developed to provide a low-cost platform that meets the needs of MCU implementation, with a reduced pin count and low-power consumption, while delivering outstanding computational performance and an advanced system response to interrupts. The ARM® Cortex®-M0 32-bit RISC processor features exceptional code-efficiency, delivering the high-performance expected from an ARM core in the memory size usually associated with 8- and 16-bit devices. The STM32F0xx family has an embedded ARM core and is therefore compatible with all ARM tools and software. Figure 3 shows the general block diagram of the device family. 3.2 Memories The device has the following features: • 4 to 32 Kbytes of embedded SRAM accessed (read/write) at CPU clock speed with 0 wait states and featuring embedded parity checking with exception generation for fail- critical applications. • The non-volatile memory is divided into two arrays: – 16 to 256 Kbytes of embedded Flash memory for programs and data – Option bytes The option bytes are used to write-protect the memory (with 4 KB granularity) and/or readout-protect the whole memory with the following options: – Level 0: no readout protection – Level 1: memory readout protection, the Flash memory cannot be read from or written to if either debug features are connected or boot in RAM is selected – Level 2: chip readout protection, debug features (Cortex®-M0 serial wire) and boot in RAM selection disabled 3.3 Boot modes At startup, the boot pin and boot selector option bit are used to select one of the three boot options: • Boot from User Flash • Boot from System Memory • Boot from embedded SRAM The boot loader is located in System Memory. It is used to reprogram the Flash memory by using USART on pins PA14/PA15 or PA9/PA10. 12/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Functional overview 3.4 Cyclic redundancy check calculation unit (CRC) The CRC (cyclic redundancy check) calculation unit is used to get a CRC code using a configurable generator polynomial value and size. Among other applications, CRC-based techniques are used to verify data transmission or storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of the software during runtime, to be compared with a reference signature generated at link- time and stored at a given memory location. 3.5 Power management 3.5.1 Power supply schemes • V = 2.4 to 3.6 V: external power supply for I/Os and the internal regulator. Provided DD externally through VDD pins. • V = from V to 3.6 V: external analog power supply for ADC, Reset blocks, RCs DDA DD and PLL. The V voltage level must be always greater or equal to the V voltage DDA DD level and must be provided first. For more details on how to connect power pins, refer to Figure 12: Power supply scheme. 3.5.2 Power supply supervisors The device has integrated power-on reset (POR) and power-down reset (PDR) circuits. They are always active, and ensure proper operation above a threshold of 2 V. The device remains in reset mode when the monitored supply voltage is below a specified threshold, V , without the need for an external reset circuit. POR/PDR • The POR monitors only the V supply voltage. During the startup phase it is required DD that V should arrive first and be greater than or equal to V . DDA DD • The PDR monitors both the V and V supply voltages, however the V power DD DDA DDA supply supervisor can be disabled (by programming a dedicated Option bit) to reduce the power consumption if the application design ensures that V is higher than or DDA equal to V . DD 3.5.3 Voltage regulator The regulator has two operating modes and it is always enabled after reset. • Main (MR) is used in normal operating mode (Run). • Low power (LPR) can be used in Stop mode where the power demand is reduced. In Standby mode, it is put in power down mode. In this mode, the regulator output is in high impedance and the kernel circuitry is powered down, inducing zero consumption (but the contents of the registers and SRAM are lost). DocID024849 Rev 3 13/91 23

Functional overview STM32F030x4/x6/x8/xC 3.5.4 Low-power modes The STM32F030x4/x6/x8/xC microcontrollers support three low-power modes to achieve the best compromise between low power consumption, short startup time and available wakeup sources: • Sleep mode In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can wake up the CPU when an interrupt/event occurs. • Stop mode Stop mode achieves very low power consumption while retaining the content of SRAM and registers. All clocks in the 1.8 V domain are stopped, the PLL, the HSI RC and the HSE crystal oscillators are disabled. The voltage regulator can also be put either in normal or in low power mode. The device can be woken up from Stop mode by any of the EXTI lines. The EXTI line source can be one of the 16 external lines and RTC. • Standby mode The Standby mode is used to achieve the lowest power consumption. The internal voltage regulator is switched off so that the entire 1.8 V domain is powered off. The PLL, the HSI RC and the HSE crystal oscillators are also switched off. After entering Standby mode, SRAM and register contents are lost except for registers in the RTC domain and Standby circuitry. The device exits Standby mode when an external reset (NRST pin), an IWDG reset, a rising edge on the WKUP pins, or an RTC event occurs. Note: The RTC, the IWDG, and the corresponding clock sources are not stopped by entering Stop or Standby mode. 3.6 Clocks and startup System clock selection is performed on startup, however the internal RC 8 MHz oscillator is selected as default CPU clock on reset. An external 4-32 MHz clock can be selected, in which case it is monitored for failure. If failure is detected, the system automatically switches back to the internal RC oscillator. A software interrupt is generated if enabled. Similarly, full interrupt management of the PLL clock entry is available when necessary (for example on failure of an indirectly used external crystal, resonator or oscillator). Several prescalers allow the application to configure the frequency of the AHB and the APB domains. The maximum frequency of the AHB and the APB domains is 48 MHz. 14/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Functional overview Figure 2. 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(cid:54)(cid:60)(cid:54)(cid:38)(cid:47)(cid:46) (cid:47)(cid:54)(cid:44)(cid:11)(cid:20)(cid:12) (cid:69)(cid:79)(cid:68)(cid:70)(cid:78) (cid:70)(cid:79)(cid:82)(cid:70)(cid:78)(cid:3)(cid:87)(cid:85)(cid:72)(cid:72)(cid:3)(cid:72)(cid:79)(cid:72)(cid:80)(cid:72)(cid:81)(cid:87) (cid:47)(cid:54)(cid:40)(cid:11)(cid:20)(cid:12) (cid:90)(cid:75)(cid:76)(cid:87)(cid:72) (cid:70)(cid:79)(cid:82)(cid:70)(cid:78)(cid:3)(cid:87)(cid:85)(cid:72)(cid:72)(cid:3)(cid:70)(cid:82)(cid:81)(cid:87)(cid:85)(cid:82)(cid:79)(cid:3)(cid:72)(cid:79)(cid:72)(cid:80)(cid:72)(cid:81)(cid:87) (cid:70)(cid:79)(cid:82)(cid:70)(cid:78)(cid:3)(cid:79)(cid:76)(cid:81)(cid:72) (cid:48)(cid:38)(cid:50) (cid:70)(cid:82)(cid:81)(cid:87)(cid:85)(cid:82)(cid:79)(cid:3)(cid:79)(cid:76)(cid:81)(cid:72) (cid:48)(cid:54)(cid:89)(cid:22)(cid:21)(cid:20)(cid:22)(cid:27)(cid:57)(cid:21) 1. Applies to STM32F030x4/x6/xC devices. 2. Applies to STM32F030x8/xC devices. 3. Applies to STM32F030xC devices. 3.7 General-purpose inputs/outputs (GPIOs) Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as input (with or without pull-up or pull-down) or as peripheral alternate function. Most of the GPIO pins are shared with digital or analog alternate functions. DocID024849 Rev 3 15/91 23

Functional overview STM32F030x4/x6/x8/xC The I/O configuration can be locked if needed following a specific sequence in order to avoid spurious writing to the I/Os registers. 3.8 Direct memory access controller (DMA) The 5-channel general-purpose DMA manages memory-to-memory, peripheral-to-memory and memory-to-peripheral transfers. The DMA supports circular buffer management, removing the need for user code intervention when the controller reaches the end of the buffer. Each channel is connected to dedicated hardware DMA requests, with support for software trigger on each channel. Configuration is made by software and transfer sizes between source and destination are independent. The DMA can be used with the main peripherals: SPI, I2C, USART, all TIMx timers (except TIM14) and ADC. 3.9 Interrupts and events 3.9.1 Nested vectored interrupt controller (NVIC) The STM32F0xx family embeds a nested vectored interrupt controller able to handle up to 32 maskable interrupt channels (not including the 16 interrupt lines of Cortex®-M0) and 4 priority levels. • Closely coupled NVIC gives low latency interrupt processing • Interrupt entry vector table address passed directly to the core • Closely coupled NVIC core interface • Allows early processing of interrupts • Processing of late arriving higher priority interrupts • Support for tail-chaining • Processor state automatically saved • Interrupt entry restored on interrupt exit with no instruction overhead This hardware block provides flexible interrupt management features with minimal interrupt latency. 3.9.2 Extended interrupt/event controller (EXTI) The extended interrupt/event controller consists of 32 edge detector lines used to generate interrupt/event requests and wake-up the system. Each line can be independently configured to select the trigger event (rising edge, falling edge, both) and can be masked independently. A pending register maintains the status of the interrupt requests. The EXTI can detect an external line with a pulse width shorter than the internal clock period. Up to 55 GPIOs can be connected to the 16 external interrupt lines. 16/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Functional overview 3.10 Analog to digital converter (ADC) The 12-bit analog to digital converter has up to 16 external and two internal (temperature sensor, voltage reference measurement) channels and performs conversions in single-shot or scan modes. In scan mode, automatic conversion is performed on a selected group of analog inputs. The ADC can be served by the DMA controller. An analog watchdog feature allows very precise monitoring of the converted voltage of one, some or all selected channels. An interrupt is generated when the converted voltage is outside the programmed thresholds. 3.10.1 Temperature sensor The temperature sensor (TS) generates a voltage V that varies linearly with SENSE temperature. The temperature sensor is internally connected to the ADC_IN16 input channel which is used to convert the sensor output voltage into a digital value. The sensor provides good linearity but it has to be calibrated to obtain good overall accuracy of the temperature measurement. As the offset of the temperature sensor varies from chip to chip due to process variation, the uncalibrated internal temperature sensor is suitable for applications that detect temperature changes only. To improve the accuracy of the temperature sensor measurement, each device is individually factory-calibrated by ST. The temperature sensor factory calibration data are stored by ST in the system memory area, accessible in read-only mode. Table 3. Temperature sensor calibration values Calibration value name Description Memory address TS ADC raw data acquired at a TS_CAL1 temperature of 30 °C (± 5 °C), 0x1FFF F7B8 - 0x1FFF F7B9 V = 3.3 V (± 10 mV) DDA 3.10.2 Internal voltage reference (V ) REFINT The internal voltage reference (V ) provides a stable (bandgap) voltage output for the REFINT ADC. V is internally connected to the ADC_IN17 input channel. The precise voltage REFINT of V is individually measured for each part by ST during production test and stored in REFINT the system memory area. It is accessible in read-only mode. Table 4. Internal voltage reference calibration values Calibration value name Description Memory address Raw data acquired at a VREFINT_CAL temperature of 30 °C (± 5 °C), 0x1FFF F7BA - 0x1FFF F7BB V = 3.3 V (± 10 mV) DDA DocID024849 Rev 3 17/91 23

Functional overview STM32F030x4/x6/x8/xC 3.11 Timers and watchdogs The STM32F030x4/x6/x8/xC devices include up to five general-purpose timers, two basic timers and one advanced control timer. Table 5 compares the features of the different timers. Table 5. Timer feature comparison Timer Counter Counter Prescaler DMA request Capture/compare Complementary Timer type resolution type factor generation channels outputs Up, Any integer Advanced TIM1 16-bit down, between 1 Yes 4 3 control up/down and 65536 Up, Any integer TIM3 16-bit down, between 1 Yes 4 - up/down and 65536 Any integer TIM14 16-bit Up between 1 No 1 - General and 65536 purpose Any integer TIM15(1) 16-bit Up between 1 Yes 2 - and 65536 Any integer TIM16, 16-bit Up between 1 Yes 1 1 TIM17 and 65536 Any integer TIM6,(1) Basic 16-bit Up between 1 Yes 0 - TIM7(2) and 65536 1. Available on STM32F030x8 and STM32F030xC devices only. 2. Available on STM32F030xC devices only 3.11.1 Advanced-control timer (TIM1) The advanced-control timer (TIM1) can be seen as a three-phase PWM multiplexed on six channels. It has complementary PWM outputs with programmable inserted dead times. It can also be seen as a complete general-purpose timer. The four independent channels can be used for: • Input capture • Output compare • PWM generation (edge or center-aligned modes) • One-pulse mode output If configured as a standard 16-bit timer, it has the same features as the TIMx timer. If configured as the 16-bit PWM generator, it has full modulation capability (0-100%). The counter can be frozen in debug mode. Many features are shared with those of the standard timers which have the same architecture. The advanced control timer can therefore work together with the other timers via the Timer Link feature for synchronization or event chaining. 18/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Functional overview 3.11.2 General-purpose timers (TIM3, TIM14..17) There are four or five synchronizable general-purpose timers embedded in the STM32F030x4/x6/x8/xC devices (see Table 5 for differences). Each general-purpose timer can be used to generate PWM outputs, or as simple time base. TIM3 STM32F030x4/x6/x8/xC devices feature one synchronizable 4-channel general-purpose timer. TIM3 is based on a 16-bit auto-reload up/downcounter and a 16-bit prescaler. It features four independent channels each for input capture/output compare, PWM or one-pulse mode output. This gives up to 12 input captures/output compares/PWMs on the largest packages. The TIM3 general-purpose timer can work with the TIM1 advanced-control timer via the Timer Link feature for synchronization or event chaining. TIM3 has an independent DMA request generation. This timer is capable of handling quadrature (incremental) encoder signals and the digital outputs from 1 to 3 hall-effect sensors. The counter can be frozen in debug mode. TIM14 This timer is based on a 16-bit auto-reload upcounter and a 16-bit prescaler. TIM14 features one single channel for input capture/output compare, PWM or one-pulse mode output. Its counter can be frozen in debug mode. TIM15, TIM16 and TIM17 These timers are based on a 16-bit auto-reload upcounter and a 16-bit prescaler. TIM15 has two independent channels, whereas TIM16 and TIM17 feature one single channel for input capture/output compare, PWM or one-pulse mode output. The TIM15, TIM16 and TIM17 timers can work together, and TIM15 can also operate withTIM1 via the Timer Link feature for synchronization or event chaining. TIM15 can be synchronized with TIM16 and TIM17. TIM15, TIM16 and TIM17 have a complementary output with dead-time generation and independent DMA request generation. Their counters can be frozen in debug mode. 3.11.3 Basic timers TIM6 and TIM7 These timers can be used as a generic 16-bit time base. 3.11.4 Independent watchdog (IWDG) The independent watchdog is based on an 8-bit prescaler and 12-bit downcounter with user-defined refresh window. It is clocked from an independent 40 kHz internal RC and as it operates independently from the main clock, it can operate in Stop and Standby modes. It DocID024849 Rev 3 19/91 23

Functional overview STM32F030x4/x6/x8/xC can be used either as a watchdog to reset the device when a problem occurs, or as a free running timer for application timeout management. It is hardware or software configurable through the option bytes. The counter can be frozen in debug mode. 3.11.5 System window watchdog (WWDG) The system window watchdog is based on a 7-bit downcounter that can be set as free running. It can be used as a watchdog to reset the device when a problem occurs. It is clocked from the APB clock (PCLK). It has an early warning interrupt capability and the counter can be frozen in debug mode. 3.11.6 SysTick timer This timer is dedicated to real-time operating systems, but could also be used as a standard down counter. It features: • A 24-bit down counter • Autoreload capability • Maskable system interrupt generation when the counter reaches 0 • Programmable clock source (HCLK or HCLK/8) 3.12 Real-time clock (RTC) The RTC is an independent BCD timer/counter. Its main features are the following: • Calendar with subseconds, seconds, minutes, hours (12 or 24 format), week day, date, month, year, in BCD (binary-coded decimal) format. • Automatic correction for 28, 29 (leap year), 30, and 31 day of the month. • Programmable alarm with wake up from Stop and Standby mode capability. • Periodic wakeup unit with programmable resolution and period. • On-the-fly correction from 1 to 32767 RTC clock pulses. This can be used to synchronize the RTC with a master clock. • Digital calibration circuit with 1 ppm resolution, to compensate for quartz crystal inaccuracy. • Tow anti-tamper detection pins with programmable filter. The MCU can be woken up from Stop and Standby modes on tamper event detection. • Timestamp feature which can be used to save the calendar content. This function can be triggered by an event on the timestamp pin, or by a tamper event. The MCU can be woken up from Stop and Standby modes on timestamp event detection. • Reference clock detection: a more precise second source clock (50 or 60 Hz) can be used to enhance the calendar precision. The RTC clock sources can be: • A 32.768 kHz external crystal • A resonator or oscillator • The internal low-power RC oscillator (typical frequency of 40 kHz) • The high-speed external clock divided by 32 20/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Functional overview 2 3.13 Inter-integrated circuit interfaces (I C) Up to two I2C interfaces (I2C1 and I2C2) can operate in multimaster or slave modes. Both can support Standard mode (up to 100 kbit/s) or Fast mode (up to 400 kbit/s). I2C1 also supports Fast Mode Plus (up to 1 Mbit/s), with 20 mA output drive. Both support 7-bit and 10-bit addressing modes, multiple 7-bit slave addresses (two addresses, one with configurable mask). They also include programmable analog and digital noise filters. Table 6. Comparison of I2C analog and digital filters - Analog filter Digital filter Pulse width of Programmable length from 1 to 15 ≥ 50 ns suppressed spikes I2C peripheral clocks 1. Extra filtering capability vs. Benefits Available in Stop mode standard requirements. 2. Stable length Variations depending on Drawbacks - temperature, voltage, process In addition, I2C1 provides hardware support for SMBUS 2.0 and PMBUS 1.1: ARP capability, Host notify protocol, hardware CRC (PEC) generation/verification, timeouts verifications and ALERT protocol management The I2C interfaces can be served by the DMA controller. Refer to Table 7 for the differences between I2C1 and I2C2. Table 7. STM32F030x4/x6/x8/xC I2C implementation(1) I2C features I2C1 I2C2(2) 7-bit addressing mode X X 10-bit addressing mode X X Standard mode (up to 100 kbit/s) X X Fast mode (up to 400 kbit/s) X X Fast Mode Plus (up to 1 Mbit/s), with 20mA output drive I/Os X - Independent clock X - SMBus X - Wakeup from STOP - - 1. X = supported. 2. Only available on STM32F030x8/C devices. 3.14 Universal synchronous/asynchronous receiver/transmitter (USART) The device embeds up to six universal synchronous/asynchronous receivers/transmitters that communicate at speeds of up to 6 Mbit/s. DocID024849 Rev 3 21/91 23

Functional overview STM32F030x4/x6/x8/xC Table 8 gives an overview of features as implemented on the available USART interfaces. All USART interfaces can be served by the DMA controller. Table 8. STM32F0x0 USART implementation(1) STM32F030x4 STM32F030x8 STM32F030xC STM32F030x6 USART modes/ features USART1 USART1 USART1 USART2 USART2 USART4 USART5 USART6 USART3 Hardware flow control X X X X X - - for modem Continuous communication using X X X X X X X DMA Multiprocessor X X X X X X X communication Synchronous mode X X X X X X - Smartcard mode - - - - - - - Single-wire Half-duplex X X X X X X X communication IrDA SIR ENDEC block - - - - - - - LIN mode - - - - - - - Dual clock domain and - - - - - - - wakeup from Stop mode Receiver timeout X X - X - - - interrupt Modbus communication - - - - - - - Auto baud rate detection 2 2 - 4 - - - (supported modes) Driver Enable X X X X X X X USART data length 8 and 9 bits 7, 8 and 9 bits 1. X = supported. 3.15 Serial peripheral interface (SPI) Up to two SPIs are able to communicate up to 18 Mbit/s in slave and master modes in full- duplex and half-duplex communication modes. The 3-bit prescaler gives 8 master mode frequencies and the frame size is configurable from 4 bits to 16 bits. SPI1 and SPI2 are identical and implement the set of features shown in the following table. 22/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Functional overview Table 9. STM32F030x4/x6/x8/xC SPI implementation(1) SPI features SPI1 SPI2(2) Hardware CRC calculation X X Rx/Tx FIFO X X NSS pulse mode X X TI mode X X 1. X = supported. 2. Not available on STM32F030x4/6. 3.16 Serial wire debug port (SW-DP) An ARM SW-DP interface is provided to allow a serial wire debugging tool to be connected to the MCU. DocID024849 Rev 3 23/91 23

Pinouts and pin descriptions STM32F030x4/x6/x8/xC 4 Pinouts and pin descriptions Figure 3. LQFP64 64-pin package pinout (top view), for STM32F030x4/6/8 devices (cid:19) (cid:39)(cid:39) (cid:54)(cid:54) (cid:37)(cid:28) (cid:37)(cid:27) (cid:50)(cid:50)(cid:55) (cid:37)(cid:26) (cid:37)(cid:25)(cid:37)(cid:24) (cid:37)(cid:23)(cid:37)(cid:22) (cid:39)(cid:21)(cid:3)(cid:3) (cid:38)(cid:20)(cid:21) (cid:38)(cid:20)(cid:20) (cid:38)(cid:20)(cid:19) (cid:36)(cid:20)(cid:24) (cid:36)(cid:20)(cid:23) (cid:57) (cid:57) (cid:51) (cid:51) (cid:37) (cid:51) (cid:51)(cid:51) (cid:51)(cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:25)(cid:23)(cid:25)(cid:22)(cid:25)(cid:21)(cid:25)(cid:20)(cid:25)(cid:19)(cid:24)(cid:28)(cid:24)(cid:27)(cid:24)(cid:26)(cid:24)(cid:25)(cid:24)(cid:24)(cid:24)(cid:23)(cid:24)(cid:22)(cid:24)(cid:21)(cid:24)(cid:20)(cid:24)(cid:19)(cid:23)(cid:28) (cid:57)(cid:39)(cid:39) (cid:20) (cid:23)(cid:27) (cid:51)(cid:41)(cid:26) (cid:51)(cid:38)(cid:20)(cid:22) (cid:21) (cid:23)(cid:26) (cid:51)(cid:41)(cid:25) (cid:51)(cid:38)(cid:20)(cid:23)(cid:16)(cid:50)(cid:54)(cid:38)(cid:22)(cid:21)(cid:66)(cid:44)(cid:49) (cid:22) (cid:23)(cid:25) (cid:51)(cid:36)(cid:20)(cid:22) (cid:51)(cid:38)(cid:20)(cid:24)(cid:16)(cid:50)(cid:54)(cid:38)(cid:22)(cid:21)(cid:66)(cid:50)(cid:56)(cid:55) (cid:23) (cid:23)(cid:24) (cid:51)(cid:36)(cid:20)(cid:21) (cid:51)(cid:41)(cid:19)(cid:16)(cid:50)(cid:54)(cid:38)(cid:66)(cid:44)(cid:49) (cid:24) (cid:23)(cid:23) (cid:51)(cid:36)(cid:20)(cid:20) (cid:51)(cid:41)(cid:20)(cid:16)(cid:50)(cid:54)(cid:38)(cid:66)(cid:50)(cid:56)(cid:55) (cid:25)(cid:3) (cid:23)(cid:22) (cid:51)(cid:36)(cid:20)(cid:19) (cid:49)(cid:53)(cid:54)(cid:55) (cid:26)(cid:3) (cid:23)(cid:21) (cid:51)(cid:36)(cid:28) (cid:51)(cid:38)(cid:19) (cid:27)(cid:3) (cid:23)(cid:20) (cid:51)(cid:36)(cid:27) (cid:47)(cid:52)(cid:41)(cid:51)(cid:25)(cid:23) (cid:51)(cid:38)(cid:20) (cid:28)(cid:3) (cid:23)(cid:19) (cid:51)(cid:38)(cid:28) (cid:51)(cid:38)(cid:21) (cid:20)(cid:19) (cid:22)(cid:28) (cid:51)(cid:38)(cid:27) (cid:51)(cid:38)(cid:22) (cid:20)(cid:20) (cid:22)(cid:27) (cid:51)(cid:38)(cid:26) (cid:57)(cid:54)(cid:54)(cid:36) (cid:20)(cid:21) (cid:22)(cid:26) (cid:51)(cid:38)(cid:25) (cid:57)(cid:39)(cid:39)(cid:36) (cid:20)(cid:22) (cid:22)(cid:25) (cid:51)(cid:37)(cid:20)(cid:24) (cid:51)(cid:36)(cid:19) (cid:20)(cid:23) (cid:22)(cid:24) (cid:51)(cid:37)(cid:20)(cid:23) (cid:51)(cid:36)(cid:20) (cid:20)(cid:24) (cid:22)(cid:23) (cid:51)(cid:37)(cid:20)(cid:22) (cid:51)(cid:36)(cid:21) (cid:20)(cid:25) (cid:22)(cid:22) (cid:51)(cid:37)(cid:20)(cid:21) (cid:20)(cid:26)(cid:20)(cid:27)(cid:20)(cid:28)(cid:21)(cid:19)(cid:21)(cid:20)(cid:21)(cid:21)(cid:21)(cid:22)(cid:21)(cid:23)(cid:21)(cid:24)(cid:21)(cid:25)(cid:21)(cid:26)(cid:21)(cid:27)(cid:21)(cid:28)(cid:22)(cid:19)(cid:22)(cid:20)(cid:22)(cid:21) (cid:22) (cid:23)(cid:24) (cid:23) (cid:24) (cid:25) (cid:26) (cid:23) (cid:24) (cid:19) (cid:20) (cid:21) (cid:19) (cid:20) (cid:54)(cid:39) (cid:36) (cid:41)(cid:41) (cid:36) (cid:36) (cid:36) (cid:36) (cid:38) (cid:38) (cid:37) (cid:37) (cid:37) (cid:20) (cid:20) (cid:54)(cid:39) (cid:51) (cid:51)(cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51)(cid:37) (cid:51)(cid:37) (cid:57)(cid:57) (cid:44)(cid:50)(cid:3)(cid:83)(cid:76)(cid:81)(cid:86)(cid:3)(cid:85)(cid:72)(cid:83)(cid:79)(cid:68)(cid:70)(cid:72)(cid:71)(cid:3)(cid:69)(cid:92)(cid:3)(cid:86)(cid:88)(cid:83)(cid:83)(cid:79)(cid:92)(cid:3)(cid:83)(cid:68)(cid:76)(cid:85)(cid:86)(cid:3)(cid:73)(cid:82)(cid:85)(cid:3)(cid:54)(cid:55)(cid:48)(cid:22)(cid:21)(cid:41)(cid:19)(cid:22)(cid:19)(cid:53)(cid:38)(cid:3)(cid:71)(cid:72)(cid:89)(cid:76)(cid:70)(cid:72)(cid:86)(cid:17) (cid:48)(cid:54)(cid:89)(cid:22)(cid:25)(cid:23)(cid:28)(cid:25)(cid:57)(cid:21) Figure 4. LQFP64 64-pin package pinout (top view), for STM32F030RC devices (cid:19) (cid:39)(cid:39) (cid:54)(cid:54) (cid:37)(cid:28) (cid:37)(cid:27) (cid:50)(cid:50)(cid:55) (cid:37)(cid:26) (cid:37)(cid:25)(cid:37)(cid:24) (cid:37)(cid:23)(cid:37)(cid:22) (cid:39)(cid:21)(cid:3)(cid:3) (cid:38)(cid:20)(cid:21) (cid:38)(cid:20)(cid:20) (cid:38)(cid:20)(cid:19) (cid:36)(cid:20)(cid:24) (cid:36)(cid:20)(cid:23) (cid:57) (cid:57) (cid:51) (cid:51) (cid:37) (cid:51) (cid:51)(cid:51) (cid:51)(cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:25)(cid:23)(cid:25)(cid:22)(cid:25)(cid:21)(cid:25)(cid:20)(cid:25)(cid:19)(cid:24)(cid:28)(cid:24)(cid:27)(cid:24)(cid:26)(cid:24)(cid:25)(cid:24)(cid:24)(cid:24)(cid:23)(cid:24)(cid:22)(cid:24)(cid:21)(cid:24)(cid:20)(cid:24)(cid:19)(cid:23)(cid:28) (cid:57)(cid:39)(cid:39) (cid:20) (cid:23)(cid:27) (cid:57)(cid:39)(cid:39) (cid:51)(cid:38)(cid:20)(cid:22) (cid:21) (cid:23)(cid:26) (cid:57)(cid:54)(cid:54) (cid:51)(cid:38)(cid:20)(cid:23)(cid:16)(cid:50)(cid:54)(cid:38)(cid:22)(cid:21)(cid:66)(cid:44)(cid:49) (cid:22) (cid:23)(cid:25) (cid:51)(cid:36)(cid:20)(cid:22) (cid:51)(cid:38)(cid:20)(cid:24)(cid:16)(cid:50)(cid:54)(cid:38)(cid:22)(cid:21)(cid:66)(cid:50)(cid:56)(cid:55) (cid:23) (cid:23)(cid:24) (cid:51)(cid:36)(cid:20)(cid:21) (cid:51)(cid:41)(cid:19)(cid:16)(cid:50)(cid:54)(cid:38)(cid:66)(cid:44)(cid:49) (cid:24) (cid:23)(cid:23) (cid:51)(cid:36)(cid:20)(cid:20) (cid:51)(cid:41)(cid:20)(cid:16)(cid:50)(cid:54)(cid:38)(cid:66)(cid:50)(cid:56)(cid:55) (cid:25)(cid:3) (cid:23)(cid:22) (cid:51)(cid:36)(cid:20)(cid:19) (cid:49)(cid:53)(cid:54)(cid:55) (cid:26)(cid:3) (cid:23)(cid:21) (cid:51)(cid:36)(cid:28) (cid:51)(cid:38)(cid:19) (cid:27)(cid:3) (cid:23)(cid:20) (cid:51)(cid:36)(cid:27) (cid:47)(cid:52)(cid:41)(cid:51)(cid:25)(cid:23) (cid:51)(cid:38)(cid:20) (cid:28)(cid:3) (cid:23)(cid:19) (cid:51)(cid:38)(cid:28) (cid:51)(cid:38)(cid:21) (cid:20)(cid:19) (cid:22)(cid:28) (cid:51)(cid:38)(cid:27) (cid:51)(cid:38)(cid:22) (cid:20)(cid:20) (cid:22)(cid:27) (cid:51)(cid:38)(cid:26) (cid:57)(cid:54)(cid:54)(cid:36) (cid:20)(cid:21) (cid:22)(cid:26) (cid:51)(cid:38)(cid:25) (cid:57)(cid:39)(cid:39)(cid:36) (cid:20)(cid:22) (cid:22)(cid:25) (cid:51)(cid:37)(cid:20)(cid:24) (cid:51)(cid:36)(cid:19) (cid:20)(cid:23) (cid:22)(cid:24) (cid:51)(cid:37)(cid:20)(cid:23) (cid:51)(cid:36)(cid:20) (cid:20)(cid:24) (cid:22)(cid:23) (cid:51)(cid:37)(cid:20)(cid:22) (cid:51)(cid:36)(cid:21) (cid:20)(cid:25) (cid:22)(cid:22) (cid:51)(cid:37)(cid:20)(cid:21) (cid:20)(cid:26)(cid:20)(cid:27)(cid:20)(cid:28)(cid:21)(cid:19)(cid:21)(cid:20)(cid:21)(cid:21)(cid:21)(cid:22)(cid:21)(cid:23)(cid:21)(cid:24)(cid:21)(cid:25)(cid:21)(cid:26)(cid:21)(cid:27)(cid:21)(cid:28)(cid:22)(cid:19)(cid:22)(cid:20)(cid:22)(cid:21) (cid:22) (cid:54)(cid:39) (cid:23) (cid:24) (cid:25) (cid:26) (cid:23) (cid:24) (cid:19) (cid:20) (cid:21) (cid:19) (cid:20) (cid:54)(cid:39) (cid:36) (cid:54)(cid:39) (cid:36) (cid:36) (cid:36) (cid:36) (cid:38) (cid:38) (cid:37) (cid:37) (cid:37) (cid:20) (cid:20) (cid:54)(cid:39) (cid:51) (cid:57)(cid:57) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51)(cid:37) (cid:51)(cid:37) (cid:57)(cid:57) (cid:36)(cid:71)(cid:71)(cid:76)(cid:87)(cid:76)(cid:82)(cid:81)(cid:68)(cid:79)(cid:3)(cid:86)(cid:88)(cid:83)(cid:83)(cid:79)(cid:92)(cid:3)(cid:83)(cid:76)(cid:81)(cid:86)(cid:3)(cid:85)(cid:72)(cid:84)(cid:88)(cid:76)(cid:85)(cid:72)(cid:71)(cid:3)(cid:73)(cid:82)(cid:85)(cid:3)(cid:54)(cid:55)(cid:48)(cid:22)(cid:21)(cid:41)(cid:19)(cid:22)(cid:19)(cid:53)(cid:38)(cid:3)(cid:71)(cid:72)(cid:89)(cid:76)(cid:70)(cid:72)(cid:86)(cid:17) (cid:48)(cid:54)(cid:89)(cid:22)(cid:25)(cid:23)(cid:27)(cid:22)(cid:57)(cid:21) 24/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Pinouts and pin descriptions Figure 5. LQFP48 48-pin package pinout (top view), for STM32F030x4/6/8 devices (cid:19) (cid:55) (cid:39)(cid:39)(cid:54)(cid:54)(cid:37)(cid:28)(cid:37)(cid:27)(cid:50)(cid:50)(cid:37)(cid:26)(cid:37)(cid:25)(cid:37)(cid:24)(cid:37)(cid:23)(cid:37)(cid:22)(cid:36)(cid:20)(cid:24)(cid:36)(cid:20)(cid:23) (cid:57)(cid:57)(cid:51)(cid:51)(cid:37)(cid:51)(cid:51)(cid:51)(cid:51)(cid:51)(cid:51)(cid:51) (cid:1008)(cid:1012)(cid:1008)(cid:1011)(cid:1008)(cid:1010)(cid:1008)(cid:1009) (cid:1008)(cid:1008)(cid:1008)(cid:1007)(cid:1008)(cid:1006)(cid:1008)(cid:1005)(cid:1008)(cid:1004)(cid:1007)(cid:1013)(cid:1007)(cid:1012)(cid:1007)(cid:1011) (cid:57)(cid:39)(cid:39) (cid:1005) (cid:1007)(cid:1010) (cid:51)(cid:41)(cid:26) (cid:51)(cid:38)(cid:20)(cid:22) (cid:1006) (cid:1007)(cid:1009) (cid:51)(cid:41)(cid:25) (cid:51)(cid:38)(cid:20)(cid:23)(cid:16)(cid:50)(cid:54)(cid:38)(cid:22)(cid:21)(cid:66)(cid:44)(cid:49) (cid:1007) (cid:1007)(cid:1008) (cid:51)(cid:36)(cid:20)(cid:22) (cid:51)(cid:38)(cid:20)(cid:24)(cid:16)(cid:50)(cid:54)(cid:38)(cid:22)(cid:21)(cid:66)(cid:50)(cid:56)(cid:55) (cid:1008) (cid:1007)(cid:1007) (cid:51)(cid:36)(cid:20)(cid:21) (cid:51)(cid:41)(cid:19)(cid:16)(cid:50)(cid:54)(cid:38)(cid:66)(cid:44)(cid:49) (cid:1009) (cid:1007)(cid:1006) (cid:51)(cid:36)(cid:20)(cid:20) (cid:51)(cid:41)(cid:20)(cid:16)(cid:50)(cid:54)(cid:38)(cid:66)(cid:50)(cid:56)(cid:55) (cid:1010)(cid:3) (cid:1007)(cid:1005) (cid:51)(cid:36)(cid:20)(cid:19) (cid:47)(cid:52)(cid:41)(cid:51)(cid:23)(cid:27) (cid:49)(cid:53)(cid:54)(cid:55) (cid:1011)(cid:3) (cid:1007)(cid:1004) (cid:51)(cid:36)(cid:28) (cid:57)(cid:54)(cid:54)(cid:36) (cid:1012)(cid:3) (cid:1006)(cid:1013) (cid:51)(cid:36)(cid:27) (cid:57)(cid:39)(cid:39)(cid:36) (cid:1013)(cid:3) (cid:1006)(cid:1012) (cid:51)(cid:37)(cid:20)(cid:24) (cid:51)(cid:36)(cid:19) (cid:1005)(cid:1004) (cid:1006)(cid:1011) (cid:51)(cid:37)(cid:20)(cid:23) (cid:51)(cid:36)(cid:20) (cid:1005)(cid:1005) (cid:1006)(cid:1010) (cid:51)(cid:37)(cid:20)(cid:22) (cid:51)(cid:36)(cid:21) (cid:1005)(cid:1006) (cid:1006)(cid:1009) (cid:51)(cid:37)(cid:20)(cid:21) (cid:1005)(cid:1007) (cid:1005)(cid:1008)(cid:1005)(cid:1009)(cid:1005)(cid:1010) (cid:1005)(cid:1011) (cid:1005)(cid:1012)(cid:1005)(cid:1013) (cid:1006)(cid:1004) (cid:1006)(cid:1005)(cid:1006)(cid:1006) (cid:1006)(cid:1007)(cid:1006)(cid:1008) (cid:22)(cid:23)(cid:24)(cid:25)(cid:26)(cid:19)(cid:20)(cid:21)(cid:19)(cid:20)(cid:54)(cid:39) (cid:51)(cid:36)(cid:51)(cid:36)(cid:51)(cid:36)(cid:51)(cid:36)(cid:51)(cid:36)(cid:51)(cid:37)(cid:51)(cid:37)(cid:51)(cid:37)(cid:51)(cid:37)(cid:20)(cid:51)(cid:37)(cid:20)(cid:57)(cid:54)(cid:57)(cid:39) (cid:44)(cid:50)(cid:3)(cid:83)(cid:76)(cid:81)(cid:86)(cid:3)(cid:85)(cid:72)(cid:83)(cid:79)(cid:68)(cid:70)(cid:72)(cid:71)(cid:3)(cid:69)(cid:92)(cid:3)(cid:86)(cid:88)(cid:83)(cid:83)(cid:79)(cid:92)(cid:3)(cid:83)(cid:68)(cid:76)(cid:85)(cid:86)(cid:3)(cid:73)(cid:82)(cid:85)(cid:3)(cid:54)(cid:55)(cid:48)(cid:22)(cid:21)(cid:41)(cid:19)(cid:22)(cid:19)(cid:38)(cid:38)(cid:3)(cid:71)(cid:72)(cid:89)(cid:76)(cid:70)(cid:72)(cid:86)(cid:17) (cid:48)(cid:54)(cid:89)(cid:22)(cid:25)(cid:23)(cid:28)(cid:26)(cid:57)(cid:21) Figure 6. LQFP48 48-pin package pinout (top view), for STM32F030CC devices (cid:19) (cid:55) (cid:39)(cid:39)(cid:54)(cid:54)(cid:37)(cid:28)(cid:37)(cid:27)(cid:50)(cid:50)(cid:37)(cid:26)(cid:37)(cid:25)(cid:37)(cid:24)(cid:37)(cid:23)(cid:37)(cid:22)(cid:36)(cid:20)(cid:24)(cid:36)(cid:20)(cid:23) (cid:57)(cid:57)(cid:51)(cid:51)(cid:37)(cid:51)(cid:51)(cid:51)(cid:51)(cid:51)(cid:51)(cid:51) (cid:1008)(cid:1012)(cid:1008)(cid:1011)(cid:1008)(cid:1010)(cid:1008)(cid:1009) (cid:1008)(cid:1008)(cid:1008)(cid:1007)(cid:1008)(cid:1006)(cid:1008)(cid:1005)(cid:1008)(cid:1004)(cid:1007)(cid:1013)(cid:1007)(cid:1012)(cid:1007)(cid:1011) (cid:57)(cid:39)(cid:39) (cid:1005) (cid:1007)(cid:1010) (cid:57)(cid:39)(cid:39) (cid:51)(cid:38)(cid:20)(cid:22) (cid:1006) (cid:1007)(cid:1009) (cid:57)(cid:54)(cid:54) (cid:51)(cid:38)(cid:20)(cid:23)(cid:16)(cid:50)(cid:54)(cid:38)(cid:22)(cid:21)(cid:66)(cid:44)(cid:49) (cid:1007) (cid:1007)(cid:1008) (cid:51)(cid:36)(cid:20)(cid:22) (cid:51)(cid:38)(cid:20)(cid:24)(cid:16)(cid:50)(cid:54)(cid:38)(cid:22)(cid:21)(cid:66)(cid:50)(cid:56)(cid:55) (cid:1008) (cid:1007)(cid:1007) (cid:51)(cid:36)(cid:20)(cid:21) (cid:51)(cid:41)(cid:19)(cid:16)(cid:50)(cid:54)(cid:38)(cid:66)(cid:44)(cid:49) (cid:1009) (cid:1007)(cid:1006) (cid:51)(cid:36)(cid:20)(cid:20) (cid:51)(cid:41)(cid:20)(cid:16)(cid:50)(cid:54)(cid:38)(cid:66)(cid:50)(cid:56)(cid:55) (cid:1010)(cid:3) (cid:1007)(cid:1005) (cid:51)(cid:36)(cid:20)(cid:19) (cid:47)(cid:52)(cid:41)(cid:51)(cid:23)(cid:27) (cid:49)(cid:53)(cid:54)(cid:55) (cid:1011)(cid:3) (cid:1007)(cid:1004) (cid:51)(cid:36)(cid:28) (cid:57)(cid:54)(cid:54)(cid:36) (cid:1012)(cid:3) (cid:1006)(cid:1013) (cid:51)(cid:36)(cid:27) (cid:57)(cid:39)(cid:39)(cid:36) (cid:1013)(cid:3) (cid:1006)(cid:1012) (cid:51)(cid:37)(cid:20)(cid:24) (cid:51)(cid:36)(cid:19) (cid:1005)(cid:1004) (cid:1006)(cid:1011) (cid:51)(cid:37)(cid:20)(cid:23) (cid:51)(cid:36)(cid:20) (cid:1005)(cid:1005) (cid:1006)(cid:1010) (cid:51)(cid:37)(cid:20)(cid:22) (cid:51)(cid:36)(cid:21) (cid:1005)(cid:1006) (cid:1006)(cid:1009) (cid:51)(cid:37)(cid:20)(cid:21) (cid:1005)(cid:1007) (cid:1005)(cid:1008)(cid:1005)(cid:1009)(cid:1005)(cid:1010) (cid:1005)(cid:1011) (cid:1005)(cid:1012)(cid:1005)(cid:1013) (cid:1006)(cid:1004) (cid:1006)(cid:1005)(cid:1006)(cid:1006) (cid:1006)(cid:1007)(cid:1006)(cid:1008) (cid:22)(cid:23)(cid:24)(cid:25)(cid:26)(cid:19)(cid:20)(cid:21)(cid:19)(cid:20)(cid:54)(cid:39) (cid:51)(cid:36)(cid:51)(cid:36)(cid:51)(cid:36)(cid:51)(cid:36)(cid:51)(cid:36)(cid:51)(cid:37)(cid:51)(cid:37)(cid:51)(cid:37)(cid:51)(cid:37)(cid:20)(cid:51)(cid:37)(cid:20)(cid:57)(cid:54)(cid:57)(cid:39) (cid:36)(cid:71)(cid:71)(cid:76)(cid:87)(cid:76)(cid:82)(cid:81)(cid:68)(cid:79)(cid:3)(cid:86)(cid:88)(cid:83)(cid:83)(cid:79)(cid:92)(cid:3)(cid:83)(cid:76)(cid:81)(cid:86)(cid:3)(cid:85)(cid:72)(cid:84)(cid:88)(cid:76)(cid:85)(cid:72)(cid:71)(cid:3)(cid:73)(cid:82)(cid:85)(cid:3)(cid:54)(cid:55)(cid:48)(cid:22)(cid:21)(cid:41)(cid:19)(cid:22)(cid:19)(cid:38)(cid:38)(cid:3)(cid:71)(cid:72)(cid:89)(cid:76)(cid:70)(cid:72)(cid:86)(cid:17) (cid:48)(cid:54)(cid:89)(cid:22)(cid:25)(cid:23)(cid:27)(cid:23)(cid:57)(cid:21) DocID024849 Rev 3 25/91 32

Pinouts and pin descriptions STM32F030x4/x6/x8/xC Figure 7. LQFP32 32-pin package pinout (top view) (cid:19) (cid:55) (cid:54)(cid:54) (cid:50)(cid:50) (cid:37)(cid:26) (cid:37)(cid:25) (cid:37)(cid:24) (cid:37)(cid:23) (cid:37)(cid:22) (cid:36)(cid:20)(cid:24) (cid:57) (cid:37) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:51) (cid:22)(cid:21) (cid:22)(cid:20) (cid:22)(cid:19) (cid:21)(cid:28) (cid:21)(cid:27)(cid:21)(cid:26) (cid:21)(cid:25) (cid:21)(cid:24) (cid:57)(cid:39)(cid:39) (cid:20) (cid:21)(cid:23) (cid:51)(cid:36)(cid:20)(cid:23) (cid:51)(cid:41)(cid:19)(cid:16)(cid:50)(cid:54)(cid:38)(cid:66)(cid:44)(cid:49) (cid:21) (cid:21)(cid:22) (cid:51)(cid:36)(cid:20)(cid:22) (cid:51)(cid:41)(cid:20)(cid:16)(cid:50)(cid:54)(cid:38)(cid:66)(cid:50)(cid:56)(cid:55) (cid:22) (cid:21)(cid:21) (cid:51)(cid:36)(cid:20)(cid:21) (cid:49)(cid:53)(cid:54)(cid:55) (cid:23) (cid:47)(cid:52)(cid:41)(cid:51)(cid:22)(cid:21) (cid:21)(cid:20) (cid:51)(cid:36)(cid:20)(cid:20) (cid:57)(cid:39)(cid:39)(cid:36) (cid:24) (cid:21)(cid:19) (cid:51)(cid:36)(cid:20)(cid:19) (cid:51)(cid:36)(cid:19) (cid:25)(cid:3) (cid:20)(cid:28) (cid:51)(cid:36)(cid:28) (cid:51)(cid:36)(cid:20) (cid:26)(cid:3) (cid:20)(cid:27) (cid:51)(cid:36)(cid:27) (cid:51)(cid:36)(cid:21) (cid:27) (cid:20)(cid:26) (cid:57)(cid:39)(cid:39) (cid:28) (cid:20)(cid:19) (cid:20)(cid:20) (cid:20)(cid:21) (cid:20)(cid:22) (cid:20)(cid:23) (cid:20)(cid:24) (cid:20)(cid:25) (cid:51)(cid:36)(cid:22) (cid:51)(cid:36)(cid:23) (cid:51)(cid:36)(cid:24) (cid:51)(cid:36)(cid:25) (cid:51)(cid:36)(cid:26) (cid:51)(cid:37)(cid:19) (cid:51)(cid:37)(cid:20) (cid:57)(cid:54)(cid:54) (cid:48)(cid:54)(cid:22)(cid:21)(cid:20)(cid:23)(cid:23)(cid:57)(cid:20) Figure 8. TSSOP20 20-pin package pinout (top view) (cid:37)(cid:50)(cid:50)(cid:55)(cid:19) (cid:20) (cid:21)(cid:19) (cid:51)(cid:36)(cid:20)(cid:23) (cid:51)(cid:41)(cid:19)(cid:16)(cid:50)(cid:54)(cid:38)(cid:66)(cid:44)(cid:49) (cid:21) (cid:20)(cid:28) (cid:51)(cid:36)(cid:20)(cid:22) (cid:51)(cid:41)(cid:20)(cid:16)(cid:50)(cid:54)(cid:38)(cid:66)(cid:50)(cid:56)(cid:55) (cid:22) (cid:20)(cid:27) (cid:51)(cid:36)(cid:20)(cid:19) (cid:49)(cid:53)(cid:54)(cid:55) (cid:23) (cid:20)(cid:26) (cid:51)(cid:36)(cid:28) (cid:57)(cid:39)(cid:39)(cid:36) (cid:24) (cid:20)(cid:25) (cid:57)(cid:39)(cid:39) (cid:51)(cid:36)(cid:19) (cid:25) (cid:20)(cid:24) (cid:57)(cid:54)(cid:54) (cid:51)(cid:36)(cid:20) (cid:26) (cid:20)(cid:23) (cid:51)(cid:37)(cid:20) (cid:51)(cid:36)(cid:21) (cid:27) (cid:20)(cid:22) (cid:51)(cid:36)(cid:26) (cid:51)(cid:36)(cid:22) (cid:28) (cid:20)(cid:21) (cid:51)(cid:36)(cid:25) (cid:51)(cid:36)(cid:23) (cid:20)(cid:19) (cid:20)(cid:20) (cid:51)(cid:36)(cid:24) (cid:48)(cid:54)(cid:89)(cid:22)(cid:25)(cid:23)(cid:26)(cid:22)(cid:57)(cid:20) 26/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Pinouts and pin descriptions Table 10. Legend/abbreviations used in the pinout table Name Abbreviation Definition Unless otherwise specified in brackets below the pin name, the pin function during and Pin name after reset is the same as the actual pin name S Supply pin Pin type I Input only pin I/O Input / output pin FT 5 V tolerant I/O FTf 5 V tolerant I/O, FM+ capable TTa 3.3 V tolerant I/O directly connected to ADC I/O structure TC Standard 3.3 V I/O B Dedicated BOOT0 pin RST Bidirectional reset pin with embedded weak pull-up resistor Unless otherwise specified by a note, all I/Os are set as floating inputs during and after Notes reset. Alternate Functions selected through GPIOx_AFR registers Pin functions functions Additional Functions directly selected/enabled through peripheral registers functions Table 11. STM32F030x4/6/8/C pin definitions Pin number Pin functions e r QFP64 QFP48 QFP32 SOP20 (fuPnicrnet isnoeantm )aeft er Pin type O structu Notes Alternate functions Additional functions L L L TS I/ 1 1 - - VDD S - - Complementary power supply RTC_TAMP1, RTC_TS, 2 2 - - PC13 I/O TC (1) - RTC_OUT, WKUP2 PC14-OSC32_IN 3 3 - - I/O TC (1) - OSC32_IN (PC14) PC15-OSC32_OUT 4 4 - - I/O TC (1) - OSC32_OUT (PC15) PF0-OSC_IN 5 5 2 2 I/O FT - I2C1_SDA(5) OSC_IN (PF0) PF1-OSC_OUT 6 6 3 3 I/O FT - I2C1_SCL(5) OSC_OUT (PF1) Device reset input / internal reset output 7 7 4 4 NRST I/O RST - (active low) DocID024849 Rev 3 27/91 32

Pinouts and pin descriptions STM32F030x4/x6/x8/xC Table 11. STM32F030x4/6/8/C pin definitions (continued) Pin number Pin functions e r QFP64 QFP48 QFP32 SOP20 (fuPnicrnet isnoeantm )aeft er Pin type O structu Notes Alternate functions Additional functions L L L TS I/ EVENTOUT, 8 - - - PC0 I/O TTa - ADC_IN10 USART6_TX(5) EVENTOUT, 9 - - - PC1 I/O TTa - ADC_IN11 USART6_RX(5) SPI2_MISO(5), 10 - - - PC2 I/O TTa - ADC_IN12 EVENTOUT SPI2_MOSI(5), 11 - - - PC3 I/O TTa - ADC_IN13 EVENTOUT 12 8 - - VSSA S - - Analog ground 13 9 5 5 VDDA S - - Analog power supply USART1_CTS(2), ADC_IN0, 14 10 6 6 PA0 I/O TTa - USART2_CTS(3)(5), RTC_TAMP2, USART4_TX(5) WKUP1 USART1_RTS(2), USART2_RTS(3)(5), 15 11 7 7 PA1 I/O TTa - ADC_IN1 EVENTOUT, USART4_RX(5) USART1_TX(2), 16 12 8 8 PA2 I/O TTa - USART2_TX(3)(5), ADC_IN2, WKPU4(5) TIM15_CH1(3)(5) USART1_RX(2), 17 13 9 9 PA3 I/O TTa - USART2_RX(3)(5), ADC_IN3 TIM15_CH2(3)(5) 18(4) - - - PF4 I/O FT (4) EVENTOUT - 18(5) - - - VSS S - (5) Ground 19(4) - - - PF5 I/O FT (4) EVENTOUT - 19(5) - - - VDD - - (5) Complementary power supply SPI1_NSS, USART1_CK(2) 20 14 10 10 PA4 I/O TTa - USART2_CK(3)(5), ADC_IN4 TIM14_CH1, USART6_TX(5) SPI1_SCK, 21 15 11 11 PA5 I/O TTa - ADC_IN5 USART6_RX(5) 28/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Pinouts and pin descriptions Table 11. STM32F030x4/6/8/C pin definitions (continued) Pin number Pin functions e r QFP64 QFP48 QFP32 SOP20 (fuPnicrnet isnoeantm )aeft er Pin type O structu Notes Alternate functions Additional functions L L L TS I/ SPI1_MISO, TIM3_CH1, TIM1_BKIN, 22 16 12 12 PA6 I/O TTa - ADC_IN6 TIM16_CH1, EVENTOUT USART3_CTS(5) SPI1_MOSI, TIM3_CH2, TIM14_CH1, 23 17 13 13 PA7 I/O TTa - ADC_IN7 TIM1_CH1N, TIM17_CH1, EVENTOUT EVENTOUT, 24 - - - PC4 I/O TTa - ADC_IN14 USART3_TX(5) 25 - - - PC5 I/O TTa - USART3_RX(5) ADC_IN15, WKPU5(5) TIM3_CH3, TIM1_CH2N, 26 18 14 - PB0 I/O TTa - ADC_IN8 EVENTOUT, USART3_CK(5) TIM3_CH4, TIM14_CH1, 27 19 15 14 PB1 I/O TTa - ADC_IN9 TIM1_CH3N, USART3_RTS(5) 28 20 - - PB2 I/O FT (6) - - SPI2_SCK(5), I2C1_SCL(2), 29 21 - - PB10 I/O FT - - I2C2_SCL(3)(5), USART3_TX(5) I2C1_SDA(2), I2C2_SDA(3)(5), 30 22 - - PB11 I/O FT - - EVENTOUT, USART3_RX(5) 31 23 16 - VSS S - - Ground 32 24 17 16 VDD S - - Digital power supply SPI1_NSS(2), SPI2_NSS(3)(5), 33 25 - - PB12 I/O FT - TIM1_BKIN, - EVENTOUT, USART3_CK(5) DocID024849 Rev 3 29/91 32

Pinouts and pin descriptions STM32F030x4/x6/x8/xC Table 11. STM32F030x4/6/8/C pin definitions (continued) Pin number Pin functions e r QFP64 QFP48 QFP32 SOP20 (fuPnicrnet isnoeantm )aeft er Pin type O structu Notes Alternate functions Additional functions L L L TS I/ SPI1_SCK(2), SPI2_SCK(3)(5), 34 26 - - PB13 I/O FT - I2C2_SCL(5), - TIM1_CH1N, USART3_CTS(5) SPI1_MISO(2), SPI2_MISO(3)(5), I2C2_SDA(5), 35 27 - - PB14 I/O FT - - TIM1_CH2N, TIM15_CH1(3)(5), USART3_RTS(5) SPI1_MOSI(2), SPI2_MOSI(3)(5), RTC_REFIN, 36 28 - - PB15 I/O FT - TIM1_CH3N, WKPU7(5) TIM15_CH1N(3)(5), TIM15_CH2(3)(5) 37 - - - PC6 I/O FT - TIM3_CH1 - 38 - - - PC7 I/O FT - TIM3_CH2 - 39 - - - PC8 I/O FT - TIM3_CH3 - 40 - - - PC9 I/O FT - TIM3_CH4 - USART1_CK, TIM1_CH1, 41 29 18 - PA8 I/O FT - - EVENTOUT, MCO USART1_TX, TIM1_CH2, 42 30 19 17 PA9 I/O FT - - TIM15_BKIN(3)(5) I2C1_SCL(2)(5) USART1_RX, TIM1_CH3, 43 31 20 18 PA10 I/O FT - - TIM17_BKIN I2C1_SDA(2)(5) USART1_CTS, TIM1_CH4, 44 32 21 - PA11 I/O FT - - EVENTOUT, I2C2_SCL(5) USART1_RTS, TIM1_ETR, 45 33 22 - PA12 I/O FT - - EVENTOUT, I2C2_SDA(5) 30/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Pinouts and pin descriptions Table 11. STM32F030x4/6/8/C pin definitions (continued) Pin number Pin functions e r QFP64 QFP48 QFP32 SOP20 (fuPnicrnet isnoeantm )aeft er Pin type O structu Notes Alternate functions Additional functions L L L TS I/ PA13 IR_OUT, 46 34 23 19 I/O FT (7) - (SWDIO) SWDIO I2C1_SCL(2), 47(4) 35(4) - - PF6 I/O FT (4) - I2C2_SCL(3) 47(5) 35(5) - - VSS S - (5) Ground I2C1_SDA(2), 48(4) 36(4) - - PF7 I/O FT (4) - I2C2_SDA(3) 48(5) 36(5) - - VDD S - (5) Complementary power supply USART1_TX(2), PA14 49 37 24 20 I/O FT (7) USART2_TX(3)(5), - (SWCLK) SWCLK SPI1_NSS, USART1_RX(2), 50 38 25 - PA15 I/O FT - USART2_RX(3)(5), - USART4_RTS(5), EVENTOUT USART3_TX(5), 51 - - - PC10 I/O FT - - USART4_TX(5) USART3_RX(5), 52 - - - PC11 I/O FT - - USART4_RX(5) USART3_CK(5), 53 - - - PC12 I/O FT - USART4_CK(5), - USART5_TX(5) TIM3_ETR, 54 - - - PD2 I/O FT - USART3_RTS(5), - USART5_RX(5) SPI1_SCK, 55 39 26 - PB3 I/O FT - EVENTOUT, - USART5_TX(5) SPI1_MISO, TIM3_CH1, 56 40 27 - PB4 I/O FT - EVENTOUT, - TIM17_BKIN(5), USART5_RX(5) SPI1_MOSI, I2C1_SMBA, 57 41 28 - PB5 I/O FT - TIM16_BKIN, WKPU6(5) TIM3_CH2, USART5_CK_RTS(5) DocID024849 Rev 3 31/91 32

Pinouts and pin descriptions STM32F030x4/x6/x8/xC Table 11. STM32F030x4/6/8/C pin definitions (continued) Pin number Pin functions e r QFP64 QFP48 QFP32 SOP20 (fuPnicrnet isnoeantm )aeft er Pin type O structu Notes Alternate functions Additional functions L L L TS I/ I2C1_SCL, 58 42 29 - PB6 I/O FTf - USART1_TX, - TIM16_CH1N I2C1_SDA, USART1_RX, 59 43 30 - PB7 I/O FTf - - TIM17_CH1N, USART4_CTS(5) 60 44 31 1 BOOT0 I B - Boot memory selection I2C1_SCL, 61 45 - - PB8 I/O FTf (6) - TIM16_CH1 I2C1_SDA, IR_OUT, 62 46 - - PB9 I/O FTf - SPI2_NSS(5), - TIM17_CH1, EVENTOUT 63 47 32 15 VSS S - - Ground 64 48 1 16 VDD S - - Digital power supply 1. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current (3 mA), the use of GPIOs PC13 to PC15 in output mode is limited: - The speed should not exceed 2 MHz with a maximum load of 30 pF. - These GPIOs must not be used as current sources (e.g. to drive an LED). 2. This feature is available on STM32F030x6 and STM32F030x4 devices only. 3. This feature is available on STM32F030x8 devices only. 4. For STM32F030x4/6/8 devices only. 5. For STM32F030xC devices only. 6. On LQFP32 package, PB2 and PB8 should be treated as unconnected pins (even when they are not available on the package, they are not forced to a defined level by hardware). 7. After reset, these pins are configured as SWDIO and SWCLK alternate functions, and the internal pull-up on SWDIO pin and internal pull-down on SWCLK pin are activated. 32/91 DocID024849 Rev 3

S T M Table 12. Alternate functions selected through GPIOA_AFR registers for port A 3 2 F Pin name AF0 AF1 AF2 AF3 AF4 AF5 AF6 03 0 x USART1_CTS(2) 4 /x PA0 - - - USART4_TX(1) - - 6 USART2_CTS(1)(3) /x8 /x C USART1_RTS(2) PA1 EVENTOUT - - USART4_RX(1) TIM15_CH1N(1) - USART2_RTS(1)(3) USART1_TX(2) PA2 TIM15_CH1(1)(3) - - - - - USART2_TX(1)(3) D oc USART1_RX(2) ID PA3 TIM15_CH2(1)(3) - - - - - 0 2 USART2_RX(1)(3) 4 8 4 9 R USART1_CK(2) e PA4 SPI1_NSS - - TIM14_CH1 USART6_TX(1) - v 3 USART2_CK(1)(3) PA5 SPI1_SCK - - - - USART6_RX(1) - PA6 SPI1_MISO TIM3_CH1 TIM1_BKIN - USART3_CTS(1) TIM16_CH1 EVENTOUT PA7 SPI1_MOSI TIM3_CH2 TIM1_CH1N - TIM14_CH1 TIM17_CH1 EVENTOUT PA8 MCO USART1_CK TIM1_CH1 EVENTOUT - - - PA9 TIM15_BKIN(1)(3) USART1_TX TIM1_CH2 - I2C1_SCL(1)(2) MCO(1) - PA10 TIM17_BKIN USART1_RX TIM1_CH3 - I2C1_SDA(1)(2) - - PA11 EVENTOUT USART1_CTS TIM1_CH4 - - SCL - 3 3 /9 1

3 Table 12. Alternate functions selected through GPIOA_AFR registers for port A (continued) 4 /9 1 Pin name AF0 AF1 AF2 AF3 AF4 AF5 AF6 PA12 EVENTOUT USART1_RTS TIM1_ETR - - SDA - PA13 SWDIO IR_OUT - - - - - USART1_TX(2) PA14 SWCLK - - - - - USART2_TX(1)(3) USART1_RX(2) PA15 SPI1_NSS - EVENTOUT USART4_RTS(1) - - USART2_RX(1)(3) 1. This feature is available on STM32F030xC devices. 2. This feature is available on STM32F030x4 and STM32F030x6 devices. D o c 3. This feature is available on STM32F030x8 devices. ID 0 2 4 8 Table 13. Alternate functions selected through GPIOB_AFR registers for port B 4 9 R Pin name AF0 AF1 AF2 AF3 AF4 AF5 e v 3 PB0 EVENTOUT TIM3_CH3 TIM1_CH2N - USART3_CK(1) - PB1 TIM14_CH1 TIM3_CH4 TIM1_CH3N - USART3_RTS(1) - PB2 - - - - - - PB3 SPI1_SCK EVENTOUT - - USART5_TX(1) - S PB4 SPI1_MISO TIM3_CH1 EVENTOUT - USART5_RX(1) TIM17_BKIN(1) T M 3 2 PB5 SPI1_MOSI TIM3_CH2 TIM16_BKIN I2C1_SMBA USART5_CK_RTS(1) - F 0 3 0 PB6 USART1_TX I2C1_SCL TIM16_CH1N - - - x 4 /x PB7 USART1_RX I2C1_SDA TIM17_CH1N - USART4_CTS(1) - 6/x 8 /x C

Table 13. Alternate functions selected through GPIOB_AFR registers for port B (continued) S T M Pin name AF0 AF1 AF2 AF3 AF4 AF5 3 2 F PB8 - I2C1_SCL TIM16_CH1 - - - 0 3 0 x PB9 IR_OUT I2C1_SDA TIM17_CH1 EVENTOUT - SPI2_NSS(1) 4 /x 6 I2C1_SCL(2) USART3_TX(1) SPI2_SCK(1) /x 8 PB10 - - - /x I2C2_SCL(1)(3) USART3_RX(1) - C I2C1_SDA(2) PB11 EVENTOUT - - USART3_RX(1) - I2C2_SDA(1)(3) SPI1_NSS(2) PB12 EVENTOUT TIM1_BKIN - USART3_RTS(1) TIM15(1) D o SPI2_NSS(1)(3) c ID 0 2 SPI1_SCK(2) 4 8 PB13 - TIM1_CH1N - USART3_CTS((1) I2C2_SCL(1) 4 9 R SPI2_SCK(1)(3) e v 3 SPI1_MISO(2) PB14 TIM15_CH1(1)(3) TIM1_CH2N - USART3_RTS(1) I2C2_SDA(1) SPI2_MISO(1)(3) SPI1_MOSI(2) PB15 TIM15_CH2(1)(3) TIM1_CH3N TIM15_CH1N(1)(3) - - SPI2_MOSI(1)(3) 1. This feature is available on STM32F030xC devices. 2. This feature is available on STM32F030x4 and STM32F030x6 devices. 3. This feature is available on STM32F030x8 devices. 3 5 /9 1

STM32F030x4/x6/x8/xC Table 14. Alternate functions selected through GPIOC_AFR registers for port C Pin name AF0 AF1(1) AF2(1) PC0 EVENTOUT - USART6_TX PC1 EVENTOUT - USART6_RX PC2 EVENTOUT SPI2_MISO - PC3 EVENTOUT SPI2_MOSI - PC4 EVENTOUT USART3_TX - PC5 - USART3_RX - PC6 TIM3_CH1 - - PC7 TIM3_CH2 - - PC8 TIM3_CH3 - - PC9 TIM3_CH4 - - PC10 USART4_TX(1) USART3_TX - PC11 USART4_RX(1) USART3_RX - PC12 USART4_CK(1) USART3_CK USART5_TX PC13 - - - PC14 - - - PC15 - - - 1. Available on STM32F030xC devices only. Table 15. Alternate functions selected through GPIOD_AFR registers for port D Pin name AF0 AF1(1) AF2(1) PD2 TIM3_ETR USART3_RTS USART5_RX 1. Available on STM32F030xC devices only. Table 16. Alternate functions selected through GPIOF_AFR registers for port F Pin name AF0 AF1(1) PF0 - I2C1_SDA PF1 - I2C1_SCL 1. Available on STM32F030xC devices only. 36/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Memory mapping 5 Memory mapping Figure 9. STM32F030x4/x6/x8/xC memory map (cid:19)(cid:91)(cid:41)(cid:41)(cid:41)(cid:41)(cid:3)(cid:41)(cid:41)(cid:41)(cid:41) (cid:19)(cid:91)(cid:23)(cid:27)(cid:19)(cid:19)(cid:3)(cid:20)(cid:26)(cid:41)(cid:41) (cid:53)(cid:72)(cid:86)(cid:72)(cid:85)(cid:89)(cid:72)(cid:71) (cid:36)(cid:43)(cid:37)(cid:21) (cid:26) (cid:19)(cid:91)(cid:23)(cid:27)(cid:19)(cid:19)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19) (cid:19)(cid:91)(cid:40)(cid:19)(cid:20)(cid:19)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19) (cid:38)(cid:82)(cid:85)(cid:87)(cid:72)(cid:91)(cid:16)(cid:48)(cid:19)(cid:3)(cid:76)(cid:81)(cid:87)(cid:72)(cid:85)(cid:81)(cid:68)(cid:79)(cid:3) (cid:19)(cid:91)(cid:40)(cid:19)(cid:19)(cid:19)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19) (cid:83)(cid:72)(cid:85)(cid:76)(cid:83)(cid:75)(cid:72)(cid:85)(cid:68)(cid:79)(cid:86) (cid:53)(cid:72)(cid:86)(cid:72)(cid:85)(cid:89)(cid:72)(cid:71) (cid:25) (cid:53)(cid:72)(cid:86)(cid:72)(cid:85)(cid:89)(cid:72)(cid:71) (cid:19)(cid:91)(cid:38)(cid:19)(cid:19)(cid:19)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19) (cid:19)(cid:91)(cid:23)(cid:19)(cid:19)(cid:21)(cid:3)(cid:23)(cid:22)(cid:41)(cid:41) (cid:36)(cid:43)(cid:37)(cid:20) (cid:24) (cid:53)(cid:72)(cid:86)(cid:72)(cid:85)(cid:89)(cid:72)(cid:71) (cid:19)(cid:91)(cid:23)(cid:19)(cid:19)(cid:21)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19) (cid:53)(cid:72)(cid:86)(cid:72)(cid:85)(cid:89)(cid:72)(cid:71) (cid:19)(cid:91)(cid:36)(cid:19)(cid:19)(cid:19)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19) (cid:19)(cid:91)(cid:23)(cid:19)(cid:19)(cid:20)(cid:3)(cid:27)(cid:19)(cid:19)(cid:19) (cid:23) (cid:53)(cid:72)(cid:86)(cid:72)(cid:85)(cid:89)(cid:72)(cid:71) (cid:19)(cid:91)(cid:20)(cid:41)(cid:41)(cid:41)(cid:3)(cid:41)(cid:41)(cid:41)(cid:41) (cid:36)(cid:51)(cid:37) (cid:53)(cid:72)(cid:86)(cid:72)(cid:85)(cid:89)(cid:72)(cid:71) (cid:19)(cid:91)(cid:20)(cid:41)(cid:41)(cid:41)(cid:3)(cid:41)(cid:38)(cid:19)(cid:19) (cid:19)(cid:91)(cid:23)(cid:19)(cid:19)(cid:20)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19) (cid:50)(cid:83)(cid:87)(cid:76)(cid:82)(cid:81)(cid:3)(cid:37)(cid:92)(cid:87)(cid:72)(cid:86) (cid:19)(cid:91)(cid:27)(cid:19)(cid:19)(cid:19)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19) (cid:19)(cid:91)(cid:20)(cid:41)(cid:41)(cid:41)(cid:3)(cid:41)(cid:27)(cid:19)(cid:19) (cid:53)(cid:72)(cid:86)(cid:72)(cid:85)(cid:89)(cid:72)(cid:71) (cid:54)(cid:92)(cid:86)(cid:87)(cid:72)(cid:80)(cid:3)(cid:80)(cid:72)(cid:80)(cid:82)(cid:85)(cid:92) (cid:19)(cid:91)(cid:23)(cid:19)(cid:19)(cid:19)(cid:3)(cid:27)(cid:19)(cid:19)(cid:19) (cid:22) (cid:53)(cid:72)(cid:86)(cid:72)(cid:85)(cid:89)(cid:72)(cid:71) (cid:19)(cid:91)(cid:20)(cid:41)(cid:41)(cid:41)(cid:3)(cid:91)(cid:91)(cid:19)(cid:19)(cid:11)(cid:20)(cid:12) (cid:36)(cid:51)(cid:37) (cid:19)(cid:91)(cid:25)(cid:19)(cid:19)(cid:19)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19) (cid:19)(cid:91)(cid:23)(cid:19)(cid:19)(cid:19)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19) (cid:53)(cid:72)(cid:86)(cid:72)(cid:85)(cid:89)(cid:72)(cid:71) (cid:21) (cid:53)(cid:72)(cid:86)(cid:72)(cid:85)(cid:89)(cid:72)(cid:71) (cid:19)(cid:91)(cid:23)(cid:19)(cid:19)(cid:19)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19) (cid:51)(cid:72)(cid:85)(cid:76)(cid:83)(cid:75)(cid:72)(cid:85)(cid:68)(cid:79)(cid:86) (cid:19)(cid:91)(cid:19)(cid:27)(cid:19)(cid:23)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19) (cid:53)(cid:72)(cid:86)(cid:72)(cid:85)(cid:89)(cid:72)(cid:71) (cid:20) (cid:41)(cid:79)(cid:68)(cid:86)(cid:75)(cid:3)(cid:80)(cid:72)(cid:80)(cid:82)(cid:85)(cid:92) (cid:19)(cid:91)(cid:21)(cid:19)(cid:19)(cid:19)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19) (cid:54)(cid:53)(cid:36)(cid:48) (cid:19)(cid:91)(cid:19)(cid:27)(cid:19)(cid:19)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19) (cid:53)(cid:72)(cid:86)(cid:72)(cid:85)(cid:89)(cid:72)(cid:71) (cid:19) (cid:38)(cid:50)(cid:39)(cid:40) (cid:19)(cid:91)(cid:19)(cid:19)(cid:19)(cid:23)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19) (cid:41)(cid:79)(cid:68)(cid:86)(cid:75)(cid:15)(cid:3)(cid:86)(cid:92)(cid:86)(cid:87)(cid:72)(cid:80)(cid:3) (cid:80)(cid:72)(cid:80)(cid:82)(cid:85)(cid:92)(cid:3)(cid:82)(cid:85)(cid:3)(cid:54)(cid:53)(cid:36)(cid:48)(cid:15)(cid:3) (cid:19)(cid:91)(cid:19)(cid:19)(cid:19)(cid:19)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19) (cid:71)(cid:72)(cid:83)(cid:72)(cid:81)(cid:71)(cid:76)(cid:81)(cid:74)(cid:3)(cid:82)(cid:81)(cid:3)(cid:37)(cid:50)(cid:50)(cid:55)(cid:3) (cid:70)(cid:82)(cid:81)(cid:73)(cid:76)(cid:74)(cid:88)(cid:85)(cid:68)(cid:87)(cid:76)(cid:82)(cid:81) (cid:19)(cid:91)(cid:19)(cid:19)(cid:19)(cid:19)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19) (cid:48)(cid:54)(cid:89)(cid:22)(cid:25)(cid:23)(cid:26)(cid:23)(cid:57)(cid:21) 1. The start address of the system memory is 0x1FFF EC00 for STM32F030x4, STM32F030x6 and STM32F030x8 devices, and 0x1FFF D800 for STM32F030xC devices. DocID024849 Rev 3 37/91 39

Memory mapping STM32F030x4/x6/x8/xC Table 17. STM32F030x4/x6/x8/xC peripheral register boundary addresses Bus Boundary address Size Peripheral - 0x4800 1800 - 0x5FFF FFFF ~384 MB Reserved 0x4800 1400 - 0x4800 17FF 1 KB GPIOF 0x4800 1000 - 0x4800 13FF 1 KB Reserved 0x4800 0C00 - 0x4800 0FFF 1 KB GPIOD AHB2 0x4800 0800 - 0x4800 0BFF 1 KB GPIOC 0x4800 0400 - 0x4800 07FF 1 KB GPIOB 0x4800 0000 - 0x4800 03FF 1 KB GPIOA - 0x4002 4400 - 0x47FF FFFF ~128 MB Reserved 0x4002 3400 - 0x4002 43FF 4 KB Reserved 0x4002 3000 - 0x4002 33FF 1 KB CRC 0x4002 2400 - 0x4002 2FFF 3 KB Reserved 0x4002 2000 - 0x4002 23FF 1 KB FLASH Interface AHB1 0x4002 1400 - 0x4002 1FFF 3 KB Reserved 0x4002 1000 - 0x4002 13FF 1 KB RCC 0x4002 0400 - 0x4002 0FFF 3 KB Reserved 0x4002 0000 - 0x4002 03FF 1 KB DMA - 0x4001 8000 - 0x4001 FFFF 32 KB Reserved 0x4001 5C00 - 0x4001 7FFF 9 KB Reserved 0x4001 5800 - 0x4001 5BFF 1 KB DBGMCU 0x4001 4C00 - 0x4001 57FF 3 KB Reserved 0x4001 4800 - 0x4001 4BFF 1 KB TIM17 0x4001 4400 - 0x4001 47FF 1 KB TIM16 0x4001 4000 - 0x4001 43FF 1 KB TIM15(1) 0x4001 3C00 - 0x4001 3FFF 1 KB Reserved 0x4001 3800 - 0x4001 3BFF 1 KB USART1 0x4001 3400 - 0x4001 37FF 1 KB Reserved APB 0x4001 3000 - 0x4001 33FF 1 KB SPI1 0x4001 2C00 - 0x4001 2FFF 1 KB TIM1 0x4001 2800 - 0x4001 2BFF 1 KB Reserved 0x4001 2400 - 0x4001 27FF 1 KB ADC 0x4001 1800 - 0x4001 23FF 3 KB Reserved 0x4001 1400 - 0x4001 17FF 1 KB USART6(2) 0x4001 0800 - 0x4001 13FF 3 KB Reserved 0x4001 0400 - 0x4001 07FF 1 KB EXTI 0x4001 0000 - 0x4001 03FF 1 KB SYSCFG 38/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Memory mapping Table 17. STM32F030x4/x6/x8/xC peripheral register boundary addresses (continued) Bus Boundary address Size Peripheral - 0x4000 8000 - 0x4000 FFFF 32 KB Reserved 0x4000 7400 - 0x4000 7FFF 3 KB Reserved 0x4000 7000 - 0x4000 73FF 1 KB PWR 0x4000 5C00 - 0x4000 6FFF 5 KB Reserved 0x4000 5800 - 0x4000 5BFF 1 KB I2C2(1) 0x4000 5400 - 0x4000 57FF 1 KB I2C1 0x4000 5000 - 0x4000 53FF 1 KB USART5(2) 0x4000 4C00 - 0x4000 4FFF 1 KB USART4(2) 0x4000 4800 - 0x4000 4BFF 1 KB USART3(2) 0x4000 4400 - 0x4000 47FF 1 KB USART2(1) 0x4000 3C00 - 0x4000 43FF 2 KB Reserved 0x4000 3800 - 0x4000 3BFF 1 KB SPI2(1) APB 0x4000 3400 - 0x4000 37FF 1 KB Reserved 0x4000 3000 - 0x4000 33FF 1 KB IWDG 0x4000 2C00 - 0x4000 2FFF 1 KB WWDG 0x4000 2800 - 0x4000 2BFF 1 KB RTC 0x4000 2400 - 0x4000 27FF 1 KB Reserved 0x4000 2000 - 0x4000 23FF 1 KB TIM14 0x4000 1800 - 0x4000 1FFF 2 KB Reserved 0x4000 1400 - 0x4000 17FF 1 KB TIM7(2) 0x4000 1000 - 0x4000 13FF 1 KB TIM6(1) 0x4000 0800 - 0x4000 0FFF 2 KB Reserved 0x4000 0400 - 0x4000 07FF 1 KB TIM3 0x4000 0000 - 0x4000 03FF 1 KB Reserved 1. This feature is available on STM32F030x8 and STM32F030xC devices only. For STM32F030x6 and STM32F060x4, the area is Reserved. 2. This feature is available on STM32F030xC devices only. This area is reserved for STM32F030x4/6/8 devices. DocID024849 Rev 3 39/91 39

Electrical characteristics STM32F030x4/x6/x8/xC 6 Electrical characteristics 6.1 Parameter conditions Unless otherwise specified, all voltages are referenced to V . SS 6.1.1 Minimum and maximum values Unless otherwise specified, the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply voltage and frequencies by tests in production on 100% of the devices with an ambient temperature at T = 25 °C and T = T max (given by A A A the selected temperature range). Data based on characterization results, design simulation and/or technology characteristics are indicated in the table footnotes and are not tested in production. Based on characterization, the minimum and maximum values refer to sample tests and represent the mean value plus or minus three times the standard deviation (mean ±3σ). 6.1.2 Typical values Unless otherwise specified, typical data are based on T = 25 °C, V = V = 3.3 V. They A DD DDA are given only as design guidelines and are not tested. Typical ADC accuracy values are determined by characterization of a batch of samples from a standard diffusion lot over the full temperature range, where 95% of the devices have an error less than or equal to the value indicated (mean ±2σ). 6.1.3 Typical curves Unless otherwise specified, all typical curves are given only as design guidelines and are not tested. 6.1.4 Loading capacitor The loading conditions used for pin parameter measurement are shown in Figure 10. 6.1.5 Pin input voltage The input voltage measurement on a pin of the device is described in Figure 11. Figure 10. Pin loading conditions Figure 11. Pin input voltage (cid:48)(cid:38)(cid:56)(cid:3)(cid:83)(cid:76)(cid:81) (cid:48)(cid:38)(cid:56)(cid:3)(cid:83)(cid:76)(cid:81) (cid:38)(cid:3)(cid:32)(cid:3)(cid:24)(cid:19)(cid:3)(cid:83)(cid:41) (cid:57)(cid:44)(cid:49) (cid:48)(cid:54)(cid:20)(cid:28)(cid:21)(cid:20)(cid:19)(cid:57)(cid:20) (cid:48)(cid:54)(cid:20)(cid:28)(cid:21)(cid:20)(cid:20)(cid:57)(cid:20) 40/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Electrical characteristics 6.1.6 Power supply scheme Figure 12. Power supply scheme (cid:47)(cid:54)(cid:40)(cid:15)(cid:3)(cid:53)(cid:55)(cid:38)(cid:15) (cid:58)(cid:68)(cid:78)(cid:72)(cid:16)(cid:88)(cid:83)(cid:3)(cid:79)(cid:82)(cid:74)(cid:76)(cid:70) (cid:51)(cid:82)(cid:90)(cid:72)(cid:85)(cid:3)(cid:86)(cid:90)(cid:76)(cid:87)(cid:70)(cid:75) (cid:57)(cid:39)(cid:39) (cid:57)(cid:38)(cid:50)(cid:53)(cid:40) (cid:21)(cid:3)(cid:91)(cid:3)(cid:57) (cid:39)(cid:39) (cid:53)(cid:72)(cid:74)(cid:88)(cid:79)(cid:68)(cid:87)(cid:82)(cid:85) (cid:57) (cid:39)(cid:39)(cid:44)(cid:50)(cid:20) (cid:50)(cid:56)(cid:55) (cid:72)(cid:85) (cid:46)(cid:72)(cid:85)(cid:81)(cid:72)(cid:79)(cid:3)(cid:79)(cid:82)(cid:74)(cid:76)(cid:70) (cid:14)(cid:21)(cid:20)(cid:3)(cid:91)(cid:3)(cid:91)(cid:3)(cid:20)(cid:3)(cid:23)(cid:19)(cid:17)(cid:19)(cid:26)(cid:3)(cid:3)(cid:81)(cid:151)(cid:41)(cid:41) (cid:42)(cid:51)(cid:44)(cid:50)(cid:86) (cid:44)(cid:49) (cid:72)(cid:89)(cid:72)(cid:79)(cid:3)(cid:86)(cid:75)(cid:76)(cid:73)(cid:87) (cid:79)(cid:82)(cid:44)(cid:50)(cid:74)(cid:76)(cid:70) (cid:11)(cid:9)(cid:38)(cid:3)(cid:48)(cid:51)(cid:56)(cid:72)(cid:80)(cid:15)(cid:3)(cid:39)(cid:82)(cid:76)(cid:85)(cid:74)(cid:76)(cid:72)(cid:76)(cid:87)(cid:86)(cid:68)(cid:12)(cid:79) (cid:47) (cid:21)(cid:3)(cid:91)(cid:3)(cid:57) (cid:54)(cid:54) (cid:57) (cid:39)(cid:39)(cid:36) (cid:57) (cid:39)(cid:39)(cid:36) (cid:20)(cid:19)(cid:3)(cid:81)(cid:41) (cid:57)(cid:53)(cid:40)(cid:41)(cid:14) (cid:36)(cid:39)(cid:38) (cid:36)(cid:81)(cid:68)(cid:79)(cid:82)(cid:74)(cid:29) (cid:14)(cid:20)(cid:3)(cid:151)(cid:41) (cid:57)(cid:53)(cid:40)(cid:41)(cid:16) (cid:11)(cid:53)(cid:38)(cid:86)(cid:15)(cid:3)(cid:51)(cid:47)(cid:47)(cid:15)(cid:3)(cid:171)(cid:12) (cid:57) (cid:54)(cid:54)(cid:36) (cid:48)(cid:54)(cid:89)(cid:22)(cid:28)(cid:19)(cid:21)(cid:24)(cid:57)(cid:20) Caution: Each power supply pair (V /V , V /V etc.) must be decoupled with filtering ceramic DD SS DDA SSA capacitors as shown above. These capacitors must be placed as close as possible to, or below, the appropriate pins on the underside of the PCB to ensure the good functionality of the device. 6.1.7 Current consumption measurement Figure 13. Current consumption measurement scheme (cid:44)(cid:39)(cid:39) (cid:57)(cid:39)(cid:39) (cid:44)(cid:39)(cid:39)(cid:36) (cid:57)(cid:39)(cid:39)(cid:36) (cid:48)(cid:54)(cid:22)(cid:21)(cid:20)(cid:23)(cid:21)(cid:57)(cid:21) DocID024849 Rev 3 41/91 74

Electrical characteristics STM32F030x4/x6/x8/xC 6.2 Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 18: Voltage characteristics, Table 19: Current characteristics and Table 20: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 18. Voltage characteristics(1) Symbol Ratings Min Max Unit V –V External main supply voltage -0.3 4.0 V DD SS V –V External analog supply voltage -0.3 4.0 V DDA SS V –V Allowed voltage difference for V > V - 0.4 V DD DDA DD DDA Input voltage on FT and FTf pins V − 0.3 V + 4.0 (3) V SS DDIOx Input voltage on TTa pins V − 0.3 4.0 V V (2) SS IN BOOT0 0 V + 4.0 (3) V DDIOx Input voltage on any other pin V − 0.3 4.0 V SS |ΔV | Variations between different V power pins - 50 mV DDx DD Variations between all the different ground |V − V | - 50 mV SSx SS pins Electrostatic discharge voltage see Section 6.3.12: Electrical V - ESD(HBM) (human body model) sensitivity characteristics 1. All main power (V , V ) and ground (V , V ) pins must always be connected to the external power DD DDA SS SSA supply, in the permitted range. 2. V maximum must always be respected. Refer to Table 19: Current characteristics for the maximum IN allowed injected current values. 3. V is internally connected with VDD pin. DDIOx 42/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Electrical characteristics Table 19. Current characteristics Symbol Ratings Max. Unit ΣI Total current into sum of all VDDpower lines (source)(1) 120 VDD ΣI Total current out of sum of all VSSground lines (sink)(1) -120 VSS I Maximum current into each VDD power pin (source)(1) 100 VDD(PIN) I Maximum current out of each VSS ground pin (sink)(1) -100 VSS(PIN) Output current sunk by any I/O and control pin 25 I IO(PIN) Output current source by any I/O and control pin -25 mA Total output current sunk by sum of all I/Os and control pins(2) 80 ΣI IO(PIN) Total output current sourced by sum of all I/Os and control pins(2) -80 Injected current on FT and FTf pins -5/+0(4) I (3) Injected current on TC and RST pin ± 5 INJ(PIN) Injected current on TTa pins(5) ± 5 ΣI Total injected current (sum of all I/O and control pins)(6) ± 25 INJ(PIN) 1. All main power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external power supply, in the permitted range. 2. This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be sunk/sourced between two consecutive power supply pins referring to high pin count QFP packages. 3. A positive injection is induced by V > V while a negative injection is induced by V < V . I must never be IN DDIOx IN SS INJ(PIN) exceeded. Refer to Table 18: Voltage characteristics for the maximum allowed input voltage values. 4. Positive injection is not possible on these I/Os and does not occur for input voltages lower than the specified maximum value. 5. On these I/Os, a positive injection is induced by V > V . Negative injection disturbs the analog performance of the device. See note (2) below Table 52: ADC accuracIyN. DDA 6. When several inputs are submitted to a current injection, the maximum ΣI is the absolute sum of the positive and INJ(PIN) negative injected currents (instantaneous values). Table 20. Thermal characteristics Symbol Ratings Value Unit T Storage temperature range –65 to +150 °C STG T Maximum junction temperature 150 °C J 6.3 Operating conditions 6.3.1 General operating conditions Table 21. General operating conditions Symbol Parameter Conditions Min Max Unit f Internal AHB clock frequency - 0 48 HCLK MHz f Internal APB clock frequency - 0 48 PCLK V Standard operating voltage - 2.4 3.6 V DD DocID024849 Rev 3 43/91 74

Electrical characteristics STM32F030x4/x6/x8/xC Table 21. General operating conditions (continued) Symbol Parameter Conditions Min Max Unit Must have a potential equal V Analog operating voltage 2.4 3.6 V DDA to or higher than V DD TC and RST I/O -0.3 V +0.3 DDIOx TTa I/O -0.3 V +0.3(2) DDA V I/O input voltage V IN FT and FTf I/O -0.3 5.5(2) BOOT0 0 5.5 LQFP64 - 455 LQFP48 - 364 P Power dissipation at TA = 85 °C mW D for suffix 6 (1) LQFP32 - 357 TSSOP20 - 263 Ambient temperature for the Maximum power dissipation -40 85 TA suffix 6 version Low power dissipation(2) -40 105 °C TJ Junction temperature range Suffix 6 version -40 105 °C 1. If T is lower, higher P values are allowed as long as T does not exceed T . A D J Jmax 2. In low power dissipation state, T can be extended to this range as long as T does not exceed T (see Section 7.5: A J Jmax Thermal characteristics). 6.3.2 Operating conditions at power-up / power-down The parameters given in Table 22 are derived from tests performed under the ambient temperature condition summarized in Table 21. Table 22. Operating conditions at power-up / power-down Symbol Parameter Conditions Min Max Unit ∞ V rise time rate 0 DD t - VDD ∞ V fall time rate 20 DD µs/V ∞ V rise time rate 0 DDA t - VDDA ∞ V fall time rate 20 DDA 6.3.3 Embedded reset and power control block characteristics The parameters given in Table 23 are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 21: General operating conditions. Table 23. Embedded reset and power control block characteristics Symbol Parameter Conditions Min Typ Max Unit Power on/power down Falling edge(2) 1.80 1.88 1.96(3) V V (1) POR/PDR reset threshold Rising edge 1.84(3) 1.92 2.00 V 44/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Electrical characteristics Table 23. Embedded reset and power control block characteristics (continued) Symbol Parameter Conditions Min Typ Max Unit V PDR hysteresis - - 40 - mV PDRhyst t (4) Reset temporization - 1.50 2.50 4.50 ms RSTTEMPO 1. The PDR detector monitors V and also V (if kept enabled in the option bytes). The POR detector DD DDA monitors only V . DD 2. The product behavior is guaranteed by design down to the minimum V value. POR/PDR 3. Data based on characterization results, not tested in production. 4. Guaranteed by design, not tested in production. 6.3.4 Embedded reference voltage The parameters given in Table 24 are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 21: General operating conditions. Table 24. Embedded internal reference voltage Symbol Parameter Conditions Min Typ Max Unit Internal reference V -40°C < T < +85°C 1.2 1.23 1.25 V REFINT voltage A ADC_IN17 buffer startup t - - - 10(1) µs START time ADC sampling time when tS_vrefint reading the internal - 4 (1) - - µs reference voltage Internal reference ΔVREFINT voltage spread over the VDDA = 3 V - - 10(1) mV temperature range TCoeff Temperature coefficient - -100(1) - 100(1) ppm/°C 1. Guaranteed by design, not tested in production. 6.3.5 Supply current characteristics The current consumption is a function of several parameters and factors such as the operating voltage, ambient temperature, I/O pin loading, device software configuration, operating frequencies, I/O pin switching rate, program location in memory and executed binary code. The current consumption is measured as described in Figure 13: Current consumption measurement scheme. All Run-mode current consumption measurements given in this section are performed with a reduced code that gives a consumption equivalent to CoreMark code. DocID024849 Rev 3 45/91 74

Electrical characteristics STM32F030x4/x6/x8/xC Typical and maximum current consumption The MCU is placed under the following conditions: • All I/O pins are in analog input mode • All peripherals are disabled except when explicitly mentioned • The Flash memory access time is adjusted to the f frequency: HCLK – 0 wait state and Prefetch OFF from 0 to 24 MHz – 1 wait state and Prefetch ON above 24 MHz • When the peripherals are enabled f = f PCLK HCLK The parameters given in Table 25 to Table 27 are derived from tests performed under ambient temperature and supply voltage conditions summarized in Table 21: General operating conditions. Table 2 5 . Typical and maximum current consumption from V supply at V =3.6 V(1) DD DD All peripherals enabled ol b Max @ T (2) m Parameter Conditions fHCLK A Unit y Typ S 85 °C 48 MHz 22.0 22.8 48 MHz 26.8 30.2 HSI or HSE clock, PLL on Supply current in 24 MHz 12.2 13.2 I Run mode, code mA DD executing from Flash 24 MHz 14.1 16.2 8 MHz 4.4 5.2 HSI or HSE clock, PLL off 8 MHz 4.9 5.6 48 MHz 22.2 23.2 48 MHz 26.1 29.3 HSI or HSE clock, PLL on Supply current in 24 MHz 11.2 12.2 I Run mode, code mA DD executing from RAM 24 MHz 13.3 15.7 8 MHz 4.0 4.5 HSI or HSE clock, PLL off 8 MHz 4.6 5.2 48 MHz 14 15.3 48 MHz 17.0 19.0 Supply current in HSI or HSE clock, PLL on Sleep mode, code 24 MHz 7.3 7.8 I mA DD executing from Flash 24 MHz 8.7 10.1 or RAM 8 MHz 2.6 2.9 HSI or HSE clock, PLL off 8 MHz 3.0 3.5 1. The gray shading is used to distinguish the values for STM32F030xC devices. 2. Data based on characterization results, not tested in production unless otherwise specified. 46/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Electrical characteristics Ta b le 26. Typical and maximum current consumption from the V supply(1) DDA V =3.6 V DDA Symbol Parameter Conditions(2) f Max @ T (3) Unit HCLK A Typ 85 °C 48 MHz 175 215 HSE bypass, PLL on 48 MHz 160 192 8 MHz 3.9 4.9 8 MHz 3.7 4.6 Supply current in HSE bypass, PLL off Run or Sleep mode, 1 MHz 3.9 4.1 I code executing µA DDA from Flash memory 1 MHz 3.3 4.4 or RAM 48 MHz 244 275 HSI clock, PLL on 48 MHz 235 275 8 MHz 85 105 HSI clock, PLL off 8 MHz 77 92 1. The gray shading is used to distinguish the values for STM32F030xC devices. 2. Current consumption from the V supply is independent of whether the digital peripherals are enabled or disabled, being DDA in Run or Sleep mode or executing from Flash or RAM. Furthermore, when the PLL is off, I is independent of the DDA frequency. 3. Data based on characterization results, not tested in production. DocID024849 Rev 3 47/91 74

Electrical characteristics STM32F030x4/x6/x8/xC T a ble 27. Typical and maximum consumption in Stop and Standby modes Typ @V DD Max(1) (V = V ) Symbol Parameter Conditions DD DDA Unit 3.6 V T = 85 °C A Regulator in run mode, all oscillators OFF 19 48 Supply current in Stop mode I Regulator in low-power mode, all oscillators OFF 5 32 DD Supply current in LSI ON and IWDG ON 2 - Standby mode Regulator in run or low- Supply current in power mode, all 2.9 3.5 Stop mode oscillators OFF V monitoring ON DDA LSI ON and IWDG ON 3.3 - µA Supply current in Standby mode LSI OFF and IWDG OFF 2.8 3.5 I DDA Regulator in run or low- Supply current in power mode, all 1.7 - Stop mode oscillators OFF V monitoring OFF DDA LSI ON and IWDG ON 2.3 - Supply current in Standby mode LSI OFF and IWDG OFF 1.4 - 1. Data based on characterization results, not tested in production unless otherwise specified. Typical current consumption The MCU is placed under the following conditions: • V = V = 3.3 V DD DDA • All I/O pins are in analog input configuration • The Flash access time is adjusted to f frequency: HCLK – 0 wait state and Prefetch OFF from 0 to 24 MHz – 1 wait state and Prefetch ON above 24 MHz • When the peripherals are enabled, f = f PCLK HCLK • PLL is used for frequencies greater than 8 MHz • AHB prescaler of 2, 4, 8 and 16 is used for the frequencies 4 MHz, 2 MHz, 1 MHz and 500 kHz respectively 48/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Electrical characteristics Table 28. Typical current consumption in Run mode, code with data processing running from Flash Typ Symbol Parameter Conditions f Unit HCLK Peripherals Peripherals enabled disabled Supply current in Run 48 MHz 23.3 11.5 I mode from V Running from mA DD DD supply HSE crystal 8 MHz 4.5 3.0 clock 8 MHz, Supply current in Run code executing 48 MHz 158 158 IDDA mode from VDDA from Flash µA supply 8 MHz 2.43 2.43 I/O system current consumption The current consumption of the I/O system has two components: static and dynamic. I/O static current consumption All the I/Os used as inputs with pull-up generate current consumption when the pin is externally held low. The value of this current consumption can be simply computed by using the pull-up/pull-down resistors values given in Table 46: I/O static characteristics. For the output pins, any external pull-down or external load must also be considered to estimate the current consumption. Additional I/O current consumption is due to I/Os configured as inputs if an intermediate voltage level is externally applied. This current consumption is caused by the input Schmitt trigger circuits used to discriminate the input value. Unless this specific configuration is required by the application, this supply current consumption can be avoided by configuring these I/Os in analog mode. This is notably the case of ADC input pins which should be configured as analog inputs. Caution: Any floating input pin can also settle to an intermediate voltage level or switch inadvertently, as a result of external electromagnetic noise. To avoid current consumption related to floating pins, they must either be configured in analog mode, or forced internally to a definite digital value. This can be done either by using pull-up/down resistors or by configuring the pins in output mode. I/O dynamic current consumption In addition to the internal peripheral current consumption measured previously, the I/Os used by an application also contribute to the current consumption. When an I/O pin switches, it uses the current from the I/O supply voltage to supply the I/O pin circuitry and to charge/discharge the capacitive load (internal or external) connected to the pin: I = V × f × C SW DDIOx SW DocID024849 Rev 3 49/91 74

Electrical characteristics STM32F030x4/x6/x8/xC where I is the current sunk by a switching I/O to charge/discharge the capacitive load SW V is the I/O supply voltage DDIOx f is the I/O switching frequency SW C is the total capacitance seen by the I/O pin: C = C + C +C INT EXT S C is the PCB board capacitance including the pad pin. S The test pin is configured in push-pull output mode and is toggled by software at a fixed frequency. Table 29. Switching output I/O current consumption I/O toggling Symbol Parameter Conditions(1) Typ Unit frequency (f ) SW 4 MHz 0.18 8 MHz 0.37 V = 3.3 V DDIOx C = 0 pF 16 MHz 0.76 EXT C = C + C + C INT EXT S 24 MHz 1.39 48 MHz 2.188 4 MHz 0.49 I/O current ISW consumption VDDIOx = 3.3 V 8 MHz 0.94 mA C = 22 pF EXT 16 MHz 2.38 C = C + C + C INT EXT S 24 MHz 3.99 V = 3.3 V 4 MHz 0.81 DDIOx C = 47 pF EXT 8 MHz 1.7 C = C + C + C INT EXT S C = C 16 MHz 3.67 int 1. C = 7 pF (estimated value). S 6.3.6 Wakeup time from low-power mode The wakeup times given in Table 30 are the latency between the event and the execution of the first user instruction. The device goes in low-power mode after the WFE (Wait For Event) instruction, in the case of a WFI (Wait For Interruption) instruction, 16 CPU cycles must be added to the following timings due to the interrupt latency in the Cortex M0 architecture. The SYSCLK clock source setting is kept unchanged after wakeup from Sleep mode. During wakeup from Stop or Standby mode, SYSCLK takes the default setting: HSI 8 MHz. The wakeup source from Sleep and Stop mode is an EXTI line configured in event mode. The wakeup source from Standby mode is the WKUP1 pin (PA0). All timings are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 21: General operating conditions. 50/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Electrical characteristics Table 30. Low-power mode wakeup timings Typ @VDD = Symbol Parameter Conditions VDDA Max Unit = 3.3 V t Wakeup from Stop mode Regulator in run mode 2.8 5 WUSTOP t Wakeup from Standby mode - 51 - WUSTANDBY µs 4 SYSCLK t Wakeup from Sleep mode - - WUSLEEP cycles 6.3.7 External clock source characteristics High-speed external user clock generated from an external source In bypass mode the HSE oscillator is switched off and the input pin is a standard GPIO. The external clock signal has to respect the I/O characteristics in Section 6.3.14. However, the recommended clock input waveform is shown in Figure 14: High-speed external clock source AC timing diagram. Table 31. High-speed external user clock characteristics Symbol Parameter(1) Min Typ Max Unit f User external clock source frequency 1 8 32 MHz HSE_ext V OSC_IN input pin high level voltage 0.7 V - V HSEH DDIOx DDIOx V V OSC_IN input pin low level voltage V - 0.3 V HSEL SS DDIOx t w(HSEH) OSC_IN high or low time 15 - - t w(HSEL) ns t r(HSE) OSC_IN rise or fall time - - 20 t f(HSE) 1. Guaranteed by design, not tested in production. Figure 14. High-speed external clock source AC timing diagram (cid:87)(cid:90)(cid:11)(cid:43)(cid:54)(cid:40)(cid:43)(cid:12) (cid:57)(cid:43)(cid:54)(cid:40)(cid:43) (cid:28)(cid:19)(cid:8) (cid:20)(cid:19)(cid:8) (cid:57)(cid:43)(cid:54)(cid:40)(cid:47) (cid:87)(cid:85)(cid:11)(cid:43)(cid:54)(cid:40)(cid:12) (cid:87)(cid:73)(cid:11)(cid:43)(cid:54)(cid:40)(cid:12) (cid:87)(cid:90)(cid:11)(cid:43)(cid:54)(cid:40)(cid:47)(cid:12) (cid:87) (cid:55)(cid:43)(cid:54)(cid:40) (cid:48)(cid:54)(cid:20)(cid:28)(cid:21)(cid:20)(cid:23)(cid:57)(cid:21) DocID024849 Rev 3 51/91 74

Electrical characteristics STM32F030x4/x6/x8/xC Low-speed external user clock generated from an external source In bypass mode the LSE oscillator is switched off and the input pin is a standard GPIO. The external clock signal has to respect the I/O characteristics in Section 6.3.14. However, the recommended clock input waveform is shown in Figure 15. Table 32. Low-speed external user clock characteristics Symbol Parameter(1) Min Typ Max Unit f User external clock source frequency - 32.768 1000 kHz LSE_ext V OSC32_IN input pin high level voltage 0.7 V - V LSEH DDIOx DDIOx V V OSC32_IN input pin low level voltage V - 0.3 V LSEL SS DDIOx t w(LSEH) OSC32_IN high or low time 450 - - t w(LSEL) ns t r(LSE) OSC32_IN rise or fall time - - 50 t f(LSE) 1. Guaranteed by design, not tested in production. Figure 15. Low-speed external clock source AC timing diagram (cid:87)(cid:90)(cid:11)(cid:47)(cid:54)(cid:40)(cid:43)(cid:12) (cid:57)(cid:47)(cid:54)(cid:40)(cid:43) (cid:28)(cid:19)(cid:8) (cid:20)(cid:19)(cid:8) (cid:57)(cid:47)(cid:54)(cid:40)(cid:47) (cid:87)(cid:85)(cid:11)(cid:47)(cid:54)(cid:40)(cid:12) (cid:87)(cid:73)(cid:11)(cid:47)(cid:54)(cid:40)(cid:12) (cid:87)(cid:90)(cid:11)(cid:47)(cid:54)(cid:40)(cid:47)(cid:12) (cid:87) (cid:55)(cid:47)(cid:54)(cid:40) (cid:48)(cid:54)(cid:20)(cid:28)(cid:21)(cid:20)(cid:24)(cid:57)(cid:21) High-speed external clock generated from a crystal/ceramic resonator The high-speed external (HSE) clock can be supplied with a 4 to 32 MHz crystal/ceramic resonator oscillator. All the information given in this paragraph are based on design simulation results obtained with typical external components specified in Table 33. In the application, the resonator and the load capacitors have to be placed as close as possible to the oscillator pins in order to minimize output distortion and startup stabilization time. Refer to the crystal resonator manufacturer for more details on the resonator characteristics (frequency, package, accuracy). Table 33. HSE oscillator characteristics Symbol Parameter Conditions(1) Min(2) Typ Max(2) Unit f Oscillator frequency - 4 8 32 MHz OSC_IN R Feedback resistor - - 200 - kΩ F 52/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Electrical characteristics Table 33. HSE oscillator characteristics Symbol Parameter Conditions(1) Min(2) Typ Max(2) Unit During startup(3) - - 8.5 V = 3.3 V, DD Rm = 45 Ω, - 0.5 - I HSE current consumption CL = 10 pF@8 MHz mA DD V = 3.3 V, DD Rm = 30 Ω, - 1.5 - CL = 20 pF@32 MHz g Oscillator transconductance Startup 10 - - mA/V m t (4) Startup time V is stabilized - 2 - ms SU(HSE) DD 1. Resonator characteristics given by the crystal/ceramic resonator manufacturer. 2. Guaranteed by design, not tested in production. 3. This consumption level occurs during the first 2/3 of the t startup time SU(HSE) 4. t is the startup time measured from the moment it is enabled (by software) to a stabilized 8 MHz SU(HSE) oscillation is reached. This value is measured for a standard crystal resonator and it can vary significantly with the crystal manufacturer For C and C , it is recommended to use high-quality external ceramic capacitors in the L1 L2 5 pF to 20 pF range (Typ.), designed for high-frequency applications, and selected to match the requirements of the crystal or resonator (see Figure 16). C and C are usually the L1 L2 same size. The crystal manufacturer typically specifies a load capacitance which is the series combination of C and C . PCB and MCU pin capacitance must be included (10 pF L1 L2 can be used as a rough estimate of the combined pin and board capacitance) when sizing C and C . L1 L2 Note: For information on selecting the crystal, refer to the application note AN2867 “Oscillator design guide for ST microcontrollers” available from the ST website www.st.com. Figure 16. Typical application with an 8 MHz crystal (cid:53)(cid:72)(cid:86)(cid:82)(cid:81)(cid:68)(cid:87)(cid:82)(cid:85)(cid:3)(cid:90)(cid:76)(cid:87)(cid:75)(cid:3)(cid:76)(cid:81)(cid:87)(cid:72)(cid:74)(cid:85)(cid:68)(cid:87)(cid:72)(cid:71)(cid:3) (cid:70)(cid:68)(cid:83)(cid:68)(cid:70)(cid:76)(cid:87)(cid:82)(cid:85)(cid:86) (cid:38) (cid:47)(cid:20) (cid:50)(cid:54)(cid:38)(cid:66)(cid:44)(cid:49) (cid:73) (cid:43)(cid:54)(cid:40) (cid:37)(cid:76)(cid:68)(cid:86)(cid:3) (cid:27)(cid:3)(cid:48)(cid:43)(cid:93)(cid:3) (cid:70)(cid:82)(cid:81)(cid:87)(cid:85)(cid:82)(cid:79)(cid:79)(cid:72)(cid:71)(cid:3) (cid:85)(cid:72)(cid:86)(cid:82)(cid:81)(cid:68)(cid:87)(cid:82)(cid:85) (cid:53)(cid:41) (cid:74)(cid:68)(cid:76)(cid:81) (cid:53) (cid:11)(cid:20)(cid:12) (cid:50)(cid:54)(cid:38)(cid:66)(cid:50)(cid:56)(cid:55) (cid:40)(cid:59)(cid:55) (cid:38) (cid:47)(cid:21) (cid:48)(cid:54)(cid:20)(cid:28)(cid:27)(cid:26)(cid:25)(cid:57)(cid:20) 1. R value depends on the crystal characteristics. EXT Low-speed external clock generated from a crystal resonator The low-speed external (LSE) clock can be supplied with a 32.768 kHz crystal resonator oscillator. All the information given in this paragraph are based on design simulation results DocID024849 Rev 3 53/91 74

Electrical characteristics STM32F030x4/x6/x8/xC obtained with typical external components specified in Table 34. In the application, the resonator and the load capacitors have to be placed as close as possible to the oscillator pins in order to minimize output distortion and startup stabilization time. Refer to the crystal resonator manufacturer for more details on the resonator characteristics (frequency, package, accuracy). Table 34. LSE oscillator characteristics (f = 32.768 kHz) LSE Symbol Parameter Conditions(1) Min(2) Typ Max(2) Unit low drive capability - 0.5 0.9 medium-low drive capability - - 1 LSE current I µA DD consumption medium-high drive capability - - 1.3 high drive capability - - 1.6 low drive capability 5 - - medium-low drive capability 8 - - Oscillator g µA/V m transconductance medium-high drive capability 15 - - high drive capability 25 - - t (3) Startup time V is stabilized - 2 - s SU(LSE) DDIOx 1. Refer to the note and caution paragraphs below the table, and to the application note AN2867 “Oscillator design guide for ST microcontrollers”. 2. Guaranteed by design, not tested in production. 3. t is the startup time measured from the moment it is enabled (by software) to a stabilized SU(LSE) 32.768 kHz oscillation is reached. This value is measured for a standard crystal and it can vary significantly with the crystal manufacturer Note: For information on selecting the crystal, refer to the application note AN2867 “Oscillator design guide for ST microcontrollers” available from the ST website www.st.com. Figure 17. Typical application with a 32.768 kHz crystal (cid:53)(cid:72)(cid:86)(cid:82)(cid:81)(cid:68)(cid:87)(cid:82)(cid:85)(cid:3)(cid:90)(cid:76)(cid:87)(cid:75)(cid:3)(cid:76)(cid:81)(cid:87)(cid:72)(cid:74)(cid:85)(cid:68)(cid:87)(cid:72)(cid:71)(cid:3) (cid:70)(cid:68)(cid:83)(cid:68)(cid:70)(cid:76)(cid:87)(cid:82)(cid:85)(cid:86) (cid:38) (cid:47)(cid:20) (cid:50)(cid:54)(cid:38)(cid:22)(cid:21)(cid:66)(cid:44)(cid:49) (cid:73) (cid:47)(cid:54)(cid:40) (cid:39)(cid:85)(cid:76)(cid:89)(cid:72)(cid:3) (cid:22)(cid:21)(cid:17)(cid:26)(cid:25)(cid:27)(cid:3)(cid:78)(cid:43)(cid:93)(cid:3) (cid:83)(cid:85)(cid:82)(cid:74)(cid:85)(cid:68)(cid:80)(cid:80)(cid:68)(cid:69)(cid:79)(cid:72)(cid:3) (cid:85)(cid:72)(cid:86)(cid:82)(cid:81)(cid:68)(cid:87)(cid:82)(cid:85) (cid:68)(cid:80)(cid:83)(cid:79)(cid:76)(cid:73)(cid:76)(cid:72)(cid:85) (cid:50)(cid:54)(cid:38)(cid:22)(cid:21)(cid:66)(cid:50)(cid:56)(cid:55) (cid:38) (cid:47)(cid:21) (cid:48)(cid:54)(cid:22)(cid:19)(cid:21)(cid:24)(cid:22)(cid:57)(cid:21) Note: An external resistor is not required between OSC32_IN and OSC32_OUT and it is forbidden to add one. 54/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Electrical characteristics 6.3.8 Internal clock source characteristics The parameters given in Table 35 are derived from tests performed under ambient temperature and supply voltage conditions summarized in Table 21: General operating conditions. The provided curves are characterization results, not tested in production. High-speed internal (HSI) RC oscillator Table 35. HSI oscillator characteristics(1) Symbol Parameter Conditions Min Typ Max Unit f Frequency - - 8 - MHz HSI TRIM HSI user trimming step - - - 1(2) % DuCy Duty cycle - 45(2) - 55(2) % HSI Accuracy of the HSI oscillator TA = -40 to 85°C - ±5 - % ACC HSI (factory calibrated) T = 25°C - ±1(3) - % A t HSI oscillator startup time - 1(2) - 2(2) µs SU(HSI) HSI oscillator power I - - 80 - µA DDA(HSI) consumption 1. V = 3.3 V, T = -40 to 85°C unless otherwise specified. DDA A 2. Guaranteed by design, not tested in production. 3. With user calibration. High-speed internal 14 MHz (HSI14) RC oscillator (dedicated to ADC) Table 36. HSI14 oscillator characteristics(1) Symbol Parameter Conditions Min Typ Max Unit f Frequency - - 14 - MHz HSI14 TRIM HSI14 user-trimming step - - - 1(2) % DuCy Duty cycle - 45(2) - 55(2) % (HSI14) Accuracy of the HSI14 ACC T = –40 to 85 °C - ±5 - % HSI14 oscillator (factory calibrated) A t HSI14 oscillator startup time - 1(2) - 2(2) µs su(HSI14) HSI14 oscillator power I - - 100 - µA DDA(HSI14) consumption 1. V = 3.3 V, T = -40 to 85 °C unless otherwise specified. DDA A 2. Guaranteed by design, not tested in production. Low-speed internal (LSI) RC oscillator Table 37. LSI oscillator characteristics(1) Symbol Parameter Min Typ Max Unit f Frequency 30 40 50 kHz LSI DocID024849 Rev 3 55/91 74

Electrical characteristics STM32F030x4/x6/x8/xC Table 37. LSI oscillator characteristics(1) Symbol Parameter Min Typ Max Unit t (2) LSI oscillator startup time - - 85 µs su(LSI) I (2) LSI oscillator power consumption - 0.75 - µA DDA(LSI) 1. V = 3.3 V, T = -40 to 85 °C unless otherwise specified. DDA A 2. Guaranteed by design, not tested in production. 6.3.9 PLL characteristics The parameters given in Table 38 are derived from tests performed under ambient temperature and supply voltage conditions summarized in Table 21: General operating conditions. Table 38. PLL characteristics Value Symbol Parameter Unit Min Typ Max PLL input clock(1) 1(2) 8.0 24(2) MHz f PLL_IN PLL input clock duty cycle 40(2) - 60(2) % f PLL multiplier output clock 16(2) - 48 MHz PLL_OUT t PLL lock time - - 200(2) µs LOCK Jitter Cycle-to-cycle jitter - - 300(2) ps PLL 1. Take care to use the appropriate multiplier factors to obtain PLL input clock values compatible with the range defined by f . PLL_OUT 2. Guaranteed by design, not tested in production. 6.3.10 Memory characteristics Flash memory The characteristics are given at T = -40 to 85 °C unless otherwise specified. A Table 39. Flash memory characteristics Symbol Parameter Conditions Min Typ Max(1) Unit t 16-bit programming time T = -40 to +85 °C - 53.5 - µs prog A t Page erase time(2) T = -40 to +85 °C - 30 - ms ERASE A t Mass erase time T = -40 to +85 °C - 30 - ms ME A Write mode - - 10 mA I Supply current DD Erase mode - - 12 mA V Programming voltage - 2.4 - 3.6 V prog 1. Guaranteed by design, not tested in production. 2. Page size is 1KB for STM32F030x4/6/8 devices and 2KB for STM32F030xC devices 56/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Electrical characteristics Table 40. Flash memory endurance and data retention Symbol Parameter Conditions Min(1) Unit N Endurance T = -40 to +85 °C 1 kcycle END A t Data retention 1 kcycle(2) at T = 85 °C 20 Years RET A 1. Data based on characterization results, not tested in production. 2. Cycling performed over the whole temperature range. 6.3.11 EMC characteristics Susceptibility tests are performed on a sample basis during device characterization. Functional EMS (electromagnetic susceptibility) While a simple application is executed on the device (toggling 2 LEDs through I/O ports). the device is stressed by two electromagnetic events until a failure occurs. The failure is indicated by the LEDs: • Electrostatic discharge (ESD) (positive and negative) is applied to all device pins until a functional disturbance occurs. This test is compliant with the IEC 61000-4-2 standard. • FTB: A Burst of Fast Transient voltage (positive and negative) is applied to V and DD V through a 100 pF capacitor, until a functional disturbance occurs. This test is SS compliant with the IEC 61000-4-4 standard. A device reset allows normal operations to be resumed. The test results are given in Table 41. They are based on the EMS levels and classes defined in application note AN1709. Table 41. EMS characteristics Level/ Symbol Parameter Conditions Class V = 3.3V, LQFP48, T = +25 °C, Voltage limits to be applied on any I/O pin DD A V f = 48 MHz, 3B FESD to induce a functional disturbance HCLK conforming to IEC 61000-4-2 Fast transient voltage burst limits to be V = 3.3V, LQFP48, T = +25°C, DD A V applied through 100 pF on V and V f = 48 MHz, 4B EFTB DD SS HCLK pins to induce a functional disturbance conforming to IEC 61000-4-4 Designing hardened software to avoid noise problems EMC characterization and optimization are performed at component level with a typical application environment and simplified MCU software. It should be noted that good EMC performance is highly dependent on the user application and the software in particular. Therefore it is recommended that the user applies EMC software optimization and prequalification tests in relation with the EMC level requested for his application. Software recommendations DocID024849 Rev 3 57/91 74

Electrical characteristics STM32F030x4/x6/x8/xC The software flowchart must include the management of runaway conditions such as: • Corrupted program counter • Unexpected reset • Critical Data corruption (control registers...) Prequalification trials Most of the common failures (unexpected reset and program counter corruption) can be reproduced by manually forcing a low state on the NRST pin or the Oscillator pins for 1 second. To complete these trials, ESD stress can be applied directly on the device, over the range of specification values. When unexpected behavior is detected, the software can be hardened to prevent unrecoverable errors occurring (see application note AN1015). Electromagnetic Interference (EMI) The electromagnetic field emitted by the device are monitored while a simple application is executed (toggling 2 LEDs through the I/O ports). This emission test is compliant with IEC 61967-2 standard which specifies the test board and the pin loading. Table 42. EMI characteristics Max vs. [f /f ] Monitored HSE HCLK Symbol Parameter Conditions Unit frequency band 8/48 MHz 0.1 to 30 MHz -3 V = 3.6 V, T = 25 °C, DD A LQFP100 package 30 to 130 MHz 23 dBµV S Peak level EMI compliant with 130 MHz to 1 GHz 17 IEC 61967-2 EMI Level 4 - 6.3.12 Electrical sensitivity characteristics Based on three different tests (ESD, LU) using specific measurement methods, the device is stressed in order to determine its performance in terms of electrical sensitivity. Electrostatic discharge (ESD) Electrostatic discharges (a positive then a negative pulse separated by 1 second) are applied to the pins of each sample according to each pin combination. The sample size depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test conforms to the JESD22-A114/C101 standard. 58/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Electrical characteristics Table 43. ESD absolute maximum ratings Maximum Symbol Ratings Conditions Packages Class Unit value(1) Electrostatic discharge voltage T = +25 °C, conforming V A All 2 2000 V ESD(HBM) (human body model) to JESD22-A114 Electrostatic discharge voltage T = +25 °C, conforming C4(2) 500(2) V A All V ESD(CDM) (charge device model) to ANSI/ESD STM5.3.1 C3(3) 250(3) 1. Data based on characterization results, not tested in production. 2. Applicable to STM32F030xC 3. Applicable to STM32F030x4, STM32F030x6, and STM32F030x8 Static latch-up Two complementary static tests are required on six parts to assess the latch-up performance: • A supply overvoltage is applied to each power supply pin. • A current injection is applied to each input, output and configurable I/O pin. These tests are compliant with EIA/JESD 78A IC latch-up standard. Table 44. Electrical sensitivities Symbol Parameter Conditions Class LU Static latch-up class T = +105 °C conforming to JESD78A II level A A 6.3.13 I/O current injection characteristics As a general rule, current injection to the I/O pins, due to external voltage below V or SS above V (for standard, 3.3 V-capable I/O pins) should be avoided during normal DDIOx product operation. However, in order to give an indication of the robustness of the microcontroller in cases when abnormal injection accidentally happens, susceptibility tests are performed on a sample basis during device characterization. Functional susceptibility to I/O current injection While a simple application is executed on the device, the device is stressed by injecting current into the I/O pins programmed in floating input mode. While current is injected into the I/O pin, one at a time, the device is checked for functional failures. The failure is indicated by an out of range parameter: ADC error above a certain limit (higher than 5 LSB TUE), out of conventional limits of induced leakage current on adjacent pins (out of the -5 µA/+0 µA range) or other functional failure (for example reset occurrence or oscillator frequency deviation). The characterization results are given in Table 45. Negative induced leakage current is caused by negative injection and positive induced leakage current is caused by positive injection. DocID024849 Rev 3 59/91 74

Electrical characteristics STM32F030x4/x6/x8/xC Table 45. I/O current injection susceptibility Functional susceptibility Symbol Description Unit Negative Positive injection injection Injected current on BOOT0 and PF1 pins -0 NA Injected current on PA9, PB3, PB13, PF11 pins with induced -5 NA leakage current on adjacent pins less than 50 µA Injected current on PA11 and PA12 pins with induced -5 NA leakage current on adjacent pins less than -1 mA I mA INJ Injected current on all other FT and FTf pins -5 NA Injected current on PB0 and PB1 pins -5 NA Injected current on PC0 pin -0 +5 Injected current on all other TTa, TC and RST pins -5 +5 6.3.14 I/O port characteristics General input/output characteristics Unless otherwise specified, the parameters given in Table 46 are derived from tests performed under the conditions summarized in Table 21: General operating conditions. All I/Os are designed as CMOS- and TTL-compliant (except BOOT0). Table 46. I/O static characteristics Symbol Parameter Conditions Min Typ Max Unit TC and TTa I/O - - 0.3 V +0.07(1) DDIOx FT and FTf I/O - - 0.475 V –0.2(1) DDIOx Low level input VIL voltage BOOT0 - - 0.3 VDDIOx–0.3(1) V All I/Os except - - 0.3 V BOOT0 pin DDIOx TC and TTa I/O 0.445 V +0.398(1) - - DDIOx FT and FTf I/O 0.5 V +0.2(1) - - DDIOx High level input VIH voltage BOOT0 0.2 VDDIOx+0.95(1) - - V All I/Os except 0.7 V - - BOOT0 pin DDIOx TC and TTa I/O - 200(1) - Schmitt trigger Vhys hysteresis FT and FTf I/O - 100(1) - mV BOOT0 - 300(1) - 60/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Electrical characteristics Table 46. I/O static characteristics (continued) Symbol Parameter Conditions Min Typ Max Unit TC, FT and FTf I/O TTa in digital mode - - ± 0.1 V ≤ V ≤ V SS IN DDIOx TTa in digital mode Ilkg Icnupruret nlet(a2)kage VDDIOx ≤ VIN ≤ VDDA - - 1 µA TTa in analog mode - - ± 0.2 V ≤ V ≤ V SS IN DDA FT and FTf I/O (3) - - 10 V ≤ V ≤ 5 V DDIOx IN Weak pull-up R equivalent resistor V = V 25 40 55 kΩ PU IN SS (4) Weak pull-down R equivalent V = V 25 40 55 kΩ PD IN DDIOx resistor(4) C I/O pin capacitance - - 5 - pF IO 1. Data based on design simulation only. Not tested in production. 2. The leakage could be higher than the maximum value, if negative current is injected on adjacent pins. Refer to Table 45: I/O current injection susceptibility. 3. To sustain a voltage higher than V + 0.3 V, the internal pull-up/pull-down resistors must be disabled. DDIOx 4. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This PMOS/NMOS contribution to the series resistance is minimal (~10% order). All I/Os are CMOS- and TTL-compliant (no software configuration required). Their characteristics cover more than the strict CMOS-technology or TTL parameters. The coverage of these requirements is shown in Figure 18 for standard I/Os, and in Figure 19 for 5 V tolerant I/Os. The following curves are design simulation results, not tested in production. DocID024849 Rev 3 61/91 74

Electrical characteristics STM32F030x4/x6/x8/xC Figure 18. TC and TTa I/O input characteristics (cid:22) (cid:21)(cid:17)(cid:24) (cid:55)(cid:40)(cid:54)(cid:55)(cid:40)(cid:39)(cid:3)(cid:53)(cid:36)(cid:49)(cid:42)(cid:40) (cid:57)(cid:44)(cid:49)(cid:3)(cid:11)(cid:57)(cid:12)(cid:21) (cid:3)(cid:3)(cid:3)(cid:3)(cid:3)(cid:3)(cid:3)(cid:3)(cid:3)(cid:3)(cid:11)(cid:38)(cid:48)(cid:50)(cid:54)(cid:3)(cid:86)(cid:87)(cid:68)(cid:81)(cid:71)(cid:68)(cid:85)(cid:71)(cid:3)(cid:85)(cid:72)(cid:84)(cid:88)(cid:76)(cid:85)(cid:72)(cid:80)(cid:72)(cid:81)(cid:87)(cid:12) (cid:55)(cid:55)(cid:47)(cid:3)(cid:86)(cid:87)(cid:68)(cid:81)(cid:71)(cid:68)(cid:85)(cid:71)(cid:3)(cid:85)(cid:72)(cid:84)(cid:88)(cid:76)(cid:85)(cid:72)(cid:80)(cid:72)(cid:81)(cid:87) (cid:20)(cid:17)(cid:24) (cid:3)(cid:32)(cid:3)(cid:19)(cid:17)(cid:26)(cid:3)(cid:57)(cid:39)(cid:39)(cid:44)(cid:50)(cid:91) (cid:57)(cid:44)(cid:43)(cid:80)(cid:76)(cid:81) (cid:14)(cid:3)(cid:19)(cid:17)(cid:22)(cid:28)(cid:27) (cid:56)(cid:49)(cid:39)(cid:40)(cid:41)(cid:44)(cid:49)(cid:40)(cid:39)(cid:3)(cid:44)(cid:49)(cid:51)(cid:56)(cid:55)(cid:3)(cid:53)(cid:36)(cid:49)(cid:42)(cid:40) (cid:57)(cid:44)(cid:43)(cid:80)(cid:76)(cid:81)(cid:3)(cid:32)(cid:3)(cid:19)(cid:17)(cid:23)(cid:23)(cid:24)(cid:3)(cid:57)(cid:39)(cid:39)(cid:44)(cid:50)(cid:91)(cid:3) (cid:20) (cid:19)(cid:17)(cid:24) (cid:57)(cid:57)(cid:44)(cid:47)(cid:44)(cid:47)(cid:80)(cid:80)(cid:68)(cid:68)(cid:91)(cid:91)(cid:3)(cid:3)(cid:32)(cid:32)(cid:3)(cid:3)(cid:19)(cid:19)(cid:17)(cid:17)(cid:22)(cid:22)(cid:3)(cid:3)(cid:57)(cid:57)(cid:39)(cid:39)(cid:39)(cid:39)(cid:44)(cid:50)(cid:44)(cid:50)(cid:91)(cid:91)(cid:3)(cid:14)(cid:3)(cid:3)(cid:3)(cid:3)(cid:19)(cid:3)(cid:3)(cid:17)(cid:3)(cid:19)(cid:3)(cid:3)(cid:26)(cid:3)(cid:3)(cid:11)(cid:38)(cid:48)(cid:50)(cid:54)(cid:3)(cid:86)(cid:87)(cid:68)(cid:81)(cid:71)(cid:68)(cid:85)(cid:71)(cid:3)(cid:85)(cid:72)(cid:84)(cid:88)(cid:76)(cid:85)(cid:72)(cid:80)(cid:72)(cid:81)(cid:87)(cid:12) (cid:55)(cid:55)(cid:47)(cid:3)(cid:86)(cid:87)(cid:68)(cid:81)(cid:71)(cid:68)(cid:85)(cid:71)(cid:3)(cid:85)(cid:72)(cid:84)(cid:88)(cid:76)(cid:85)(cid:72)(cid:80)(cid:72)(cid:81)(cid:87) (cid:55)(cid:40)(cid:54)(cid:55)(cid:40)(cid:39)(cid:3)(cid:53)(cid:36)(cid:49)(cid:42)(cid:40) (cid:19) (cid:20)(cid:17)(cid:25) (cid:20)(cid:17)(cid:27) (cid:21)(cid:17)(cid:19) (cid:21)(cid:17)(cid:21) (cid:21)(cid:17)(cid:23) (cid:21)(cid:17)(cid:25) (cid:21)(cid:17)(cid:27) (cid:22)(cid:17)(cid:19) (cid:22)(cid:17)(cid:21) (cid:22)(cid:17)(cid:23) (cid:22)(cid:17)(cid:25) (cid:57) (cid:3)(cid:11)(cid:57)(cid:12) (cid:39)(cid:39)(cid:44)(cid:50)(cid:91) (cid:48)(cid:54)(cid:89)(cid:22)(cid:21)(cid:20)(cid:22)(cid:19)(cid:57)(cid:23) Figure 19. Five volt tolerant (FT and FTf) I/O input characteristics (cid:22) (cid:21)(cid:17)(cid:24) (cid:55)(cid:40)(cid:54)(cid:55)(cid:40)(cid:39)(cid:3)(cid:53)(cid:36)(cid:49)(cid:42)(cid:40) (cid:57)(cid:44)(cid:49)(cid:3)(cid:11)(cid:57)(cid:12)(cid:21) (cid:3)(cid:3)(cid:3)(cid:3)(cid:3)(cid:3)(cid:3)(cid:3)(cid:3)(cid:3)(cid:11)(cid:38)(cid:48)(cid:50)(cid:54)(cid:3)(cid:86)(cid:87)(cid:68)(cid:81)(cid:71)(cid:68)(cid:85)(cid:71)(cid:3)(cid:85)(cid:72)(cid:84)(cid:88)(cid:76)(cid:85)(cid:72)(cid:80)(cid:72)(cid:81)(cid:87)(cid:12) (cid:55)(cid:55)(cid:47)(cid:3)(cid:86)(cid:87)(cid:68)(cid:81)(cid:71)(cid:68)(cid:85)(cid:71)(cid:3)(cid:85)(cid:72)(cid:84)(cid:88)(cid:76)(cid:85)(cid:72)(cid:80)(cid:72)(cid:81)(cid:87) (cid:20)(cid:17)(cid:24) (cid:57)(cid:44)(cid:43)(cid:80)(cid:76)(cid:81)(cid:3)(cid:32)(cid:3)(cid:19)(cid:17)(cid:26)(cid:3)(cid:57)(cid:39)(cid:39)(cid:44)(cid:50)(cid:91) (cid:56)(cid:49)(cid:39)(cid:40)(cid:41)(cid:44)(cid:49)(cid:40)(cid:39)(cid:3)(cid:44)(cid:49)(cid:51)(cid:56)(cid:55)(cid:3)(cid:53)(cid:36)(cid:49)(cid:42)(cid:40) (cid:14)(cid:3)(cid:19)(cid:17)(cid:21) (cid:3)(cid:32)(cid:3)(cid:19)(cid:17)(cid:24)(cid:3)(cid:57)(cid:39)(cid:39)(cid:44)(cid:50)(cid:91)(cid:3) (cid:20) (cid:57)(cid:44)(cid:43)(cid:80)(cid:76)(cid:81) (cid:16)(cid:3)(cid:19)(cid:17)(cid:21) (cid:19)(cid:17)(cid:24) (cid:57)(cid:57)(cid:44)(cid:44)(cid:47)(cid:47)(cid:80)(cid:80)(cid:68)(cid:68)(cid:91)(cid:91)(cid:3)(cid:3)(cid:32)(cid:32)(cid:3)(cid:3)(cid:19)(cid:19)(cid:17)(cid:17)(cid:23)(cid:22)(cid:26)(cid:3)(cid:57)(cid:24)(cid:3)(cid:39)(cid:57)(cid:39)(cid:39)(cid:44)(cid:50)(cid:39)(cid:91)(cid:44)(cid:3)(cid:50)(cid:3)(cid:91)(cid:3)(cid:3)(cid:3)(cid:3)(cid:3)(cid:3)(cid:3)(cid:3)(cid:3)(cid:11)(cid:38)(cid:48)(cid:50)(cid:54)(cid:3)(cid:86)(cid:87)(cid:68)(cid:81)(cid:71)(cid:68)(cid:85)(cid:71)(cid:3)(cid:85)(cid:72)(cid:84)(cid:88)(cid:76)(cid:85)(cid:72)(cid:80)(cid:72)(cid:81)(cid:87)(cid:12) (cid:55)(cid:55)(cid:47)(cid:3)(cid:86)(cid:87)(cid:68)(cid:81)(cid:71)(cid:68)(cid:85)(cid:71)(cid:3)(cid:85)(cid:72)(cid:84)(cid:88)(cid:76)(cid:85)(cid:72)(cid:80)(cid:72)(cid:81)(cid:87) (cid:55)(cid:40)(cid:54)(cid:55)(cid:40)(cid:39)(cid:3)(cid:53)(cid:36)(cid:49)(cid:42)(cid:40) (cid:19) (cid:20)(cid:17)(cid:25) (cid:20)(cid:17)(cid:27) (cid:21)(cid:17)(cid:19) (cid:21)(cid:17)(cid:21) (cid:21)(cid:17)(cid:23) (cid:21)(cid:17)(cid:25) (cid:21)(cid:17)(cid:27) (cid:22)(cid:17)(cid:19) (cid:22)(cid:17)(cid:21) (cid:22)(cid:17)(cid:23) (cid:22)(cid:17)(cid:25) (cid:57) (cid:3)(cid:11)(cid:57)(cid:12) (cid:39)(cid:39)(cid:44)(cid:50)(cid:91) (cid:48)(cid:54)(cid:89)(cid:22)(cid:21)(cid:20)(cid:22)(cid:20)(cid:57)(cid:23) 62/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Electrical characteristics Output driving current The GPIOs (general purpose input/outputs) can sink or source up to +/-8 mA, and sink or source up to +/- 20 mA (with a relaxed V /V ). OL OH In the user application, the number of I/O pins which can drive current must be limited to respect the absolute maximum rating specified in Section 6.2: • The sum of the currents sourced by all the I/Os on V plus the maximum DDIOx, consumption of the MCU sourced on V cannot exceed the absolute maximum rating DD, ΣI (see Table 18: Voltage characteristics). VDD • The sum of the currents sunk by all the I/Os on V , plus the maximum consumption of SS the MCU sunk on V , cannot exceed the absolute maximum rating ΣI (see SS VSS Table 18: Voltage characteristics). Output voltage levels Unless otherwise specified, the parameters given in the table below are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 21: General operating conditions. All I/Os are CMOS- and TTL-compliant (FT, TTa or TC unless otherwise specified). Table 47. Output voltage characteristics(1) Symbol Parameter Conditions Min Max Unit VOL Output low level voltage for an I/O pin |IIO| = ≥8 mA - 0.4 V VOH Output high level voltage for an I/O pin VDDIOx 2.7 V VDDIOx–0.4 - VOL(2) Output low level voltage for an I/O pin |IIO| = 2≥0 mA - 1.3 V VOH(2) Output high level voltage for an I/O pin VDDIOx 2.7 V VDDIOx–1.3 - V (2) Output low level voltage for an I/O pin - 0.4 OL |I |= 6 mA V V (2) Output high level voltage for an I/O pin IO V –0.4 - OH DDIOx |I |= 20 mA VOLFm+(2) OFmut+p umt olodwe level voltage for an FTf I/O pin in VDIDOIO x ≥ 2.7 V - 0.4 V |I |= 10 mA - 0.4 V IO 1. The I current sourced or sunk by the device must always respect the absolute maximum rating specified in Table 18: IO Voltage characteristics, and the sum ofthe currents sourced or sunk by all the I/Os (I/O ports and control pins) must always respect the absolute maximum ratings ΣIIO. 2. Data based on characterization results. Not tested in production. Input/output AC characteristics The definition and values of input/output AC characteristics are given in Figure 20 and Table 48, respectively. Unless otherwise specified, the parameters given are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 21: General operating conditions. DocID024849 Rev 3 63/91 74

Electrical characteristics STM32F030x4/x6/x8/xC Table 48. I/O AC characteristics(1)(2) OSPEEDRy Symbol Parameter Conditions Min Max Unit [1:0] value(1) f Maximum frequency(3) - 2 MHz max(IO)out ≥ x0 t Output fall time C = 50 pF, V 2.4 V - 125 f(IO)out L DDIOx ns t Output rise time - 125 r(IO)out f Maximum frequency(3) - 10 MHz max(IO)out ≥ 01 t Output fall time C = 50 pF, V 2.4 V - 25 f(IO)out L DDIOx ns t Output rise time - 25 r(IO)out ≥ C = 30 pF, V 2.7 V - 50 L DDIOx f Maximum frequency(3) C = 50 pF, V ≥ 2.7 V - 30 MHz max(IO)out L DDIOx ≤ < C = 50 pF, 2.4 V V 2.7 V - 20 L DDIOx ≥ C = 30 pF, V 2.7 V - 5 L DDIOx ≥ 11 t Output fall time C = 50 pF, V 2.7 V - 8 f(IO)out L DDIOx ≤ < C = 50 pF, 2.4 V V 2.7 V - 12 L DDIOx ns ≥ C = 30 pF, V 2.7 V - 5 L DDIOx ≥ t Output rise time C = 50 pF, V 2.7 V - 8 r(IO)out L DDIOx ≤ < C = 50 pF, 2.4 V V 2.7 V - 12 L DDIOx f Maximum frequency(3) - 2 MHz Fm+ max(IO)out ≥ configuration t Output fall time C = 50 pF, V 2.4 V - 12 f(IO)out L DDIOx (4) ns t Output rise time - 34 r(IO)out Pulse width of external - t signals detected by the - 10 - ns EXTIpw EXTI controller 1. The I/O speed is configured using the OSPEEDRx[1:0] bits. Refer to the STM32F0xxxx RM0360 reference manual for a description of GPIO Port configuration register. 2. Guaranteed by design, not tested in production. 3. The maximum frequency is defined in Figure 20. 4. When Fm+ configuration is set, the I/O speed control is bypassed. Refer to the STM32F0xxxx reference manual RM0360 for a detailed description of Fm+ I/O configuration. 64/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Electrical characteristics Figure 20. I/O AC characteristics definition (cid:28)(cid:19)(cid:8) (cid:20)(cid:19)(cid:8) (cid:24)(cid:19)(cid:8) (cid:24)(cid:19)(cid:8) (cid:20)(cid:19)(cid:8) (cid:28)(cid:19)(cid:8) (cid:87)(cid:85)(cid:11)(cid:44)(cid:50)(cid:12)(cid:82)(cid:88)(cid:87) (cid:87)(cid:73)(cid:11)(cid:44)(cid:50)(cid:12)(cid:82)(cid:88)(cid:87) (cid:55) (cid:48)(cid:68)(cid:91)(cid:76)(cid:80)(cid:88)(cid:80)(cid:3)(cid:73)(cid:85)(cid:72)(cid:84)(cid:88)(cid:72)(cid:81)(cid:70)(cid:92)(cid:3)(cid:76)(cid:86)(cid:3)(cid:68)(cid:70)(cid:75)(cid:76)(cid:72)(cid:89)(cid:72)(cid:71)(cid:3)(cid:76)(cid:73)(cid:3)(cid:11)(cid:87)(cid:3)(cid:3)(cid:14)(cid:3)(cid:87)(cid:3)(cid:3)(cid:12)(cid:3)(cid:148)(cid:3)(cid:21) (cid:55)(cid:3)(cid:68)(cid:81)(cid:71)(cid:3)(cid:76)(cid:73)(cid:3)(cid:87)(cid:75)(cid:72)(cid:3)(cid:71)(cid:88)(cid:87)(cid:92)(cid:3)(cid:70)(cid:92)(cid:70)(cid:79)(cid:72)(cid:3)(cid:76)(cid:86)(cid:3)(cid:11)(cid:23)(cid:24)(cid:16)(cid:24)(cid:24)(cid:8)(cid:12) (cid:85) (cid:73) (cid:22) (cid:90)(cid:75)(cid:72)(cid:81)(cid:3)(cid:79)(cid:82)(cid:68)(cid:71)(cid:72)(cid:71)(cid:3)(cid:69)(cid:92)(cid:3)(cid:38)(cid:45)(cid:3)(cid:3)(cid:11)(cid:86)(cid:72)(cid:72)(cid:3)(cid:87)(cid:75)(cid:72)(cid:3)(cid:87)(cid:68)(cid:69)(cid:79)(cid:72)(cid:3)(cid:44)(cid:18)(cid:50)(cid:3)(cid:36)(cid:38)(cid:3)(cid:70)(cid:75)(cid:68)(cid:85)(cid:68)(cid:70)(cid:87)(cid:72)(cid:85)(cid:76)(cid:86)(cid:87)(cid:76)(cid:70)(cid:86)(cid:3)(cid:71)(cid:72)(cid:73)(cid:76)(cid:81)(cid:76)(cid:87)(cid:76)(cid:82)(cid:81)(cid:12) (cid:48)(cid:54)(cid:22)(cid:21)(cid:20)(cid:22)(cid:21)(cid:57)(cid:22) 6.3.15 NRST pin characteristics The NRST pin input driver uses the CMOS technology. It is connected to a permanent pull- up resistor, R . PU Unless otherwise specified, the parameters given in the table below are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 21: General operating conditions. Table 49. NRST pin characteristics Symbol Parameter Conditions Min Typ Max Unit V NRST input low level voltage - - - 0.3 V +0.07(1) IL(NRST) DD V V NRST input high level voltage - 0.445 V +0.398(1) - - IH(NRST) DD NRST Schmitt trigger voltage V - - 200 - mV hys(NRST) hysteresis Weak pull-up equivalent R V = V 25 40 55 kΩ PU resistor(2) IN SS V NRST input filtered pulse - - - 100(1) ns F(NRST) 2.7 < V < 3.6 300(3) - - DD V NRST input not filtered pulse ns NF(NRST) 2.4 < V < 3.6 500(3) - - DD 1. Data based on design simulation only. Not tested in production. 2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series resistance is minimal (~10% order). 3. Data based on design simulation only. Not tested in production. DocID024849 Rev 3 65/91 74

Electrical characteristics STM32F030x4/x6/x8/xC Figure 21. Recommended NRST pin protection (cid:40)(cid:91)(cid:87)(cid:72)(cid:85)(cid:81)(cid:68)(cid:79) (cid:85)(cid:72)(cid:86)(cid:72)(cid:87)(cid:3)(cid:70)(cid:76)(cid:85)(cid:70)(cid:88)(cid:76)(cid:87)(cid:11)(cid:20)(cid:12) (cid:57)(cid:39)(cid:39) (cid:53) (cid:51)(cid:56) (cid:49)(cid:53)(cid:54)(cid:55)(cid:11)(cid:21)(cid:12) (cid:44)(cid:81)(cid:87)(cid:72)(cid:85)(cid:81)(cid:68)(cid:79)(cid:3)(cid:85)(cid:72)(cid:86)(cid:72)(cid:87) (cid:41)(cid:76)(cid:79)(cid:87)(cid:72)(cid:85) (cid:19)(cid:17)(cid:20)(cid:3)(cid:151)(cid:41)(cid:11)(cid:22)(cid:12) (cid:48)(cid:54)(cid:20)(cid:28)(cid:27)(cid:26)(cid:27)(cid:57)(cid:23) 1. The external capacitor protects the device against parasitic resets. 2. The user must ensure that the level on the NRST pin can go below the V max level specified in IL(NRST) Table 49: NRST pin characteristics. Otherwise the reset will not be taken into account by the device. 6.3.16 12-bit ADC characteristics Unless otherwise specified, the parameters given in Table 50 are preliminary values derived from tests performed under ambient temperature, f frequency and V supply voltage PCLK DDA conditions summarized in Table 21: General operating conditions. Note: It is recommended to perform a calibration after each power-up. Table 50. ADC characteristics Symbol Parameter Conditions Min Typ Max Unit Analog supply voltage for V - 2.4 - 3.6 V DDA ADC ON Current consumption of I V = V = 3.3 V - 0.9 - mA DDA (ADC) the ADC(1) DD DDA f ADC clock frequency - 0.6 - 14 MHz ADC f (2) Sampling rate - 0.05 - 1 MHz S f = 14 MHz - - 823 kHz External trigger ADC f (2) TRIG frequency - - - 17 1/f ADC VAIN Conversion voltage range - 0 - VDDA V See Equation 1 and R (2) External input impedance - - 50 kΩ AIN Table 51 for details Sampling switch R (2) - - - 1 kΩ ADC resistance Internal sample and hold C (2) - - - 8 pF ADC capacitor 66/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Electrical characteristics Table 50. ADC characteristics (continued) Symbol Parameter Conditions Min Typ Max Unit f = 14 MHz 5.9 µs ADC t (2)(3) Calibration time CAL - 83 1/f ADC 1.5 ADC 1.5 ADC ADC clock = HSI14 cycles + 2 - cycles + 3 - fPCLK cycles fPCLK cycles ADC_DR register write WLATENCY(2)(4) latency ADC clock = PCLK/2 - 4.5 - fPCLK cycle f ADC clock = PCLK/4 - 8.5 - PCLK cycle f = f /2 = ADC PCLK 0.196 µs 14 MHz f = f /2 5.5 1/f ADC PCLK PCLK tlatr(2) Tlartiegngceyr conversion fADC1 =2 fMPCHLzK/4 = 0.219 µs f = f /4 10.5 1/f ADC PCLK PCLK f = f = 14 MHz 0.188 - 0.259 µs ADC HSI14 ADC jitter on trigger JitterADC conversion fADC = fHSI14 - 1 - 1/fHSI14 f = 14 MHz 0.107 - 17.1 µs ADC t (2) Sampling time S - 1.5 - 239.5 1/f ADC t (2) Stabilization time - 14 1/f STAB ADC f = 14 MHz, ADC 1 - 18 µs Total conversion time 12-bit resolution t (2) CONV (including sampling time) 14 to 252 (t for sampling +12.5 for 12-bit resolution S 1/f successive approximation) ADC 1. During conversion of the sampled value (12.5 x ADC clock period), an additional consumption of 100 µA on I and 60 µA DDA on I should be taken into account. DD 2. Guaranteed by design, not tested in production. 3. Specified value includes only ADC timing. It does not include the latency of the register access. 4. This parameter specify latency for transfer of the conversion result to the ADC_DR register. EOC flag is set at this time. Equation 1: R max formula AIN T R <---------------------------------S-------------------------------–R AIN f × C × ln(2N+2) ADC ADC ADC The formula above (Equation 1) is used to determine the maximum external impedance allowed for an error below 1/4 of LSB. Here N = 12 (from 12-bit resolution). DocID024849 Rev 3 67/91 74

Electrical characteristics STM32F030x4/x6/x8/xC Table 51. R max for f = 14 MHz AIN ADC T (cycles) t (µs) R max (kΩ)(1) s S AIN 1.5 0.11 0.4 7.5 0.54 5.9 13.5 0.96 11.4 28.5 2.04 25.2 41.5 2.96 37.2 55.5 3.96 50 71.5 5.11 NA 239.5 17.1 NA 1. Guaranteed by design, not tested in production. Table 52. ADC accuracy(1)(2)(3) Symbol Parameter Test conditions Typ Max(4) Unit ET Total unadjusted error ±3.3 ±4 EO Offset error fPCLK = 48 MHz, ±1.9 ±2.8 f = 14 MHz, R < 10 kΩ ADC AIN EG Gain error ±2.8 ±3 LSB V = 2.7 V to 3.6 V DDA ED Differential linearity error T = −40 to 85 °C ±0.7 ±1.3 A EL Integral linearity error ±1.2 ±1.7 1. ADC DC accuracy values are measured after internal calibration. 2. ADC Accuracy vs. Negative Injection Current: Injecting negative current on any of the standard (non-robust) analog input pins should be avoided as this significantly reduces the accuracy of the conversion being performed on another analog input. It is recommended to add a Schottky diode (pin to ground) to standard analog pins which may potentially inject negative current. Any positive injection current within the limits specified for I and ΣI in Section 6.3.14 does not affect the ADC INJ(PIN) INJ(PIN) accuracy. 3. Better performance may be achieved in restricted V , frequency and temperature ranges. DDA 4. Data based on characterization results, not tested in production. 68/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Electrical characteristics Figure 22. ADC accuracy characteristics (cid:57)(cid:54)(cid:54)(cid:36) (cid:40)(cid:42) (cid:11)(cid:20)(cid:12)(cid:3)(cid:40)(cid:91)(cid:68)(cid:80)(cid:83)(cid:79)(cid:72)(cid:3)(cid:82)(cid:73)(cid:3)(cid:68)(cid:81)(cid:3)(cid:68)(cid:70)(cid:87)(cid:88)(cid:68)(cid:79)(cid:3)(cid:87)(cid:85)(cid:68)(cid:81)(cid:86)(cid:73)(cid:72)(cid:85)(cid:3)(cid:70)(cid:88)(cid:85)(cid:89)(cid:72) (cid:23)(cid:19)(cid:28)(cid:24) (cid:11)(cid:21)(cid:12)(cid:3)(cid:55)(cid:75)(cid:72)(cid:3)(cid:76)(cid:71)(cid:72)(cid:68)(cid:79)(cid:3)(cid:87)(cid:85)(cid:68)(cid:81)(cid:86)(cid:73)(cid:72)(cid:85)(cid:3)(cid:70)(cid:88)(cid:85)(cid:89)(cid:72) (cid:23)(cid:19)(cid:28)(cid:23) (cid:11)(cid:22)(cid:12)(cid:3)(cid:40)(cid:81)(cid:71)(cid:3)(cid:83)(cid:82)(cid:76)(cid:81)(cid:87)(cid:3)(cid:70)(cid:82)(cid:85)(cid:85)(cid:72)(cid:79)(cid:68)(cid:87)(cid:76)(cid:82)(cid:81)(cid:3)(cid:79)(cid:76)(cid:81)(cid:72) (cid:23)(cid:19)(cid:28)(cid:22) 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(cid:40)(cid:50)(cid:3)(cid:32)(cid:3)(cid:50)(cid:73)(cid:73)(cid:86)(cid:72)(cid:87)(cid:3)(cid:40)(cid:85)(cid:85)(cid:82)(cid:85)(cid:29)(cid:3)(cid:80)(cid:68)(cid:91)(cid:76)(cid:80)(cid:88)(cid:80)(cid:3)(cid:71)(cid:72)(cid:89)(cid:76)(cid:68)(cid:87)(cid:76)(cid:82)(cid:81)(cid:3) (cid:26) (cid:69)(cid:72)(cid:87)(cid:90)(cid:72)(cid:72)(cid:81)(cid:3)(cid:87)(cid:75)(cid:72)(cid:3)(cid:73)(cid:76)(cid:85)(cid:86)(cid:87)(cid:3)(cid:68)(cid:70)(cid:87)(cid:88)(cid:68)(cid:79)(cid:3)(cid:87)(cid:85)(cid:68)(cid:81)(cid:86)(cid:76)(cid:87)(cid:76)(cid:82)(cid:81)(cid:3)(cid:68)(cid:81)(cid:71)(cid:3)(cid:87)(cid:75)(cid:72)(cid:3)(cid:73)(cid:76)(cid:85)(cid:86)(cid:87) (cid:11)(cid:20)(cid:12) (cid:25) (cid:76)(cid:71)(cid:72)(cid:68)(cid:79)(cid:3)(cid:82)(cid:81)(cid:72)(cid:17) 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(cid:40)(cid:39)(cid:3)(cid:32)(cid:3)(cid:39)(cid:76)(cid:73)(cid:73)(cid:72)(cid:85)(cid:72)(cid:81)(cid:87)(cid:76)(cid:68)(cid:79)(cid:3)(cid:47)(cid:76)(cid:81)(cid:72)(cid:68)(cid:85)(cid:76)(cid:87)(cid:92)(cid:3)(cid:40)(cid:85)(cid:85)(cid:82)(cid:85)(cid:29)(cid:3)(cid:80)(cid:68)(cid:91)(cid:76)(cid:80)(cid:88)(cid:80)(cid:3) (cid:71)(cid:72)(cid:89)(cid:76)(cid:68)(cid:87)(cid:76)(cid:82)(cid:81)(cid:3)(cid:69)(cid:72)(cid:87)(cid:90)(cid:72)(cid:72)(cid:81)(cid:3)(cid:68)(cid:70)(cid:87)(cid:88)(cid:68)(cid:79)(cid:3)(cid:86)(cid:87)(cid:72)(cid:83)(cid:86)(cid:3)(cid:68)(cid:81)(cid:71)(cid:3)(cid:87)(cid:75)(cid:72)(cid:3)(cid:76)(cid:71)(cid:72)(cid:68)(cid:79)(cid:3)(cid:82)(cid:81)(cid:72)(cid:86)(cid:17) (cid:22) (cid:40)(cid:39) (cid:40)(cid:47)(cid:3)(cid:32)(cid:3)(cid:44)(cid:81)(cid:87)(cid:72)(cid:74)(cid:85)(cid:68)(cid:79)(cid:3)(cid:47)(cid:76)(cid:81)(cid:72)(cid:68)(cid:85)(cid:76)(cid:87)(cid:92)(cid:3)(cid:40)(cid:85)(cid:85)(cid:82)(cid:85)(cid:29)(cid:3)(cid:80)(cid:68)(cid:91)(cid:76)(cid:80)(cid:88)(cid:80)(cid:3)(cid:71)(cid:72)(cid:89)(cid:76)(cid:68)(cid:87)(cid:76)(cid:82)(cid:81)(cid:3) (cid:21) (cid:69)(cid:72)(cid:87)(cid:90)(cid:72)(cid:72)(cid:81)(cid:3)(cid:68)(cid:81)(cid:92)(cid:3)(cid:68)(cid:70)(cid:87)(cid:88)(cid:68)(cid:79)(cid:3)(cid:87)(cid:85)(cid:68)(cid:81)(cid:86)(cid:76)(cid:87)(cid:76)(cid:82)(cid:81)(cid:3)(cid:68)(cid:81)(cid:71)(cid:3)(cid:87)(cid:75)(cid:72)(cid:3)(cid:72)(cid:81)(cid:71)(cid:3)(cid:83)(cid:82)(cid:76)(cid:81)(cid:87)(cid:3) (cid:20) (cid:20)(cid:3)(cid:47)(cid:54)(cid:37)(cid:3)(cid:44)(cid:39)(cid:40)(cid:36)(cid:47) (cid:70)(cid:82)(cid:85)(cid:85)(cid:72)(cid:79)(cid:68)(cid:87)(cid:76)(cid:82)(cid:81)(cid:3)(cid:79)(cid:76)(cid:81)(cid:72)(cid:17) (cid:19) (cid:57)(cid:39)(cid:39)(cid:36) (cid:20) (cid:21) (cid:22) (cid:23) (cid:24) (cid:25) (cid:26) (cid:23)(cid:19)(cid:28)(cid:22)(cid:23)(cid:19)(cid:28)(cid:23) (cid:23)(cid:19)(cid:28)(cid:24) (cid:23)(cid:19)(cid:28)(cid:25) (cid:48)(cid:54)(cid:20)(cid:28)(cid:27)(cid:27)(cid:19)(cid:57)(cid:21) Figure 23. Typical connection diagram using the ADC (cid:57)(cid:39)(cid:39)(cid:36) (cid:54)(cid:68)(cid:80)(cid:83)(cid:79)(cid:72)(cid:3)(cid:68)(cid:81)(cid:71)(cid:3)(cid:75)(cid:82)(cid:79)(cid:71)(cid:3)(cid:36)(cid:39)(cid:38) (cid:57)(cid:55) (cid:70)(cid:82)(cid:81)(cid:89)(cid:72)(cid:85)(cid:87)(cid:72)(cid:85) (cid:53)(cid:36)(cid:44)(cid:49)(cid:11)(cid:20)(cid:12) (cid:36)(cid:44)(cid:49)(cid:91) (cid:53)(cid:36)(cid:39)(cid:38) (cid:20)(cid:21)(cid:16)(cid:69)(cid:76)(cid:87) (cid:70)(cid:82)(cid:81)(cid:89)(cid:72)(cid:85)(cid:87)(cid:72)(cid:85) (cid:38)(cid:83)(cid:68)(cid:85)(cid:68)(cid:86)(cid:76)(cid:87)(cid:76)(cid:70) (cid:57)(cid:55) (cid:44)(cid:47)(cid:147)(cid:20)(cid:151)(cid:36) (cid:57)(cid:36)(cid:44)(cid:49) (cid:38)(cid:36)(cid:39)(cid:38) (cid:48)(cid:54)(cid:22)(cid:22)(cid:28)(cid:19)(cid:19)(cid:57)(cid:20) 1. Refer to Table 50: ADC characteristics for the values of R , R and C . AIN ADC ADC 2. C represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the parasitic pad capacitance (roughly 7 pF). A high C value will downgrade conversion accuracy. To remedy parasitic this, f should be reduced. ADC General PCB design guidelines Power supply decoupling should be performed as shown in Figure 12: Power supply scheme. The 10 nF capacitor should be ceramic (good quality) and it should be placed as close as possible to the chip. DocID024849 Rev 3 69/91 74

Electrical characteristics STM32F030x4/x6/x8/xC 6.3.17 Temperature sensor characteristics Table 53. TS characteristics Symbol Parameter Min Typ Max Unit T (1) V linearity with temperature - ± 1 ± 2 °C L SENSE Avg_Slope(1) Average slope 4.0 4.3 4.6 mV/°C V Voltage at 30 °C (± 5 °C)(2) 1.34 1.43 1.52 V 30 t (1) ADC_IN16 buffer startup time - - 10 µs START ADC sampling time when reading the t (1) 4 - - µs S_temp temperature 1. Guaranteed by design, not tested in production. 2. Measured at V = 3.3 V ± 10 mV. The V ADC conversion result is stored in the TS_CAL1 byte. Refer to Table 3: DDA 30 Temperature sensor calibration values. 6.3.18 Timer characteristics The parameters given in the following tables are guaranteed by design. Refer to Section 6.3.14: I/O port characteristics for details on the input/output alternate function characteristics (output compare, input capture, external clock, PWM output). Table 54. TIMx characteristics Symbol Parameter Conditions Min Typ Max Unit - - 1 - tTIMxCLK tres(TIM) Timer resolution f = 48 MHz - 20.8 - ns TIMxCLK Timer external clock - - fTIMxCLK/2 - MHz fEXT frequency on CH1 to CH4 fTIMxCLK = 48 MHz - 24 - MHz 16-bit timer maximum - - 216 - tTIMxCLK period f = 48 MHz - 1365 - µs TIMxCLK t MAX_COUNT 32-bit timer maximum - - 232 - tTIMxCLK period f = 48 MHz - 89.48 - s TIMxCLK 70/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Electrical characteristics Table 55. IWDG min/max timeout period at 40 kHz (LSI)(1) Min timeout RL[11:0]= Max timeout RL[11:0]= Prescaler divider PR[2:0] bits Unit 0x000 0xFFF /4 0 0.1 409.6 /8 1 0.2 819.2 /16 2 0.4 1638.4 /32 3 0.8 3276.8 ms /64 4 1.6 6553.6 /128 5 3.2 13107.2 /256 6 or 7 6.4 26214.4 1. These timings are given for a 40 kHz clock but the microcontroller internal RC frequency can vary from 30 to 60 kHz. Moreover, given an exact RC oscillator frequency, the exact timings still depend on the phasing of the APB interface clock versus the LSI clock so that there is always a full RC period of uncertainty. Table 56. WWDG min/max timeout value at 48 MHz (PCLK) Prescaler WDGTB Min timeout value Max timeout value Unit 1 0 0.0853 5.4613 2 1 0.1706 10.9226 ms 4 2 0.3413 21.8453 8 3 0.6826 43.6906 6.3.19 Communication interfaces I2C interface characteristics The I2C interface meets the timings requirements of the I2C-bus specification and user manual rev. 03 for: • Standard-mode (Sm): with a bit rate up to 100 kbit/s • Fast-mode (Fm): with a bit rate up to 400 kbit/s • Fast-mode Plus (Fm+): with a bit rate up to 1 Mbit/s. The I2C timings requirements are guaranteed by design when the I2C peripheral is properly configured (refer to Reference manual). The SDA and SCL I/O requirements are met with the following restrictions: the SDA and SCL I/O pins are not “true” open-drain. When configured as open-drain, the PMOS connected between the I/O pin and V is disabled, but is still present. Only FTf I/O pins DDIOx support Fm+ low level output current maximum requirement. Refer to Section 6.3.14: I/O port characteristics for the I2C I/Os characteristics. All I2C SDA and SCL I/Os embed an analog filter. Refer to the table below for the analog filter characteristics: DocID024849 Rev 3 71/91 74

Electrical characteristics STM32F030x4/x6/x8/xC Table 57. I2C analog filter characteristics(1) Symbol Parameter Min Max Unit Maximum pulse width of spikes that t 50(2) 260(3) ns AF are suppressed by the analog filter 1. Guaranteed by design, not tested in production. 2. Spikes with widths below t are filtered. AF(min) 3. Spikes with widths above t are not filtered AF(max) SPI characteristics Unless otherwise specified, the parameters given in Table 58 for SPI are derived from tests performed under the ambient temperature, f frequency and supply voltage conditions PCLKx summarized in Table 21: General operating conditions. Refer to Section 6.3.14: I/O port characteristics for more details on the input/output alternate function characteristics. Table 58. SPI characteristics(1) Symbol Parameter Conditions Min Max Unit f Master mode - 18 SCK SPI clock frequency MHz 1/tc(SCK) Slave mode - 18 t SPI clock rise and fall r(SCK) Capacitive load: C = 15 pF - 6 ns t time f(SCK) t NSS setup time Slave mode 4Tpclk - su(NSS) t NSS hold time Slave mode 2Tpclk + 10 - h(NSS) t Master mode, f = 36 MHz, w(SCKH) SCK high and low time PCLK Tpclk/2 -2 Tpclk/2 + 1 t presc = 4 w(SCKL) Master mode 4 - t su(MI) Data input setup time tsu(SI) Slave mode 5 - t Master mode 4 - h(MI) Data input hold time ns t Slave mode 5 - h(SI) t (2) Data output access time Slave mode, f = 20 MHz 0 3Tpclk a(SO) PCLK t (3) Data output disable time Slave mode 0 18 dis(SO) t Data output valid time Slave mode (after enable edge) - 22.5 v(SO) t Data output valid time Master mode (after enable edge) - 6 v(MO) t Slave mode (after enable edge) 11.5 - h(SO) Data output hold time t Master mode (after enable edge) 2 - h(MO) SPI slave input clock DuCy(SCK) Slave mode 25 75 % duty cycle 1. Data based on characterization results, not tested in production. 2. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate the data. 3. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put the data in Hi-Z 72/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Electrical characteristics Figure 24. SPI timing diagram - slave mode and CPHA = 0 (cid:49)(cid:54)(cid:54)(cid:3)(cid:76)(cid:81)(cid:83)(cid:88)(cid:87) (cid:87)(cid:54)(cid:56)(cid:11)(cid:49)(cid:54)(cid:54)(cid:12) (cid:87)(cid:70)(cid:11)(cid:54)(cid:38)(cid:46)(cid:12) (cid:87)(cid:75)(cid:11)(cid:49)(cid:54)(cid:54)(cid:12) (cid:88)(cid:87) (cid:38)(cid:51)(cid:43)(cid:36)(cid:32)(cid:19) (cid:38)(cid:46)(cid:3)(cid:44)(cid:81)(cid:83) (cid:38)(cid:38)(cid:51)(cid:51)(cid:50)(cid:43)(cid:36)(cid:47)(cid:32)(cid:32)(cid:19)(cid:19) (cid:87)(cid:87)(cid:90)(cid:90)(cid:11)(cid:11)(cid:54)(cid:54)(cid:38)(cid:38)(cid:46)(cid:46)(cid:43)(cid:47)(cid:12)(cid:12) (cid:54) (cid:38)(cid:51)(cid:50)(cid:47)(cid:32)(cid:20) (cid:87)(cid:68)(cid:11)(cid:54)(cid:50)(cid:12) (cid:87)(cid:57)(cid:11)(cid:54)(cid:50)(cid:12) (cid:87)(cid:75)(cid:11)(cid:54)(cid:50)(cid:12) (cid:87)(cid:87)(cid:85)(cid:73)(cid:11)(cid:11)(cid:54)(cid:54)(cid:38)(cid:38)(cid:46)(cid:46)(cid:12)(cid:12) (cid:87)(cid:71)(cid:76)(cid:86)(cid:11)(cid:54)(cid:50)(cid:12) (cid:48)(cid:44)(cid:54)(cid:50) (cid:48)(cid:54)(cid:37)(cid:3)(cid:50)(cid:56)(cid:55) (cid:37)(cid:44)(cid:55)(cid:25)(cid:3)(cid:50)(cid:56)(cid:55) (cid:47)(cid:54)(cid:37)(cid:3)(cid:50)(cid:56)(cid:55) (cid:50)(cid:56)(cid:55)(cid:51)(cid:56)(cid:55) (cid:87)(cid:86)(cid:88)(cid:11)(cid:54)(cid:44)(cid:12) (cid:48)(cid:50)(cid:54)(cid:44) (cid:48)(cid:54)(cid:37)(cid:3)(cid:44)(cid:49) (cid:37)(cid:44)(cid:55)(cid:20)(cid:3)(cid:44)(cid:49) (cid:47)(cid:54)(cid:37)(cid:3)(cid:44)(cid:49) (cid:44)(cid:49)(cid:51)(cid:56)(cid:55) (cid:87)(cid:75)(cid:11)(cid:54)(cid:44)(cid:12) (cid:68)(cid:76)(cid:20)(cid:23)(cid:20)(cid:22)(cid:23)(cid:70) Figure 25. SPI timing diagram - slave mode and CPHA = 1 (cid:49)(cid:54)(cid:54)(cid:3)(cid:76)(cid:81)(cid:83)(cid:88)(cid:87) (cid:87)(cid:54)(cid:56)(cid:11)(cid:49)(cid:54)(cid:54)(cid:12) (cid:87)(cid:70)(cid:11)(cid:54)(cid:38)(cid:46)(cid:12) (cid:87)(cid:75)(cid:11)(cid:49)(cid:54)(cid:54)(cid:12) (cid:88)(cid:87) (cid:38)(cid:51)(cid:43)(cid:36)(cid:32)(cid:20) (cid:83) (cid:81) (cid:38)(cid:51)(cid:50)(cid:47)(cid:32)(cid:19) (cid:46)(cid:3)(cid:76) (cid:87)(cid:90)(cid:11)(cid:54)(cid:38)(cid:46)(cid:43)(cid:12) (cid:38) (cid:38)(cid:51)(cid:43)(cid:36)(cid:32)(cid:20) (cid:87)(cid:90)(cid:11)(cid:54)(cid:38)(cid:46)(cid:47)(cid:12) (cid:54) (cid:38)(cid:51)(cid:50)(cid:47)(cid:32)(cid:20) (cid:87)(cid:89)(cid:11)(cid:54)(cid:50)(cid:12) (cid:87)(cid:75)(cid:11)(cid:54)(cid:50)(cid:12) (cid:87)(cid:85)(cid:11)(cid:54)(cid:38)(cid:46)(cid:12) (cid:87)(cid:71)(cid:76)(cid:86)(cid:11)(cid:54)(cid:50)(cid:12) (cid:87)(cid:68)(cid:11)(cid:54)(cid:50)(cid:12) (cid:87)(cid:73)(cid:11)(cid:54)(cid:38)(cid:46)(cid:12) (cid:48)(cid:44)(cid:54)(cid:50) (cid:48)(cid:54)(cid:37)(cid:3)(cid:50)(cid:56)(cid:55) (cid:37)(cid:44)(cid:55)(cid:25)(cid:3)(cid:50)(cid:56)(cid:55) (cid:47)(cid:54)(cid:37)(cid:3)(cid:50)(cid:56)(cid:55) (cid:50)(cid:56)(cid:55)(cid:51)(cid:56)(cid:55) (cid:87)(cid:86)(cid:88)(cid:11)(cid:54)(cid:44)(cid:12) (cid:87)(cid:75)(cid:11)(cid:54)(cid:44)(cid:12) (cid:48)(cid:50)(cid:54)(cid:44) (cid:44)(cid:49)(cid:51)(cid:56)(cid:55) (cid:48)(cid:54)(cid:37)(cid:3)(cid:44)(cid:49) (cid:37)(cid:44)(cid:55)(cid:3)(cid:20)(cid:3)(cid:44)(cid:49) (cid:47)(cid:54)(cid:37)(cid:3)(cid:44)(cid:49) (cid:68)(cid:76)(cid:20)(cid:23)(cid:20)(cid:22)(cid:24)(cid:69) 1. Measurement points are done at CMOS levels: 0.3 VDD and 0.7 VDD. DocID024849 Rev 3 73/91 74

Electrical characteristics STM32F030x4/x6/x8/xC Figure 26. SPI timing diagram - master mode (cid:43)(cid:76)(cid:74)(cid:75) (cid:49)(cid:54)(cid:54)(cid:3)(cid:76)(cid:81)(cid:83)(cid:88)(cid:87) (cid:87)(cid:70)(cid:11)(cid:54)(cid:38)(cid:46)(cid:12) (cid:88)(cid:87) (cid:38)(cid:51)(cid:43)(cid:36)(cid:32)(cid:19) (cid:83) (cid:88)(cid:87) (cid:38)(cid:51)(cid:50)(cid:47)(cid:32)(cid:19) (cid:50) (cid:46)(cid:3) (cid:38)(cid:51)(cid:43)(cid:36)(cid:32)(cid:19) (cid:54)(cid:38) (cid:38)(cid:51)(cid:50)(cid:47)(cid:32)(cid:20) (cid:88)(cid:87) (cid:38)(cid:51)(cid:43)(cid:36)(cid:32)(cid:20) (cid:83) (cid:88)(cid:87) (cid:38)(cid:51)(cid:50)(cid:47)(cid:32)(cid:19) (cid:50) (cid:46)(cid:3) (cid:38)(cid:51)(cid:43)(cid:36)(cid:32)(cid:20) (cid:54)(cid:38) (cid:38)(cid:51)(cid:50)(cid:47)(cid:32)(cid:20) (cid:87)(cid:86)(cid:88)(cid:11)(cid:48)(cid:44)(cid:12) (cid:87)(cid:87)(cid:90)(cid:90)(cid:11)(cid:11)(cid:54)(cid:54)(cid:38)(cid:38)(cid:46)(cid:46)(cid:43)(cid:47)(cid:12)(cid:12) (cid:87)(cid:87)(cid:85)(cid:73)(cid:11)(cid:11)(cid:54)(cid:54)(cid:38)(cid:38)(cid:46)(cid:46)(cid:12)(cid:12) (cid:48)(cid:44)(cid:54)(cid:50) (cid:48)(cid:54)(cid:37)(cid:3)(cid:44)(cid:49) (cid:37)(cid:44)(cid:55)(cid:25)(cid:3)(cid:44)(cid:49) (cid:47)(cid:54)(cid:37)(cid:3)(cid:44)(cid:49) (cid:44)(cid:49)(cid:51)(cid:56)(cid:55) (cid:87)(cid:75)(cid:11)(cid:48)(cid:44)(cid:12) (cid:48)(cid:50)(cid:54)(cid:44) (cid:48)(cid:54)(cid:37)(cid:3)(cid:50)(cid:56)(cid:55) (cid:37)(cid:44)(cid:55)(cid:20)(cid:3)(cid:50)(cid:56)(cid:55) (cid:47)(cid:54)(cid:37)(cid:3)(cid:50)(cid:56)(cid:55) (cid:50)(cid:56)(cid:55)(cid:51)(cid:56)(cid:55) (cid:87)(cid:89)(cid:11)(cid:48)(cid:50)(cid:12) (cid:87)(cid:75)(cid:11)(cid:48)(cid:50)(cid:12) (cid:68)(cid:76)(cid:20)(cid:23)(cid:20)(cid:22)(cid:25)(cid:70) 1. Measurement points are done at CMOS levels: 0.3 VDD and 0.7 VDD. 74/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Package information 7 Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK is an ST trademark. 7.1 LQFP64 package information LQFP64 is 64-pin, 10 x 10 mm low-profile quad flat package. Figure 27. LQFP64 outline (cid:54)(cid:40)(cid:36)(cid:55)(cid:44)(cid:49)(cid:42)(cid:3)(cid:51)(cid:47)(cid:36)(cid:49)(cid:40) (cid:38) (cid:36) (cid:36)(cid:21) (cid:19)(cid:17)(cid:21)(cid:24)(cid:3)(cid:80)(cid:80) (cid:42)(cid:36)(cid:56)(cid:42)(cid:40)(cid:3)(cid:51)(cid:47)(cid:36)(cid:49)(cid:40) (cid:20) (cid:70) (cid:36) (cid:70)(cid:70)(cid:70) (cid:38) (cid:20) (cid:39) (cid:36) (cid:46) (cid:39)(cid:20) (cid:47) (cid:39)(cid:22) (cid:47)(cid:20) (cid:23)(cid:27) (cid:22)(cid:22) (cid:22)(cid:21) (cid:23)(cid:28) (cid:69) (cid:40)(cid:22) (cid:40)(cid:20) (cid:40) (cid:25)(cid:23) (cid:20)(cid:26) (cid:20) (cid:20)(cid:25) (cid:51)(cid:44)(cid:49)(cid:3)(cid:20) (cid:72) (cid:44)(cid:39)(cid:40)(cid:49)(cid:55)(cid:44)(cid:41)(cid:44)(cid:38)(cid:36)(cid:55)(cid:44)(cid:50)(cid:49) (cid:24)(cid:58)(cid:66)(cid:48)(cid:40)(cid:66)(cid:57)(cid:22) 1. Drawing is not to scale. Table 59. LQFP64 mechanical data millimeters inches(1) Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.0020 - 0.0059 A2 1.350 1.400 1.450 0.0531 0.0551 0.0571 DocID024849 Rev 3 75/91 88

Package information STM32F030x4/x6/x8/xC Table 59. LQFP64 mechanical data (continued) millimeters inches(1) Symbol Min Typ Max Min Typ Max b 0.170 0.220 0.270 0.0067 0.0087 0.0106 c 0.090 - 0.200 0.0035 - 0.0079 D - 12.000 - - 0.4724 - D1 - 10.000 - - 0.3937 - D3 - 7.500 - - 0.2953 - E - 12.000 - - 0.4724 - E1 - 10.000 - - 0.3937 - E3 - 7.500 - - 0.2953 - e - 0.500 - - 0.0197 - K 0° 3.5° 7° 0° 3.5° 7° L 0.450 0.600 0.750 0.0177 0.0236 0.0295 L1 - 1.000 - - 0.0394 - ccc - - 0.080 - - 0.0031 1. Values in inches are converted from mm and rounded to 4 decimal digits. Figure 28. LQFP64 recommended footprint (cid:23)(cid:27) (cid:22)(cid:22) (cid:19)(cid:17)(cid:22) (cid:23)(cid:28) (cid:19)(cid:17)(cid:24) (cid:22)(cid:21) (cid:20)(cid:21)(cid:17)(cid:26) (cid:20)(cid:19)(cid:17)(cid:22) (cid:20)(cid:19)(cid:17)(cid:22) (cid:25)(cid:23) (cid:20)(cid:26) (cid:20)(cid:17)(cid:21) (cid:20) (cid:20)(cid:25) (cid:26)(cid:17)(cid:27) (cid:20)(cid:21)(cid:17)(cid:26) (cid:68)(cid:76)(cid:20)(cid:23)(cid:28)(cid:19)(cid:28)(cid:70) 1. Dimensions are expressed in millimeters. 76/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Package information Device marking The following figure gives an example of topside marking orientation versus pin 1 identifier location. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 29. LQFP64 marking example (package top view) (cid:53)(cid:72)(cid:89)(cid:76)(cid:86)(cid:76)(cid:82)(cid:81)(cid:3)(cid:70)(cid:82)(cid:71)(cid:72) (cid:53) (cid:54)(cid:55)(cid:48)(cid:22)(cid:21)(cid:41)(cid:19)(cid:22)(cid:19) (cid:51)(cid:85)(cid:82)(cid:71)(cid:88)(cid:70)(cid:87)(cid:3)(cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:73)(cid:76)(cid:70)(cid:68)(cid:87)(cid:76)(cid:82)(cid:81)(cid:3)(cid:11)(cid:20)(cid:12) (cid:53)(cid:38)(cid:55)(cid:25) (cid:39)(cid:68)(cid:87)(cid:72)(cid:3)(cid:70)(cid:82)(cid:71)(cid:72) (cid:122) (cid:116)(cid:116) (cid:51)(cid:76)(cid:81)(cid:3)(cid:20)(cid:3)(cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:73)(cid:76)(cid:72)(cid:85) (cid:48)(cid:54)(cid:89)(cid:22)(cid:25)(cid:23)(cid:26)(cid:24)(cid:57)(cid:20) 1. Parts marked as "ES", "E" or accompanied by an Engineering Sample notification letter, are not yet qualified and therefore not yet ready to be used in production and any consequences deriving from such usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering samples in production. ST Quality has to be contacted prior to any decision to use these Engineering Samples to run qualification activity. DocID024849 Rev 3 77/91 88

Package information STM32F030x4/x6/x8/xC 7.2 LQFP48 package information LQFP48 is a 48-pin, 7 x 7 mm low-profile quad flat package Figure 30. LQFP48 outline (cid:54)(cid:40)(cid:36)(cid:55)(cid:44)(cid:49)(cid:42) (cid:51)(cid:47)(cid:36)(cid:49)(cid:40) (cid:38) (cid:21) (cid:36)(cid:36) (cid:20) (cid:36) (cid:70) (cid:19)(cid:17)(cid:21)(cid:24)(cid:3)(cid:80)(cid:80) (cid:42)(cid:36)(cid:56)(cid:42)(cid:40)(cid:3)(cid:51)(cid:47)(cid:36)(cid:49)(cid:40) (cid:70)(cid:70)(cid:70) (cid:38) (cid:39) (cid:46) (cid:20) (cid:47) (cid:36) (cid:39)(cid:20) (cid:47)(cid:20) (cid:39)(cid:22) (cid:22)(cid:25) (cid:21)(cid:24) (cid:22)(cid:26) (cid:21)(cid:23) (cid:69) (cid:40)(cid:22) (cid:40)(cid:20) (cid:40) (cid:23)(cid:27) (cid:20)(cid:22) (cid:51)(cid:44)(cid:49)(cid:3)(cid:20) (cid:44)(cid:39)(cid:40)(cid:49)(cid:55)(cid:44)(cid:41)(cid:44)(cid:38)(cid:36)(cid:55)(cid:44)(cid:50)(cid:49) (cid:20) (cid:20)(cid:21) (cid:72) (cid:24)(cid:37)(cid:66)(cid:48)(cid:40)(cid:66)(cid:57)(cid:21) 1. Drawing is not to scale. Table 60. LQFP48 mechanical data millimeters inches(1) Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.0020 - 0.0059 A2 1.350 1.400 1.450 0.0531 0.0551 0.0571 b 0.170 0.220 0.270 0.0067 0.0087 0.0106 c 0.090 - 0.200 0.0035 - 0.0079 D 8.800 9.000 9.200 0.3465 0.3543 0.3622 D1 6.800 7.000 7.200 0.2677 0.2756 0.2835 D3 - 5.500 - - 0.2165 - E 8.800 9.000 9.200 0.3465 0.3543 0.3622 78/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Package information Table 60. LQFP48 mechanical data (continued) millimeters inches(1) Symbol Min Typ Max Min Typ Max E1 6.800 7.000 7.200 0.2677 0.2756 0.2835 E3 - 5.500 - - 0.2165 - e - 0.500 - - 0.0197 - L 0.450 0.600 0.750 0.0177 0.0236 0.0295 L1 - 1.000 - - 0.0394 - k 0° 3.5° 7° 0° 3.5° 7° ccc - - 0.080 - - 0.0031 1. Values in inches are converted from mm and rounded to 4 decimal digits. Figure 31. LQFP48 recommended footprint (cid:19)(cid:17)(cid:24)(cid:19) (cid:20)(cid:17)(cid:21)(cid:19) (cid:19)(cid:17)(cid:22)(cid:19) (cid:22)(cid:25) (cid:21)(cid:24) (cid:22)(cid:26) (cid:21)(cid:23) (cid:19)(cid:17)(cid:21)(cid:19) (cid:26)(cid:17)(cid:22)(cid:19) (cid:28)(cid:17)(cid:26)(cid:19) (cid:24)(cid:17)(cid:27)(cid:19) (cid:26)(cid:17)(cid:22)(cid:19) (cid:23)(cid:27) (cid:20)(cid:22) (cid:20) (cid:20)(cid:21) (cid:20)(cid:17)(cid:21)(cid:19) (cid:24)(cid:17)(cid:27)(cid:19) (cid:28)(cid:17)(cid:26)(cid:19) (cid:68)(cid:76)(cid:20)(cid:23)(cid:28)(cid:20)(cid:20)(cid:71) 1. Dimensions are expressed in millimeters. DocID024849 Rev 3 79/91 88

Package information STM32F030x4/x6/x8/xC Device marking The following figure gives an example of topside marking orientation versus pin 1 identifier location. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 32. LQFP48 marking example (package top view) (cid:54)(cid:55)(cid:48)(cid:22)(cid:21)(cid:41) (cid:51)(cid:85)(cid:82)(cid:71)(cid:88)(cid:70)(cid:87)(cid:3)(cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:73)(cid:76)(cid:70)(cid:68)(cid:87)(cid:76)(cid:82)(cid:81)(cid:11)(cid:20)(cid:12) (cid:19)(cid:22)(cid:19)(cid:38)(cid:38)(cid:55)(cid:25) (cid:39)(cid:68)(cid:87)(cid:72)(cid:3)(cid:70)(cid:82)(cid:71)(cid:72) (cid:60) (cid:58)(cid:58) (cid:51)(cid:76)(cid:81)(cid:3)(cid:20)(cid:3)(cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:73)(cid:76)(cid:72)(cid:85) (cid:53)(cid:72)(cid:89)(cid:76)(cid:86)(cid:76)(cid:82)(cid:81)(cid:3)(cid:70)(cid:82)(cid:71)(cid:72) (cid:53) (cid:48)(cid:54)(cid:89)(cid:22)(cid:25)(cid:23)(cid:26)(cid:25)(cid:57)(cid:20) 1. Parts marked as "ES", "E" or accompanied by an Engineering Sample notification letter, are not yet qualified and therefore not yet ready to be used in production and any consequences deriving from such usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering samples in production. ST Quality has to be contacted prior to any decision to use these Engineering Samples to run qualification activity. 80/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Package information 7.3 LQFP32 package information LQFP32 is a 32-pin, 7 x 7 mm low-profile quad flat package Figure 33. LQFP32 outline (cid:54)(cid:40)(cid:36)(cid:55)(cid:44)(cid:49)(cid:42) (cid:51)(cid:47)(cid:36)(cid:49)(cid:40) (cid:38) (cid:21) (cid:36) (cid:36) (cid:20) (cid:70) (cid:36) (cid:19)(cid:17)(cid:21)(cid:24)(cid:3)(cid:80)(cid:80) (cid:42)(cid:36)(cid:56)(cid:42)(cid:40)(cid:3)(cid:51)(cid:47)(cid:36)(cid:49)(cid:40) (cid:70)(cid:70)(cid:70) (cid:38) (cid:46) (cid:39) (cid:20) (cid:47) (cid:36) (cid:39)(cid:20) (cid:47)(cid:20) (cid:39)(cid:22) (cid:21)(cid:23) (cid:20)(cid:26) (cid:21)(cid:24) (cid:20)(cid:25) (cid:69) (cid:40)(cid:22) (cid:40)(cid:20) (cid:40) (cid:22)(cid:21) (cid:28) (cid:51)(cid:44)(cid:49)(cid:3)(cid:20) (cid:44)(cid:39)(cid:40)(cid:49)(cid:55)(cid:44)(cid:41)(cid:44)(cid:38)(cid:36)(cid:55)(cid:44)(cid:50)(cid:49) (cid:20) (cid:27) (cid:72) (cid:22)(cid:55)(cid:64)(cid:46)(cid:38)(cid:64)(cid:55)(cid:19) 1. Drawing is not to scale. Table 61. LQFP32 mechanical data millimeters inches(1) Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.0020 - 0.0059 A2 1.350 1.400 1.450 0.0531 0.0551 0.0571 DocID024849 Rev 3 81/91 88

Package information STM32F030x4/x6/x8/xC Table 61. LQFP32 mechanical data (continued) millimeters inches(1) Symbol Min Typ Max Min Typ Max b 0.300 0.370 0.450 0.0118 0.0146 0.0177 c 0.090 - 0.200 0.0035 - 0.0079 D 8.800 9.000 9.200 0.3465 0.3543 0.3622 D1 6.800 7.000 7.200 0.2677 0.2756 0.2835 D3 - 5.600 - - 0.2205 - E 8.800 9.000 9.200 0.3465 0.3543 0.3622 E1 6.800 7.000 7.200 0.2677 0.2756 0.2835 E3 - 5.600 - - 0.2205 - e - 0.800 - - 0.0315 - L 0.450 0.600 0.750 0.0177 0.0236 0.0295 L1 - 1.000 - - 0.0394 - k 0° 3.5° 7° 0° 3.5° 7° ccc - - 0.100 - - 0.0039 1. Values in inches are converted from mm and rounded to 4 decimal digits. Figure 34. LQFP32 recommended footprint (cid:19)(cid:17)(cid:27)(cid:19) (cid:20)(cid:17)(cid:21)(cid:19) (cid:19)(cid:21) (cid:18)(cid:24) (cid:19)(cid:22) (cid:18)(cid:23) (cid:19)(cid:17)(cid:24)(cid:19) (cid:19)(cid:17)(cid:22)(cid:19) (cid:26)(cid:17)(cid:22)(cid:19) (cid:25)(cid:17)(cid:20)(cid:19) (cid:28)(cid:17)(cid:26)(cid:19) (cid:26)(cid:17)(cid:22)(cid:19) (cid:20)(cid:19) (cid:26) (cid:18) (cid:25) (cid:20)(cid:17)(cid:21)(cid:19) (cid:25)(cid:17)(cid:20)(cid:19) (cid:28)(cid:17)(cid:26)(cid:19) (cid:24)(cid:57)(cid:66)(cid:41)(cid:51)(cid:66)(cid:57)(cid:21) 1. Dimensions are expressed in millimeters. 82/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Package information Device marking The following figure gives an example of topside marking orientation versus pin 1 identifier location. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 35. LQFP32 marking example (package top view) (cid:54)(cid:55)(cid:48)(cid:22)(cid:21)(cid:41) (cid:51)(cid:85)(cid:82)(cid:71)(cid:88)(cid:70)(cid:87)(cid:3)(cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:73)(cid:76)(cid:70)(cid:68)(cid:87)(cid:76)(cid:82)(cid:81)(cid:3)(cid:11)(cid:20)(cid:12) (cid:19)(cid:22)(cid:19)(cid:46)(cid:25)(cid:55)(cid:25) (cid:39)(cid:68)(cid:87)(cid:72)(cid:3)(cid:70)(cid:82)(cid:71)(cid:72) (cid:60) (cid:58)(cid:58) (cid:51)(cid:76)(cid:81)(cid:3)(cid:20)(cid:3)(cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:73)(cid:76)(cid:70)(cid:68)(cid:87)(cid:76)(cid:82)(cid:81) (cid:53)(cid:72)(cid:89)(cid:76)(cid:86)(cid:76)(cid:82)(cid:81)(cid:3)(cid:70)(cid:82)(cid:71)(cid:72) (cid:53) (cid:48)(cid:54)(cid:89)(cid:22)(cid:25)(cid:23)(cid:26)(cid:26)(cid:57)(cid:20) 1. Parts marked as "ES", "E" or accompanied by an Engineering Sample notification letter, are not yet qualified and therefore not yet ready to be used in production and any consequences deriving from such usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering samples in production. ST Quality has to be contacted prior to any decision to use these Engineering Samples to run qualification activity. DocID024849 Rev 3 83/91 88

Package information STM32F030x4/x6/x8/xC 7.4 TSSOP20 package information TSSOP20 is a 20-lead thin shrink small outline, 6.5 x 4.4 mm, 0.65 mm pitch package. Figure 36.TSSOP20 outline (cid:24) (cid:1006)(cid:1004) (cid:1005)(cid:1005) (cid:272) (cid:28)(cid:1005) (cid:28) (cid:94)(cid:28)(cid:4)(cid:100)(cid:47)(cid:69)(cid:39) (cid:1004)(cid:856)(cid:1006)(cid:1009)(cid:3)(cid:373)(cid:373) (cid:87)(cid:62)(cid:4)(cid:69)(cid:28) (cid:39)(cid:4)(cid:104)(cid:39)(cid:28)(cid:3)(cid:87)(cid:62)(cid:4)(cid:69)(cid:28) (cid:18) (cid:1005) (cid:1005)(cid:1004) (cid:87)(cid:47)(cid:69)(cid:3)(cid:1005) (cid:47)(cid:24)(cid:28)(cid:69)(cid:100)(cid:47)(cid:38)(cid:47)(cid:18)(cid:4)(cid:100)(cid:47)(cid:75)(cid:69) (cid:364) (cid:258)(cid:258)(cid:258) (cid:18) (cid:4)(cid:1005) (cid:62) (cid:4) (cid:4)(cid:1006) (cid:62)(cid:1005) (cid:271) (cid:286) (cid:122)(cid:4)(cid:890)(cid:68)(cid:28)(cid:890)(cid:115)(cid:1007) 1. Drawing is not to scale. Table 62. TSSOP20 mechanical data millimeters inches(1) Symbol Min. Typ. Max. Min. Typ. Max. A - - 1.200 - - 0.0472 A1 0.050 - 0.150 0.0020 - 0.0059 A2 0.800 1.000 1.050 0.0315 0.0394 0.0413 b 0.190 - 0.300 0.0075 - 0.0118 c 0.090 - 0.200 0.0035 - 0.0079 D 6.400 6.500 6.600 0.2520 0.2559 0.2598 E 6.200 6.400 6.600 0.2441 0.2520 0.2598 E1 4.300 4.400 4.500 0.1693 0.1732 0.1772 e - 0.650 - - 0.0256 - L 0.450 0.600 0.750 0.0177 0.0236 0.0295 L1 - 1.000 - - 0.0394 - 84/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Package information Table 62. TSSOP20 mechanical data (continued) millimeters inches(1) Symbol Min. Typ. Max. Min. Typ. Max. k 0° - 8° 0° - 8° aaa - - 0.100 - - 0.0039 1. Values in inches are converted from mm and rounded to four decimal digits. Figure 37. TSSOP20 footprint (cid:19)(cid:17)(cid:21)(cid:24) (cid:25)(cid:17)(cid:21)(cid:24) (cid:21)(cid:19) (cid:20)(cid:20) (cid:20)(cid:17)(cid:22)(cid:24) (cid:19)(cid:17)(cid:21)(cid:24) (cid:26)(cid:17)(cid:20)(cid:19) (cid:23)(cid:17)(cid:23)(cid:19) (cid:20)(cid:17)(cid:22)(cid:24) (cid:20) (cid:20)(cid:19) (cid:19)(cid:17)(cid:23)(cid:19) (cid:19)(cid:17)(cid:25)(cid:24) (cid:60)(cid:36)(cid:66)(cid:41)(cid:51)(cid:66)(cid:57)(cid:20) 1. Dimensions are expressed in millimeters. DocID024849 Rev 3 85/91 88

Package information STM32F030x4/x6/x8/xC Device marking The following figure gives an example of topside marking orientation versus pin 1 identifier location. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 38. TSSOP20 marking example (package top view) (cid:39)(cid:72)(cid:89)(cid:76)(cid:70)(cid:72)(cid:3)(cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:73)(cid:76)(cid:70)(cid:68)(cid:87)(cid:76)(cid:82)(cid:81)(cid:3)(cid:11)(cid:20)(cid:12) (cid:22)(cid:21)(cid:41)(cid:19)(cid:22)(cid:19)(cid:41)(cid:23)(cid:51)(cid:25) (cid:39)(cid:68)(cid:87)(cid:72)(cid:3)(cid:70)(cid:82)(cid:71)(cid:72) (cid:51)(cid:76)(cid:81)(cid:3)(cid:20)(cid:3)(cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:73)(cid:76)(cid:70)(cid:68)(cid:87)(cid:76)(cid:82)(cid:81) (cid:53)(cid:72)(cid:89)(cid:76)(cid:86)(cid:76)(cid:82)(cid:81)(cid:3)(cid:70)(cid:82)(cid:71)(cid:72) (cid:60) (cid:58)(cid:58) (cid:53) (cid:48)(cid:54)(cid:89)(cid:22)(cid:25)(cid:23)(cid:26)(cid:27)(cid:57)(cid:20) 1. Parts marked as "ES", "E" or accompanied by an Engineering Sample notification letter, are not yet qualified and therefore not yet ready to be used in production and any consequences deriving from such usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering samples in production. ST Quality has to be contacted prior to any decision to use these Engineering Samples to run qualification activity. 86/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Package information 7.5 Thermal characteristics The maximum chip junction temperature (T max) must never exceed the values given in J Table 21: General operating conditions. The maximum chip-junction temperature, T max, in degrees Celsius, may be calculated J using the following equation: T max = T max + (P max x Θ ) J A D JA Where: • T max is the maximum ambient temperature in °C, A • Θ is the package junction-to-ambient thermal resistance, in °C/W, JA • P max is the sum of P max and P max (P max = P max + P max), D INT I/O D INT I/O • P max is the product of I andV , expressed in Watts. This is the maximum chip INT DD DD internal power. P max represents the maximum power dissipation on output pins where: I/O PI/O max = Σ (VOL × IOL) + Σ ((VDD - VOH) × IOH), taking into account the actual VOL / IOL and VOH / IOH of the I/Os at low and high level in the application. Table 63. Package thermal characteristics Symbol Parameter Value Unit Thermal resistance junction-ambient 44 LQFP64 - 10 mm x 10 mm Thermal resistance junction-ambient 55 LQFP48 - 7 mm x 7 mm Θ °C/W J Thermal resistance junction-ambient 56 LQFP32 - 7 mm x 7 mm Thermal resistance junction-ambient 76 TSSOP20 - 6.5 mm x 6.4 mm 7.5.1 Reference document JESD51-2 Integrated Circuits Thermal Test Method Environment Conditions - Natural Convection (Still Air). Available from www.jedec.org DocID024849 Rev 3 87/91 88

Ordering information STM32F030x4/x6/x8/xC 8 Ordering information For a list of available options (memory, package, and so on) or for further information on any aspect of this device, please contact your nearest ST sales office. + Table 64. Ordering information scheme Example: STM32 F 030 C 6 T 6 x Device family STM32 = ARM-based 32-bit microcontroller Product type F = General-purpose Sub-family 030 = STM32F030xx Pin count F = 20 pins K = 32 pins C = 48 pins R = 64 pins Code size 4 = 16 Kbyte of Flash memory 6 = 32 Kbyte of Flash memory 8 = 64 Kbyte of Flash memory C = 256 Kbyte of Flash memory Package P = TSSOP T = LQFP Temperature range 6 = –40 to 85 °C Options xxx = programmed parts TR = tape and reel 88/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC Revision history 9 Revision history Table 65. Document revision history Date Revision Changes 04-Jul-2013 1 Initial release. Extended the applicability to STM32F030xC. Updated: – Features and Table Device summary, – Section: Description, – Table: STM32F030x4/6/8/C family device features and peripheral counts, – Figure: Block diagram, – Section: Memories, – Section: General-purpose inputs/outputs (GPIOs), – Section: Universal synchronous/asynchronous receiver transmitters (USART), – Table: STM32F030x4/6/8/C pin definitions, – Table: Alternate functions selected through GPIOA_AFR registers for port A, – Table: Alternate functions selected through 15-Jan-2015 2 GPIOB_AFR registers for port B – Table: Alternate functions selected through GPIOC_AFR registers for port C – Table: Alternate functions selected through GPIOD_AFR registers for port D, – Table: Alternate functions selected through GPIOF_AFR registers for port F, – Section: EMC characteristics, – Section: Part numbering. Added device marking examples: – Figure: LQFP64 marking example (package top view), – Figure: LQFP48 marking example (package top view), – Figure: LQFP32 marking example (package top view), – Figure: TSSOP20 marking example (package top view). Updated: – Table 2: STM32F030x4/x6/x8/xC family device features and peripheral counts – Figure 1: Block diagram and figure footnotes 23-Jan-2017 3 – Figure 2: Clock tree and figure footnotes – Section 3.11: Timers and watchdogs - number of timers, counts of complementary outputs in the table and the footnotes DocID024849 Rev 3 89/91 90

Revision history STM32F030x4/x6/x8/xC Table 65. Document revision history (continued) Date Revision Changes – Section 3.11.2: General-purpose timers (TIM3, TIM14..17) - number of timers – Table 5: Timer feature comparison - footnotes added – Table 7: STM32F030x4/x6/x8/xC I2C implementation - FM+ and footnote – Figure 3 through Figure 6 - darker highlight on pins – Table 11: STM32F030x4/6/8/C pin definitions - corrections – Table 12: Alternate functions selected through GPIOA_AFR registers for port A - note order – Table 14 through Table 16 - corrected footnotes – Figure 9: STM32F030x4/x6/x8/xC memory map footnote – Figure 12: Power supply scheme – Table 24: Embedded internal reference voltage: added t , changed V and t values START REFINT S_vrefint and notes – Table 25: Typical and maximum current consumption from V supply at V = 3.6 V footnotes DD DD – Table 26: Typical and maximum current consumption from the V supply values for STM32F030xC and DDA 23-Jan-2017 3 footnotes – Table 34: LSE oscillator characteristics (f = 32.768 LSE kHz) LSEDRV[1:0] values removed (see ref. manual) – Table 50: ADC characteristics - t defined relative STAB to clock frequency; notes 3. and 4. added – Section 3.14: Universal synchronous/asynchronous receiver/transmitter (USART) - introduction and Table 8: STM32F0x0 USART implementation – Figure 9: STM32F030x4/x6/x8/xC memory map footnote – Table 43: ESD absolute maximum ratings - C4 or C3 class, depending on device variant; CDM values updated to match the referenced standard. (CDM standard was updated in the previous release, without duly modifying the related values.) – Table 53: TS characteristics: removed the min. value for t and parameter name change START – Figure 18 and Figure 19 improved – Section 7: Package information name and structure change – Section 8: Ordering information renamed from Part numbering 90/91 DocID024849 Rev 3

STM32F030x4/x6/x8/xC IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved DocID024849 Rev 3 91/91 91

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