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STL150N3LLH5产品简介:
ICGOO电子元器件商城为您提供STL150N3LLH5由STMicroelectronics设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 STL150N3LLH5价格参考。STMicroelectronicsSTL150N3LLH5封装/规格:晶体管 - FET,MOSFET - 单, 表面贴装 N 沟道 30V 195A(Tc) 114W(Tc) PowerFlat™(5x6)。您可以下载STL150N3LLH5参考资料、Datasheet数据手册功能说明书,资料中有STL150N3LLH5 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | |
ChannelMode | Enhancement |
描述 | MOSFET N-CH 30V 35A POWERFLAT6X5MOSFET N-channel 30 V PowerFLAT |
产品分类 | FET - 单分离式半导体 |
FET功能 | 逻辑电平门 |
FET类型 | MOSFET N 通道,金属氧化物 |
Id-ContinuousDrainCurrent | 150 A |
Id-连续漏极电流 | 150 A |
品牌 | STMicroelectronics |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 晶体管,MOSFET,STMicroelectronics STL150N3LLH5STripFET™ V |
数据手册 | |
产品型号 | STL150N3LLH5 |
Pd-PowerDissipation | 80 W |
Pd-功率耗散 | 80 W |
RdsOn-Drain-SourceResistance | 1.75 mOhms |
RdsOn-漏源导通电阻 | 1.75 mOhms |
Vds-Drain-SourceBreakdownVoltage | 30 V |
Vds-漏源极击穿电压 | 30 V |
Vgs-Gate-SourceBreakdownVoltage | +/- 22 V |
Vgs-栅源极击穿电压 | 22 V |
上升时间 | 30.8 ns |
下降时间 | 47.8 ns |
不同Id时的Vgs(th)(最大值) | 2.2V @ 250µA |
不同Vds时的输入电容(Ciss) | 5800pF @ 25V |
不同Vgs时的栅极电荷(Qg) | 40nC @ 4.5V |
不同 Id、Vgs时的 RdsOn(最大值) | 1.75 毫欧 @ 17.5A,10V |
产品目录页面 | |
产品种类 | MOSFET |
供应商器件封装 | PowerFlat™(6x5) |
其它名称 | 497-8483-1 |
其它有关文件 | http://www.st.com/web/catalog/sense_power/FM100/CL824/SC1164/PF201844?referrer=70071840 |
典型关闭延迟时间 | 65.8 ns |
功率-最大值 | 4W |
包装 | 剪切带 (CT) |
商标 | STMicroelectronics |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
封装 | Reel |
封装/外壳 | 8-PowerVDFN |
封装/箱体 | PowerFLAT-8 5x6 |
工厂包装数量 | 3000 |
晶体管极性 | N-Channel |
最大工作温度 | + 150 C |
最小工作温度 | - 55 C |
标准包装 | 1 |
漏源极电压(Vdss) | 30V |
特色产品 | http://www.digikey.com/cn/zh/ph/ST/stl-family.html |
电流-连续漏极(Id)(25°C时) | 195A (Tc) |
系列 | STL150N3LLH5 |
通道模式 | Enhancement |
配置 | Single |
STL150N3LLH5 N-channel 30 V, 0.0014 Ω typ., 35 A STripFET™ V Power MOSFET in a PowerFLAT™ 5x6 package Datasheet - production data Features Order code VDS RDS(on) max. ID STL150N3LLH5 30 V 0.00175 Ω 35 A (1) 1. The value is rated according R thj-pcb 1 2 • R * Q industry benchmark 3 DS(on) g 4 • Extremely low on-resistance R DS(on) • High avalanche ruggedness PowerFLAT™5x6 • Low gate drive power losses Applications Figure 1. Internal schematic diagram • Switching applications D(5, 6, 7, 8) 8 7 6 5 Description This device is an N-channel Power MOSFET developed using STMicroelectronics’ STripFET™V technology. The device has been G(4) optimized to achieve very low on-state resistance, contributing to a FOM that is among the best in its class. 1 2 3 4 Top View S(1, 2, 3) AM15540v2 Table 1. Device summary Order code Marking Packages Packaging STL150N3LLH5 150N3LH5 PowerFLAT™ 5X6 Tape and reel August 2013 DocID14092 Rev 6 1/14 This is information on a product in full production. www.st.com
Contents STL150N3LLH5 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2/14 DocID14092 Rev 6
STL150N3LLH5 Electrical ratings 1 Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit V Drain-source voltage 30 V DS V Gate-source voltage ± 22 V GS I (1) Drain current (continuous) at T = 25 °C 195 A D C I (1) Drain current (continuous) at T = 100 °C 122 A D C I (2) Drain current (continuous) at T = 25 °C 35 A D pcb I (2) Drain current (continuous) at T =100 °C 21.8 A D pcb I (3) Drain current (pulsed) 140 A DM P (1) Total dissipation at T = 25 °C 114 W TOT C P (2) Total dissipation at T = 25 °C 4 W TOT pcb TJ Operating junction temperature -55 to 150 °C T Storage temperature stg 1. The value is rated according R thj-c 2. The value is rated according R thj-pcb 3. Pulse width limited by safe operating area Table 3. Thermal resistance Symbol Parameter Value Unit R Thermal resistance junction-case 1.1 °C/W thj-case R (1) Thermal resistance junction-pcb 31.3 °C/W thj-pcb 1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec Table 4. Avalanche data Symbol Parameter Value Unit Not-repetitive avalanche current, I 17 A AV (pulse width limited by T ) j max Single pulse avalanche energy E 300 mJ AS (starting T = 25 °C, I = I , V = 24 V) J D AV DD DocID14092 Rev 6 3/14 14
Electrical characteristics STL150N3LLH5 2 Electrical characteristics (T = 25 °C unless otherwise specified) CASE Table 5. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit Drain-source breakdown V(BR)DSS voltage ID = 250 µA, VGS= 0 30 V V = 30 V DS 1 µA V = 0 Zero gate voltage drain GS I DSS current V = 30 V, V = 0 DS GS 10 µA T =125 °C C IGSS Gate body leakage current VGS = ±22 V, VDS = 0 ±100 nA VGS(th) Gate threshold voltage VDS= VGS, ID = 250 µA 1 1.55 2.2 V Static drain-source on- VGS= 10 V, ID= 17.5 A 0.0014 0.00175 Ω R DS(on) resistance VGS= 4.5 V, ID= 17.5 A 0.0019 0.0024 Ω Table 6. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance - 5800 - pF Coss Output capacitance VDS = 25 V, f=1 MHz, - 1147 - pF V =0 GS Reverse transfer C - 127 - pF rss capacitance Qg Total gate charge V =15 V, I = 35 A - 40 - nC DD D Qgs Gate-source charge VGS =4.5 V - 13.4 - nC (see Figure 14) Qgd Gate-drain charge - 14.9 - nC f = 1 MHz, gate DC Bias = 0, RG Gate input resistance test signal level = 20 mV, - 1.1 - Ω I = 0 D 4/14 DocID14092 Rev 6
STL150N3LLH5 Electrical characteristics Table 7. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time - 17.2 - ns V =15 V, I = 17.5 A, tr Rise time DD D - 30.8 - ns R =4.7 Ω, V =10 V G GS td(off) Turn-off delay time (see Figure 13) - 65.8 - ns tf Fall time - 47.8 - ns Table 8. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current - 35 A I (1) Source-drain current (pulsed) - 140 A SDM VSD(2) Forward on voltage ISD = 35 A, VGS=0 - 1.1 V trr Reverse recovery time I = 35 A, - 43.8 ns SD Qrr Reverse recovery charge di/dt = 100 A/µs, - 46 nC V = 25 V IRRM Reverse recovery current DD - 2.1 A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300µs, duty cycle 1.5% DocID14092 Rev 6 5/14 14
Electrical characteristics STL150N3LLH5 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance HV42710 1ID0(0A) Olipmeritateido nb yo nm tahix s RaDrSe(ao in)s STTiCJn =g= l e12 55p0 u° Cl°sCe 10 10 ms 100 ms 1 1 s 0.1 0.01 0.1 1 10 VDS(V) Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Normalized B vs temperature Figure 7. Static drain-source on-resistance VDSS HV42790 HV42770 BV(nDorSmS) RDS(on) (mΩ) 1.1 2.5 1.05 VGS=10V 2.0 1 1.5 0.95 1.0 0.9 0.85 0.5 -55 -30 -5 20 45 70 95 120 145 TJ(°C) 0 10 20 30 ID(A) 6/14 DocID14092 Rev 6
STL150N3LLH5 Electrical characteristics Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations HV42730 HV42760 VGS(V) C(pF) f=1MHz 12 VDD=15 V 10000 10 ID=35 A 8000 8 Ciss 6000 6 4 4000 2 2000 Coss 0 Crss 0 0 20 40 60 Qg(nC) 0 10 20 VDS(V) Figure 10. Normalized gate threshold voltage vs Figure 11. Normalized on-resistance vs temperature temperature HV42740 HV42750 VGS(th) RDS(on) (norm) (norm) ID=250µA ID=17.5 A 1.2 1.6 VGS=10 V 1 1.4 0.8 1.2 0.6 1 0.4 0.8 0.2 0.6 -55 -30 -5 20 45 70 95 120 145 TJ (°C) -55 -30 -5 20 45 70 95 120 145 TJ(°C) Figure 12. Source-drain diode forward characteristics HV42780 VSD(V) 0.8 TJ=-55°C 0.7 TJ=25°C 0.6 0.5 TJ=175°C 0.4 0.3 0 10 20 30 ID(A) DocID14092 Rev 6 7/14 14
Test circuits STL150N3LLH5 3 Test circuits Figure 13. Switching times test circuit for Figure 14. Gate charge test circuit resistive load VDD 12V 47kΩ 1kΩ 100nF RL 2μ20F0 3μ.F3 VDD IG=CONST VD Vi=20V=VGMAX 100Ω D.U.T. VGS 2200 RG D.U.T. μF 2.7kΩ VG PW 47kΩ 1kΩ PW AM01468v1 AM01469v1 Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test circuit switching and diode recovery times L A A A D FAST L=100μH VD G D.U.T. DIODE 2200 3.3 μF μF VDD S B 3.3 1000 B B μF μF 25Ω D VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform V(BR)DSS ton toff VD tdon tr tdoff tf 90% 90% IDM 10% ID 0 10% VDS VDD VDD 90% VGS AM01472v1 0 10% AM01473v1 8/14 DocID14092 Rev 6
STL150N3LLH5 Package mechanical data 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID14092 Rev 6 9/14 14
Package mechanical data STL150N3LLH5 Table 9. PowerFLAT™ 5x6 type S-C mechanical data mm Dim. Min. Typ. Max. A 0.80 1.00 A1 0.02 0.05 A2 0.25 b 0.30 0.50 D 5.20 E 6.15 D2 4.11 4.31 E2 3.50 3.70 e 1.27 e1 0.65 L 0.715 1.015 K 1.05 1.35 10/14 DocID14092 Rev 6
STL150N3LLH5 Package mechanical data Figure 19. PowerFLAT™ 5x6 type S-C mechanical data (cid:37)(cid:82)(cid:87)(cid:87)(cid:82)(cid:80)(cid:3)(cid:89)(cid:76)(cid:72)(cid:90) (cid:24) (cid:27) (cid:51)(cid:76)(cid:81)(cid:3)(cid:20) (cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:73)(cid:76)(cid:70)(cid:68)(cid:87)(cid:76)(cid:82)(cid:81) (cid:23) (cid:20) (cid:54)(cid:76)(cid:71)(cid:72)(cid:3)(cid:89)(cid:76)(cid:72)(cid:90) (cid:27) (cid:24) (cid:15) (cid:20) (cid:23) (cid:51)(cid:76)(cid:81)(cid:3)(cid:20)(cid:3) (cid:55)(cid:82)(cid:83)(cid:3)(cid:89)(cid:76)(cid:72)(cid:90) (cid:76)(cid:71)(cid:72)(cid:81)(cid:87)(cid:76)(cid:73)(cid:76)(cid:70)(cid:68)(cid:87)(cid:76)(cid:82)(cid:81) (cid:27)(cid:21)(cid:22)(cid:20)(cid:27)(cid:20)(cid:26)(cid:66)(cid:41)(cid:66)(cid:38) DocID14092 Rev 6 11/14 14
Package mechanical data STL150N3LLH5 Figure 20. PowerFLAT™ 5x6 recommended footprint (dimensions are in mm) Footprint 12/14 DocID14092 Rev 6
STL150N3LLH5 Revision history 5 Revision history Table 10. Document revision history Date Revision Changes 22-Oct-2007 1 First release 01-Apr-2008 2 Document status promoted from preliminary data to datasheet 23-Sep-2008 3 V value has been changed on Table2 and Table5 GS 12-Jun-2009 4 V value has been changed on Table5 GS(th) Section4: Package mechanical data has been updated. 05-Oct-2011 5 Minor text changes. – Modified: Figure1 and marking in Table1 – Modified: I value in Figure11 30-Aug-2013 6 D – Updated: Figure13, 14, 15 and 16 – Updated: Section4: Package mechanical data DocID14092 Rev 6 13/14 14
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