STD3N80K5, STF3N80K5, STP3N80K5, STU3N80K5 N-channel 800 V, 2.8 Ω typ., 2.5 A MDmesh™ K5 Power MOSFETs in DPAK, TO-220FP, TO-220 and IPAK Datasheet - production data Features Order code VDS RDS(on) max. ID PTOT STD3N80K5 60 W STF3N80K5 20 W 800 V 3.5 Ω 2.5 A STP3N80K5 60 W STU3N80K5  Industry’s lowest R x area DS(on)  Industry’s best FoM (figure of merit)  Ultra-low gate charge  100% avalanche tested  Zener-protected Figure 1: Internal schematic diagram Applications  Switching applications Description These very high voltage N-channel Power MOSFETs are designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. Table 1: Device summary Order code Marking Package Packing STD3N80K5 DPAK Tape and reel STF3N80K5 TO-220FP 3N80K5 STP3N80K5 TO-220 Tube STU3N80K5 IPAK July 2017 DocID025000 Rev 4 1/24 This is information on a product in full production. www.st.com

Contents STD3N80K5, STF3N80K5, STP3N80K5, STU3N80K5 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 9 4 Package information ..................................................................... 10 4.1 DPAK (TO-252) type A package information................................... 10 4.2 DPAK (TO-252) type E package information................................... 13 4.3 DPAK (TO-252) packing information ............................................... 15 4.4 TO-220FP package information ...................................................... 17 4.5 TO-220 type A package information ................................................ 19 4.6 IPAK (TO-251) type A package information .................................... 21 5 Revision history ............................................................................ 23 2/24 DocID025000 Rev 4

STD3N80K5, STF3N80K5, STP3N80K5, Electrical ratings STU3N80K5 1 Electrical ratings Table 2: Absolute maximum ratings Value Symbol Parameter Unit DPAK TO-220FP TO-220 IPAK VGS Gate-source voltage ±30 V Drain current (continuous) at ID 2.5 A TC = 25 °C Drain current (continuous) at ID 1.6 A TC = 100 °C ID(1) Drain current (pulsed) 10 A PTOT Total dissipation at TC = 25 °C 60 20 60 60 W Insulation withstand voltage (RMS) VISO from all three leads to external 2.5 kV heat-sink (t = 1 s, TC = 25 °C) dv/dt(2) Peak diode recovery voltage slope 4.5 V/ns dv/dt(3) MOSFET dv/dt ruggedness 50 Tj Operating junction temperature range -55 to 150 °C Tstg Storage temperature range Notes: (1)Pulse width limited by safe operating area. (2)ISD ≤ 2.5 A, di/dt =100 A/μs; VDS peak < V(BR)DSS. (3)VDS ≤ 640 V. Table 3: Thermal data Value Symbol Parameter Unit DPAK TO-220FP TO-220 IPAK Rthj-case Thermal resistance junction-case 2.08 6.25 2.08 °C/W Rthj-amb Thermal resistance junction-ambient 62.5 62.5 100 °C/W Rthj-pcb(1) Thermal resistance junction-pcb 50 °C/W Notes: (1)When mounted on FR-4 board of 1 inch², 2 oz Cu. Table 4: Avalanche characteristics Symbol Parameter Value Unit IAR Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax) 1 A EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 65 mJ DocID025000 Rev 4 3/24

Electrical characteristics STD3N80K5, STF3N80K5, STP3N80K5, STU3N80K5 2 Electrical characteristics T = 25 °C unless otherwise specified C Table 5: On/off-state Symbol Parameter Test conditions Min. Typ. Max. Unit Drain-source breakdown V(BR)DSS voltage VGS = 0 V, ID = 1 mA 800 V VGS = 0 V, VDS = 800 V 1 µA Zero gate voltage drain IDSS current VGS = 0 V, VDS = 800 V, 50 µA TC = 125 ° C(1) IGSS Gate body leakage current VDS = 0 V, VGS = ±20 V ±10 µA VGS(th) Gate threshold voltage VDD = VGS, ID = 100 µA 3 4 5 V Static drain-source RDS(on) VGS = 10 V, ID = 1 A 2.8 3.5 Ω on-resistance Notes: (1)Defined by design, not subject to production test. Table 6: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance - 130 - pF Coss Output capacitance VDS = 100 V, f = 1 MHz, - 14 - pF Reverse transfer VGS = 0 V Crss capacitance - 0.6 - pF Equivalent capacitance time Co(tr)(1) related - 20 - pF VGS = 0 V, VDS = 0 to 640 V Equivalent capacitance Co(er)(2) energy related - 9 - pF Rg Intrinsic gate resistance f = 1 MHz, ID= 0 A - 15.5 - Ω Qg Total gate charge VDD = 640 V, ID = 2.5 A - 9.5 - nC Qgs Gate-source charge VGS= 0 to 10 V - 1.5 - nC (see Figure 19: "Test circuit Qgd Gate-drain charge for gate charge behavior") - 7.5 - nC Notes: (1)Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. (2)Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS. 4/24 DocID025000 Rev 4

STD3N80K5, STF3N80K5, STP3N80K5, Electrical characteristics STU3N80K5 Table 7: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD= 400 V, ID = 1.25 A, RG = 4.7 Ω - 8.5 - ns tr Rise time VGS = 10 V - 10.5 - ns (see Figure 18: "Test circuit for td(off) Turn-off delay time resistive load switching times" and - 20.5 - ns Figure 23: "Switching time tf Fall time waveform") - 25 - ns Table 8: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit Source-drain ISD current - 2.5 A Source-drain ISDM(1) current (pulsed) - 10 A VSD(2) Forward on voltage ISD = 2.5 A, VGS = 0 V - 1.5 V Reverse recovery trr time - 265 ns ISD = 2.5 A, di/dt = 100 A/μs, Qrr Rcheavregres e recovery VciDrcDu =it 6fo0r Vin d(sueceti vFeig luoraed 2 s0w: i"tcTheisntg - 1.2 μC and diode recovery times") Reverse recovery IRRM current - 9.2 A Reverse recovery trr time - 430 ns ISD = 2.5 A, di/dt = 100 A/μs, Qrr Rcheavregres e recovery V20D:D ="T 6e0s tV c,i rTcju=i t1 f5o0r i°nCd u( csteivee Floigaudr e - 1.9 μC switching and diode recovery times") Reverse recovery IRRM current - 8.8 A Notes: (1)Pulse width limited by safe operating area (2)Pulsed: pulse duration = 300 μs, duty cycle 1.5% Table 9: Gate-source Zener diode Symbol Parameter Test conditions Min. Typ. Max. Unit Gate-source V(BR)GSO breakdown voltage IGS = ±1 mA, ID = 0 A ±30 - - V The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry. DocID025000 Rev 4 5/24

Electrical characteristics STD3N80K5, STF3N80K5, STP3N80K5, STU3N80K5 2.1 Electrical characteristics (curves) Figure 2: Safe operating area for DPAK and IPAK Figure 3: Thermal impedance for DPAK and IPAK Figure 4: Safe operating area for TO-220FP Figure 5: Thermal impedance for TO-220FP Figure 6: Safe operating area for TO-220 Figure 7: Thermal impedance for TO-220 6/24 DocID025000 Rev 4

STD3N80K5, STF3N80K5, STP3N80K5, Electrical characteristics STU3N80K5 Figure 8: Output characteristics Figure 9: Transfer characteristics Figure 10: Gate charge vs gate-source voltage Figure 11: Static drain-source on-resistance Figure 12: Capacitance variations Figure 13: Output capacitance stored energy DocID025000 Rev 4 7/24

Electrical characteristics STD3N80K5, STF3N80K5, STP3N80K5, STU3N80K5 Figure 14: Normalized gate threshold voltage vs Figure 15: Normalized on-resistance vs temperature temperature Figure 17: Source-drain diode forward Figure 16: Normalized VDS vs temperature characteristics 8/24 DocID025000 Rev 4

STD3N80K5, STF3N80K5, STP3N80K5, Test circuits STU3N80K5 3 Test circuits Figure 18: Test circuit for resistive load Figure 19: Test circuit for gate charge switching times behavior VDD RL I= CONST VGS G 100 Ω D.U.T. pulse width + 2.7 kΩ 2200 VG μF 47 kΩ 1 kΩ AM01469v10 Figure 20: Test circuit for inductive load Figure 21: Unclamped inductive load test switching and diode recovery times circuit Figure 23: Switching time waveform Figure 22: Unclamped inductive waveform DocID025000 Rev 4 9/24

Package information STD3N80K5, STF3N80K5, STP3N80K5, STU3N80K5 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 DPAK (TO-252) type A package information Figure 24: DPAK (TO-252) type A package outline 10/24 DocID025000 Rev 4

STD3N80K5, STF3N80K5, STP3N80K5, Package information STU3N80K5 Table 10: DPAK (TO-252) type A mechanical data mm Dim. Min. Typ. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 4.95 5.10 5.25 E 6.40 6.60 E1 4.60 4.70 4.80 e 2.16 2.28 2.40 e1 4.40 4.60 H 9.35 10.10 L 1.00 1.50 (L1) 2.60 2.80 3.00 L2 0.65 0.80 0.95 L4 0.60 1.00 R 0.20 V2 0° 8° DocID025000 Rev 4 11/24

Package information STD3N80K5, STF3N80K5, STP3N80K5, STU3N80K5 Figure 25: DPAK (TO-252) type A recommended footprint (dimensions are in mm) 12/24 DocID025000 Rev 4

STD3N80K5, STF3N80K5, STP3N80K5, Package information STU3N80K5 4.2 DPAK (TO-252) type E package information Figure 26: DPAK (TO-252) type E package outline DocID025000 Rev 4 13/24

Package information STD3N80K5, STF3N80K5, STP3N80K5, STU3N80K5 Table 11: DPAK (TO-252) type E mechanical data mm Dim. Min. Typ. Max. A 2.18 2.39 A2 0.13 b 0.65 0.884 b4 4.95 5.46 c 0.46 0.61 c2 0.46 0.60 D 5.97 6.22 D1 5.21 E 6.35 6.73 E1 4.32 e 2.286 e1 4.572 H 9.94 10.34 L 1.50 1.78 L1 2.74 L2 0.89 1.27 L4 1.02 Figure 27: DPAK (TO-252) type E recommended footprint (dimensions are in mm) 14/24 DocID025000 Rev 4

STD3N80K5, STF3N80K5, STP3N80K5, Package information STU3N80K5 4.3 DPAK (TO-252) packing information Figure 28: DPAK (TO-252) tape outline DocID025000 Rev 4 15/24

Package information STD3N80K5, STF3N80K5, STP3N80K5, STU3N80K5 Figure 29: DPAK (TO-252) reel outline Table 12: DPAK (TO-252) tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. Min. Max. A0 6.8 7 A 330 B0 10.4 10.6 B 1.5 B1 12.1 C 12.8 13.2 D 1.5 1.6 D 20.2 D1 1.5 G 16.4 18.4 E 1.65 1.85 N 50 F 7.4 7.6 T 22.4 K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 16/24 DocID025000 Rev 4

STD3N80K5, STF3N80K5, STP3N80K5, Package information STU3N80K5 4.4 TO-220FP package information Figure 30: TO-220FP package outline 7012510_Rev_12_B DocID025000 Rev 4 17/24

Package information STD3N80K5, STF3N80K5, STP3N80K5, STU3N80K5 Table 13: TO-220FP package mechanical data mm Dim. Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 18/24 DocID025000 Rev 4

STD3N80K5, STF3N80K5, STP3N80K5, Package information STU3N80K5 4.5 TO-220 type A package information Figure 31: TO-220 type A package outline DocID025000 Rev 4 19/24

Package information STD3N80K5, STF3N80K5, STP3N80K5, STU3N80K5 Table 14: TO-220 type A package mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.55 c 0.48 0.70 D 15.25 15.75 D1 1.27 E 10.00 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13.00 14.00 L1 3.50 3.93 L20 16.40 L30 28.90 øP 3.75 3.85 Q 2.65 2.95 20/24 DocID025000 Rev 4

STD3N80K5, STF3N80K5, STP3N80K5, Package information STU3N80K5 4.6 IPAK (TO-251) type A package information Figure 32: IPAK (TO-251) type A package outline DocID025000 Rev 4 21/24

Package information STD3N80K5, STF3N80K5, STP3N80K5, STU3N80K5 Table 15: IPAK (TO-251) type A package mechanical data mm Dim. Min. Typ. Max. A 2.20 2.40 A1 0.90 1.10 b 0.64 0.90 b2 0.95 b4 5.20 5.40 B5 0.30 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 E 6.40 6.60 e 2.28 e1 4.40 4.60 H 16.10 L 9.00 9.40 L1 0.80 1.20 L2 0.80 1.00 V1 10° 22/24 DocID025000 Rev 4

STD3N80K5, STF3N80K5, STP3N80K5, Revision history STU3N80K5 5 Revision history Table 16: Document revision history Date Revision Changes 12-Jul-2013 1 First release. – Modified: PTOT and EAS values in Table 2 – Modified: Rthj-case values in Table 3 – Modified: the entire typical values in Table 5 and 6 15-Jan-2014 2 – Modified: ISD and ISDM max values and typical values in Table 7 – Updated: Table 24 and Table 9 – Added: Section 2.1: Electrical characteristics (curves) – Minor text changes – Modified: Figure 8 and 9 17-Jan-2014 3 – Minor text changes Updated Table 7: "Switching times" and Section 4: "Package information". 17-Jul-2017 4 Minor text changes. DocID025000 Rev 4 23/24

STD3N80K5, STF3N80K5, STP3N80K5, STU3N80K5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved 24/24 DocID025000 Rev 4