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  • 型号: STF13N80K5
  • 制造商: STMicroelectronics
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STF13N80K5产品简介:

ICGOO电子元器件商城为您提供STF13N80K5由STMicroelectronics设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 STF13N80K5价格参考¥24.78-¥24.78。STMicroelectronicsSTF13N80K5封装/规格:晶体管 - FET,MOSFET - 单, 通孔 N 沟道 800V 12A(Tc) 35W(Tc) TO-220FP。您可以下载STF13N80K5参考资料、Datasheet数据手册功能说明书,资料中有STF13N80K5 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

分立半导体产品

ChannelMode

Enhancement

描述

MOSFET N-CH 800V 12A TO-220FPMOSFET N-Ch 800 V 0.37 Ohm 12 A Zener-protect

产品分类

FET - 单分离式半导体

FET功能

标准

FET类型

MOSFET N 通道,金属氧化物

Id-ContinuousDrainCurrent

12 A

Id-连续漏极电流

12 A

品牌

STMicroelectronics

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

晶体管,MOSFET,STMicroelectronics STF13N80K5SuperMESH5™

数据手册

点击此处下载产品Datasheet

产品型号

STF13N80K5

Pd-PowerDissipation

35 W

Pd-功率耗散

35 W

Qg-GateCharge

29 nC

Qg-栅极电荷

29 nC

RdsOn-Drain-SourceResistance

370 mOhms

RdsOn-漏源导通电阻

370 mOhms

Vds-Drain-SourceBreakdownVoltage

800 V

Vds-漏源极击穿电压

800 V

Vgs-Gate-SourceBreakdownVoltage

30 V

Vgs-栅源极击穿电压

30 V

Vgsth-Gate-SourceThresholdVoltage

4 V

Vgsth-栅源极阈值电压

4 V

上升时间

16 ns

下降时间

16 ns

不同Id时的Vgs(th)(最大值)

5V @ 100µA

不同Vds时的输入电容(Ciss)

870pF @ 100V

不同Vgs时的栅极电荷(Qg)

29nC @ 10V

不同 Id、Vgs时的 RdsOn(最大值)

450 毫欧 @ 6A, 10V

产品种类

MOSFET

供应商器件封装

TO-220FP

其它名称

497-13753-5

典型关闭延迟时间

42 ns

功率-最大值

35W

包装

管件

商标

STMicroelectronics

商标名

SuperMESH

安装类型

通孔

安装风格

Through Hole

封装

Tube

封装/外壳

TO-220-3 整包

封装/箱体

TO-220FP-3

工厂包装数量

50

晶体管极性

N-Channel

最大工作温度

+ 150 C

最小工作温度

- 55 C

标准包装

50

漏源极电压(Vdss)

800V

电流-连续漏极(Id)(25°C时)

12A (Tc)

系列

STF13N80K5

通道模式

Enhancement

配置

Single

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PDF Datasheet 数据手册内容提取

STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5 N-channel 800 V, 0.37 Ω typ., 12 A MDmesh™ K5 Power MOSFETs in D²PAK, TO-220FP, TO-220 and TO-247 Datasheet - production data Features TAB Order code VDS RDS(on) max. ID PTOT STB13N80K5 190 W D2PAK 23 STF13N80K5 35 W 1 800 V 0.45 Ω 12 A TO-220FP STP13N80K5 TAB 190 W STW13N80K5  Industry’s lowest R x area DS(on) 3 3  Industry’s best FoM (figure of merit) TO-220 12 TO-247 1 2  Ultra-low gate charge  100% avalanche tested Figure 1: Internal schematic diagram  Zener-protected Applications  Switching applications Description These very high voltage N-channel Power MOSFETs are designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. Table 1: Device summary Order code Marking Package Packing STB13N80K5 D²PAK Tape and reel STF13N80K5 TO-220FP 13N80K5 STP13N80K5 TO-220 Tube STW13N80K5 TO-247 September 2017 DocID024348 Rev 4 1/23 This is information on a product in full production. www.st.com

Contents STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ................................................................................... 10 4 Package information ..................................................................... 11 4.1 D²PAK (TO-263) type A package information ................................. 11 4.2 TO-220FP package information ...................................................... 14 4.3 TO-220 type A packing information ................................................. 16 4.4 TO-247 package information ........................................................... 18 4.5 D²PAK type A packing information .................................................. 20 5 Revision history ............................................................................ 22 2/23 DocID024348 Rev 4

STB13N80K5, STF13N80K5, STP13N80K5, Electrical ratings STW13N80K5 1 Electrical ratings Table 2: Absolute maximum ratings Value Symbol Parameter Unit D²PAK, TO-220, TO-220FP TO-247 VGS Gate-source voltage ±30 V ID Drain current (continuous) at TC = 25 °C 12 12 (1) A ID Drain current (continuous) at TC = 100 °C 7.6 7.6 (1) A IDM(2) Drain current (pulsed) 48 48 (1) A PTOT Total dissipation at TC = 25 °C 190 35 W Insulation withstand voltage (RMS) from all VISO three leads to external heat-sink 2500 V (t = 1 s, TC = 25 °C) dv/dt (3) Peak diode recovery voltage slope 4.5 V/ns dv/dt (4) MOSFET dv/dt ruggedness 50 Tj Operating junction temperature range -55 to 150 °C Tstg Storage temperature range Notes: (1)Limited by package. (2)Pulse width limited by safe operating area. (3)ISD ≤ 12 A, di/dt =100 A/μs; VDS peak < V(BR)DSS. (4)VDS ≤ 640 V. Table 3: Thermal data Value Symbol Parameter Unit D²PAK TO-220 TO-220FP TO-247 Rthj-case Thermal resistance junction-case 0.66 3.57 0.66 °C/W Rthj-amb Thermal resistance junction-ambient 62.5 50 °C/W Rthj-pcb(1) Thermal resistance junction-pcb 30 °C/W Notes: (1)When mounted on FR-4 board of 1 inch², 2 oz Cu. Table 4: Avalanche characteristics Symbol Parameter Value Unit Avalanche current, repetitive or not repetitive IAR (pulse width limited by Tjmax) 4 A Single pulse avalanche energy EAS (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 148 mJ DocID024348 Rev 4 3/23

Electrical characteristics STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5 2 Electrical characteristics T = 25 °C unless otherwise specified C Table 5: On/off-state Symbol Parameter Test conditions Min. Typ. Max. Unit Drain-source breakdown V(BR)DSS voltage VGS = 0 V, ID = 1 mA 800 V VGS = 0 V, VDS = 800 V 1 µA Zero gate voltage drain IDSS current VGS = 0 V, VDS = 800 V, 50 µA TC = 125 ° C(1) IGSS Gate body leakage current VDS = 0 V, VGS = ±20 V ±10 µA VGS(th) Gate threshold voltage VDD = VGS, ID = 100 µA 3 4 5 V Static drain-source on- RDS(on) resistance VGS = 10 V, ID = 6 A 0.37 0.45 Ω Notes: (1)Defined by design, not subject to production test. Table 6: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance - 870 - pF Coss Output capacitance VDS = 100 V, f = 1 MHz, - 50 - pF Reverse transfer VGS = 0 V Crss capacitance - 2 - pF Equivalent capacitance time Co(tr)(1) related - 110 - pF VGS = 0 V, VDS = 0 to 640 V Equivalent capacitance Co(er)(2) energy related - 43 - pF Rg Intrinsic gate resistance f = 1 MHz, ID= 0 A - 5 - Ω Qg Total gate charge VDD = 640 V, ID = 2.5 A - 29 - nC Qgs Gate-source charge VGS= 0 to 10 V - 7 - nC (see Figure 22: "Test circuit Qgd Gate-drain charge for gate charge behavior") - 18 - nC Notes: (1)Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. (2)Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS. 4/23 DocID024348 Rev 4

STB13N80K5, STF13N80K5, STP13N80K5, Electrical characteristics STW13N80K5 Table 7: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD= 400 V, ID = 6 A, - 16 - ns tr Rise time RG = 4.7 Ω, VGS = 10 V - 16 - ns (see Figure 21: "Test circuit td(off) Turn-off delay time for resistive load switching - 42 - ns times" and Figure 26: tf Fall time "Switching time waveform") - 16 - ns Table 8: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current - 14 A Source-drain current ISDM(1) (pulsed) - 56 A VSD(2) Forward on voltage ISD = 12 A, VGS = 0 V - 1.5 V trr Reverse recovery time ISD = 12 A, di/dt = 100 A/μs, - 406 ns VDD = 60 V Qrr Reverse recovery charge (see Figure 23: "Test circuit - 5.7 μC for inductive load switching IRRM Reverse recovery current and diode recovery times") - 28 A trr Reverse recovery time ISD = 12 A, di/dt = 100 A/μs, - 600 ns Qrr Reverse recovery charge V(sDeDe= F6i0g uVre, T2j=3 :1 "5T0e s°tC c ircuit - 7.9 μC for inductive load switching IRRM Reverse recovery current and diode recovery times") - 26 A Notes: (1)Pulse width limited by safe operating area (2)Pulsed: pulse duration = 300 μs, duty cycle 1.5% Table 9: Gate-source Zener diode Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)GSO Gate-source breakdown voltage IGS= ±1 mA, ID= 0 A ±30 - - V The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry. DocID024348 Rev 4 5/23

Electrical characteristics STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5 2.1 Electrical characteristics (curves) Figure 2: Safe operating area for D²PAK Figure 3: Thermal impedance for D²PAK Figure 4: Safe operating area for TO-220FP Figure 5: Thermal impedance for TO-220FP Figure 6: Safe operating area for TO-220 Figure 7: Thermal impedance for TO-220 6/23 DocID024348 Rev 4

STB13N80K5, STF13N80K5, STP13N80K5, Electrical characteristics STW13N80K5 Figure 8: Safe operating area for TO-247 Figure 9: Thermal impedance for TO-247 Figure 10: Output characteristics Figure 11: Transfer characteristics Figure 12: Gate charge vs gate-source voltage Figure 13: Static drain-source on-resistance DocID024348 Rev 4 7/23

Electrical characteristics STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5 Figure 14: Capacitance variations Figure 15: Output capacitance stored energy Figure 16: Normalized gate threshold voltage vs Figure 17: Normalized on-resistance vs temperature temperature Figure 18: Normalized V(BR)DSS vs temperature Figure 19: Source-drain diode forward characteristics 8/23 DocID024348 Rev 4

STB13N80K5, STF13N80K5, STP13N80K5, Electrical characteristics STW13N80K5 Figure 20: Maximum avalanche energy vs. starting Tj EAS (mJ) DocID024348 Rev 4 9/23

Test circuits STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5 3 Test circuits Figure 21: Test circuit for resistive load Figure 22: Test circuit for gate charge switching times behavior Figure 23: Test circuit for inductive load Figure 24: Unclamped inductive load test switching and diode recovery times circuit Figure 25: Unclamped inductive waveform Figure 26: Switching time waveform 10/23 DocID024348 Rev 4

STB13N80K5, STF13N80K5, STP13N80K5, Package information STW13N80K5 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 D²PAK (TO-263) type A package information Figure 27: D²PAK (TO-263) type A package outline DocID024348 Rev 4 11/23

Package information STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5 Table 10: D²PAK (TO-263) type A package mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 7.75 8.00 D2 1.10 1.30 1.50 E 10.00 10.40 E1 8.50 8.70 8.90 E2 6.85 7.05 7.25 e 2.54 e1 4.88 5.28 H 15.00 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R 0.40 V2 0° 8° 12/23 DocID024348 Rev 4

STB13N80K5, STF13N80K5, STP13N80K5, Package information STW13N80K5 Figure 28: D²PAK (TO-263) type A recommended footprint (dimensions are in mm) DocID024348 Rev 4 13/23

Package information STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5 4.2 TO-220FP package information Figure 29: TO-220FP package outline 7012510_Rev_12_B 14/23 DocID024348 Rev 4

STB13N80K5, STF13N80K5, STP13N80K5, Package information STW13N80K5 Table 11: TO-220FP package mechanical data mm Dim. Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 DocID024348 Rev 4 15/23

Package information STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5 4.3 TO-220 type A packing information Figure 30: TO-220 type A package outline 16/23 DocID024348 Rev 4

STB13N80K5, STF13N80K5, STP13N80K5, Package information STW13N80K5 Table 12: TO-220 type A package mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.55 c 0.48 0.70 D 15.25 15.75 D1 1.27 E 10.00 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13.00 14.00 L1 3.50 3.93 L20 16.40 L30 28.90 øP 3.75 3.85 Q 2.65 2.95 DocID024348 Rev 4 17/23

Package information STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5 4.4 TO-247 package information Figure 31: TO-247 package outline 0075325_8 18/23 DocID024348 Rev 4

STB13N80K5, STF13N80K5, STP13N80K5, Package information STW13N80K5 Table 13: TO-247 package mechanical data mm Dim. Min. Typ. Max. A 4.85 5.15 A1 2.20 2.60 b 1.0 1.40 b1 2.0 2.40 b2 3.0 3.40 c 0.40 0.80 D 19.85 20.15 E 15.45 15.75 e 5.30 5.45 5.60 L 14.20 14.80 L1 3.70 4.30 L2 18.50 ØP 3.55 3.65 ØR 4.50 5.50 S 5.30 5.50 5.70 DocID024348 Rev 4 19/23

Package information STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5 4.5 D²PAK type A packing information Figure 32: D²PAK type A tape outline 20/23 DocID024348 Rev 4

STB13N80K5, STF13N80K5, STP13N80K5, Package information STW13N80K5 Figure 33: D²PAK type A reel outline Table 14: D²PAK type A tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. Min. Max. A0 10.5 10.7 A 330 B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 13.2 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 26.4 F 11.4 11.6 N 100 K0 4.8 5.0 T 30.4 P0 3.9 4.1 P1 11.9 12.1 Base quantity 1000 P2 1.9 2.1 Bulk quantity 1000 R 50 T 0.25 0.35 W 23.7 24.3 DocID024348 Rev 4 21/23

Revision history STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5 5 Revision history Table 15: Document revision history Date Revision Changes 07-Mar-2013 1 First release. Updated Figure 1: Internal schematic diagram. 27-Mar-2013 2 Minor text changes. Document status promoted from preliminary data to production data. – Modified: EAS value, the entire typical values on Table 5, 6 and 7 15-Apr-2013 3 – Inserted: Section 2.1: Electrical characteristics (curves) – Minor text changes Added: TO-247 package. Updated title, features and description. Updated Figure 13: "Static drain-source on-resistance". Updated Table 2: "Absolute maximum ratings", Table 5: "On/off- 25-Sep-2017 4 state", Table 6: "Dynamic" and Table 8: "Source-drain diode". Added Figure 8: "Safe operating area for TO-247" and Figure 9: "Thermal impedance for TO-247". Updated Section 4.4: "TO-247 package information". Minor text changes. 22/23 DocID024348 Rev 4

STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved DocID024348 Rev 4 23/23

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