STD7N80K5, STP7N80K5, STU7N80K5 N-channel 800 V, 0.95 Ω typ., 6 A MDmesh™ K5 Power MOSFETs in DPAK, TO-220 and IPAK packages Datasheet - production data Features Order code VDS RDS(on) max ID PTOT STD7N80K5 STP7N80K5 800 V 1.2 Ω 6 A 110 W STU7N80K5  Industry’s lowest R x area DS(on)  Industry’s best FoM (figure of merit)  Ultra-low gate charge  100% avalanche tested Figure 1: Internal schematic diagram  Zener-protected Applications  Switching applications Description This very high voltage N-channel Power MOSFET is designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. Table 1: Device summary Order code Marking Package Packaging STD7N80K5 DPAK Tape and reel STP7N80K5 7N80K5 TO-220 Tube STU7N80K5 IPAK May 2017 DocID023448 Rev 6 1/28 This is information on a product in full production. www.st.com

Contents STD7N80K5, STP7N80K5, STU7N80K5 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 9 4 Package information ..................................................................... 10 4.1 DPAK type A2 package information ................................................ 11 4.2 DPAK type C2 package information ................................................ 14 4.3 DPAK type E package information .................................................. 17 4.4 TO-220 package information ........................................................... 19 4.5 IPAK type A package information .................................................... 21 4.6 IPAK type C package information ................................................... 23 5 Packing mechanical data .............................................................. 25 6 Revision history ............................................................................ 27 2/28 DocID023448 Rev 6

STD7N80K5, STP7N80K5, STU7N80K5 Electrical ratings 1 Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VGS Gate- source voltage ± 30 V ID Drain current (continuous) at TC = 25 °C 6 A ID Drain current (continuous) at TC = 100 °C 3.8 A IDM (1) Drain current (pulsed) 24 A PTOT Total dissipation at TC = 25 °C 110 W Max current during repetitive or single pulse avalanche (pulse IAR width limited by Tjmax) 2 A Single pulse avalanche energy EAS 88 mJ (starting TJ = 25 °C, ID=IAS, VDD= 50 V) dv/dt (2) Peak diode recovery voltage slope 4.5 V/ns dv/dt (3) MOSFET dv/dt ruggedness 50 V/ns Tj Operating junction temperature range °C -55 to 150 Tstg Storage temperature range °C Notes: (1)Pulse width limited by safe operating area. (2)ISD ≤ 6 A, di/dt ≤ 100 A/µs, VDS(peak) ≤ V(BR)DSS (3)VDS ≤ 640 V Table 3: Thermal data Value Symbol Parameter Unit DPAK TO-220 IPAK Rthj-case Thermal resistance junction-case 1.14 °C/W Rthj-amb Thermal resistance junction-amb 62.5 100 °C/W Rthj-pcb(1) Thermal resistance junction-pcb 50 °C/W Notes: (1)When mounted on 1 inch² FR-4, 2 Oz copper board. DocID023448 Rev 6 3/28

Electrical characteristics STD7N80K5, STP7N80K5, STU7N80K5 2 Electrical characteristics (T = 25 °C unless otherwise specified). CASE Table 4: On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit Drain-source breakdown V(BR)DSS voltage VGS= 0 V; ID = 1 mA 800 V VGS= 0 V; VDS = 800 V 1 µA Zero gate voltage drain IDSS current VGS= 0 V; VDS = 800 V, 50 µA Tc=125 °C (1) IGSS Gate body leakage current VDS = 0 V; VGS = ± 20 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA 3 4 5 V Static drain-source on- RDS(on) resistance VGS = 10 V, ID= 3 A 0.95 1.2 Ω Notes: (1)Defined by design, not subject to production test. Table 5: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance - 360 - pF Coss Output capacitance VDS =100 V, f=1 MHz, VGS=0 V - 30 - pF Reverse transfer Crss capacitance - 1 - pF Equivalent capacitance Co(tr)(1) time related - 47 - pF VGS = 0 V, VDS = 0 to 640 V Equivalent capacitance Co(er)(2) energy related - 20 - pF RG Intrinsic gate resistance f = 1 MHz, ID=0 A - 6 - Ω Qg Total gate charge VDD = 640 V, ID = 6 A - 13.4 - nC Qgs Gate-source charge VGS = 0 to 10 V - 3.7 - nC (see Figure 18: "Test circuit for Qgd Gate-drain charge gate charge behavior") - 7.5 - nC Notes: (1)Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS (2)Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS 4/28 DocID023448 Rev 6

STD7N80K5, STP7N80K5, STU7N80K5 Electrical characteristics Table 6: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD = 400 V, ID = 3 A, RG=4.7 Ω, - 11.3 - ns tr Rise time VGS=10 V - 8.3 - ns (see Figure 17: "Test circuit for td(off) Turn-off delay time resistive load switching times" - 23.7 - ns and Figure 22: "Switching time tf Fall time waveform" - 20.2 - ns Table 7: Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current - 6 A Source-drain current ISDM (pulsed) - 24 A VSD(1) Forward on voltage ISD= 6 A, VGS=0 V - 1.5 V trr Reverse recovery time ISD= 6 A, VDD= 60 V - 315 ns Reverse recovery di/dt = 100 A/µs, Qrr charge (see Figure 19: "Test circuit for - 2.8 µC Reverse recovery inductive load switching and IRRM current diode recovery times") - 17.5 A trr Reverse recovery time ISD= 6 A,VDD= 60 V - 480 ns Reverse recovery di/dt=100 A/µs, Qrr charge Tj=150 °C - 3.8 µC (see Figure 19: "Test circuit for Reverse recovery IRRM current idnidoudcet irveec olovaedry s twimitcehsi"n) g and - 16 A Notes: (1)Pulsed: pulse duration = 300µs, duty cycle 1.5% Table 8: Gate-source Zener diode Symbol Parameter Test conditions Min Typ. Max Unit V(BR)GSO Gate-source breakdown voltage IGS= ± 1 mA, ID=0 A ±30 - - V The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry. DocID023448 Rev 6 5/28

Electrical characteristics STD7N80K5, STP7N80K5, STU7N80K5 2.1 Electrical characteristics (curves) Figure 2: Safe operating area for DPAK and IPAK Figure 3: Thermal impedance for DPAK and IPAK Figure 4: Safe operating area for TO-220 Figure 5: Thermal impedance for TO-220 CG20930 K δ = 0.5 δ = 0.2 δ = 0.1 10-1 ZZ == kk RR δδ t th=h= tt //ƬƬtthhjj--CC(cid:3)(cid:3) pp δ = 0.05 δ = 0.02 δ = 0.01 tt SINGLE PULSE ppƬƬ 10-2 10-5 10-4 10-3 10-2 10-1 t (s) p Figure 6: Output characteristics Figure 7: Transfer characteristics 6/28 DocID023448 Rev 6

STD7N80K5, STP7N80K5, STU7N80K5 Electrical characteristics Figure 8: Gate charge vs gate-source voltage Figure 9: Static drain-source on-resistance Figure 10: Capacitance variations Figure 11: Output capacitance stored energy Figure 12: Normalized gate threshold voltage vs Figure 13: Normalized on-resistance vs temperature temperature DocID023448 Rev 6 7/28

Electrical characteristics STD7N80K5, STP7N80K5, STU7N80K5 Figure 14: Maximum avalanche energy vs starting Figure 15: Normalized V(BR)DSS vs temperature TJ Figure 16: Source-drain diode forward characteristics 8/28 DocID023448 Rev 6

STD7N80K5, STP7N80K5, STU7N80K5 Test circuits 3 Test circuits Figure 17: Test circuit for resistive load Figure 18: Test circuit for gate charge switching times behavior Figure 19: Test circuit for inductive load Figure 20: Unclamped inductive load test switching and diode recovery times circuit Figure 22: Switching time waveform Figure 21: Unclamped inductive waveform DocID023448 Rev 6 9/28

Package information STD7N80K5, STP7N80K5, STU7N80K5 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 10/28 DocID023448 Rev 6

STD7N80K5, STP7N80K5, STU7N80K5 Package information 4.1 DPAK type A2 package information Figure 23: DPAK (TO-252) type A2 package outline DocID023448 Rev 6 11/28

Package information STD7N80K5, STP7N80K5, STU7N80K5 Table 9: DPAK (TO-252) type A2 mechanical data mm Dim. Min. Typ. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 4.95 5.10 5.25 E 6.40 6.60 E1 5.10 5.20 5.30 e 2.16 2.28 2.40 e1 4.40 4.60 H 9.35 10.10 L 1.00 1.50 L1 2.60 2.80 3.00 L2 0.65 0.80 0.95 L4 0.60 1.00 R 0.20 V2 0° 8° 12/28 DocID023448 Rev 6

STD7N80K5, STP7N80K5, STU7N80K5 Package information Figure 24: DPAK (TO-252) type A2 recommended footprint (dimensions are in mm) DocID023448 Rev 6 13/28

Package information STD7N80K5, STP7N80K5, STU7N80K5 4.2 DPAK type C2 package information Figure 25: DPAK (TO-252) type C2 package outline 0068772_C2_22 14/28 DocID023448 Rev 6

STD7N80K5, STP7N80K5, STU7N80K5 Package information Table 10: DPAK (TO-252) type C2 mechanical data mm Dim. Min. Typ. Max. A 2.20 2.30 2.38 A1 0.90 1.01 1.10 A2 0.00 0.10 b 0.72 0.85 b4 5.13 5.33 5.46 c 0.47 0.60 c2 0.47 0.60 D 6.00 6.10 6.20 D1 5.10 5.60 E 6.50 6.60 6.70 E1 5.20 5.50 e 2.186 2.286 2.386 H 9.80 10.10 10.40 L 1.40 1.50 1.70 L1 2.90 REF L2 0.90 1.25 L3 0.51 BSC L4 0.60 0.80 1.00 L6 1.80 BSC θ1 5° 7° 9° θ2 5° 7° 9° V2 0° 8° DocID023448 Rev 6 15/28

Package information STD7N80K5, STP7N80K5, STU7N80K5 Figure 26: DPAK (TO-252) type C2 recommended footprint (dimensions are in mm) FP_0068772_22 16/28 DocID023448 Rev 6

STD7N80K5, STP7N80K5, STU7N80K5 Package information 4.3 DPAK type E package information Figure 27: DPAK (TO-252) type E package outline DocID023448 Rev 6 17/28

Package information STD7N80K5, STP7N80K5, STU7N80K5 Table 11: DPAK (TO-252) type E mechanical data mm Dim. Min. Typ. Max. A 2.18 2.39 A2 0.13 b 0.65 0.884 b4 4.95 5.46 c 0.46 0.61 c2 0.46 0.60 D 5.97 6.22 D1 5.21 E 6.35 6.73 E1 4.32 e 2.286 e1 4.572 H 9.94 10.34 L 1.50 1.78 L1 2.74 L2 0.89 1.27 L4 1.02 Figure 28: DPAK (TO-252) type E recommended footprint (dimensions are in mm) 18/28 DocID023448 Rev 6

STD7N80K5, STP7N80K5, STU7N80K5 Package information 4.4 TO-220 package information Figure 29: TO-220 type A package outline DocID023448 Rev 6 19/28

Package information STD7N80K5, STP7N80K5, STU7N80K5 Table 12: TO-220 type A package mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.55 c 0.48 0.70 D 15.25 15.75 D1 1.27 E 10.00 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13.00 14.00 L1 3.50 3.93 L20 16.40 L30 28.90 øP 3.75 3.85 Q 2.65 2.95 20/28 DocID023448 Rev 6

STD7N80K5, STP7N80K5, STU7N80K5 Package information 4.5 IPAK type A package information Figure 30: IPAK (TO-251) type A package outline DocID023448 Rev 6 21/28

Package information STD7N80K5, STP7N80K5, STU7N80K5 Table 13: IPAK (TO-251) type A package mechanical data mm Dim. Min. Typ. Max. A 2.20 2.40 A1 0.90 1.10 b 0.64 0.90 b2 0.95 b4 5.20 5.40 B5 0.30 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 E 6.40 6.60 e 2.28 e1 4.40 4.60 H 16.10 L 9.00 9.40 L1 0.80 1.20 L2 0.80 1.00 V1 10° 22/28 DocID023448 Rev 6

STD7N80K5, STP7N80K5, STU7N80K5 Package information 4.6 IPAK type C package information Figure 31: IPAK (TO-251) type C package outline 0068771_IK_typeC_rev14 DocID023448 Rev 6 23/28

Package information STD7N80K5, STP7N80K5, STU7N80K5 Table 14: IPAK (TO-251) type C package mechanical data mm Dim. Min. Typ. Max. 2.20 2.30 2.35 A 0.90 1.00 1.10 A1 0.66 0.79 b 0.90 b2 5.23 5.33 5.43 b4 0.46 0.59 c 0.46 0.59 c2 6.00 6.10 6.20 D 5.20 5.37 5.55 D1 6.50 6.60 6.70 E 4.60 4.78 4.95 E1 2.20 2.25 2.30 e 4.40 4.50 4.60 e1 16.18 16.48 16.78 H 9.00 9.30 9.60 L 0.80 1.00 1.20 L1 0.90 1.08 1.25 L2 3° 5° 7° θ1 1° 3° 5° θ2 24/28 DocID023448 Rev 6

STD7N80K5, STP7N80K5, STU7N80K5 Packing mechanical data 5 Packing mechanical data Figure 32: DPAK (TO-252) tape outline DocID023448 Rev 6 25/28

Packing mechanical data STD7N80K5, STP7N80K5, STU7N80K5 Figure 33: DPAK (TO-252) reel outline Table 15: DPAK (TO-252) tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. Min. Max. A0 6.8 7 A 330 B0 10.4 10.6 B 1.5 B1 12.1 C 12.8 13.2 D 1.5 1.6 D 20.2 D1 1.5 G 16.4 18.4 E 1.65 1.85 N 50 F 7.4 7.6 T 22.4 K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 26/28 DocID023448 Rev 6

STD7N80K5, STP7N80K5, STU7N80K5 Revision history 6 Revision history Table 16: Document revision history Date Revision Changes 17-Jul-2012 1 First release. Minor text changes in cover page 17-Oct-2012 2 Modified: title and I value in cover page D Minor text changes Added: IPAK package 19-Dec-2012 3 Updated: Section 4: Package mechanical data for IPAK Modified: I value on Table 2 AR 18-Mar-2013 4 Updated: Section 4: Package mechanical data only for DPAK package The part number STF7N80K5 has been moved to a separate datasheet 09-Oct-2013 5 Minor text changes Updated title, description and features in cover page. Updated Table 2: "Absolute maximum ratings" and Table 4: "On/off states". 19-May-2017 6 Updated Section 4: "Package information". Minor text changes. DocID023448 Rev 6 27/28

STD7N80K5, STP7N80K5, STU7N80K5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved 28/28 DocID023448 Rev 6

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