STD45NF75 Ω N-channel 75 V, 0.018 , 40 A DPAK STripFET™ II Power MOSFET Features Type V R max I DSS DS(on) D STD45NF75 75 V < 0.024 Ω 40 A(1) 1. Current limited by package 3 ■ 100% avalanche tested 1 ■ Gate charge minimized DPAK Application ■ Switching applications Description This Power MOSFET is the latest development of Figure 1. Internal schematic diagram STMicroelectronics’s unique "single feature size" strip-based process. The resulting transistor shows extremely high packing density for low on- (cid:36)(cid:0)(cid:8)(cid:52)(cid:33)(cid:34)(cid:0)(cid:79)(cid:82)(cid:0)(cid:18)(cid:9) resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. (cid:39)(cid:8)(cid:17)(cid:9) (cid:51)(cid:8)(cid:19)(cid:9) (cid:33)(cid:45)(cid:16)(cid:17)(cid:20)(cid:23)(cid:20)(cid:86)(cid:17) Table 1. Device summary Order code Marking Package Packaging STD45NF75T4 D45NF75 DPAK Tape and reel May 2009 Doc ID 9902 Rev 5 1/16 www.st.com 16

Contents STD45NF75 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Spice thermal model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 Packing mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2/16 Doc ID 9902 Rev 5

STD45NF75 Electrical ratings 1 Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit V Drain-source voltage (V = 0) 75 V DS GS V Drain-gate voltage (R = 20 kΩ) 75 V DGR GS V Gate- source voltage ± 20 V GS I (1) Drain current (continuous) at T = 25 °C 40 A D C I Drain current (continuous) at T = 100 °C 30 A D C I (2) Drain current (pulsed) 160 A DM P Total dissipation at T = 25 °C 125 W tot C Derating factor 0.83 W/°C dv/dt (3) Peak diode recovery voltage slope 20 V/ns E (4) Single pulse avalanche energy 500 mJ AS T Storage temperature stg -55 to 175 °C T Max. operating junction temperature j 1. Current limited by package 2. Pulse width limited by safe operating area. 3. I ≤ 40 A, di/dt ≤ 800 A/µs, V ≤ V , T ≤ T SD DD (BR)DSS j JMAX 4. Starting T = 25 °C, I = 20 A, V = 40 V j D DD Table 3. Thermal data Symbol Parameter Value Unit R Thermal resistance junction-case max 1.2 °C/W thj-case see Figure 16. and R Thermal resistance junction-pcb max °C/W thj-pcb Figure 17. Maximum lead temperature for soldering T 260 °C J purpose(1) 1. for 10 sec. 1.6 mm from case Doc ID 9902 Rev 5 3/16

Electrical characteristics STD45NF75 2 Electrical characteristics (T =25 °C unless otherwise specified) CASE Table 4. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit Drain-source V I = 250 µA, V =0 75 V (BR)DSS breakdown voltage D GS V = max rating Zero gate voltage DS 1 µA I V = max rating, DSS drain current (V = 0) DS 10 µA GS T = 125 °C C Gate-body leakage I V = ±20 V ±100 nA GSS current (V = 0) GS DS V Gate threshold voltage V = V , I = 250 µA 2 4 V GS(th) DS GS D Static drain-source on R V = 10 V, I = 20 A 0.018 0.024 Ω DS(on) resistance GS D Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Forward g (1) V = 25 V I =20 A - 50 S fs transconductance DS , D Input capacitance C 1760 pF Ciss Output capacitance VDS = 25 V, f = 1 MHz, - 360 pF Coss Reverse transfer VGS = 0 140 pF rss capacitance t Turn-on delay time 15 ns d(on) V = 37 V, I = 20 A t Rise time DD D 40 ns r R =4.7 Ω V = 10 V - t Turn-off delay time G GS 55 ns d(off) (see Figure20) t Fall time 12 ns f Q Total gate charge V = 60 V, I = 40 A, 60 80 nC g DD D Q Gate-source charge V = 10 V, R =4.7 Ω - 13 nC gs GS G Q Gate-drain charge (see Figure21) 23 nC gd 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%. 4/16 Doc ID 9902 Rev 5

STD45NF75 Electrical characteristics Table 6. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit Source-drain current I 40 A SD Source-drain current - I (1) 160 A SDM (pulsed) V (2) Forward on voltage I = 40 A, V = 0 - 1.5 V SD SD GS I = 40 A, V = 30 V, t Reverse recovery time SD DD 120 ns rr di/dt = 100 A/µs, Q Reverse recovery charge - 410 nC rr T = 150 °C j I Reverse recovery current 7.5 A RRM (see Figure22) 1. Pulse width limited by safe operating area. 2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5% Doc ID 9902 Rev 5 5/16

Electrical characteristics STD45NF75 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance ID AM03943v1 K 280dpg (A) δ=0.5 11000 OpLeirmaititoend ibn yt himsa xa rReaD iS(son) 100µs 10-1 00..12 0.05 1ms Tj=150°C Zth=k Rthj-c 1 Tc=25°C 10ms 0.02 δ=tp/τ Sinlge 0.01 pulse Single pulse tp 0.1 10-2 τ 0.1 1 10 VDS(V) 10-5 10-4 10-3 10-2 10-1 tp(s) Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Transconductance Figure 7. Static drain-source on resistance 6/16 Doc ID 9902 Rev 5

STD45NF75 Electrical characteristics Figure 8. Gate charge vs. gate-source Figure 9. Capacitance variations voltage Figure 10. Normalized gate threshold voltage Figure 11. Normalized on resistance vs. vs. temperature temperature Figure 12. Source-drain diode forward Figure 13. Normalized breakdown voltage vs. characteristics temperature Doc ID 9902 Rev 5 7/16

Electrical characteristics STD45NF75 Figure 14. Power derating vs. Tj Figure 15. Max Id current vs. Tc Figure 16. Thermal resistance Rthj-a vs. pcb Figure 17. Max power dissipation vs. pcb copper area copper area 8/16 Doc ID 9902 Rev 5

STD45NF75 Electrical characteristics Figure 18. Allowable Iav vs. time in avalanche The previous curve gives the safe operating area for unclamped inductive loads, single pulse or repetitive, under the following conditions: P = 0.5 * (1.3 * B * I ) D(AVE) VDSS AV E = P * t AS(AR) D(AVE) AV Where: I is the allowable current in avalanche AV P is the average power dissipation in avalanche (single pulse) D(AVE) t is the time in avalanche AV To de rate above 25 °C, at fixed I , the following equation must be applied: AV I = 2 * (T - T )/ (1.3 * B * Z ) AV jmax CASE VDSS th Where: Z = K * R is the value coming from normalized thermal response at fixed pulse width th th equal to T . AV Doc ID 9902 Rev 5 9/16

Spice thermal model STD45NF75 3 Spice thermal model Table 7. Spice parameter Parameter Node Value CTHERM1 7 - 6 6 * 10-4 CTHERM2 6 - 5 8 * 10-3 CTHERM3 5 - 4 2 * 10-2 CTHERM4 4 - 3 6 * 10-2 CTHERM5 3 - 2 9.65 * 10-2 CTHERM6 2 - 1 6 * 10-1 RTHERM1 7 - 6 0.045 RTHERM2 6 - 5 0.105 RTHERM3 5 - 4 0.150 RTHERM4 4 - 3 0.225 RTHERM5 3 - 2 0.375 RTHERM6 2 - 1 0.600 Figure 19. Thermal network 10/16 Doc ID 9902 Rev 5

STD45NF75 Test circuits 4 Test circuits Figure 20. Switching times test circuit for Figure 21. Gate charge test circuit resistive load VDD 12V 47kΩ 1kΩ 100nF RL 2µ20F0 3µ.F3 VDD IG=CONST VD Vi=20V=VGMAX 100Ω D.U.T. VGS 2200 RG D.U.T. µF 2.7kΩ VG PW 47kΩ 1kΩ PW AM01468v1 AM01469v1 Figure 22. Test circuit for inductive load Figure 23. Unclamped inductive load test switching and diode recovery times circuit L A A A D FAST L=100µH VD G D.U.T. DIODE 2200 3.3 µF µF VDD S B 3.3 1000 B B µF µF 25Ω D VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 24. Unclamped inductive waveform Figure 25. Switching time waveform V(BR)DSS ton toff VD tdon tr tdoff tf 90% 90% IDM 10% ID 0 10% VDS VDD VDD VGS 90% AM01472v1 0 10% AM01473v1 Doc ID 9902 Rev 5 11/16

Package mechanical data STD45NF75 5 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 12/16 Doc ID 9902 Rev 5

STD45NF75 Package mechanical data TO-252 (DPAK) mechanical data mm. DIM. min. typ max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 5.10 E 6.40 6.60 E1 4.70 e 2.28 e1 4.40 4.60 H 9.35 10.10 L 1 L1 2.80 L2 0.80 L4 0.60 1 R 0.20 V2 0 o 8 o 0068772_G Doc ID 9902 Rev 5 13/16

Packing mechanical data STD45NF75 6 Packing mechanical data DPAK FOOTPRINT All dimensions are in millimeters TAPE AND REEL SHIPMENT REEL MECHANICAL DATA mm inch DIM. MIN. MAX. MIN. MAX. A 330 12.992 B 1.5 0.059 C 12.8 13.2 0.504 0.520 D 20.2 0.795 G 16.4 18.4 0.645 0.724 N 50 1.968 T 22.4 0.881 BASE QTY BULK QTY TAPE MECHANICAL DATA 2500 2500 mm inch DIM. MIN. MAX. MIN. MAX. A0 6.8 7 0.267 0.275 B0 10.4 10.6 0.409 0.417 B1 12.1 0.476 D 1.5 1.6 0.059 0.063 D1 1.5 0.059 E 1.65 1.85 0.065 0.073 F 7.4 7.6 0.291 0.299 K0 2.55 2.75 0.100 0.108 P0 3.9 4.1 0.153 0.161 P1 7.9 8.1 0.311 0.319 P2 1.9 2.1 0.075 0.082 R 40 1.574 W 15.7 16.3 0.618 0.641 14/16 Doc ID 9902 Rev 5

STD45NF75 Revision history 7 Revision history T able 8. Document revision history Date Revision Changes 22-Jun-2004 1 Preliminary version 09-Sep-2004 2 Complete version 11-Jul-2006 3 New template, no content change 20-Feb-2007 4 Typo mistake on page 1 20-May-2009 5 Figure2 and Figure3 have been updated Doc ID 9902 Rev 5 15/16

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