STD15NF10 N-channel 100 V, 0.060 Ω, 23 A, DPAK low gate charge STripFET™ II Power MOSFET Features Type VDSSS RDS(on) max ID ) STD15NF10 100 V < 0.065 Ω 23 A s 3 ( t 1 c ■ Exceptional dv/dt capability u d ■ 100% avalanche tested DPAoK ■ Application oriented characterization r P e Application t e l ■ Switching applications o s Figure 1. Internal schematic diagram b Description O This MOSFET series realized with - ) STMicroelectronics unique STripFET procsess has specifically been designed to minimize (input t c capacitance and gate charge. It is therefore u suitable as primary switch in addvanced high- efficiency, high-frequency iosolated DC-DC converters for telecom arnd computer applications. P It is also intended for any applications with low e gate drive requirements. t e l o s b O Table 1. Device summary Order code Marking Package Packaging STD15NF10T4 D15NF10 DPAK Tape and reel November 2008 Rev 6 1/13 www.st.com 13

Contents STD15NF10 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 ) s 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (. . . . . . 9 t c u d 5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 o r P 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 e t e l o s b O - ) s ( t c u d o r P e t e l o s b O 2/13

STD15NF10 Electrical ratings 1 Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit V Drain-source voltage (V = 0) 100 V DS GS V Drain-gate voltage (R = 20 kΩ) 100 V DGR GS V Gate-source voltage ± 20 V GS I Drain current (continuous) at T = 25 °C 23 A D C ) s I Drain current (continuous) at T =100 °C 16 A D C ( t I (1) Drain current (pulsed) 92 c A DM u P Total dissipation at T = 25 °C 70 d W TOT C o Derating factor 0r.46 W/°C P E (2) Single pulse avalanche energy 180 mJ AS e dv/dt (3) Peak diode recovery voltage slope e t 9 V/ns l o T Storage temperature stg s -55 to 175 °C T Max. operating junction temperatureb J O 1. Pulse width limited by safe operating area - 2. Starting T = 25 oC, I = 10A, V = 30V J D DD) s 3. ISD ≤ 13 A, di/dt ≤ 300 A/µ(s, VDS ≤ V(BR)DSS, TJ ≤ TJMAX t c u Table 3. Thermal data d o Symbol Parameter Value Unit r P R Thermal resistance junction-case max 2.14 °C/W th JC e e tRthJA Thermal resistance junction-ambient max 100 °C/W ol Maximum lead temperature for soldering T 300 °C s l purpose b O 3/13

Electrical characteristics STD15NF10 2 Electrical characteristics (T = 25 °C unless otherwise specified) CASE Table 4. On(1) /off states Symbol Parameter Test conditions Min. Typ. Max. Unit Drain-source breakdown V(BR)DSS voltage ID = 250 µA, VGS = 0 100 V Zero gate voltage drain VDS = Max rating 1 µA I DSS current (VGS = 0) VDS = Max rating,@ 125 °C 10 s )µA ( Gate body leakage current ct IGSS (V = 0) VGS = ± 20 V u ±100 nA DS d VGS(th) Gate threshold voltage VDS= VGS, ID = 250 µA 2 o 3 4 V r P Static drain-source on RDS(on) resistance VGS = 10 V, ID = 12 A e 0.06 0.065 Ω t 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5% e l o s Table 5. Dynamic b O Symbol Parameter Test conditions Min. Typ. Max. Unit - g (1) Forward transconducta)nce V = 15 V I = 7.5 A 12 S fs s DS , D ( C Input capacitantce iss c 870 pF C Output caupacitance VDS = 25 V, f = 1 MHz, oss 125 pF Crss Revoersde transfer VGS = 0 50 pF capacitance r P eQ g Total gate charge VDD = 80 V, ID = 24 A 30 40 nC t Qgs Gate-source charge 6 nC e Q Gate-drain charge VGS = 10 V 10 nC l gd o s 1. Pulsed: pulse duration=300µs, duty cycle 1.5% b O Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) Turn-on delay time 60 ns V = 50 V, I = 12 A, tr Rise time DD D 45 ns R = 4.7 Ω, V = 10 V t Turn-off delay time G GS 49 ns d(off) Figure13 on page8 t Fall time 17 ns f 4/13

STD15NF10 Electrical characteristics Table 7. Source drain diode Symbol Parameter Test conditions Min Typ. Max Unit ISD Source-drain current 23 A I (1) Source-drain current (pulsed) 92 A SDM VSD(2) Forward on voltage ISD = 20 A, VGS = 0 1.5 V I = 24 A, trr Reverse recovery time SD 100 ns di/dt = 100 A/µs, Qrr Reverse recovery charge 375 nC V = 30 V, T = 150 °C IRRM Reverse recovery current DD J 7.5 )A Figure15 on page8 s ( t 1. Pulse width limited by safe operating area. c u 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% d o r P e t e l o s b O - ) s ( t c u d o r P e t e l o s b O 5/13

Electrical characteristics STD15NF10 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance ) s ( t c u d o r P Figure 4. Output characteristics Figure 5. Transfer characteristics e t e l o s b O - ) s ( t c u d o r P e t e Figure 6. Transconductance Figure 7. Static drain-source on resistance l o s b O 6/13

STD15NF10 Electrical characteristics Figure 8. Gate charge vs. gate-source voltage Figure 9. Capacitance variations ) s ( t c u d Figure 10. Normalized gate threshold voltage Figure 11. Normalized ono resistance vs. r vs. temperature temperatuPre e t e l o s b O - ) s ( t c u d o r P Figure 12. Soeu rce-drain diode forward tcharacteristics e l o s b O 7/13

Test circuit STD15NF10 3 Test circuit Figure 13. Switching times test circuit for Figure 14. Gate charge test circuit resistive load ) s ( t c u d o r P e Figure 15. Test circuit for inductive load Figure 16. Untclamped Inductive load test e switching and diode recovery times lcircuit o s b O - ) s ( t c u d o r P e t e l o Figusre 17. Unclamped inductive waveform b O 8/13

STD15NF10 Package mechanical data 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com ) s ( t c u d o r P e t e l o s b O - ) s ( t c u d o r P e t e l o s b O 9/13

Package mechanical data STD15NF10 TO-252 (DPAK) mechanical data mm. DIM. min. typ max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 ) s c 0.45 0.60 ( t c2 0.48 0.c60 D 6.00 u6.20 d D1 5.10 o E 6.40 r 6.60 P E1 4.70 e 2.28 e e1 4.40 t 4.60 e H 9.35 l 10.10 o L 1 s L1 b 2.80 L2 O 0.80 L4 0.60 1 - R 0.20 ) V2 0 o s 8o ( t c u d o r P e t e l o s b O 0068772_G 10/13

STD15NF10 Packaging mechanical data 5 Packaging mechanical data DPAK FOOTPRINT ) s All dimensions are in millimeters t( c u d o TAPE AND REEL SHIPMENT r P e RtEEL MECHANICAL DATA e mm inch l o DIM. MIN. MAX. MIN. MAX. s b A 330 12.992 O B 1.5 0.059 - C 12.8 13.2 0.504 0.520 ) D 20.2 0.795 s ( G 16.4 18.4 0.645 0.724 t c N 50 1.968 u d T 22.4 0.881 o r BASE QTY BULK QTY TAPE MECP HANICAL DATA 2500 2500 e mm inch DIM. tMIN. MAX. MIN. MAX. e lA0 6.8 7 0.267 0.275 o s B0 10.4 10.6 0.409 0.417 b B1 12.1 0.476 O D 1.5 1.6 0.059 0.063 D1 1.5 0.059 E 1.65 1.85 0.065 0.073 F 7.4 7.6 0.291 0.299 K0 2.55 2.75 0.100 0.108 P0 3.9 4.1 0.153 0.161 P1 7.9 8.1 0.311 0.319 P2 1.9 2.1 0.075 0.082 R 40 1.574 W 15.7 16.3 0.618 0.641 11/13

Revision history STD15NF10 6 Revision history T able 8. Revision history Date Revision Changes 21-Jun-2004 3 No history because migration. 09-Sep-2004 4 Complete document 08-Aug-2006 5 New template, updated SOA 04-Nov-2008 6 Q max value in Table5 has been corrected. G ) s ( t c u d o r P e t e l o s b O - ) s ( t c u d o r P e t e l o s b O 12/13

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