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STB36NM60N产品简介:
ICGOO电子元器件商城为您提供STB36NM60N由STMicroelectronics设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 STB36NM60N价格参考。STMicroelectronicsSTB36NM60N封装/规格:晶体管 - FET,MOSFET - 单, 表面贴装 N 沟道 600V 29A(Tc) 210W(Tc) D2PAK。您可以下载STB36NM60N参考资料、Datasheet数据手册功能说明书,资料中有STB36NM60N 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | |
描述 | MOSFET N-CH 600V 29A D2PAKMOSFET N-Ch 600V 0.092Ohm 29A MDMesh II MOS |
产品分类 | FET - 单分离式半导体 |
FET功能 | 逻辑电平门 |
FET类型 | MOSFET N 通道,金属氧化物 |
Id-ContinuousDrainCurrent | 29 A |
Id-连续漏极电流 | 29 A |
品牌 | STMicroelectronics |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 晶体管,MOSFET,STMicroelectronics STB36NM60NMDmesh™ II |
数据手册 | |
产品型号 | STB36NM60N |
Pd-PowerDissipation | 210 W |
Pd-功率耗散 | 210 W |
Qg-GateCharge | 83.6 nC |
Qg-栅极电荷 | 83.6 nC |
RdsOn-Drain-SourceResistance | 105 mOhms |
RdsOn-漏源导通电阻 | 105 mOhms |
Vds-Drain-SourceBreakdownVoltage | 600 V |
Vds-漏源极击穿电压 | 600 V |
不同Id时的Vgs(th)(最大值) | 4V @ 250µA |
不同Vds时的输入电容(Ciss) | 2722pF @ 100V |
不同Vgs时的栅极电荷(Qg) | 83.6nC @ 10V |
不同 Id、Vgs时的 RdsOn(最大值) | 105 毫欧 @ 14.5A,10V |
产品培训模块 | http://www.digikey.cn/PTM/IndividualPTM.page?site=cn&lang=zhs&ptm=26067 |
产品种类 | MOSFET |
供应商器件封装 | D²PAK |
其它名称 | 497-12972-6 |
其它有关文件 | http://www.st.com/web/catalog/sense_power/FM100/CL824/SC1167/PF246897?referrer=70071840 |
功率-最大值 | 210W |
包装 | Digi-Reel® |
商标 | STMicroelectronics |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
导通电阻 | 105 mOhms |
封装 | Reel |
封装/外壳 | TO-263-3,D²Pak(2 引线+接片),TO-263AB |
封装/箱体 | D2PAK-2 |
工厂包装数量 | 1000 |
晶体管极性 | N-Channel |
标准包装 | 1 |
汲极/源极击穿电压 | 600 V |
漏极连续电流 | 29 A |
漏源极电压(Vdss) | 600V |
电流-连续漏极(Id)(25°C时) | 29A (Tc) |
系列 | STB36NM60N |
STB36NM60N Ω Automotive-grade N-channel 600 V, 0.093 , 29 A, MDmesh™ II Power MOSFET in a D²PAK package Datasheet — production data Features Order code VDS @ RDS(on) I P TAB T max. D TOT Jmax STB36NM60N 650 V 0.105 Ω 29 A 210 W • Designed for automotive applications and 3 AEC-Q101 qualified 1 • 100% avalanche tested D 2 PAK • Low input capacitance and gate charge • Low gate input resistance Applications Figure 1. Internal schematic diagram • Switching applications (cid:39)(cid:11)(cid:21)(cid:15)(cid:3)(cid:55)(cid:36)(cid:37)(cid:12) Description This device is an N-channel Power MOSFET developed using the second generation of MDmesh™ technology. This revolutionary Power (cid:42)(cid:11)(cid:20)(cid:12) MOSFET associates a vertical structure to the company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high (cid:54)(cid:11)(cid:22)(cid:12) efficiency converters. (cid:36)(cid:48)(cid:19)(cid:20)(cid:23)(cid:26)(cid:24)(cid:89)(cid:20) Table 1. Device summary Order code Marking Packages Packaging STB36NM60N 36NM60N D2PAK Tape and reel June 2015 DocID16099 Rev 5 1/15 This is information on a product in full production. www.st.com
Contents STB36NM60N Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2/15 DocID16099 Rev 5
STB36NM60N Electrical ratings 1 Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 600 V VGS Gate-source voltage ± 25 V ID Drain current (continuous) at TC = 25 °C 29 A ID Drain current (continuous) at TC = 100 °C 18 A I (1) Drain current (pulsed) 116 A DM PTOT Total dissipation at TC = 25 °C 210 W Avalanche current, repetitive or not-repetitive I 10.5 A AR (pulse width limited by Tj max.) Single pulse avalanche energy E 345 mJ AS (Starting Tj = 25 °C, I = I , V = 50 V.) D AR DD dv/dt (2) Peak diode recovery voltage slope 15 V/ns Tstg Storage temperature -55 to 150 °C Tj Max. operating juncion temperature 150 °C 1. Pulse width limited by safe operating area. 2. I ≤ 29 A, di/dt ≤ 400 A/µs, V peak ≤ V , V = 80% V SD DS (BR)DSS DD (BR)DSS Table 3. Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case max 0.6 °C/W R (1) Thermal resistance junction-pcb max 30 °C/W thj-pcb 1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec DocID16099 Rev 5 3/15 15
Electrical characteristics STB36NM60N 2 Electrical characteristics (Tcase =25°C unless otherwise specified) Table 4. On /off states Symbol Parameter Test conditions Min. Typ. Max. Unit Drain-source V I = 1 mA, V = 0 600 V (BR)DSS breakdown voltage D GS Zero gate voltage VDS = 600 V 10 µA I DSS drain current (VGS = 0) VDS = 600 V, TC=125 °C 100 µA Gate-body leakage I V = ± 25 V ±100 nA GSS current (V = 0) GS DS V Gate threshold voltage V = V , I = 250 µA 2 3 4 V GS(th) DS GS D Static drain-source R V = 10 V, I = 14.5 A 0.093 0.105 Ω DS(on) on-resistance GS D Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Input capacitance C 2722 pF iss Output capacitance V = 100 V, f = 1 MHz, C DS - 173 - pF oss Reverse transfer VGS = 0 C 1.75 pF rss capacitance C (1) Equivalent Output oss eq. V = 0, V = 0 to 480 V - 458 - pF capacitance GS DS f =1MHz Gate DC Bias=0 R Gate input resistance Test signal level = 20 mV - 2.9 - Ω g open drain Q Total gate charge V = 480 V, I = 29 A, 83.6 nC g DD D Q Gate-source charge V = 10 V - 14 - nC gs GS Q Gate-drain charge (see Figure 15) 45 nC gd 1. C is defined as a constant equivalent capacitance giving the same charging time as C when V oss eq. oss DS increases from 0 to 80% V DS 4/15 DocID16099 Rev 5
STB36NM60N Electrical characteristics Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max Unit t Turn-on delay time - 17 - ns d(on) V = 300 V, I = 14.5 A, t Rise time DD D - 34 - ns r R = 4.7 Ω, V = 10 V G GS t Turn-off-delay time - 106 - ns d(off) (see Figure 14) t Fall time - 67 - ns f Table 7. Source drain diode Symbol Parameter Test conditions Min Typ. Max Unit I Source-drain current - 29 A SD I (1) Source-drain current (pulsed) - 116 A SDM V (2) Forward on voltage I = 29 A, V = 0 - 1.6 V SD SD GS t Reverse recovery time - 408 ns rr I = 29 A, di/dt = 100 A/µs Q Reverse recovery charge SD - 8 µC rr V = 60 V (see Figure 19) DD I Reverse recovery current - 39 A RRM t Reverse recovery time - 480 ns rr I = 29 A, di/dt = 100 A/µs SD Q Reverse recovery charge V = 60 V Tj = 150 °C - 10 µC rr DD (see Figure 19) I Reverse recovery current - 42 A RRM 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300µs, duty cycle 1.5% DocID16099 Rev 5 5/15 15
Electrical characteristics STB36NM60N 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance ID AM09017v1 (A) Tj=150°C Tc=25°C Single pulse 100 10 Operatmiitoen di nb ty hims aaxr eRa DiSs(on) 11100m0µsµss Li 1 10ms 0.1 0.1 1 10 100 VDS(V) Figure 4. Output characteristics Figure 5. Transfer characteristics AM09020v1 AM09021v1 ID(A) ID(A) 80 VGS=10V 80 VDS=20V 70 70 60 60 6V 50 50 40 40 30 30 20 20 5V 10 10 0 0 0 5 10 15 20 25 30 VDS(V) 0 2 4 6 8 VGS(V) Figure 6. Gate charge vs gate-source voltage Figure 7. Static drain-source on-resistance V(VG)S AMV0D9S02(2Vv)1 RDS(Ω(on)) AM09023v1 VGS=10V VDD=480V 10 ID=29A 500 0.098 VDS 0.096 8 400 0.094 6 300 0.092 4 200 0.090 2 100 0.088 0 0 0.086 0 20 40 60 80 Qg(nC) 0 5 10 15 20 25 30 ID(A) 6/15 DocID16099 Rev 5
STB36NM60N Electrical characteristics Figure 8. Capacitance variations Figure 9. Output capacitance stored energy C AM09024v1 Eoss AM09025v1 (pF) (µJ) 10000 Ciss 2 1000 Coss 100 1 10 Crss 1 0 0.1 1 10 100 VDS(V) 0 100 200 300 400 500 VDS(V) Figure 10. Normalized gate threshold voltage vs Figure 11. Normalized on-resistance vs temperature temperature VGS(th) AM09026v1 RDS(on) AM09027v1 (norm) ID=250µA (norm) 1.10 2.1 ID=14.5A 1.9 1.00 1.7 1.5 0.90 1.3 1.1 0.80 0.9 0.7 0.70 0.5 -50 -25 0 25 50 75 100 TJ(°C) -50 -25 0 25 50 75 100 TJ(°C) Figure 12. Normalized V vs temperature Figure 13. Source-drain diode forward (BR)DSS characteristics V(BR)DSS AM00897v1 VSD AM09039v1 (norm) ID=1mA (V) 1.07 1.6 1.05 1.4 TJ=-50°C 1.03 1.2 TJ=25°C 1.01 1.0 0.99 0.8 TJ=150°C 0.97 0.6 0.95 0.4 0.93 -50 -25 0 25 50 75 100 TJ(°C) 0 5 10 15 20 25 ISD(A) DocID16099 Rev 5 7/15 15
Test circuits STB36NM60N 3 Test circuits Figure 14. Switching times test circuit for Figure 15. Gate charge test circuit resistive load VDD 12V 47kΩ 1kΩ 100nF RL 2μ20F0 3μ.F3 VDD IG=CONST VD Vi=20V=VGMAX 100Ω D.U.T. VGS 2200 RG D.U.T. μF 2.7kΩ VG PW 47kΩ 1kΩ PW AM01468v1 AM01469v1 Figure 16. Test circuit for inductive load Figure 17. Unclamped inductive load test circuit switching and diode recovery times L A A A D FAST L=100μH VD G D.U.T. DIODE 2200 3.3 μF μF VDD S B 3.3 1000 B B μF μF 25Ω D VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform V(BR)DSS ton toff VD tdon tr tdoff tf 90% 90% IDM 10% ID 0 10% VDS VDD VDD 90% VGS AM01472v1 0 10% AM01473v1 8/15 DocID16099 Rev 5
STB36NM60N Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 20. D²PAK (TO-263) type A package outline DocID16099 Rev 5 9/15 15
Package information STB36NM60N Table 8. D²PAK (TO-263) type A mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 7.75 8.00 D2 1.10 1.30 1.50 E 10 10.40 E1 8.50 8.70 8.90 E2 6.85 7.05 7.25 e 2.54 e1 4.88 5.28 H 15 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R 0.4 V2 0° 8° 10/15 DocID16099 Rev 5
STB36NM60N Package information Figure 21. D²PAK recommended footprint(a) (cid:41)(cid:82)(cid:82)(cid:87)(cid:83)(cid:85)(cid:76)(cid:81)(cid:87) a. All dimension are in millimeters DocID16099 Rev 5 11/15 15
Packing information STB36NM60N 5 Packing information Figure 22. Tape 10 pitches cumulative tolerance on tape +/- 0.2 mm Top cover P0 D P2 T tape E F K0 W B1 B0 For machine ref. only A0 P1 D1 including draft and radii concentric around B0 User direction of feed R Bending radius User direction of feed AM08852v1 12/15 DocID16099 Rev 5
STB36NM60N Packing information Figure 23. Reel T REEL DIMENSIONS 40mm min. Access hole At slot location B D C N A Full radius Tape slot G measured at hub in core for tape start 25 mm min. width AM08851v2 Table 9. D²PAK (TO-263) tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. Min. Max. A0 10.5 10.7 A 330 B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 13.2 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 26.4 F 11.4 11.6 N 100 K0 4.8 5.0 T 30.4 P0 3.9 4.1 P1 11.9 12.1 Base qty 1000 P2 1.9 2.1 Bulk qty 1000 R 50 T 0.25 0.35 W 23.7 24.3 DocID16099 Rev 5 13/15 15
Revision history STB36NM60N 6 Revision history Table 10. Document revision history Date Revision Changes 16-Nov-2009 1 First release. 22-Jun-2011 2 Document status promoted from preliminary data to datasheet. Figure6: Gate charge vs gate-source voltage has been modified. 10-May-2012 3 Minor text changes. – Modified: title and features 19-Sep-2014 4 – Minor text changes – Updated title, internal schematic diagram and features in cover page. – Updated Table3: Thermal data and Figure12: Normalized 09-Jun-2015 5 V vs temperature. (BR)DSS – Updated Section4: Package information. – Minor text changes. 14/15 DocID16099 Rev 5
STB36NM60N IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved DocID16099 Rev 5 15/15 15