Notrecommendedfornewdesigns.PleaseuseSST39VF1601C andSST39VF3201B. 16 Mbit / 32 Mbit / (x16) Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns The SST39VF1601/1602 and SST39VF3201/3202 devices are 1M x16 and 2M x16, respectively, CMOS Multi-Purpose Flash Plus (MPF+) manufactured with SST's proprietary, high performance CMOS SuperFlash technology. The split- gate cell design and thick-oxide tunneling injector attain better reliability and man- ufacturability compared with alternate approaches. The SST39VF1601/1602/ 3201/3202 write (Program or Erase) with a 2.7-3.6V power supply. These devices conforms to JEDEC standard pinouts for x16 memories. Features (cid:129) Organizedas1Mx16:SST39VF1601/1602 (cid:129) Security-IDFeature 2Mx16:SST39VF3201/3202 –SST:128bits;User:128bits (cid:129) SingleVoltageReadandWriteOperations (cid:129) FastReadAccessTime: –2.7-3.6V –70ns (cid:129) SuperiorReliability (cid:129) LatchedAddressandData –Endurance:100,000Cycles(Typical) (cid:129) FastEraseandWord-Program: –Greaterthan100yearsDataRetention –Sector-EraseTime:18ms(typical) (cid:129) LowPowerConsumption(typicalvaluesat5MHz) –Block-EraseTime:18ms(typical) –ActiveCurrent:9mA(typical) –Chip-EraseTime:40ms(typical) –StandbyCurrent:3µA(typical) –Word-ProgramTime:7µs(typical) –AutoLowPowerMode:3µA(typical) (cid:129) AutomaticWriteTiming (cid:129) HardwareBlock-Protection/WP#InputPin –InternalV Generation PP –TopBlock-Protection(top32KWord) (cid:129) End-of-WriteDetection forSST39VF1602/3202 –BottomBlock-Protection(bottom32KWord) –ToggleBits forSST39VF1601/3201 –Data#Polling (cid:129) Sector-EraseCapability (cid:129) CMOSI/OCompatibility –Uniform2KWordsectors (cid:129) JEDECStandard (cid:129) Block-EraseCapability –FlashEEPROMPinoutsandcommandsets –Uniform32KWordblocks (cid:129) PackagesAvailable (cid:129) Chip-EraseCapability –48-leadTSOP(12mmx20mm) –48-ballTFBGA(6mmx8mm) (cid:129) Erase-Suspend/Erase-ResumeCapabilities (cid:129) AlldevicesareRoHScompliant (cid:129) HardwareResetPin(RST#) www.microchip.com ©2011SiliconStorageTechnology,Inc. DS25028A 08/11

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Product Description The SST39VF160x and SST39VF320x devices are 1M x16 and 2M x16, respectively, CMOS Multi- Purpose Flash Plus (MPF+) manufactured with SST’s proprietary, high performance CMOS Super- Flash technology. The split-gate cell design and thick-oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches. The SST39VF160x/320x write (Program or Erase) with a 2.7-3.6V power supply. These devices conform to JEDEC standard pinouts for x16 memories. Featuring high performance Word-Program, the SST39VF160x/320x devices provide a typical Word- Program time of 7 µsec. These devices use Toggle Bit or Data# Polling to indicate the completion of Program operation. To protect against inadvertent write, they have on-chip hardware and Software Data Protection schemes. Designed, manufactured, and tested for a wide spectrum of applications, these devices are offered with a guaranteed typical endurance of 100,000 cycles. Data retention is ratedatgreaterthan100years. The SST39VF160x/320x devices are suited for applications that require convenient and economical updating of program, configuration, or data memory. For all system applications, they significantly improve performance and reliability, while lowering power consumption. They inherently use less energyduringEraseandProgramthanalternativeflashtechnologies.Thetotalenergyconsumedisa functionoftheappliedvoltage,current,andtimeofapplication.Sinceforanygivenvoltagerange,the SuperFlash technology uses less current to program and has a shorter erase time, the total energy consumed during any Erase or Program operation is less than alternative flash technologies. These devices also improve flexibility while lowering the cost for program, data, and configuration storage applications. The SuperFlash technology provides fixed Erase and Program times, independent of the number of Erase/Program cycles that have occurred. Therefore the system software or hardware does not have to be modified or de-rated as is necessary with alternative flash technologies, whose Erase and Pro- gramtimesincreasewithaccumulatedErase/Programcycles. To meet high density, surface mount requirements, the SST39VF160x/320x are offered in 48-lead TSOPand48-ballTFBGApackages.SeeFigures2and3forpinassignments. ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 2

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Block Diagram SuperFlash X-Decoder Memory MemoryAddress AddressBuffer Latches Y-Decoder CE# OE# I/OBuffersandDataLatches WE# ControlLogic WP# RESET# DQ15-DQ0 1223B1.0 Figure 1: Functional Block Diagram ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 3

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Pin Assignment SST39VF3201/3202 SST39VF1601/1602 SST39VF160x/320x A15 A15 1 48 A16 A14 A14 2 47 NC A13 A13 3 46 VSS A12 A12 4 45 DQ15 A11 A11 5 44 DQ7 A10 A10 6 43 DQ14 A9 A9 7 42 DQ6 A8 A8 8 41 DQ13 A19 A19 9 StandardPinout 40 DQ5 A20 NC 10 39 DQ12 WE# WE# 11 TopView 38 DQ4 RST# RST# 12 37 VDD DieUp NC NC 13 36 DQ11 WP# WP# 14 35 DQ3 NC NC 15 34 DQ10 A18 A18 16 33 DQ2 A17 A17 17 32 DQ9 A7 A7 18 31 DQ1 A6 A6 19 30 DQ8 A5 A5 20 29 DQ0 A4 A4 21 28 OE# A3 A3 22 27 VSS A2 A2 23 26 CE# A1 A1 24 25 A0 122348-tsopP01.4 Figure 2: Pin Assignments for 48-lead TSOP TOPVIEW (ballsfacingdown) TOPVIEW (ballsfacingdown) SST39VF1601/1602 SST39VF3201/3202 6 6 A13 A12 A14 A15 A16 NC DQ15VSS A13 A12 A14 A15 A16 NC DQ15VSS 5 5 A9 A8 A10 A11 DQ7DQ14DQ13DQ6 A9 A8 A10 A11 DQ7DQ14DQ13DQ6 4 4 WE# RST# NC A19 DQ5DQ12 VDD DQ4 WE# RST# NC A19 DQ5DQ12 VDD DQ4 3 3 NC WP# A18 NC DQ2DQ10DQ11DQ3 NC WP# A18 A20 DQ2DQ10DQ11DQ3 2 2 A7 A17 A6 A5 DQ0 DQ8 DQ9 DQ1 A7 A17 A6 A5 DQ0 DQ8 DQ9 DQ1 1 1 A3 A4 A2 A1 A0 CE# OE# VSS A3 A4 A2 A1 A0 CE# OE# VSS A B C D E F G H A B C D E F G H 122348-tfbgaB3KP02.0 122348-tfbgaB3KP02a.2 Figure 3: pin assignments for 48-ball TFBGA ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 4

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Table 1: Pin Description Symbol PinName Functions A 1-A AddressInputs Toprovidememoryaddresses. MS 0 DuringSector-EraseA -A addresslineswillselectthesector. MS 11 DuringBlock-EraseA -A addresslineswillselecttheblock. MS 15 DQ -DQ DataInput/output TooutputdataduringReadcyclesandreceiveinputdataduringWritecycles. 15 0 DataisinternallylatchedduringaWritecycle. Theoutputsareintri-statewhenOE#orCE#ishigh. WP# WriteProtect Toprotectthetop/bottombootblockfromErase/Programoperationwhen grounded. RST# Reset ToresetandreturnthedevicetoReadmode. CE# ChipEnable ToactivatethedevicewhenCE#islow. OE# OutputEnable Togatethedataoutputbuffers. WE# WriteEnable TocontroltheWriteoperations. V PowerSupply Toprovidepowersupplyvoltage:2.7-3.6V DD V Ground SS NC NoConnection Unconnectedpins. T1.225028 1. AMS=Mostsignificantaddress AMS=A19forSST39VF1601/1602,andA20forSST39VF3201/3202 ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 5

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Device Operation Commands are used to initiate the memory operation functions of the device. Commands are written tothedeviceusingstandardmicroprocessorwritesequences.AcommandiswrittenbyassertingWE# lowwhilekeepingCE#low.TheaddressbusislatchedonthefallingedgeofWE#orCE#,whichever occurslast.ThedatabusislatchedontherisingedgeofWE#orCE#,whicheveroccursfirst. The SST39VF160x/320x also have the Auto Low Power mode which puts the device in a near standby mode after data has been accessed with a valid Read operation. This reduces the I active DD read current from typically 9 mA to typically 3 µA. The Auto Low Power mode reduces the typical I DD activereadcurrenttotherangeof2mA/MHzofReadcycletime.ThedeviceexitstheAutoLowPower mode with any address transition or control signal transition used to initiate another Read cycle, with noaccesstimepenalty.NotethatthedevicedoesnotenterAuto-LowPowermodeafterpower-upwith CE#heldsteadilylow,untilthefirstaddresstransitionorCE#isdrivenhigh. Read TheReadoperationoftheSST39VF160x/320xiscontrolledbyCE#andOE#,bothhavetobelowfor the system to obtain data from the outputs. CE# is used for device selection. When CE# is high, the chipisdeselectedandonlystandbypowerisconsumed.OE#istheoutputcontrolandisusedtogate data from the output pins. The data bus is in high impedance state when either CE# or OE# is high. RefertotheReadcycletimingdiagramforfurtherdetails(Figure4). Word-Program Operation The SST39VF160x/320x are programmed on a word-by-word basis. Before programming, the sector where the word exists must be fully erased. The Program operation is accomplished in three steps. Thefirststepisthethree-byteloadsequenceforSoftwareDataProtection.Thesecondstepistoload word address and word data. During the Word-Program operation, the addresses are latched on the falling edge of either CE# or WE#, whichever occurs last. The data is latched on the rising edge of eitherCE#orWE#,whicheveroccursfirst.ThethirdstepistheinternalProgramoperationwhichisini- tiated after the rising edge of the fourth WE# or CE#, whichever occurs first. The Program operation, once initiated, will be completed within 10 µs. See Figures 5 and 6 for WE# and CE# controlled Pro- gram operation timing diagrams and Figure 20 for flowcharts. During the Program operation, the only validreadsareData#PollingandToggleBit.DuringtheinternalProgramoperation,thehostisfreeto perform additional tasks. Any commands issued during the internal Program operation are ignored. Duringthecommandsequence,WP#shouldbestaticallyheldhighorlow. Sector/Block-Erase Operation TheSector-(orBlock-)Eraseoperationallowsthesystemtoerasethedeviceonasector-by-sector(or block-by-block) basis. The SST39VF160x/320x offer both Sector-Erase and Block-Erase mode. The sector architecture is based on uniform sector size of 2 KWord. The Block-Erase mode is based on uniform block size of 32 KWord. The Sector-Erase operation is initiated by executing a six-byte com- mandsequencewithSector-Erasecommand(30H)andsectoraddress(SA)inthelastbuscycle.The Block-Erase operation is initiated by executing a six-byte command sequence with Block-Erase com- mand(50H)andblockaddress(BA)inthelastbuscycle.Thesectororblockaddressislatchedonthe falling edge of the sixth WE# pulse, while the command (30H or 50H) is latched on the rising edge of thesixthWE#pulse.TheinternalEraseoperationbeginsafterthesixthWE#pulse.TheEnd-of-Erase operationcanbedeterminedusingeitherData#PollingorToggleBitmethods.SeeFigures10and11 ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 6

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns for timing waveforms and Figure 24 for the flowchart. Any commands issued during the Sector- or Block-Erase operation are ignored. When WP# is low, any attempt to Sector- (Block-) Erase the pro- tectedblockwillbeignored.Duringthecommandsequence,WP#shouldbestaticallyheldhighorlow. Erase-Suspend/Erase-Resume Commands TheErase-SuspendoperationtemporarilysuspendsaSector-orBlock-Eraseoperationthusallowing datatobereadfromanymemorylocation,orprogramdataintoanysector/blockthatisnotsuspended foranEraseoperation.TheoperationisexecutedbyissuingonebytecommandsequencewithErase- Suspend command (B0H). The device automatically enters read mode typically within 20 µs after the Erase-Suspendcommandhadbeenissued.Validdatacanbereadfromanysectororblockthatisnot suspended from an Erase operation. Reading at address location within erase-suspended sectors/ blockswilloutputDQ togglingandDQ at“1”.WhileinErase-Suspendmode,aWord-Programoper- 2 6 ationisallowedexceptforthesectororblockselectedforErase-Suspend. ToresumeSector-EraseorBlock-Eraseoperationwhichhasbeensuspendedthesystemmustissue Erase Resume command. The operation is executed by issuing one byte command sequence with EraseResumecommand(30H)atanyaddressinthelastBytesequence. Chip-Erase Operation The SST39VF160x/320x provide a Chip-Erase operation, which allows the user to erase the entire memoryarraytothe“1”state.Thisisusefulwhentheentiredevicemustbequicklyerased. The Chip-Erase operation is initiated by executing a six-byte command sequence with Chip-Erase command(10H)ataddress5555Hinthelastbytesequence.TheEraseoperationbeginswiththeris- ing edge of the sixth WE# or CE#, whichever occurs first. During the Erase operation, the only valid readisToggleBitorData#Polling.SeeTable6forthecommandsequence,Figure10fortimingdia- gram, and Figure 24 for the flowchart. Any commands issued during the Chip-Erase operation are ignored.WhenWP#islow,anyattempttoChip-Erasewillbeignored.Duringthecommandsequence, WP#shouldbestaticallyheldhighorlow. Write Operation Status Detection TheSST39VF160x/320xprovidetwosoftwaremeanstodetectthecompletionofaWrite(Programor Erase)cycle,inordertooptimizethesystemwritecycletime.Thesoftwaredetectionincludestwosta- tus bits: Data# Polling (DQ ) and Toggle Bit (DQ ). The End-of-Write detection mode is enabled after 7 6 therisingedgeofWE#,whichinitiatestheinternalProgramorEraseoperation. The actual completion of the nonvolatile write is asynchronous with the system; therefore, either a Data# Polling or Toggle Bit read may be simultaneous with the completion of the write cycle. If this occurs, the system may possibly get an erroneous result, i.e., valid data may appear to conflict with either DQ or DQ . In order to prevent spurious rejection, if an erroneous result occurs, the software 7 6 routine should include a loop to read the accessed location an additional two (2) times. If both reads arevalid,thenthedevicehascompletedtheWritecycle,otherwisetherejectionisvalid. ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 7

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Data# Polling (DQ ) 7 WhentheSST39VF160x/320xareintheinternalProgramoperation,anyattempttoreadDQ willpro- 7 duce the complement of the true data. Once the Program operation is completed, DQ will produce 7 truedata.NotethateventhoughDQ mayhavevaliddataimmediatelyfollowingthecompletionofaninternal 7 Writeoperation,theremainingdataoutputsmaystillbeinvalid:validdataontheentiredatabuswillappearin subsequentsuccessiveReadcyclesafteranintervalof1µs.During internal Erase operation, any attempt toreadDQ willproducea‘0’.OncetheinternalEraseoperationiscompleted,DQ willproducea‘1’. 7 7 TheData#PollingisvalidaftertherisingedgeoffourthWE#(orCE#)pulseforProgramoperation.For Sector-, Block- or Chip-Erase, the Data# Polling is valid after the rising edge of sixth WE# (or CE#) pulse.SeeFigure7forData#PollingtimingdiagramandFigure21foraflowchart. Toggle Bits (DQ6 and DQ2) During the internal Program or Erase operation, any consecutive attempts to read DQ will produce 6 alternating“1”sand“0”s,i.e.,togglingbetween1and0.WhentheinternalProgramorEraseoperation iscompleted,theDQ bitwillstoptoggling.Thedeviceisthenreadyforthenextoperation.ForSector- 6 , Block-, or Chip-Erase, the toggle bit (DQ ) is valid after the rising edge of sixth WE# (or CE#) pulse. 6 DQ will be set to “1” if a Read operation is attempted on an Erase-Suspended Sector/Block. If Pro- 6 gramoperationisinitiatedinasector/blocknotselectedinErase-Suspendmode,DQ willtoggle. 6 An additional Toggle Bit is available on DQ , which can be used in conjunction with DQ to check 2 6 whetheraparticularsectorisbeingactivelyerasedorerase-suspended.Table2showsdetailedstatus bits information. The Toggle Bit (DQ ) is valid after the rising edge of the last WE# (or CE#) pulse of 2 Writeoperation.SeeFigure8forToggleBittimingdiagramandFigure21foraflowchart. Table 2: Write Operation Status Status DQ DQ DQ 7 6 2 NormalOperation StandardProgram DQ7# Toggle NoToggle StandardErase 0 Toggle Toggle Erase-SuspendMode ReadfromErase-SuspendedSector/Block 1 1 Toggle ReadfromNon-Erase-SuspendedSector/Block Data Data Data Program DQ7# Toggle N/A T2.0 25028 Note: DQ7andDQ2requireavalidaddresswhenreadingstatusinformation. Data Protection TheSST39VF160x/320xprovidebothhardwareandsoftwarefeaturestoprotectnonvolatiledatafrom inadvertentwrites. Hardware Data Protection Noise/GlitchProtection:AWE#orCE#pulseoflessthan5nswillnotinitiateawritecycle. V PowerUp/DownDetection:TheWriteoperationisinhibitedwhenV islessthan1.5V. DD DD Write Inhibit Mode: Forcing OE# low, CE# high, or WE# high will inhibit the Write operation. This pre- ventsinadvertentwritesduringpower-uporpower-down. ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 8

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Hardware Block Protection The SST39VF1602/3202 support top hardware block protection, which protects the top 32 KWord block of the device. The SST39VF1601/3201 support bottom hardware block protection, which pro- tectsthebottom32KWordblockofthedevice.TheBootBlockaddressrangesaredescribedinTable 3.ProgramandEraseoperationsarepreventedonthe32KWordwhenWP#islow.IfWP#isleftfloat- ing,itisinternallyheldhighviaapull-upresistor,andtheBootBlockisunprotected,enablingProgram andEraseoperationsonthatblock. Table 3: Boot Block Address Ranges Product AddressRange BottomBootBlock SST39VF1601/3201 000000H-007FFFH TopBootBlock SST39VF1602 0F8000H-0FFFFFH SST39VF3202 1F8000H-1FFFFFH T3.025028 Hardware Reset (RST#) TheRST#pinprovidesahardwaremethodofresettingthedevicetoreadarraydata.WhentheRST# pinisheldlowforatleastT anyin-progressoperationwillterminateandreturntoReadmode.When RP, no internal Program/Erase operation is in progress, a minimum period of T is required after RST# RHR isdrivenhighbeforeavalidReadcantakeplace(seeFigure16). The Erase or Program operation that has been interrupted needs to be reinitiated after the device resumesnormaloperationmodetoensuredataintegrity. Software Data Protection (SDP) The SST39VF160x/320x provide the JEDEC approved Software Data Protection scheme for all data alteration operations, i.e., Program and Erase. Any Program operation requires the inclusion of the three-byte sequence. The three-byte load sequence is used to initiate the Program operation, provid- ing optimal protection from inadvertent Write operations, e.g., during the system power-up or power- down. Any Erase operation requires the inclusion of six-byte sequence. These devices are shipped with the Software Data Protection permanently enabled. See Table 6 for the specific software com- mand codes. During SDP command sequence, invalid commands will abort the device to read mode withinT ThecontentsofDQ -DQ canbeV orV ,butnoothervalue,duringanySDPcommand RC. 15 8 IL IH sequence. Common Flash Memory Interface (CFI) TheSST39VF160x/320xalsocontaintheCFIinformationtodescribethecharacteristicsofthedevice. InordertoentertheCFIQuerymode,thesystemmustwritethree-bytesequence,sameasproductID entrycommandwith98H(CFIQuerycommand)toaddress5555Hinthelastbytesequence.Oncethe device enters the CFI Query mode, the system can read CFI data at the addresses given in Tables 7 through10.ThesystemmustwritetheCFIExitcommandtoreturntoReadmodefromtheCFIQuery mode. ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 9

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Product Identification The Product Identification mode identifies the devices as the SST39VF1601, SST39VF1602, SST39VF3201, or SST39VF3202, and manufacturer as SST. This mode may be accessed software operations.UsersmayusetheSoftwareProductIdentificationoperationtoidentifythepart(i.e.,using thedeviceID)whenusingmultiplemanufacturersinthesamesocket.Fordetails,seeTable6forsoft- ware operation, Figure 12 for the Software ID Entry and Read timing diagram and Figure 22 for the SoftwareIDEntrycommandsequenceflowchart. Table 4: Product Identification Address Data Manufacturer’sID 0000H BFH DeviceID SST39VF1601 0001H 234BH SST39VF1602 0001H 234AH SST39VF3201 0001H 235BH SST39VF3202 0001H 235AH T4.2 25028 Product Identification Mode Exit/CFI Mode Exit InordertoreturntothestandardReadmode,theSoftwareProductIdentificationmodemustbeexited. Exit is accomplished by issuing the Software ID Exit command sequence, which returns the device to theReadmode.ThiscommandmayalsobeusedtoresetthedevicetotheReadmodeafteranyinad- vertenttransientconditionthatapparentlycausesthedevicetobehaveabnormally,e.g.,notreadcor- rectly. Please note that the Software ID Exit/CFI Exit command is ignored during an internal Program orEraseoperation.SeeTable6forsoftwarecommandcodes,Figure14fortimingwaveform,andFig- ures22and23forflowcharts. Security ID TheSST39VF160x/320xdevicesoffera256-bitSecurityIDspace.TheSecureIDspaceisdividedinto two 128-bit segments - one factory programmed segment and one user programmed segment. The first segment is programmed and locked at SST with a random 128-bit number. The user segment is leftun-programmedforthecustomertoprogramasdesired. To program the user segment of the Security ID, the user must use the Security ID Word-Program command.Todetectend-of-writefortheSECID,readthetogglebits.DonotuseData#Polling.Once thisiscomplete,theSecIDshouldbelockedusingtheUserSecIDProgramLock-Out.Thisdisables anyfuturecorruptionofthisspace.NotethatregardlessofwhetherornottheSecIDislocked,neither SecIDsegmentcanbeerased. TheSecureIDspacecanbequeriedbyexecutingathree-bytecommandsequencewithEnterSecID command (88H) at address 5555H in the last byte sequence. To exit this mode, the Exit Sec ID com- mandshouldbeexecuted.RefertoTable6formoredetails. ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 10

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Operations Table 5: Operation Modes Selection Mode CE# OE# WE# DQ Address Read V V V D A IL IL IH OUT IN Program V V V D A IL IH IL IN IN Erase V V V X1 Sectororblockaddress, IL IH IL XXHforChip-Erase Standby V X X HighZ X IH WriteInhibit X V X HighZ/D X IL OUT X X V HighZ/D X IH OUT ProductIdentification SoftwareMode V V V SeeTable6 IL IL IH T5.025028 1. XcanbeVILorVIH,butnoothervalue. Table 6: Software Command Sequence Command 1stBus 2ndBus 3rdBus 4thBus 5thBus 6thBus Sequence WriteCycle WriteCycle WriteCycle WriteCycle WriteCycle WriteCycle Addr1 Data2 Addr1 Data2 Addr1 Data2 Addr1 Data2 Addr1 Data2 Addr1 Data2 Word-Program 5555H AAH 2AAAH 55H 5555H A0H WA3 Data Sector-Erase 5555H AAH 2AAAH 55H 5555H 80H 5555 AAH 2AAAH 55H SA 4 30H X H Block-Erase 5555H AAH 2AAAH 55H 5555H 80H 5555 AAH 2AAAH 55H BA 4 50H X H Chip-Erase 5555H AAH 2AAAH 55H 5555H 80H 5555 AAH 2AAAH 55H 5555 10H H H Erase-Suspend XXXX B0H H Erase-Resume XXXX 30H H QuerySecID5 5555H AAH 2AAAH 55H 5555H 88H UserSecurityID 5555H AAH 2AAAH 55H 5555H A5H WA6 Data Word-Program UserSecurityID 5555H AAH 2AAAH 55H 5555H 85H XXH6 0000 ProgramLock-Out H SoftwareID 5555H AAH 2AAAH 55H 5555H 90H Entry7,8 CFIQueryEntry 5555H AAH 2AAAH 55H 5555H 98H SoftwareID 5555H AAH 2AAAH 55H 5555H F0H Exit9,10/CFIExit/ SecIDExit SoftwareID XXH F0H Exit9,10 /CFIExit/SecID Exit T6.625028 1. AddressformatA14-A0(Hex). AddressesA15-A19canbeVILorVIH,butnoothervalue,forCommandsequenceforSST39VF1601/1602, AddressesA15-A20canbeVILorVIH,butnoothervalue,forCommandsequenceforSST39VF3201/3202, ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 11

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns 2. DQ15-DQ8canbeVILorVIH,butnoothervalue,forCommandsequence 3. WA=ProgramWordaddress 4. SAXforSector-Erase;usesAMS-A11addresslines BAX,forBlock-Erase;usesAMS-A15addresslines AMS=Mostsignificantaddress AMS=A19forSST39VF1601/1602andA20forSST39VF3201/3202 5. WithAMS-A4=0;SecIDisreadwithA3-A0, SSTIDisreadwithA3=0(Addressrange=000000Hto000007H), UserIDisreadwithA3=1(Addressrange=000010Hto000017H). LockStatusisreadwithA7-A0=0000FFH.Unlocked:DQ3=1/Locked:DQ3=0. 6. ValidWord-AddressesforSecIDarefrom000000H-000007Hand000010H-000017H. 7. ThedevicedoesnotremaininSoftwareProductIDModeifpowereddown. 8. WithAMS-A1=0; SSTManufacturerID=00BFH,isreadwithA0=0, SST39VF1601DeviceID=234BH,isreadwithA0=1, SST39VF1602DeviceID=234AH,isreadwithA0=1, SST39VF3201DeviceID=235BH,isreadwithA0=1, SST39VF3202DeviceID=235AH,isreadwithA0=1, AMS=Mostsignificantaddress AMS=A19forSST39VF1601/1602andA20forSST39VF3201/3202 9. BothSoftwareIDExitoperationsareequivalent 10. Ifusersneverlockafterprogramming,SecIDcanbeprogrammedoverthepreviouslyunprogrammedbits(data=1) usingtheSecIDmodeagain(theprogrammed“0”bitscannotbereversedto“1”).ValidWord-AddressesforSecIDare from000000H-000007Hand000010H-000017H. Table 7: CFI Query Identification String1 for SST39VF160x/320x Address Data Data 10H 0051H QueryUniqueASCIIstring“QRY” 11H 0052H 12H 0059H 13H 0001H PrimaryOEMcommandset 14H 0007H 15H 0000H AddressforPrimaryExtendedTable 16H 0000H 17H 0000H AlternateOEMcommandset(00H=noneexists) 18H 0000H 19H 0000H AddressforAlternateOEMextendedTable(00H=noneexits) 1AH 0000H T7.125028 1. RefertoCFIpublication100formoredetails. ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 12

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Table 8: System Interface Information for SST39VF160x/320x Address Data Data 1BH 0027H V Min(Program/Erase) DD DQ -DQ :Volts,DQ -DQ :100millivolts 7 4 3 0 1CH 0036H V Max(Program/Erase) DD DQ -DQ :Volts,DQ -DQ :100millivolts 7 4 3 0 1DH 0000H V min.(00H=noV pin) PP PP 1EH 0000H V max.(00H=noV pin) PP PP 1FH 0003H TypicaltimeoutforWord-Program2Nµs(23=8µs) 20H 0000H Typicaltimeoutformin.sizebufferprogram2Nµs(00H=notsupported) 21H 0004H TypicaltimeoutforindividualSector/Block-Erase2Nms(24=16ms) 22H 0005H TypicaltimeoutforChip-Erase2Nms(25=32ms) 23H 0001H MaximumtimeoutforWord-Program2Ntimestypical(21x23=16µs) 24H 0000H Maximumtimeoutforbufferprogram2Ntimestypical 25H 0001H MaximumtimeoutforindividualSector/Block-Erase2Ntimestypical(21x24=32 ms) 26H 0001H MaximumtimeoutforChip-Erase2Ntimestypical(21x25=64ms) T8.3 25028 Table 9: Device Geometry Information for SST39VF1601/1602 Address Data Data 27H 0015H Devicesize=2NBytes(15H=21;221=2MByte) 28H 0001H FlashDeviceInterfacedescription;0001H=x16-onlyasynchronousinterface 29H 0000H 2AH 0000H Maximumnumberofbyteinmulti-bytewrite=2N(00H=notsupported) 2BH 0000H 2CH 0002H NumberofEraseSector/Blocksizessupportedbydevice 2DH 00FFH SectorInformation(y+1=Numberofsectors;zx256B=sectorsize) 2EH 0001H y=511+1=512sectors(01FF=511 2FH 0010H 30H 0000H z=16x256Bytes=4KByte/sector(0010H=16) 31H 001FH BlockInformation(y+1=Numberofblocks;zx256B=blocksize) 32H 0000H y=31+1=32blocks(001F=31) 33H 0000H 34H 0001H z=256x256Bytes=64KByte/block(0100H=256) T9.0 25028 ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 13

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Table 10:Device Geometry Information for SST39VF3201/3202 Address Data Data 27H 0016H Devicesize=2NBytes(16H=22;222=4MByte) 28H 0001H FlashDeviceInterfacedescription;0001H=x16-onlyasynchronousinterface 29H 0000H 2AH 0000H Maximumnumberofbyteinmulti-bytewrite=2N(00H=notsupported) 2BH 0000H 2CH 0002H NumberofEraseSector/Blocksizessupportedbydevice 2DH 00FFH SectorInformation(y+1=Numberofsectors;zx256B=sectorsize) 2EH 0003H y=1023+1=1024(03FFH=1023) 2FH 0010H 30H 0000H z=16x256Bytes=4KBytes/sector(0010H=16) 31H 003FH BlockInformation(y+1=Numberofblocks;zx256B=blocksize) 32H 0000H y=63+1=64blocks(003FH=63) 33H 0000H 34H 0001H z=256x256Bytes=64KBytes/block(0100H=256) T10.225028 ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 14

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns AbsoluteMaximumStressRatings (Applied conditions greater than those listed under “Absolute MaximumStressRatings”maycausepermanentdamagetothedevice.Thisisastressratingonlyand functional operation of the device at these conditions or conditions greater than those defined in the operationalsectionsofthisdatasheetisnotimplied.Exposuretoabsolutemaximumstressratingcon- ditionsmayaffectdevicereliability.) TemperatureUnderBias ............................................. -55°Cto+125°C StorageTemperature ................................................ -65°Cto+150°C D.C.VoltageonAnyPintoGroundPotential ............................-0.5VtoV +0.5V DD TransientVoltage(<20ns)onAnyPintoGroundPotential ..................-2.0VtoV +2.0V DD VoltageonA PintoGroundPotential .....................................-0.5Vto13.2V 9 PackagePowerDissipationCapability(T =25°C) .................................. 1.0W A SurfaceMountSolderReflowTemperature1........................... 260°Cfor10seconds OutputShortCircuitCurrent2 .................................................. 50mA 1. Excludingcertainwith-Pb32-PLCCunits,allpackagesare260°Ccapableinbothnon-Pbandwith-Pbsolderversions. Certainwith-Pb32-PLCCpackagetypesarecapableof240°Cfor10seconds;pleaseconsultthefactoryforthelatest information. 2. Outputsshortedfornomorethanonesecond.Nomorethanoneoutputshortedatatime. Table 11:Operating Range Range AmbientTemp V DD Commercial 0°Cto+70°C 2.7-3.6V Industrial -40°Cto+85°C 2.7-3.6V T11.125028 Table 12:AC Conditions of Test1 InputRise/FallTime OutputLoad 5ns C =30pF L T12.125028 1. SeeFigures18and19 ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 15

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Table 13:DC Operating Characteristics V = 2.7-3.6V1 DD Limits Symbol Parameter Min Max Units TestConditions I PowerSupplyCurrent Addressinput=V /V 2,atf=5MHz, DD ILT IHT V =V Max DD DD Read3 18 mA CE#=V ,OE#=WE#=V ,allI/Osopen IL IH ProgramandErase 35 mA CE#=WE#=V ,OE#=V IL IH I StandbyV Current 20 µA CE#=V ,V =V Max SB DD IHC DD DD I AutoLowPower 20 µA CE#=V ,V =V Max ALP ILC DD DD Allinputs=V orV WE#=V SS DD, IHC I InputLeakageCurrent 1 µA V =GNDtoV ,V =V Max LI IN DD DD DD I InputLeakageCurrent 10 µA WP#=GNDtoV orRST#=GNDto LIW DD onWP#pinandRST# V DD I OutputLeakageCurrent 10 µA V =GNDtoV ,V =V Max LO OUT DD DD DD V InputLowVoltage 0.8 V V =V Min IL DD DD V InputLowVoltage(CMOS) 0.3 V V =V Max ILC DD DD V InputHighVoltage 0.7V V V =V Max IH DD DD DD V InputHighVoltage(CMOS) V -0.3 V V =V Max IHC DD DD DD V OutputLowVoltage 0.2 V I =100µA,V =V Min OL OL DD DD V OutputHighVoltage V -0.2 V I =-100µA,V =V Min OH DD OH DD DD T13.825028 1. TypicalconditionsfortheActiveCurrentshownonthefrontpageofthedatasheetareaveragevaluesat25°C (roomtemperature),andVDD=3V.Not100%tested. 2. SeeFigure18 3. TheIDDcurrentlistedistypicallylessthan2mA/MHz,withOE#atVIH.TypicalVDDis3V. Table 14:Recommended System Power-up Timings Symbol Parameter Minimum Units T 1 Power-uptoReadOperation 100 µs PU-READ T 1 Power-uptoProgram/EraseOperation 100 µs PU-WRITE T14.025028 1. Thisparameterismeasuredonlyforinitialqualificationandafteradesignorprocesschangethatcouldaffectthisparameter. Table 15:Capacitance (TA=25°C,f=1MHz,otherpinsopen) Parameter Description TestCondition Maximum C 1 I/OPinCapacitance V =0V 12pF I/O I/O C 1 InputCapacitance V =0V 6pF IN IN T15.025028 1. Thisparameterismeasuredonlyforinitialqualificationandafteradesignorprocesschangethatcouldaffectthisparameter. Table 16:Reliability Characteristics Symbol Parameter MinimumSpecification Units TestMethod N 1,2 Endurance 10,000 Cycles JEDECStandardA117 END T 1 DataRetention 100 Years JEDECStandardA103 DR I 1 LatchUp 100+I mA JEDECStandard78 LTH DD T16.225028 1. Thisparameterismeasuredonlyforinitialqualificationandafteradesignorprocesschangethatcouldaffectthisparameter. 2. NENDenduranceratingisqualifiedasa10,000cycleminimumforthewholedevice.Asector-orblock-levelratingwould resultinahigherminimumspecification. ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 16

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns AC Characteristics Table 17:Read Cycle Timing Parameters V = 2.7-3.6V DD Symbol Parameter Min Max Units T ReadCycleTime 70 ns RC T ChipEnableAccessTime 70 ns CE T AddressAccessTime 70 ns AA T OutputEnableAccessTime 35 ns OE T 1 CE#LowtoActiveOutput 0 ns CLZ T 1 OE#LowtoActiveOutput 0 ns OLZ T 1 CE#HightoHigh-ZOutput 20 ns CHZ T 1 OE#HightoHigh-ZOutput 20 ns OHZ T 1 OutputHoldfromAddressChange 0 ns OH T 1 RST#PulseWidth 500 ns RP T 1 RST#HighbeforeRead 50 ns RHR T 1,2 RST#PinLowtoReadMode 20 µs RY T17.325028 1. Thisparameterismeasuredonlyforinitialqualificationandafteradesignorprocesschangethatcouldaffectthis parameter. 2. ThisparameterappliestoSector-Erase,Block-EraseandProgramoperations. ThisparameterdoesnotapplytoChip-Eraseoperations. Table 18:Program/Erase Cycle Timing Parameters Symbol Parameter Min Max Units T Word-ProgramTime 10 µs BP T AddressSetupTime 0 ns AS T AddressHoldTime 30 ns AH T WE#andCE#SetupTime 0 ns CS T WE#andCE#HoldTime 0 ns CH T OE#HighSetupTime 0 ns OES T OE#HighHoldTime 10 ns OEH T CE#PulseWidth 40 ns CP T WE#PulseWidth 40 ns WP T 1 WE#PulseWidthHigh 30 ns WPH T 1 CE#PulseWidthHigh 30 ns CPH T DataSetupTime 30 ns DS T 1 DataHoldTime 0 ns DH T 1 SoftwareIDAccessandExitTime 150 ns IDA T Sector-Erase 25 ms SE T Block-Erase 25 ms BE T Chip-Erase 50 ms SCE T18.125028 1. Thisparameterismeasuredonlyforinitialqualificationandafteradesignorprocesschangethatcouldaffectthis parameter. ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 17

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns TRC TAA ADDRESSAMS-0 TCE CE# TOE OE# VIH TOLZ TOHZ WE# TCHZ TCLZ TOH HIGH-Z HIGH-Z DQ15-0 DATAVALID DATAVALID Note: AMS=Mostsignificantaddress AMS=A19forSST39VF1601/1602andA20forSST39VF3201/3202 1223F03.3 Figure 4: Read Cycle Timing Diagram INTERNALPROGRAMOPERATIONSTARTS TBP ADDRESSAMS-0 5555 2AAA 5555 ADDR TAH TDH TWP WE# TAS TWPH TDS OE# TCH CE# TCS DQ15-0 XXAA XX55 XXA0 DATA SW0 SW1 SW2 WORD (ADDR/DATA) Note: AMS=Mostsignificantaddress AMS=A19forSST39VF1601/1602andA20forSST39VF3201/3202 WP#mustbeheldinproperlogicstate(VILorVIH)1µspriortoand1µsafterthecommandsequence XcanbeVILorVIH,butnoothervalue 1223F04.4 Figure 5: WE# Controlled Program Cycle Timing Diagram ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 18

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns INTERNALPROGRAMOPERATIONSTARTS TBP ADDRESSAMS-0 5555 2AAA 5555 ADDR TAH TDH TCP CE# TAS TCPH TDS OE# TCH WE# TCS DQ15-0 XXAA XX55 XXA0 DATA SW0 SW1 SW2 WORD (ADDR/DATA) Note: AMS=Mostsignificantaddress AMS=A19forSST39VF1601/1602andA20forSST39VF3201/3202 WP#mustbeheldinproperlogicstate(VILorVIH)1µspriortoand1µsafterthecommandsequence XcanbeVILorVIH,butnoothervalue 1223F05.4 Figure 6: CE# Controlled Program Cycle Timing Diagram ADDRESSAMS-0 TCE CE# TOEH TOES OE# TOE WE# DQ7 DATA DATA# DATA# DATA Note: AMS=Mostsignificantaddress AMS=A19forSST39VF1601/1602andA20forSST39VF3201/3202 1223F06.3 Figure 7: Data# Polling Timing Diagram ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 19

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns ADDRESSAMS-0 TCE CE# TOEH TOE TOES OE# WE# DQ6andDQ2 TWOREADCYCLES WITHSAMEOUTPUTS Note: AMS=Mostsignificantaddress AMS= A19forSST39VF1601/1602andA20forSST39VF3201/3202 1223F07.4 Figure 8: Toggle Bits Timing Diagram SIX-BYTECODEFORCHIP-ERASE TSCE ADDRESSAMS-0 5555 2AAA 5555 5555 2AAA 5555 CE# OE# TWP WE# DQ15-0 XXAA XX55 XX80 XXAA XX55 XX10 SW0 SW1 SW2 SW3 SW4 SW5 Note: ThisdevicealsosupportsCE#controlledChip-Eraseoperation.TheWE#andCE#signalsare interchageableaslongasminimumtimingsaremet.(SeeTable17) AMS=Mostsignificantaddress AMS=A19forSST39VF1601/1602andA20forSST39VF3201/3202 WP#mustbeheldinproperlogicstate(VIH)1µspriortoand1µsafterthecommandsequence XcanbeVILorVIH,butnoothervalue 1223F08.5 Figure 9: WE# Controlled Chip-Erase Timing Diagram ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 20

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns SIX-BYTECODEFORBLOCK-ERASE TBE ADDRESSAMS-0 5555 2AAA 5555 5555 2AAA BAX CE# OE# TWP WE# DQ15-0 XXAA XX55 XX80 XXAA XX55 XX50 SW0 SW1 SW2 SW3 SW4 SW5 Note: ThisdevicealsosupportsCE#controlledBlock-Eraseoperation.TheWE#andCE#signalsare interchageableaslongasminimumtimingsaremet.(SeeTable17) BAX=BlockAddress AMS=Mostsignificantaddress AMS=A19forSST39VF1601/1602andA20forSST39VF3201/3202 WP#mustbeheldinproperlogicstate(VILorVIH)1µspriortoand1µsafterthecommandsequence XcanbeVILorVIH,butnoothervalue 1223F09.5 Figure 10:WE# Controlled Block-Erase Timing Diagram SIX-BYTECODEFORSECTOR-ERASE TSE ADDRESSAMS-0 5555 2AAA 5555 5555 2AAA SAX CE# OE# TWP WE# DQ15-0 XXAA XX55 XX80 XXAA XX55 XX30 SW0 SW1 SW2 SW3 SW4 SW5 Note: ThisdevicealsosupportsCE#controlledSector-Eraseoperation.TheWE#andCE#signalsare interchageableaslongasminimumtimingsaremet.(SeeTable17) SAX=SectorAddress AMS=Mostsignificantaddress AMS=A19forSST39VF1601/1602andA20forSST39VF3201/3202 WP#mustbeheldinproperlogicstate(VILorVIH)1µspriortoand1µsafterthecommandsequence XcanbeVILorVIH,butnoothervalue 1223F10.5 Figure 11:WE# Controlled Sector-Erase Timing Diagram ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 21

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Three-ByteSequenceforSoftwareIDEntry ADDRESSA14-0 5555 2AAA 5555 0000 0001 CE# OE# TWP TIDA WE# TWPH TAA DQ15-0 XXAA XX55 XX90 00BF DeviceID SW0 SW1 SW2 Note: DeviceID= 234BHfor39VF1601,234AHfor39VF1602,235BHfor39VF3201,and235AHfor39VF3202, WP#mustbeheldinproperlogicstate(VILorVIH)1µspriortoand1µsafterthecommandsequence XcanbeVILorVIH,butnoothervalue 1 Figure 12:Software ID Entry and Read Three-ByteSequenceforCFIQueryEntry ADDRESSA14-0 5555 2AAA 5555 CE# OE# TWP TIDA WE# TWPH TAA DQ15-0 XXAA XX55 XX98 SW0 SW1 SW2 Note: WP#mustbeheldinproperlogicstate(VILorVIH)1µspriortoand1µsafterthecommandsequence XcanbeVILorVIH,butnoothervalue 1223F12.1 Figure 13:CFI Query Entry and Read ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 22

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns THREE-BYTESEQUENCEFOR SOFTWAREIDEXITANDRESET ADDRESSA14-0 5555 2AAA 5555 DQ15-0 XXAA XX55 XXF0 TIDA CE# OE# TWP WE# TWHP SW0 SW1 SW2 Note: WP#mustbeheldinproperlogicstate(VILorVIH)1µspriortoand1µsafterthecommandsequence XcanbeVILorVIH,butnoothervalue 1223F13.0 Figure 14:Software ID Exit/CFI Exit THREE-BYTESEQUENCEFOR CFIQUERYENTRY ADDRESSAMS-0 5555 2AAA 5555 CE# OE# TWP TIDA WE# TWPH TAA DQ15-0 XXAA XX55 XX88 SW0 SW1 SW2 Note: AMS=Mostsignificantaddress AMS=A19forSST39VF1601/1602andA20forSST39VF3201/3202 WP#mustbeheldinproperlogicstate(VILorVIH)1µspriortoand1µsafterthecommandsequence XcanbeVILorVIH,butnoothervalue. 1223F20.2 Figure 15:Sec ID Entry ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 23

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns TRP RST# CE#/OE# TRHR 1223F22.1 Figure 16:RST# Timing Diagram (When no internal operation is in progress) TRP RST# TRY CE#/OE# End-of-WriteDetection (Toggle-Bit) 1223F23.0 Figure 17:RST# Timing Diagram (During Program or Erase operation) VIHT INPUT VIT REFERENCEPOINTS VOT OUTPUT VILT 1223F14.0 AC test inputs are driven at V (0.9 V ) for a logic “1” and V (0.1 V ) for a IHT DD ILT DD logic “0”. Measurement reference points for inputs and outputs are V (0.5 V ) and V (0.5 IT DD OT V ).Inputriseandfalltimes(10%90%)are<5ns. DD Note: VIT-VINPUTTest VOT-VOUTPUTTest VIHT-VINPUTHIGHTest VILT-VINPUTLOWTest Figure 18:AC Input/Output Reference Waveforms TOTESTER TODUT C L 1223F15.0 Figure 19:A Test Load Example ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 24

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Start Loaddata:XXAAH Address:5555H Loaddata:XX55H Address:2AAAH Loaddata:XXA0H Address:5555H LoadWord Address/Word Data Waitforendof Program(TBP, Data#Polling bit,orTogglebit operation) Program Completed 1223F16.0 XcanbeVILorVIH,butnoothervalue Figure 20:Word-Program Algorithm ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 25

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns InternalTimer ToggleBit Data# Polling Program/Erase Program/Erase Program/Erase Initiated Initiated Initiated WaitTBP, Readword ReadDQ7 TSCE,TSE orTBE Readsame No IsDQ7= word truedata Program/Erase Completed Yes No DoesDQ6 Program/Erase match Completed Yes Program/Erase Completed 1223F17.0 Figure 21:Wait Options ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 26

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns CFIQueryEntry SecIDQueryEntry SoftwareProductIDEntry CommandSequence CommandSequence CommandSequence Loaddata:XXAAH Loaddata:XXAAH Loaddata:XXAAH Address:5555H Address:5555H Address:5555H Loaddata:XX55H Loaddata:XX55H Loaddata:XX55H Address:2AAAH Address:2AAAH Address:2AAAH Loaddata:XX98H Loaddata:XX88H Loaddata:XX90H Address:5555H Address:5555H Address:5555H WaitTIDA WaitTIDA WaitTIDA ReadCFIdata ReadSecID ReadSoftwareID XcanbeVILorVIH,butnoothervalue 1223F21.0 Figure 22:Software ID/CFI Entry Command Flowcharts ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 27

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns SoftwareIDExit/CFIExit/SecIDExit CommandSequence Loaddata:XXAAH Loaddata:XXF0H Address:5555H Address:XXH Loaddata:XX55H WaitTIDA Address:2AAAH Loaddata:XXF0H Returntonormal Address:5555H operation WaitTIDA Returntonormal operation XcanbeVILorVIH,butnoothervalue 1223F18.1 Figure 23:Software ID/CFI Exit Command Flowcharts ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 28

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Chip-Erase Sector-Erase Block-Erase CommandSequence CommandSequence CommandSequence Loaddata:XXAAH Loaddata:XXAAH Loaddata:XXAAH Address:5555H Address:5555H Address:5555H Loaddata:XX55H Loaddata:XX55H Loaddata:XX55H Address:2AAAH Address:2AAAH Address:2AAAH Loaddata:XX80H Loaddata:XX80H Loaddata:XX80H Address:5555H Address:5555H Address:5555H Loaddata:XXAAH Loaddata:XXAAH Loaddata:XXAAH Address:5555H Address:5555H Address:5555H Loaddata:XX55H Loaddata:XX55H Loaddata:XX55H Address:2AAAH Address:2AAAH Address:2AAAH Loaddata:XX10H Loaddata:XX30H Loaddata:XX50H Address:5555H Address:SAX Address:BAX WaitTSCE WaitTSE WaitTBE Chiperased Sectorerased Blockerased toFFFFH toFFFFH toFFFFH XcanbeVILorVIH,butnoothervalue 1223F19.0 Figure 24:Erase Command Sequence ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 29

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Product Ordering Information SST 39 VF 1601 - 70 - 4C - EKE XX XX XXXX - XX - XX - XXX EnvironmentalAttribute E1=non-Pb PackageModifier K=48ballsorleads PackageType E=TSOP(type1,dieup,12mmx20mm) B3=TFBGA(6mmx8mm,0.8mmpitch) TemperatureRange C=Commercial=0°Cto+70°C I=Industrial=-40°Cto+85°C MinimumEndurance 4=10,000cycles ReadAccessSpeed 70=70ns HardwareBlockProtection 1=BottomBoot-Block 2=TopBoot-Block DeviceDensity 160=16Mbit 320=32Mbit Voltage V=2.7-3.6V ProductSeries 39=Multi-PurposeFlash 1. Environmentalsuffix“E”denotesnon-Pbsolder. SSTnon-Pbsolderdevicesare“RoHSCompliant”. ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 30

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Valid Combinations for SST39VF1601 SST39VF1601-70-4C-EKE SST39VF1601-70-4C-B3KE SST39VF1601-90-4C-EKE SST39VF1601-90-4C-B3KE SST39VF1601-70-4I-EKE SST39VF1601-70-4I-B3KE SST39VF1601-90-4I-EKE SST39VF1601-90-4I-B3KE Valid Combinations for SST39VF1602 SST39VF1602-70-4C-EKE SST39VF1602-70-4C-B3KE SST39VF1602-90-4C-EKE SST39VF1602-90-4C-B3KE SST39VF1602-70-4I-EKE SST39VF1602-70-4I-B3KE SST39VF1602-90-4I-EKE SST39VF1602-90-4I-B3KE Valid Combinations for SST39VF3201 SST39VF3201-70-4C-EKE SST39VF3201-70-4C-B3KE SST39VF3201-90-4C-EKE SST39VF3201-90-4C-B3KE SST39VF3201-70-4I-EKE SST39VF3201-70-4I-B3KE SST39VF3201-90-4I-EKE SST39VF3201-90-4I-B3KE Valid Combinations for SST39VF3202 SST39VF3202-70-4C-EKE SST39VF3202-70-4C-B3KE SST39VF3202-90-4C-EKE SST39VF3202-90-4C-B3KE SST39VF3202-70-4I-EKE SST39VF3202-70-4I-B3KE SST39VF3202-90-4I-EKE SST39VF3202-90-4I-B3KE Note:Validcombinationsarethoseproductsinmassproductionorwillbeinmassproduction.ConsultyourSST salesrepresentativetoconfirmavailabilityofvalidcombinationsandtodetermineavailabilityofnewcombi- nations. ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 31

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Packaging Diagrams 1.05 0.95 Pin#1Identifier 0.50 BSC 0.27 12.20 0.17 11.80 0.15 18.50 0.05 18.30 DETAIL 1.20 max. 0.70 0.50 20.20 0°-5° 19.80 0.70 Note: 1. ComplieswithJEDECpublication95MO-142DDdimensions, 0.50 althoughsomedimensionsmaybemorestringent. 2. Alllineardimensionsareinmillimeters(max/min). 1mm 3. Coplanarity:0.1mm 4. Maximumallowablemoldflashis0.15mmatthepackageends,and0.25mmbetweenleads. 48-tsop-EK-8 Figure 25:48-lead Thin Small Outline Package (TSOP) 12mm x 20mm SST Package Code: EK ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 32

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns TOPVIEW BOTTOMVIEW 8.00 0.10 5.60 0.80 0.45 0.05 (48X) 6 6 5 5 4 4.00 4 6.00 0.10 3 3 2 2 1 1 0.80 A B C D E F G H H G F E D C B A A1CORNER A1CORNER SIDEVIEW 1.10 0.10 0.12 SEATINGPLANE 1mm 0.35 0.05 Note: 1.ComplieswithJEDECPublication95,MO-210,variant AB-1,althoughsomedimensionsmaybemorestringent. 2.Alllineardimensionsareinmillimeters. 3.Coplanarity:0.12mm 4.Ballopeningsizeis0.38mm( 0.05mm) 48-tfbga-B3K-6x8-450mic-5 Figure 26:48-ball Thin-profile, Fine-pitch Ball Grid Array (TFBGA) 6mm x 8mm SST Package Code: B3K ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 33

16 Mbit / 32 Mbit Multi-Purpose Flash Plus SST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 A Microchip Technology Company NotRecommendedforNewDesigns Table 19:Revision History Number Description Date 00 (cid:129) Initialrelease Mar2003 01 (cid:129) CorrectedPin15fromA20toNCforSST39VF160xinFigure2on Apr2003 page4 02 (cid:129) Changeddatasheettitle Jun2003 03 (cid:129) 2004DataBook Nov2003 (cid:129) UpdatedtheB3KandB1Kpackagediagrams (cid:129) Addednon-PbMPNsandremovedfootnote.(Seepage31) 04 (cid:129) AddedRoHScomplianceinformationonpage1andinthe“Product Nov2005 OrderingInformation”onpage30 (cid:129) Correctedthesoldertemperatureprofilein“AbsoluteMaximumStress Ratings”onpage15 (cid:129) Changedproductstatusfrom“PreliminarySpecifications”to“Data Sheet” 05 (cid:129) Removed90nsReadAccessTimeglobally June2008 (cid:129) EOLedalllead(Pb)validcombinations.SeeS71223(02) (cid:129) EOLedSST39VF6401andSST39VF6402.SeeS71223(03) A (cid:129) Changeddocumentstatusto“NotRecommendedforNewDesigns” Aug2011 (cid:129) Appliednewdocumentformat (cid:129) Releaseddocumentunderletterrevisionsystem (cid:129) UpdatedSpecnumberfromS71223toDS25028 ISBN:978-1-61341-355-5 ©2011SiliconStorageTechnology,Inc–aMicrochipTechnologyCompany.Allrightsreserved. SST,SiliconStorageTechnology,theSSTlogo,SuperFlash,MTP,andFlashFlexareregisteredtrademarksofSiliconStorageTech- nology,Inc.MPF,SQI,SerialQuadI/O,andZ-ScalearetrademarksofSiliconStorageTechnology,Inc.Allothertrademarksand registeredtrademarksmentionedhereinarethepropertyoftheirrespectiveowners. Specificationsaresubjecttochangewithoutnotice.Refertowww.microchip.comforthemostrecentdocumentation.Forthemostcurrent packagedrawings,pleaseseethePackagingSpecificationlocatedathttp://www.microchip.com/packaging. Memorysizesdenoterawstoragecapacity;actualusablecapacitymaybeless. SSTmakesnowarrantyfortheuseofitsproductsotherthanthoseexpresslycontainedintheStandardTermsandConditionsof Sale. Forsalesofficelocationsandinformation,pleaseseewww.microchip.com. SiliconStorageTechnology,Inc. AMicrochipTechnologyCompany www.microchip.com ©2011SiliconStorageTechnology,Inc. DS25028A 08/11 34

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: M icrochip: SST39VF3202-70-4C-B3KE SST39VF3201-70-4C-B3KE SST39VF1602-70-4C-EKE SST39VF3202-70-4C-EKE SST39VF1602-70-4I-EKE SST39VF1602-70-4C-B3KE SST39VF1601-70-4C-B3KE SST39VF1601-70-4C-EKE SST39VF3201-70-4C-EKE SST39VF1601-70-4I-B3KE SST39VF1601-70-4I-EKE SST39VF3201-70-4I-EKE SST39VF3202-70-4I-EKE SST39VF1601-70-4A-B3KE SST39VF1601-70-4A-EKE SST39VF1602-70-4A-B3KE SST39VF1602-70-4A-EKE SST39VF1601-70-4C-B3KE-T SST39VF1601-70-4C-EKE-T SST39VF1602-70-4I-B3KE SST39VF1602-70-4I-B3KE-T SST39VF3201-70-4C-B3KE-T SST39VF3202-70-4I-B3KE-T SST39VF1601-70-4I-B3KE- T SST39VF1601-70-4I-EKE-T SST39VF1602-70-4C-EKE-T SST39VF1602-70-4I-EKE-T SST39VF3201-70-4C-EKE-T SST39VF3201-70-4I-B3KE SST39VF3201-70-4I-B3KE-T SST39VF3201-70-4I-EKE-T SST39VF3202-70-4C-B3KE-T SST39VF3202-70-4I-B3KE SST39VF1601-70-4C-B3K SST39VF1601-70-4C-EK SST39VF1602-70-4C-B3K SST39VF1602-70-4C-EK SST39VF1602-70-4I-EK SST39VF3201-70-4C-B3K SST39VF3201-70-4C-EK SST39VF3202-70-4C-B3K SST39VF3202-70-4C-EK SST39VF1602-70-4C-B3KE-T