SRV05-4A RailClamp®®®®® Low Capacitance TVS Diode Array ®®®®® PROTECTION PRODUCTS - RailClamp Description Features RailClamp® low capacitance TVS array is designed to (cid:139) Protection for high-speed data lines to protect high speed data interfaces. This series has IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact) been specifically designed to protect sensitive compo- IEC 61000-4-4 (EFT) 40A (5/50ns) nents which are connected to data and transmission IEC 61000-4-5 (Lightning) 12A (8/20μs) lines from overvoltage caused by electrostatic dis- (cid:139) Array of surge rated diodes with internal TVS Diode charge (ESD), electrical fast transients (EFT), and (cid:139) Small package saves board space lightning. (cid:139) Protects four I/O lines The unique design incorporates eight surge rated, low (cid:139) Low capacitance: 3pF typical capacitance steering diodes and a TVS diode in a (cid:139) Low clamping voltage single package. During transient conditions, the (cid:139) Low operating voltage: 5.0V steering diodes direct the transient to either the (cid:139) Solid-state silicon-avalanche technology positive side of the power supply line or to ground. The Mechanical Characteristics internal TVS diode prevents over-voltage on the power line, protecting any downstream components. (cid:139) JEDEC SOT-23 6L package The SRV05-4A is in a 6-lead SOT-23 package. The (cid:139) Pb-Free, Halogen Free, RoHS/WEEE Compliant leads are finished with lead-free matte tin. Each (cid:139) Molding compound flammability rating: UL 94V-0 device will protect up to four high-speed lines. They (cid:139) Marking: V05 + Date Code may be used to meet the ESD immunity requirements (cid:139) Packaging: Tape and Reel of IEC 61000-4-2. The combination of small size, low Applications capacitance, and high surge capability makes them ideal for use in applications such as 10/100 Ethernet, (cid:139) USB 2.0 Power and Data Line Protection USB 2.0, and video interfaces. (cid:139) Video Graphics Cards (cid:139) Monitors and Flat Panel Displays (cid:139) Digital Visual Interface (DVI) (cid:139) 10/100 Ethernet (cid:139) Notebook Computers (cid:139) SIM Ports (cid:139) IEEE 1394 Firewire Ports Circuit Diagram Schematic and PIN Configuration 5 1 3 4 6 2 SOT-23 6L (Top View) Revision 04/19/2010 1 www.semtech.com

SRV05-4A PROTECTION PRODUCTS Absolute Maximum Rating Rating Symbol Value Units PeakPulsePower(tp =8/20μs) P 300 Watts pk PeakPulseCurrent (tp =8/20μs) I 12 A PP ESDperIEC61000-4-2(Air) V 15 kV ESD ESDperIEC61000-4-2(Contact) 8 Lead Soldering Temperature T 260(10sec.) °C L Operating Temperature T -55to+125 °C J StorageTemperature T -55to+150 °C STG Electrical Characteristics (T=25oC) Parameter Symbol Conditions Minimum Typical Maximum Units ReverseStand-Off Voltage V Pin 5to2 5 V RWM ReverseBreakdown Voltage V I =1mA 6 V BR t Pin 5to2 ReverseLeakageCurrent I V =5V,T=25°C 5 μA R RWM Pin 5to2 Forward Voltage V I =15mA 1.2 V F f Clamping Voltage V I =1A,tp =8/20μs 12.5 V C PP Any I/Opin toGround Clamping Voltage V I =5A,tp =8/20μs 17.5 V C PP Any I/Opin toGround Junction Capacitance C V =0V,f =1MHz 3 5 pF j R Any I/Opin toGround V =0V,f =1MHz 1.5 pF R Between I/Opins © 2010 Semtech Corp. 2 www.semtech.com

SRV05-4A PROTECTION PRODUCTS Typical Characteristics Non-Repetitive Peak Pulse Power vs. Pulse Time Power Derating Curve 10 110 W) 100 ower - P (kPk 1 Power or IPP 67890000 e P ed 50 uls 0.1 Rat 40 ak P % of 30 Pe 20 10 0.01 0 0 25 50 75 100 125 150 0.1 1 10 100 1000 Pulse Duration - tp (µs) Ambient Temperature - TA (oC) Pulse Waveform Clamping Voltage vs. Peak Pulse Current 110 100 Waveform 30.00 Parameters: 90 tr = 8µs V) 25.00 80 td = 20µs (C V of IPP 6700 e-t age - 20.00 ent 50 Volt 15.00 Perc 3400 td = IPP/2 mping 10.00 Waveform a 20 Cl Parameters: 5.00 tr = 8µs 10 td = 20µs 0 0.00 0 5 10 15 20 25 30 0.00 2.00 4.00 6.00 8.00 10.00 12.00 Time (µs) Peak Pulse Current - I (A) PP Forward Voltage vs. Forward Current Normalized Capacitance vs. Reverse Voltage 1.4 7.00 1.2 6.00 V) V (F 5.00 =0) 1 d Voltage - 34..0000 V) / C(VRJR 00..68 orwar 2.00 Waveform C(J 0.4 F Parameters: tr = 8µs 0.2 1.00 td = 20µs f = 1 MHz 0 0.00 0 1 2 3 4 5 0.00 2.00 4.00 6.00 8.00 10.00 12.00 Reverse Voltage - VR (V) Forward Current - I (A) F © 2010 Semtech Corp. 3 www.semtech.com

SRV05-4A PROTECTION PRODUCTS Applications Information Insertion Loss S21 Analog Cross Talk CH1 S21 LOG 3 dB/ REF 0 dB CH1 S21 LOG 20 dB/ REF 0 dB START .030 000MHz STOP3000.000000MHz START .030 000MHz STOP3000.000000MHz © 2010 Semtech Corp. 4 www.semtech.com

SRV05-4A PROTECTION PRODUCTS Applications Information Data Line and Power Supply Protection Using Vcc as Device Connection Options for Protection of Four reference High-Speed Data Lines The SRV05-4A is designed to protect four data lines from transient over-voltages by clamping them to a fixed reference. When the voltage on the protected line exceeds the reference voltage (plus diode V) the F steering diodes are forward biased, conducting the transient current away from the sensitive circuitry. Data lines are connected at pins 1, 3, 4 and 6. The negative reference (REF1) is connected at pin 2. This pin should be connected directly to a ground plane on the board for best results. The path length is kept as short as possible to minimize parasitic inductance. The positive reference (REF2) is connected at pin 5. The options for connecting the positive reference are as follows: Data Line Protection with Bias and Power Supply Isolation Resistor 1. To protect data lines and the power line, connect pin 5 directly to the positive supply rail (V ). In this CC configuration the data lines are referenced to the supply voltage. The internal TVS diode prevents over-voltage on the supply rail. 2. The SRV05-4A can be isolated from the power supply by adding a series resistor between pin 5 and V . A value of 100kΩ is recommended. The CC internal TVS and steering diodes remain biased, providing the advantage of lower capacitance. 3. In applications where no positive supply reference is available, or complete supply isolation is desired, the internal TVS may be used as the reference. In this case, pin 5 is not connected. The steering diodes will begin to conduct when the voltage on the protected line exceeds the working voltage of Data Line Protection Using Internal TVS Diode as the TVS (plus one diode drop). Reference ESD Protection With RailClamps®®®®® RailClamps are optimized for ESD protection using the rail-to-rail topology. Along with good board layout, these devices virtually eliminate the disadvantages of using discrete components to implement this topology. Consider the situation shown in Figure 1 where dis- crete diodes or diode arrays are configured for rail-to- rail protection on a high speed line. During positive duration ESD events, the top diode will be forward biased when the voltage on the protected line exceeds © 2010 Semtech Corp. 5 www.semtech.com

SRV05-4A PROTECTION PRODUCTS Applications Information (continued) the reference voltage plus the V drop of the diode. F For negative events, the bottom diode will be biased when the voltage exceeds the V of the diode. At first F approximation, the clamping voltage due to the charac- teristics of the protection diodes is given by: PIN Descriptions V = V + V (for positive duration pulses) C CC F V = -V (for negative duration pulses) C F However, for fast rise time transient events, the effects of parasitic inductance must also be consid- ered as shown in Figure 2. Therefore, the actual clamping voltage seen by the protected circuit will be: FFFFFiiiiiggggguuuuurrrrreeeee 11111 ----- “““““RRRRRaaaaaiiiiilllll-----TTTTTooooo-----RRRRRaaaaaiiiiilllll””””” PPPPPrrrrrooooottttteeeeeccccctttttiiiiiooooonnnnn TTTTTooooopppppooooolllllooooogggggyyyyy V = V + V + L di /dt (for positive duration pulses) (((((FFFFFiiiiirrrrrsssssttttt AAAAApppppppppprrrrroooooxxxxxiiiiimmmmmaaaaatttttiiiiiooooonnnnn))))) C CC F P ESD V = -V - L di /dt (for negative duration pulses) C F G ESD ESD current reaches a peak amplitude of 30A in 1ns for a level 4 ESD contact discharge per IEC 61000-4-2. Therefore, the voltage overshoot due to 1nH of series inductance is: V = L di /dt = 1X10-9 (30 / 1X10-9) = 30V P ESD Example: Consider a V = 5V, a typical V of 30V (at 30A) for the CC F steering diode and a series trace inductance of 10nH. The clamping voltage seen by the protected IC for a positive 8kV (30A) ESD pulse will be: FFFFFiiiiiggggguuuuurrrrreeeee 22222 ----- TTTTThhhhheeeee EEEEEffffffffffeeeeeccccctttttsssss ooooofffff PPPPPaaaaarrrrraaaaasssssiiiiitttttiiiiiccccc IIIIInnnnnddddduuuuuccccctttttaaaaannnnnccccceeeee WWWWWhhhhheeeeennnnn UUUUUsssssiiiiinnnnnggggg DDDDDiiiiissssscccccrrrrreeeeettttteeeee CCCCCooooommmmmpppppooooonnnnneeeeennnnntttttsssss tttttooooo IIIIImmmmmpppppllllleeeeemmmmmeeeeennnnnttttt V = 5V + 30V + (10nH X 30V/nH) = 335V C RRRRRaaaaaiiiiilllll-----TTTTTooooo-----RRRRRaaaaaiiiiilllll PPPPPrrrrrooooottttteeeeeccccctttttiiiiiooooonnnnn This does not take into account that the ESD current is directed into the supply rail, potentially damaging any components that are attached to that rail. Also note that it is not uncommon for the V of discrete diodes to F exceed the damage threshold of the protected IC. This is due to the relatively small junction area of typical discrete components. It is also possible that the power dissipation capability of the discrete diode will be exceeded, thus destroying the device. The RailClamp is designed to overcome the inherent disadvantages of using discrete signal diodes for ESD suppression. The RailClamp’s integrated TVS diode FFFFFiiiiiggggguuuuurrrrreeeee 33333 ----- RRRRRaaaaaiiiiilllll-----TTTTTooooo-----RRRRRaaaaaiiiiilllll PPPPPrrrrrooooottttteeeeeccccctttttiiiiiooooonnnnn UUUUUsssssiiiiinnnnnggggg RRRRRaaaaaiiiiilllllCCCCClllllaaaaammmmmppppp TTTTTVVVVVSSSSS AAAAArrrrrrrrrraaaaayyyyysssss © 2010 Semtech Corp. 6 www.semtech.com

SRV05-4A PROTECTION PRODUCTS Applications Information (continued) helps to mitigate the effects of parasitic inductance in the power supply connection. During an ESD event, the current will be directed through the integrated TVS diode to ground. The maximum voltage seen by the protected IC due to this path will be the clamping voltage of the device. Video Interface Protection Video interfaces are susceptible to transient voltages resulting from electrostatic discharge (ESD) and “hot plugging” cables. If left unprotected, the video interface IC may be damaged or even destroyed. Protecting a high-speed video port presents some unique challenges. First, any added protection device must have extremely low capacitance and low leakage current so that the integrity of the video signal is not compromised. Second, the protection component must be able to absorb high voltage transients without Figure 4 - Video Interface Protection damage or degradation. As a minimum, the device should be rated to handle ESD voltages per IEC 61000-4-2, level 4 (±15kV air, ±8kV contact). The clamping voltage of the device (when conducting high current ESD pulses) must be sufficiently low enough to SRV05-4A protect the sensitive CMOS IC. If the clamping voltage is too high, the “protected” device may latch-up or be destroyed. Finally, the device must take up a relatively small amount of board space, particularly in portable applications such as notebooks and handhelds. The SRV05-4A is designed to meet or exceed all of the above criteria. A typical video interface protection circuit is shown in Figure 4. All exposed lines are protected including R, G, B, H-Sync, V-Sync , and the ID lines for plug and play monitors. Figure 5 - Dual USB Port Protection Universal Serial Bus ESD Protection The SRV05-4A may also be used to protect the USB ports on monitors, computers, peripherals or portable systems. Each device will protect up to two USB ports (Figure 5). When the voltage on the data lines exceed the bus voltage (plus one diode drop), the internal rectifiers are forward biased conducting the transient current away from the protected controller chip. The TVS diode directs the surge to ground. The TVS diode also acts to suppress ESD strikes directly on the voltage bus. Thus, both power and data pins are protected with a single device. SRV05-4A Figure 6 - SIM Port © 2010 Semtech Corp. 7 www.semtech.com

SRV05-4A PROTECTION PRODUCTS DVI Protection 10/100 ETHERNET PROTECTION The small geometry of a typical digital-visual interface Ethernet ICs are vulnerable to damage from electro- (DVI) graphic chip will make it more susceptible to static discharge (ESD). The internal protection in the electrostatic discharges (ESD) and cable discharge PHY chip, if any, often is not enough due to the high events (CDE). Transient protection of a DVI port can energy of the discharges specified by IEC 61000-4-2. be challenging. Digital-visual interfaces can often If the discharge is catastrophic, it will destroy the transmit and receive at a rate equal to or above protected IC. If it is less severe, it will cause latent 1Gbps. The high-speed data transmission requires the failures that are very difficult to find. protection device to have low capacitance to maintain signal integrity and low clamping voltage to reduce In a typical 10/100 system, the twisted-pair interface stress on the protected IC. The SRV05-4A has a low for each port consists of two differential signal pairs: typical insertion loss of <0.4dB at 1GHz (I/O to ground) one for the transmitter and one for the receiver, with to ensure signal integrity and can protect the DVI the transmitter input being the most sensitive to interface to the 8kV contact and 15kV air ESD per IEC damage. The fatal discharge occurs differentially 61000-4-2 and CDE. across the transmit or receive line pair and is capaci- tively coupled through the transformer to the Ethernet Figure 7 shows how to design the SRV05-4A into the chip. Figure 8 shows how to design the SRV05-4A on DVI circuit on a flat panel display and a PC graphic the line side of a 10/100 ethernet port to provide card. The SRV05-4A is configured to provide common differential mode protection. The common mode mode and differential mode protection. The internal isolation of the transformer will provide common mode TVS of the SRV05-4A acts as a 5 volt reference. The protection to the rating of the transformer isolation power pin of the DVI circuit does not come out through which is usually >1.5kV. Figure 9 shows how to the connector and is not subjected to external ESD implement the SRV05-4A on the IC side of the 10/ pulse; therefore, pin 5 should be left unconnected. 100 Ethernet circuit. Connecting pin 5 to Vcc of the DVI circuit may result in damage to the chip from ESD current. Figure 7 - Digital Visual Interface (DVI) Protection © 2010 Semtech Corp. 8 www.semtech.com

SRV05-4A PROTECTION PRODUCTS SRV05-4A Figure 8 - 10/100 Ethernet Differential Protection SRV05-4A Figure 9 - 10/100 Ethernet Differential and Common Mode Protection © 2010 Semtech Corp. 9 www.semtech.com

SRV05-4A PROTECTION PRODUCTS OOuuttlliinnee DDrraawwiinngg --S SOOT-283 6L DIMENSIONS INCHES MILLIMETERS A DIM MIN NOMMAX MIN NOMMAX e1 D A .035 - .057 0.90 - 1.45 A1 .000 - .006 0.00 - 0.15 A2 .035 .045 .051 .90 1.15 1.30 N b .010 - .020 0.25 - 0.50 2X E/2 c .003 - .009 0.08 - 0.22 EI E D .110 .114 .122 2.80 2.90 3.10 E1 .060 .063 .069 1.50 1.60 1.75 1 2 E .110 BSC 2.80 BSC ccc C e .037 BSC 0.95 BSC 2X N/2 TIPS e1 .075 BSC 1.90 BSC e L .012 .018 .024 0.30 0.45 0.60 L1 (.024) (0.60) B N 6 6 01 0° - 10° 0° - 10° aaa .004 0.10 bbb .008 0.20 D ccc .008 0.20 aaa C A2 A SEATING PLANE H C A1 bxN GAGE c bbb C A-B D PLANE 0.25 L 01 (L1) DETAIL A SEE DETAIL A SIDE VIEW NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS - A - AND - B - TO BE DETERMINED AT DATUM PLANE-H- 3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. Land Pattern -SOT23 6L X DDIIMMEENNSSIIOONNSS DDIIMM IINNCCHHEESS MMIILLLLIIMMEETTEERRSS CC (.098) (2.50) GG .055 1.40 (C) G Z PP .037 0.95 Y XX .024 0.60 YY .043 1.10 ZZ .141 3.60 P NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. © 2010 Semtech Corp. 10 www.semtech.com

SRV05-4A PROTECTION PRODUCTS Marking Codes Ordering Information Qtyper Part Number Lead Finish ReelSize Reel V05 W SRV05-4ATCT MatteTin 3,000 7Inch Y YW = 2 - Alphanumeric characters for Date Code Tape and Reel Specification Pin 1 Location User Direction of feed A0 B0 K0 3.23+/-0.05mm 3.17+/-0.05mm 1.37+/-0.05mm Tape K B,(Max) D D1 E F P P0 P2 T(MAX) W Width (MAX) 8.0mm 1.0mm 1.750±.10 4.2mm 1.5+0.1mm 3.5±0.05 4.0±0.1 4.0±0.1 2.0±0.05 +0.3mm 8mm ±0.05 mm 2.4mm 0.4mm (.165) -0.0mm mm mm mm mm -0.1mm Contact Information Semtech Corporation Protection Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804 © 2010 Semtech Corp. 11 www.semtech.com