SP705 / SP706 / SP707 / SP708 / SP813L Low Power Microprocessor Supervisory Circuits January 2020 Rev. 2.1.1 GENERAL DESCRIPTION APPLICATIONS The SP705-708/813L series is a family of • Processors & DSPs Based Systems microprocessor (µP) supervisory circuits that • Industrial & Medical Instruments integrate myriad components involved in discrete solutions which monitor power-supply and battery in mP and digital systems. FEATURES The SP705-708/813L series will significantly • Precision Voltage Monitor improve system reliability and operational − SP705/SP707/SP813L: 4.65V efficiency when compared to solutions − SP706/SP708: 4.40V obtained with discrete components. The features of the SP705-708/813L series include • 200ms RESET Pulse Width a watchdog timer, a µP reset, a Power Fail • Independent Watchdog Timer Comparator, and a manual-reset input. − 1.6s Timeout (SP705/SP706/SP813L) The SP705-708/813L series is ideal for applications in automotive systems, • 60µA Maximum Supply Current computers, controllers, and intelligent • Debounced TTL/CMOS Manual Reset instruments. The SP705-708/813L series is an Input ideal solution for systems in which critical monitoring of the power supply to the µP and • RESET Asserted Down to VCC=1.1V related digital components is demanded. • Voltage Monitor for Power Failure or Low Battery Warning • 8-Pin PDIP, NSOIC and MSOP Packages • Pin Compatible with Industry Standards 705-708-813L Series • Functionally Compatible to Industry Standard 1232 Series 8-Pin NSOIC available; PDIP and MSOP versions obsolete Part Number RESET Threshold RESET Active Manual RESET Watchdog PFI Accuracy SP705 4.65V Low Yes Yes 4% SP706 4.40V Low Yes Yes 4% SP707 4.65V Low and High Yes No 4% SP708 4.40V Low and High Yes No 4% SP813L 4.65V High Yes Yes 4% 1/17 Rev. 2.1.1

SP705 / SP706 / SP707 / SP708 / SP813L Low Power Microprocessor Supervisory Circuits ABSOLUTE MAXIMUM RATINGS ESD Rating (HBM - Human Body Model) .................... 4kV Continuous Power Dissipation These are stress ratings only and functional operation of Plastic DIP (derate 9.09mW/°C above +70°C) ....727mW the device at these ratings or any other above those SO (derate 5.88mW/°C above +70°C)...............471mW indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum Mini SO (derate 4.10mW/°C above +70°C) ........330mW rating conditions for extended periods of time may affect Storage Temperature .............................. -65°C to 160°C reliability. Lead Temperature (Soldering, 10 sec) ....................300°C VCC .......................................................... -0.3V to 6.0V All Other Inputs (Note 1) ................... -0.3V to (VCC+0.3V) Input Current VCC ................................................................. 20mA GND ................................................................ 20mA Output Current (All outputs) ............................... 20mA ELECTRICAL SPECIFICATIONS Unless otherwise indicated, VCC = 4.75V to 5.5V (SP705-SP707-SP813L), VCC = 4.50V to 5.5V (SP706-SP708), TA= TMIN to TMAX, typical at 25°C. Parameter Min. Typ. Max. Units Conditions Operating Voltage Range VCC 1.1 5.5 V Supply Current ISUPPLY 40 60 µA MR=VCC or floating, WDI floating 4.50 4.65 4.75 SP705, SP707, SP813L Reset Threshold V 4.25 4.40 4.50 SP706, SP708 (Note 2) Reset Threshold Hysteresis 40 mV Note 2 Reset Pulse Width tRS 140 200 280 ms Note 2 VCC-1.5 ISOURCE=800µA, Note 2 0.8 ISOURCE=4µA, VCC=1.1V, Note 2 RESET Output Voltage V 0.4 ISINK=3.2mA, Note 2 0.3 ISINK=100µA, VCC=1.2V, Note 2 Watchdog Timeout Period tWD 1.00 1.60 2.25 s SP705, SP707, SP813L WDI Pulse Width tWP 100 ns VIL=0.4V, VIH=0.8xVCC WDI Input Threshold Low 0.8 V SP705, SP707, SP813L WDI Input Threshold High 3.5 V VCC=5V 30 75 µA SP705, SP707, SP813L, WDI=VCC WDI Input Current -75 -20 µA SP705, SP707, SP813L, WDI=0V WDO Output Voltage VCC-1.5 V ISOURCE=800µA 0.4 ISINK=3.2mA MR Pull-up Current 100 250 600 µA MR = 0V MR Pulse Width tMR 150 ns MR Input Threshold Low 0.8 V MR Input Threshold High 2.0 MR to Reset Out Delay tMD 250 ns Note 2 PFI Input Threshold 1.20 1.25 1.30 V VCC=5V PFI Input Current -25.00 0.01 25.00 nA PFO Output Voltage VCC-1.5 V ISOURCE=800µA 0.4 ISINK=3.2mA Note 1: The input voltage limits on PFI and MR can be exceeded if the input current is less than 10mA. Note 2: Applies to both RESET in the SP705-SP708 and RESET in the SP707/708/813L/813M. 2/17 Rev. 2.1.1

SP705 / SP706 / SP707 / SP708 / SP813L Low Power Microprocessor Supervisory Circuits BLOCK DIAGRAM Fig. 1: SP705-SP706-SP813L Block Diagram Fig. 2: SP707-SP708 Block Diagram 3/17 Rev. 2.1.1

SP705 / SP706 / SP707 / SP708 / SP813L Low Power Microprocessor Supervisory Circuits PIN ASSIGNMENT Fig. 3: Pin Assignment PIN DESCRIPTION - SOIC VERSION AVAILABLE Pin Number Name SP705-SP706 SP707-SP708 SP813L Description DIP SOIC MSOP SOIC MSOP SOIC Manual Reset This input triggers a reset pulse when pulled below 0.8V. This MR 1 3 1 3 1 active LOW input has an internal 250µA pull-up current. It can be driven from a TTL or CMOS logic line or shorted to ground with a switch. VCC 2 4 2 4 2 +5V power supply GND 3 5 3 5 3 Ground reference for all signals Power-Fail Input PFI 4 6 4 6 4 When this voltage monitor input is less than 1.25V, PFO goes LOW. Connect PFI to ground or VCC when not in use. Power-Fail Output PFO 5 - 5 7 5 This output is LOW until PFI is less then 1.25V Watchdog Input If this input remains HIGH or LOW for 1.6s, the internal watchdog timer times out and WDO goes LOW. Floating WDI WDI 6 8 - - 6 or connecting WDI to a high-impedance tri-state buffer disables the watchdog feature. The internal watchdog timer clears whenever RESET is asserted, WDI is tri-stated, or whenever WDI sees a rising or falling edge. N.C. - - 6 8 - No Connect Active-LOW RESET Output This output pulses LOW for 200ms when triggered and stays LOW whenever VCC is below the reset threshold (4.65V for the RESET 7 1 7 1 - SP705/707/813L and 4.40V for the SP706/708). It remains LOW for 200ms after Vcc rises above the reset threshold or MR goes from LOW to HIGH. A watchdog timeout will not trigger RESET unless WDO is connected to MR. 4/17 Rev. 2.1.1

SP705 / SP706 / SP707 / SP708 / SP813L Low Power Microprocessor Supervisory Circuits Pin Number Name SP705-SP706 SP707-SP708 SP813L Description DIP SOIC MSOP SOIC MSOP SOIC Watchdog Output This output pulls LOW when the internal watchdog timer finishes its 1.6s count and does not go HIGH again until the watchdog is cleared. WDO also goes LOW during low-line WDO 8 2 - - 8 conditions. Whenever VCC is below the reset threshold, WDO stays LOW. However, unlike RESET, WDO does not have a minimum pulse width. As soon as VCC is above the reset threshold, WDO goes HIGH with no delay. Active-HIGH RESET Output This output is the complement of RESET. Whenever RESET is RESET - - 8 2 7 HIGH, RESET is LOW and vice-versa. Note that the SP813L has a reset output only. ORDERING INFORMATION(1) Part Number Temperature Range Package Packing Method Lead Free(2) SP705 SP705CN-L/TR 0°C ≤ TA ≤ +70°C 8-pin NSOIC Tape & Reel Yes SP705EN-L/TR -40°C ≤ TA ≤ +85°C 8-pin NSOIC Tape & Reel Yes SP706 SP706EN-L/TR -40°C ≤ TA ≤ +85°C 8-pin NSOIC Tape & Reel Yes SP707 SP707EN-L/TR -40°C ≤ TA ≤ +85°C 8-pin NSOIC Tape & Reel Yes SP708 SP708CN-L/TR 0°C ≤ TA ≤ +70°C 8-pin NSOIC Tape & Reel Yes SP708EN-L/TR -40°C ≤ TA ≤ +85°C 8-pin NSOIC Tape & Reel Yes SP813L SP813LEN-L/TR -40°C ≤ TA ≤ +85°C 8-pin NSOIC Tape & Reel Yes Notes: 1. Refer to www.maxlinear.com/SP705, www.maxlinear.com/SP706, www.maxlinear.com/SP707, www.maxlinear.com/SP708, and www.maxlinear.com/SP813 for most up-to-date Ordering Information. 2. Visit www.maxlinear.com for additional information on Environmental Rating. 5/17 Rev. 2.1.1

SP705 / SP706 / SP707 / SP708 / SP813L Low Power Microprocessor Supervisory Circuits TYPICAL PERFORMANCE CHARACTERISTICS All data taken at VIN = 2.7V to 5.5V, TJ = TA = 25°C, unless otherwise specified - Schematic and BOM from Application Information section of this datasheet. Fig. 4: Power-Fail Comparator Fig. 5: Power-Fail Comparator De-Assertion Response Time De-Assertion Response Time Circuit Fig. 6: Power-Fail Comparator Fig. 7: Power-Fail Comparator Assertion Response Time Assertion Response Time Circuit Fig. 8: SP705/707 RESET Output Voltage Fig. 9: SP705/707 RESET Output Voltage vs. Supply Voltage vs. Supply Voltage Circuit 6/17 Rev. 2.1.1

SP705 / SP706 / SP707 / SP708 / SP813L Low Power Microprocessor Supervisory Circuits Fig. 10: SP705/707 RESET Response Time Fig. 11: SP705/707 RESET Response Time Circuit Fig. 12: SP707 RESET and RESET Assertion Fig. 13: SP707 RESET and RESET De-Assertion Fig. 14: SP707 RESET and RESET Assertion and De-Assertion Circuit 7/17 Rev. 2.1.1

SP705 / SP706 / SP707 / SP708 / SP813L Low Power Microprocessor Supervisory Circuits Fig. 15: SP707/708/813L RESET Output Voltage Fig. 16: SP813L RESET Response Time vs. Supply Voltage Fig. 17: SP707/708/813L RESET Output Voltage vs. Supply Voltage and SP813L RESET Response Time Circuit 8/17 Rev. 2.1.1

SP705 / SP706 / SP707 / SP708 / SP813L Low Power Microprocessor Supervisory Circuits FEATURES RESET OUTPUT The SP705-708/813L series provides four key A microprocessor's reset input starts the µP in functions: a known state. The SP705-708/813L series asserts reset during power-up and prevents 1. A reset output during power-up, power- code execution errors during power down or down and brownout conditions. brownout conditions. 2. An independent watchdog output that goes On power-up, once VCC reaches 1.1V, RESET is LOW if the watchdog input has not been a guaranteed logic LOW of 0.4V or less. As VCC toggled within 1.6 seconds. rises, RESET stays LOW. When VCC rises above 3. A 1.25V threshold detector for power-fail the reset threshold, an internal timer releases warning, low battery detection, or monitoring RESET after 200ms. RESET pulses LOW a power supply other than +5V. whenever VCC dips below the reset threshold, such as in a brownout condition. When a 4. An active-LOW manual-reset that allows brownout condition occurs in the middle of a RESET to be triggered by a pushbutton switch. previously initiated reset pulse, the pulse The SP707/708 devices are the same as the continues for at least another 140ms. On SP705/706 devices except for the active-HIGH power down, once VCC falls below the reset RESET substitution of the watchdog timer. The threshold, RESET stays LOW and is SP813L is the same as the SP705 except an guaranteed to be 0.4V or less until VCC drops active-HIGH RESET is provided rather than an below 1.1V. active-LOW RESET. The SP705/707/813L The SP707/708/813L active-HIGH RESET devices generate a reset when the supply output is simply the complement of the RESET voltage drops below 4.65V. The SP706/708 output and is guaranteed to be valid with VCC devices generate a reset below 4.40V. down to 1.1V. Some µPs, such as Intel's The SP705-708/813L series is ideally suited 80C51, require an active-HIGH reset pulse. for applications in automotive systems, intelligent instruments, and battery-powered WATCHDOG TIMER computers and controllers. The SP705- The SP705/706/813L watchdog circuit 708/813L series is ideally applied in monitors the µP's activity. If the µP does not environments where monitoring of power toggle the watchdog input (WDI) within 1.6 supply to a µP and its related components is seconds and WDI is not tri-stated, WDO goes critical. LOW. As long as RESET is asserted or the WDI input is tri-stated, the watchdog timer will stay THEORY OF OPERATION cleared and will not count. As soon as RESET is released and WDI is driven HIGH or LOW, The SP705-708/813L series is a the timer will start counting. Pulses as short as microprocessor (µP) supervisory circuit that 50ns can be detected. monitors the power supplied to digital circuits such as microprocessors, microcontrollers, or Typically, WDO will be connected to the non- memory. The series is an ideal solution for maskable interrupt input (NMI) of a µP. When portable, battery-powered equipment that VCC drops below the reset threshold, WDO will requires power supply monitoring. go LOW whether or not the watchdog timer Implementing this series will reduce the had timed out. Normally this would trigger an number of components and overall complexity. NMI but RESET goes LOW simultaneously and The watchdog functions of this product family thus overrides the NMI. will continuously oversee the operational If WDI is left unconnected, WDO can be used status of a system. The operational features as a low-line output. Since floating WDI and benefits of the SP705-708/813L series are disables the internal timer, WDO goes LOW described in more detail below. only when VCC falls below the reset threshold, thus functioning as a low-line output. 9/17 Rev. 2.1.1

SP705 / SP706 / SP707 / SP708 / SP813L Low Power Microprocessor Supervisory Circuits Fig. 18: SP705/706/813L Watchdog Timing Waveforms Fig. 20: Typical Operating Circuit MANUAL RESET The manual-reset input (MR) allows RESET to be triggered by a pushbutton switch. The switch is effectively debounced by the 140ms minimum RESET pulse width. MR is TTL/CMOS logic compatible, so it can be driven by an external logic line. MR can be used to force a Fig. 19: SP705/706 Timing Diagrams with WDI tri-stated. watchdog timeout to generate a RESET pulse in the SP705/706/813L. Simply connect WDO POWER-FAIL COMPARATOR to MR. The power-fail comparator can be used for Ensuring a Valid Reset Output Down to various purposes because its output and non inverting input are not internally connected. VCC=0V The inverting input is internally connected to a When VCC falls below 1.1V, the 1.25V reference. SP705/706/707/708 RESET output no longer sinks current, it becomes an open circuit. To build an early-warning circuit for power High-impedance CMOS logic inputs can drift to failure, connect the PFI pin to a voltage divider undetermined voltages if left undriven. If a as shown in Figure 20. Choose the voltage pull-down resistor is added to the RESET pin, divider ratio so that the voltage at PFI falls any stray charge or leakage currents will be below 1.25V just before the +5V regulator shunted to ground, holding RESET LOW. The drops out. Use PFO to interrupt the µP so it resistor value is not critical. It should be about can prepare for an orderly power-down. 100KW, large enough not to load RESET and small enough to pull RESET to ground. 10/17 Rev. 2.1.1

SP705 / SP706 / SP707 / SP708 / SP813L Low Power Microprocessor Supervisory Circuits MONITORING VOLTAGES OTHER THAN THE the SP705-708/813L will keep RESET asserted UNREGULATED DC INPUT (where RESET = LOW and RESET = HIGH). Note that this circuit's accuracy depends on Monitor voltages other than the unregulated the PFI threshold tolerance, the VCC line, and DC by connecting a voltage divider to PFI and the resistors. adjusting the ratio appropriately. If required, add hysteresis by connecting a resistor (with a value approximately 10 times the sum of the two resistors in the potential divider network) between PFI and PFO. A capacitor between PFI and GND will reduce the power-fail circuit's sensitivity to high-frequency noise on the line being monitored. RESET can be used to monitor voltages other than the +5V VCC line. Connect PFO to MR to initiate a RESET pulse when PFI drops below 1.25V. Figure 21 shows the SP705/706/707/708 configured to assert RESET when the +5V supply falls below the RESET threshold, or when the +12V supply falls below approximately 11V. Fig. 22: Monitoring a Negative Voltage Supply INTERFACING TO µPS WITH BIDIRECTIONAL RESET PINS µPs with bidirectional RESET pins, such as the Motorola 68HC11 series, can contend with the SP705/706/707/708 RESET output. If, for example, the RESET output is driven HIGH and the µP wants to pull it LOW, indeterminate logic levels may result. To correct this, connect a 4.7KΩ resistor between the RESET output and the µP reset I/O, as shown if Figure 23. Buffer the RESET output to other system components. Fig. 21: Monitoring +5V and +12V Power Supplies MONITORING A NEGATIVE VOLTAGE SUPPLY The power-fail comparator can also monitor a negative supply rail, shown in Figure 22. When the negative rail is good (a negative voltage of large magnitude), PFO is LOW. By adding the resistors and transistor as shown, a HIGH PFO triggers RESET. As long as PFO remains HIGH, 11/17 Rev. 2.1.1

SP705 / SP706 / SP707 / SP708 / SP813L Low Power Microprocessor Supervisory Circuits applications, the fixed functions will be preferred, with the benefit of reduced cost due to a less complex part. In addition, the SP705- 708/ 813L series has a power fail input and output function not available with the DS1232 that is useful for monitoring systems with unregulated supply voltages. The SP705- 708/813L series is available in one of the industry's smallest space-saving package sizes, the MSOP. Fig. 23: Interfacing to Microprocessors with Bidirectional REST I/O (SP705/706/708) APPLICATIONS The SP705-708/813L series offers unmatched Fig. 24: Supply Current vs. Temperature performance and the lowest power consumption for these industry standard devices. Refer to Figures 24 and 25 for supply current performance characteristics rated against temperature and supply voltages. Table 2 shows how the SP705-708/813L series can be used instead of the Dallas Semiconductor DS1232LP/LPS. Table 2 illustrates to a designer the advantages and tradeoffs of the SP705-708/813L series compared to the Dallas Semiconductor device. While the names of the pin descriptions may differ, the functions are the same or very similar. Unlike the DS1232, the SP705- 708/813L series has a separate watchdog output pin WDO which can be simply connected to the MR input to generate a Reset signal. The DS1232 has pin selectable features, while the SP705-708/813L series has more fixed functions of reset threshold and Fig. 25: Supply Current vs. Supply Voltage watchdog time-out delay. For most 12/17 Rev. 2.1.1

SP705 / SP706 / SP707 / SP708 / SP813L Low Power Microprocessor Supervisory Circuits Fig. 26: Device Overview on Maxim/Dallas Semiconductor 13/17 Rev. 2.1.1

SP705 / SP706 / SP707 / SP708 / SP813L Low Power Microprocessor Supervisory Circuits PACKAGE SPECIFICATION 8-PIN NSOIC - AVAILABLE 14/17 Rev. 2.1.1

SP705 / SP706 / SP707 / SP708 / SP813L Low Power Microprocessor Supervisory Circuits 8-PIN MSOP (THESE VERSIONS ARE OBSOLETE) 15/17 Rev. 2.1.1

SP705 / SP706 / SP707 / SP708 / SP813L Low Power Microprocessor Supervisory Circuits 8-PIN PDIP (THESE VERSIONS ARE OBSOLETE) 16/17 Rev. 2.1.1

SP705 / SP706 / SP707 / SP708 / SP813L Low Power Microprocessor Supervisory Circuits REVISION HISTORY Revision Date Description 2.0.0 06/03/2010 Reformat of datasheet 2.1.0 06/02/2011 Minimum WDI Pulse Width tWP reduced from 1µs to 100ns. Change will be effective with release of Device Product Change Notice. 2.1.1 01/24/2020 Updated to MaxLinear logo. Updated Ordering Information. CORPORATE HEADQUARTERS: 5966 La Place Court Suite 100 Carlsbad, CA 92008 Tel.: +1 (760) 692-0711 Fax: +1 (760) 444-8598 www.maxlinear.com The content of this document is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by Maxlinear, Inc. Maxlinear, Inc. Assumes no responsibility or liability for any errors or inaccuracies that may appear in the informational content contained in this guide. Complying with all applicable copyright laws is the responsibility of the user. Without limiting the rights under copyright, no part of this document may be reproduced into, stored in, or introduced into a retrieval system, or transmitted in any form or by any means (electronic, mechanical, photocopying, recording, or otherwise), or for any purpose, without the express written permission of Maxlinear, Inc. Maxlinear, Inc. Does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Maxlinear, Inc. Receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of Maxlinear, Inc. Is adequately protected under the circumstances. Maxlinear, Inc. May have patents, patent applications, trademarks, copyrights, or other intellectual property rights covering subject matter in this document. Except as expressly provided in any written license agreement from Maxlinear, Inc., the furnishing of this document does not give you any license to these patents, trademarks, copyrights, or other intellectual property. Maxlinear, the Maxlinear logo, and any Maxlinear trademarks, MxL, Full-Spectrum Capture, FSC, G.now, AirPHY and the Maxlinear logo are all on the products sold, are all trademarks of Maxlinear, Inc. or one of Maxlinear’s subsidiaries in the U.S.A. and other countries. All rights reserved. Other company trademarks and product names appearing herein are the property of their respective owners. © 2010 - 2020 Maxlinear, Inc. All rights reserved. 17/17 Rev. 2.1.1