ICGOO在线商城 > 集成电路(IC) > 接口 - 驱动器,接收器,收发器 > SN75C3232EDR
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SN75C3232EDR产品简介:
ICGOO电子元器件商城为您提供SN75C3232EDR由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 SN75C3232EDR价格参考。Texas InstrumentsSN75C3232EDR封装/规格:接口 - 驱动器,接收器,收发器, 全 收发器 2/2 RS232 16-SOIC。您可以下载SN75C3232EDR参考资料、Datasheet数据手册功能说明书,资料中有SN75C3232EDR 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC)半导体 |
描述 | IC LINE DRVR/RCVR RS232 16-SOICRS-232接口集成电路 3-5.5V 2 Ch 1 Mbit Line Driver/Receiver |
产品分类 | |
品牌 | Texas Instruments |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 接口 IC,RS-232接口集成电路,Texas Instruments SN75C3232EDR- |
数据手册 | |
产品型号 | SN75C3232EDR |
产品目录页面 | |
产品种类 | RS-232接口集成电路 |
传播延迟时间ns | 0.3 us |
供应商器件封装 | 16-SOIC N |
关闭 | No |
其它名称 | 296-21080-2 |
功能 | Transceiver |
包装 | 带卷 (TR) |
协议 | RS232 |
双工 | 全 |
商标 | Texas Instruments |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
封装 | Reel |
封装/外壳 | 16-SOIC(0.154",3.90mm 宽) |
封装/箱体 | SOIC-16 |
工作温度 | 0°C ~ 70°C |
工作温度范围 | 0 C to + 70 C |
工作电源电压 | 3.3 V, 5 V |
工厂包装数量 | 2500 |
接收器滞后 | 300mV |
接收机数量 | 2 Receiver |
数据速率 | 1Mbps |
最大工作温度 | + 70 C |
最小工作温度 | 0 C |
标准包装 | 2,500 |
激励器数量 | 2 Driver |
电压-电源 | 3 V ~ 5.5 V |
电源电流 | 1 mA |
类型 | 收发器 |
系列 | SN75C3232E |
输入/输出端数量 | 8 |
驱动器/接收器数 | 2/2 |
SN65C3232E,, SN75C3232E 3-V TO 5.5-V TWO-CHANNEL RS-232 1-MBIT/S LINE DRIVERS/RECEIVERS WITH ±15-kV IEC ESD PROTECTION www.ti.com SLLS697A–DECEMBER2005–REVISEDDECEMBER2007 FEATURES 1 D, DB, DW, OR PW PACKAGE • OperateWith3-Vto5.5-VV Supply CC (TOP VIEW) • Operateupto1Mbit/s • LowSupplyCurrent...300m ATyp C1+ 1 16 VCC • ExternalCapacitors...4· 0.1m F V+ 2 15 GND C1− 3 14 DOUT1 • Accept5-VLogicInputWith3.3-VSupply C2+ 4 13 RIN1 • Latch-UpPerformanceExceeds100mAPer C2− 5 12 ROUT1 JESD78,ClassII V− 6 11 DIN1 • ESDProtectionforRS-232Pins DOUT2 7 10 DIN2 – ±15-kVHuman-BodyModel(HBM) RIN2 8 9 ROUT2 – ±15-kVIEC61000-4-2Air-GapDischarge – ±8-kVIEC61000-4-2ContactDischarge APPLICATIONS • Battery-PoweredSystems • PDAs • Notebooks • Laptops • PalmtopPCs • Hand-HeldEquipment DESCRIPTION/ORDERING INFORMATION The SN65C3232E and SN75C3232E consist of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). These devices provide the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The devices operateatdatasignalingratesupto1Mbit/sandadriveroutputslewrateof14V/m sto150V/m s. ORDERINGINFORMATION T PACKAGE(1)(2) ORDERABLEPARTNUMBER TOP-SIDEMARKING A Tubeof40 SN65C3232ED SOIC–D 65C3232E Reelof2500 SN65C3232EDR Tubeof40 SN65C3232EDW SOIC–DW 65C3232E –40(cid:176) Cto85(cid:176) C Reelof2000 SN65C3232EDWR SSOP–DB Reelof2000 SN65C3232EDBR MU232E Tubeof90 SN65C3232EPW TSSOP–PW MU232E Reelof2000 SN65C3232EPWR Tubeof40 SN75C3232ED SOIC–D 75C3232E Reelof2500 SN75C3232EDR Tubeof40 SN75C3232EDW SOIC–DW 75C3232E 0(cid:176) Cto70(cid:176) C Reelof2000 SN75C3232EDWR SSOP–DB Reelof2000 SN75C3232EDBR MY232E Tubeof90 SN75C3232EPW TSSOP–PW MY232E Reelof2000 SN75C3232EPWR (1) Packagedrawings,thermaldata,andsymbolizationareavailableatwww.ti.com/packaging. (2) Forthemostcurrentpackageandorderinginformation,seethePackageOptionAddendumattheendofthisdocument,orseetheTI websiteatwww.ti.com. 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2005–2007,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.
SN65C3232E,, SN75C3232E 3-V TO 5.5-V TWO-CHANNEL RS-232 1-MBIT/S LINE DRIVERS/RECEIVERS WITH ±15-kV IEC ESD PROTECTION www.ti.com SLLS697A–DECEMBER2005–REVISEDDECEMBER2007 Table1.1-Mbit/sRS-232Parts SUPPLY TEMPERATURE PART NO.OF NO.OF ESD V FEATURE PIN/PACKAGE RANGE NO. DRIVERS RECEIVERS CC (V) ±15-kVAir-Gap, 16-pinSOIC, SN65C3221E 1 1 ±8-kVContact, 3.3or5 Autopowerdown SSOP,TSSOP ±15-kVHBM ±15-kVAir-Gap, 16-pinSOIC, SN65C3232E 2 2 ±8-kVContact, 3.3or5 Lowpincount SSOP,TSSOP ±15-kVHBM ±8-kVAir-Gap, Autopowerdownplus, MAX3227I 1 1 ±8-kVContact, 3.3or5 16-pinSSOP readysignal ±15-kVHBM 16-pinSOIC, SN65C3221 1 1 ±15-kVHBM 3.3or5 Autopowerdown –40(cid:176) Cto85(cid:176) C SSOP,TSSOP Autopowerdown, 20-pinSOIC, SN65C3223 2 2 ±15-kVHBM 3.3or5 enablesignal SSOP,TSSOP Enable, 20-pinSOIC, SN65C3222 2 2 ±15-kVHBM 3.3or5 powerdownsignal SSOP,TSSOP 16-pinSOIC, SN65C3232 2 2 ±15-kVHBM 3.3or5 Lowpincount SSOP,TSSOP 28-pinSOIC, SN65C3238 5 3 ±15-kVHBM 3.3or5 Autopowerdownplus SSOP,TSSOP 28-pinSOIC, SN65C3243 3 5 ±15-kVHBM 3.3or5 Autopowerdown SSOP,TSSOP ±15-kVAir-Gap, 16-pinSOIC, SN75C3221E 1 1 ±8-kVContact, 3.3or5 Autopowerdown SSOP,TSSOP ±15-kVHBM ±15-kVAir-Gap, 16-pinSOIC, SN75C3232E 2 2 ±8-kVContact, 3.3or5 Lowpincount SSOP,TSSOP ±15-kVHBM ±8-kVAir-Gap, Autopowerdownplus, MAX3227C 1 1 ±8-kVContact, 3.3or5 16-pinSSOP readysignal ±15-kVHBM 16-pinSOIC, SN75C3221 1 1 ±15-kVHBM 3.3or5 Autopowerdown 0(cid:176) Cto70(cid:176) C SSOP,TSSOP Autopowerdown, 20-pinSOIC, SN75C3223 2 2 ±15-kVHBM 3.5or5 enablesignal SSOP,TSSOP Enable, 20-pinSOIC, SN75C3222 2 2 ±15-kVHBM 3.3or5 powerdownsignal SSOP,TSSOP 16-pinSOIC, SN75C3232 2 2 ±15-kVHBM 3.3or5 Lowpincount SSOP,TSSOP 28-pinSOIC, SN75C3238 5 3 ±15-kVHBM 3.3or5 Autopowerdownplus SSOP,TSSOP 28-pinSOIC, SN75C3243 3 5 ±15-kVHBM 3.3or5 Autopowerdown SSOP,TSSOP 2 SubmitDocumentationFeedback Copyright©2005–2007,TexasInstrumentsIncorporated ProductFolderLink(s):SN65C3232ESN75C3232E
SN65C3232E,, SN75C3232E 3-V TO 5.5-V TWO-CHANNEL RS-232 1-MBIT/S LINE DRIVERS/RECEIVERS WITH ±15-kV IEC ESD PROTECTION www.ti.com SLLS697A–DECEMBER2005–REVISEDDECEMBER2007 FUNCTIONTABLES xxx EACHDRIVER(1) INPUT OUTPUT DIN DOUT L H H L (1) H=highlevel,L=lowlevel EACHRECEIVER(1) INPUT OUTPUT RIN ROUT L H H L Open H (1) H=highlevel,L=lowlevel, Open=inputdisconnectedor connecteddriveroff LOGICDIAGRAM(POSITIVELOGIC) 11 14 DIN1 DOUT1 10 7 DIN2 DOUT2 12 13 ROUT1 RIN1 5 k(cid:1) 9 8 ROUT2 RIN2 5 k(cid:1) Copyright©2005–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):SN65C3232ESN75C3232E
SN65C3232E,, SN75C3232E 3-V TO 5.5-V TWO-CHANNEL RS-232 1-MBIT/S LINE DRIVERS/RECEIVERS WITH ±15-kV IEC ESD PROTECTION www.ti.com SLLS697A–DECEMBER2005–REVISEDDECEMBER2007 Absolute Maximum Ratings(1) overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyvoltagerange(2) –0.3 6 V CC V+ Positiveoutputsupplyvoltagerange(2) –0.3 7 V V– Negativeoutputsupplyvoltagerange(2) 0.3 –7 V V+–V– Supplyvoltagedifference(2) 13 V Drivers –0.3 6 V Inputvoltagerange V I Receivers –25 25 Drivers –13.2 13.2 V Outputvoltagerange V O Receivers –0.3 V +0.3 CC Dpackage 82 DBpackage 46 q Packagethermalimpedance(3)(4) (cid:176) C/W JA DWpackage 57 PWpackage 108 T Operatingvirtualjunctiontemperature 150 (cid:176) C J T Storagetemperaturerange –65 150 (cid:176) C stg (1) Stressesbeyondthoselistedunder"absolutemaximumratings"maycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder"recommendedoperating conditions"isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) AllvoltagesarewithrespecttonetworkGND. (3) MaximumpowerdissipationisafunctionofT(max),q ,andT .Themaximumallowablepowerdissipationatanyallowableambient J JA A temperatureisP =(T(max)–T )/q .OperatingattheabsolutemaximumT of150(cid:176) Ccanaffectreliability. D J A JA J (4) ThepackagethermalimpedanceiscalculatedinaccordancewithJESD51-7. Recommended Operating Conditions(1) MIN NOM MAX UNIT V =3.3V 3 3.3 3.6 CC Supplyvoltage V V =5V 4.5 5 5.5 CC V =3.3V 2 CC V Driverhigh-levelinputvoltage DIN V IH V =5V 2.4 CC V Driverlow-levelinputvoltage DIN 0.8 V IL Driverinputvoltage DIN 0 5.5 V V I Receiverinputvoltage –25 25 SN65C3232E –40 85 T Operatingfree-airtemperature (cid:176) C A SN75C3232E 0 70 (1) TestconditionsareC1–C4=0.1m FatV =3.3V±0.3V;C1=0.047m F,C2–C4=0.33m FatV =5V±0.5V(seeFigure4). CC CC Electrical Characteristics(1) overrecommendedrangesofsupplyvoltageandoperatingfree-airtemperature(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP(2) MAX UNIT I Supplycurrent Noload, V =3.3Vor5V 0.3 1 mA CC CC (1) TestconditionsareC1–C4=0.1m FatV =3.3V±0.3V;C1=0.047m F,C2–C4=0.33m FatV =5V±0.5V(seeFigure4). CC CC (2) AlltypicalvaluesareatV =3.3VorV =5V,andT =25(cid:176) C. CC CC A 4 SubmitDocumentationFeedback Copyright©2005–2007,TexasInstrumentsIncorporated ProductFolderLink(s):SN65C3232ESN75C3232E
SN65C3232E,, SN75C3232E 3-V TO 5.5-V TWO-CHANNEL RS-232 1-MBIT/S LINE DRIVERS/RECEIVERS WITH ±15-kV IEC ESD PROTECTION www.ti.com SLLS697A–DECEMBER2005–REVISEDDECEMBER2007 DRIVER SECTION Electrical Characteristics(1) overrecommendedrangesofsupplyvoltageandoperatingfree-airtemperature(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP(2) MAX UNIT V High-leveloutputvoltage DOUTatR =3kΩtoGND, DIN=GND 5 5.5 V OH L V Low-leveloutputvoltage DOUTatR =3kΩtoGND, DIN=V –5 –5.4 V OL L CC I High-levelinputcurrent V =V ±0.01 ±1 m A IH I CC I Low-levelinputcurrent V atGND ±0.01 ±1 m A IL I V =3.6V, V =0V ±35 ±60 I (3) Short-circuitoutputcurrent CC O mA OS V =5.5V, V =0V ±35 ±90 CC O r Outputresistance V ,V+,andV–=0V, V =±2V 300 10M Ω o CC O (1) TestconditionsareC1–C4=0.1m FatV =3.3V±0.3V;C1=0.047m F,C2–C4=0.33m FatV =5V±0.5V(seeFigure4). CC CC (2) AlltypicalvaluesareatV =3.3VorV =5V,andT =25(cid:176) C. CC CC A (3) Short-circuitdurationsshouldbecontrolledtopreventexceedingthedeviceabsolutepowerdissipationratings,andnotmorethanone outputshouldbeshortedatatime. Switching Characteristics(1) overrecommendedrangesofsupplyvoltageandoperatingfree-airtemperature(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP(2) MAX UNIT Maximumdatarate RL=3kΩ, CL=250pF, VCC=3Vto4.5V 1000 kbit/s (seeFigure1) OneDOUTswitching C =1000pF, V =3.5Vto5.5V 1000 L CC t Pulseskew(3) C =150pFto2500pF,R =3kΩto7kΩ,SeeFigure2 300 ns sk(p) L L Slewrate, SR(tr) transitionregion R =3kΩto7kΩ,C =150pFto1000pF,V =3.3V 14 150 V/m s L L CC (seeFigure1) (1) TestconditionsareC1–C4=0.1m FatV =3.3V±0.3V;C1=0.047m F,C2–C4=0.33m FatV =5V±0.5V(seeFigure4). CC CC (2) AlltypicalvaluesareatV =3.3VorV =5V,andT =25(cid:176) C. CC CC A (3) Pulseskewisdefinedas|t –t |ofeachchannelofthesamedevice. PLH PHL ESD Protection TERMINAL TESTCONDITIONS TYP UNIT NAME NO. HBM ±15 DOUT 7,14 IEC61000-4-2Air-GapDischarge ±15 kV IEC61000-4-2ContactDischarge ±8 Copyright©2005–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):SN65C3232ESN75C3232E
SN65C3232E,, SN75C3232E 3-V TO 5.5-V TWO-CHANNEL RS-232 1-MBIT/S LINE DRIVERS/RECEIVERS WITH ±15-kV IEC ESD PROTECTION www.ti.com SLLS697A–DECEMBER2005–REVISEDDECEMBER2007 RECEIVER SECTION Electrical Characteristics(1) overrecommendedrangesofsupplyvoltageandoperatingfree-airtemperature(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP(2) MAX UNIT V High-leveloutputvoltage I =–1mA V –0.6 V –0.1 V OH OH CC CC V Low-leveloutputvoltage I =1.6mA 0.4 V OL OL V =3.3V 1.5 2.4 CC V Positive-goinginputthresholdvoltage V IT+ V =5V 1.8 2.4 CC V =3.3V 0.6 1.2 CC V Negative-goinginputthresholdvoltage V IT– V =5V 0.8 1.5 CC V Inputhysteresis(V –V ) 0.3 V hys IT+ IT– r Inputresistance V =±3Vto±25V 3 5 7 kΩ i I (1) TestconditionsareC1–C4=0.1m FatV =3.3V±0.3V;C1=0.047m F,C2–C4=0.33m FatV =5V±0.5V(seeFigure4). CC CC (2) AlltypicalvaluesareatV =3.3VorV =5V,andT =25(cid:176) C. CC CC A Switching Characteristics(1) overrecommendedrangesofsupplyvoltageandoperatingfree-airtemperature(unlessotherwisenoted) PARAMETER TESTCONDITIONS TYP(2) UNIT t Propagationdelaytime,low-tohigh-leveloutput 300 ns PLH C =150pF L t Propagationdelaytime,high-tolow-leveloutput 300 ns PHL t Pulseskew(3) 300 ns sk(p) (1) TestconditionsareC1–C4=0.1m FatV =3.3V±0.3V;C1=0.047m F,C2–C4=0.33m FatV =5V±0.5V(seeFigure4). CC CC (2) AlltypicalvaluesareatV =3.3VorV =5V,andT =25(cid:176) C. CC CC A (3) Pulseskewisdefinedas|t –t |ofeachchannelofthesamedevice. PLH PHL ESD Protection TERMINAL TESTCONDITIONS TYP UNIT NAME NO. HBM ±15 RIN 8,13 IEC61000-4-2Air-GapDischarge ±15 kV IEC61000-4-2ContactDischarge ±8 6 SubmitDocumentationFeedback Copyright©2005–2007,TexasInstrumentsIncorporated ProductFolderLink(s):SN65C3232ESN75C3232E
SN65C3232E,, SN75C3232E 3-V TO 5.5-V TWO-CHANNEL RS-232 1-MBIT/S LINE DRIVERS/RECEIVERS WITH ±15-kV IEC ESD PROTECTION www.ti.com SLLS697A–DECEMBER2005–REVISEDDECEMBER2007 PARAMETER MEASUREMENT INFORMATION 3 V Input 1.5 V 1.5 V RS-232 0 V Output Generator (see Note B) 50 W CL tTHL tTLH RL (see Note A) VOH 3 V 3 V Output −3 V −3 V VOL TEST CIRCUIT SR(tr)(cid:1) 6V VOLTAGE WAVEFORMS t ort THL TLH NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 W , 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure1.DriverSlewRate 3 V RS-232 Input 1.5 V 1.5 V Generator Output 0 V (see Note B) 50 W CL tPHL tPLH RL (see Note A) VOH Output 50% 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 W , 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure2.DriverPulseSkew 3 V Input 1.5 V 1.5 V Output −3 V Generator (see Note B) 50 W CL tPHL tPLH (see Note A) VOH Output 50% 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 W , 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure3.ReceiverPropagationDelayTimes Copyright©2005–2007,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLink(s):SN65C3232ESN75C3232E
SN65C3232E,, SN75C3232E 3-V TO 5.5-V TWO-CHANNEL RS-232 1-MBIT/S LINE DRIVERS/RECEIVERS WITH ±15-kV IEC ESD PROTECTION www.ti.com SLLS697A–DECEMBER2005–REVISEDDECEMBER2007 APPLICATION INFORMATION 1 16 C1+ VCC + CBYPASS = 0.1 m F − + 2 15 C1 + V+ GND − C3 − 14 3 DOUT1 C1− 13 4 RIN1 C2+ + C2 5 kW − 5 C2− 12 ROUT1 6 − V− 11 C4 DIN1 + 7 10 DOUT2 DIN2 8 9 RIN2 ROUT2 5 kW VCC vs CAPACITOR VALUES VCC C1 C2, C3, C4 3.3 V ± 0.3 V 0.1 m F 0.1 m F 5 V ± 0.5 V 0.047 m F 0.33 m F 3 V to 5.5 V 0.1 m F 0.47 m F A. C3canbeconnectedtoV orGND. CC Figure4.TypicalOperatingCircuitandCapacitorValues 8 SubmitDocumentationFeedback Copyright©2005–2007,TexasInstrumentsIncorporated ProductFolderLink(s):SN65C3232ESN75C3232E
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN65C3232ED ACTIVE SOIC D 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 65C3232E & no Sb/Br) SN65C3232EDB ACTIVE SSOP DB 16 80 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 MU232E & no Sb/Br) SN65C3232EDBG4 ACTIVE SSOP DB 16 80 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 MU232E & no Sb/Br) SN65C3232EDBR ACTIVE SSOP DB 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 MU232E & no Sb/Br) SN65C3232EDBRG4 ACTIVE SSOP DB 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 MU232E & no Sb/Br) SN65C3232EDE4 ACTIVE SOIC D 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 65C3232E & no Sb/Br) SN65C3232EDR ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 65C3232E & no Sb/Br) SN65C3232EDRG4 ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 65C3232E & no Sb/Br) SN65C3232EDW ACTIVE SOIC DW 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 65C3232E & no Sb/Br) SN65C3232EDWR ACTIVE SOIC DW 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 65C3232E & no Sb/Br) SN65C3232EPW ACTIVE TSSOP PW 16 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 MU232E & no Sb/Br) SN65C3232EPWE4 ACTIVE TSSOP PW 16 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 MU232E & no Sb/Br) SN65C3232EPWR ACTIVE TSSOP PW 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 MU232E & no Sb/Br) SN75C3232ED ACTIVE SOIC D 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75C3232E & no Sb/Br) SN75C3232EDB ACTIVE SSOP DB 16 80 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 MY232E & no Sb/Br) SN75C3232EDBR ACTIVE SSOP DB 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 MY232E & no Sb/Br) SN75C3232EDR ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75C3232E & no Sb/Br) Addendum-Page 1
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN75C3232EDW ACTIVE SOIC DW 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75C3232E & no Sb/Br) SN75C3232EDWR ACTIVE SOIC DW 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75C3232E & no Sb/Br) SN75C3232EPW ACTIVE TSSOP PW 16 90 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 MY232E & no Sb/Br) SN75C3232EPWR ACTIVE TSSOP PW 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 MY232E & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 2
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3
PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN65C3232EDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 SN65C3232EDWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 SN65C3232EPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN75C3232EDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 SN75C3232EDWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 SN75C3232EPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1
PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN65C3232EDR SOIC D 16 2500 367.0 367.0 38.0 SN65C3232EDWR SOIC DW 16 2000 350.0 350.0 43.0 SN65C3232EPWR TSSOP PW 16 2000 367.0 367.0 35.0 SN75C3232EDR SOIC D 16 2500 367.0 367.0 38.0 SN75C3232EDWR SOIC DW 16 2000 350.0 350.0 43.0 SN75C3232EPWR TSSOP PW 16 2000 367.0 367.0 35.0 PackMaterials-Page2
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PACKAGE OUTLINE PW0016A TSSOP - 1.2 mm max height SCALE 2.500 SMALL OUTLINE PACKAGE SEATING PLANE C 6.6 TYP 6.2 A 0.1 C PIN 1 INDEX AREA 14X 0.65 16 1 2X 5.1 4.55 4.9 NOTE 3 8 9 0.30 B 4.5 16X 0.19 1.2 MAX 4.3 0.1 C A B NOTE 4 (0.15) TYP SEE DETAIL A 0.25 GAGE PLANE 0.15 0.05 0.75 0.50 0 -8 DETA 20AIL A TYPICAL 4220204/A 02/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153. www.ti.com
EXAMPLE BOARD LAYOUT PW0016A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 16X (1.5) SYMM (R0.05) TYP 1 16X (0.45) 16 SYMM 14X (0.65) 8 9 (5.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 10X SOLDER MASK METAL UNDER SOLDER MASK OPENING METAL SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDE15.000R MASK DETAILS 4220204/A 02/2017 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com
EXAMPLE STENCIL DESIGN PW0016A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 16X (1.5) SYMM (R0.05) TYP 1 16X (0.45) 16 SYMM 14X (0.65) 8 9 (5.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 10X 4220204/A 02/2017 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com
GENERIC PACKAGE VIEW DW 16 SOIC - 2.65 mm max height 7.5 x 10.3, 1.27 mm pitch SMALL OUTLINE INTEGRATED CIRCUIT This image is a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4224780/A www.ti.com
PACKAGE OUTLINE DW0016A SOIC - 2.65 mm max height SCALE 1.500 SOIC C 10.63 SEATING PLANE TYP 9.97 A PIN 1 ID 0.1 C AREA 14X 1.27 16 1 10.5 2X 10.1 8.89 NOTE 3 8 9 0.51 16X 0.31 7.6 B 7.4 0.25 C A B 2.65 MAX NOTE 4 0.33 TYP 0.10 SEE DETAIL A 0.25 GAGE PLANE 0.3 0 - 8 0.1 1.27 0.40 DETAIL A (1.4) TYPICAL 4220721/A 07/2016 NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm, per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm, per side. 5. Reference JEDEC registration MS-013. www.ti.com
EXAMPLE BOARD LAYOUT DW0016A SOIC - 2.65 mm max height SOIC 16X (2) SEE SYMM DETAILS 1 16 16X (0.6) SYMM 14X (1.27) 8 9 R0.05 TYP (9.3) LAND PATTERN EXAMPLE SCALE:7X METAL SOLDER MASK SOLDER MASK METAL OPENING OPENING 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4220721/A 07/2016 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com
EXAMPLE STENCIL DESIGN DW0016A SOIC - 2.65 mm max height SOIC 16X (2) SYMM 1 16 16X (0.6) SYMM 14X (1.27) 8 9 R0.05 TYP (9.3) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:7X 4220721/A 07/2016 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com
MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,65 0,15 M 0,22 28 15 0,25 0,09 5,60 8,20 5,00 7,40 Gage Plane 1 14 0,25 A 0°–(cid:1)8° 0,95 0,55 Seating Plane 2,00 MAX 0,05 MIN 0,10 PINS ** 14 16 20 24 28 30 38 DIM A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 4040065/E 12/01 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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