SN75172 QUADRUPLE DIFFRENTIAL LINE DRIVER SLLS038B – OCTOBER 1980 – REVISED MAY 1995 (cid:1) Meets or Exceeds the Requirements of N PACKAGE (TOP VIEW) ANSI Standards EIA/TIA-422-B and RS-485 and ITU Recommendation V.11 (cid:1) 1A 1 16 VCC Designed for Multipoint Transmission on 1Y 2 15 4A Long Bus Lines in Noisy Environments 1Z 3 14 4Y (cid:1) 3-State Outputs G 4 13 4Z (cid:1) Common-Mode Output Voltage Range of 2Z 5 12 G –7 V to 12 V 2Y 6 11 3Z (cid:1) 2A 7 10 3Y Active-High and Active-Low Enables (cid:1) GND 8 9 3A Thermal Shutdown Protection (cid:1) Positive- and Negative-Current Limiting DW PACKAGE (cid:1) Operates From Single 5-V Supply (TOP VIEW) (cid:1) Logically Interchangeable With AM26LS31 1A 1 20 VCC description 1Y 2 19 4A NC 3 18 4Y The SN75172 is a monolithic quadruple 1Z 4 17 NC differential line driver with 3-state outputs. It is G 5 16 4Z designed to meet the requirements of ANSI 2Z 6 15 G Standards EIA/TIA-422-B and RS-485 and ITU NC 7 14 3Z Recommendation V.11. The device is optimized 2Y 8 13 NC for balanced multipoint bus transmission at rates 2A 9 12 3Y of up to 4megabaud. Each driver features wide GND 10 11 3A positive and negative common-mode output voltage ranges, making it suitable for party-line NC – No internal connection applications in noisy environments. The SN75172 provides positive- and negative-current limiting and thermal shutdown for protection from line fault conditions on the transmission bus line. Shutdown occurs at a junction temperature of approximately 150°C. This device offers optimum performance when used with the SN75173 or SN75175 quadruple differential line receivers. The SN75172 is characterized for operation from 0°C to 70°C. FUNCTION TABLE (each driver) IINNPPUUTT ENABLES OUTPUTS A G G Y Z H H X H L L H X L H H X L H L L X L L H X L H Z Z H = high level, L = low level, X = irrelevant, Z = high impedance (off) Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright  1995, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

SN75172 QUADRUPLE DIFFRENTIAL LINE DRIVER SLLS038B – OCTOBER 1980 – REVISED MAY 1995 logic symbol† logic diagram (positive logic) 4 4 ≥1 G G EN 12 12 G G 2 2 1 1Y 1 1Y 1A 3 1A 3 1Z 1Z 6 7 2Y 6 2A 5 7 2Y 2Z 2A 5 10 2Z 9 3Y 3A 11 3Z 10 14 9 3Y 15 4Y 3A 11 4A 13 3Z 4Z 14 †This symbol is in accordance with ANSI/IEEE Std 91-1984 15 4Y 4A 13 and IEC Publication 617-12. 4Z Terminal numbers shown are for the N package. absolute maximum ratings over operating free-air temperature (unless otherwise noted)‡ Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage range at any bus terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –10 V to 15 V Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V I Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C A Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C stg Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C ‡Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to the network ground terminal. DISSIPATION RATING TABLE TA ≤ 25°C DERATING FACTOR TA = 70°C PACKAGE POWER RATING ABOVE TA = 25°C POWER RATING DW 1125 mW 9.0 mW/°C 720 mW N 1150 mW 9.2 mW/°C 736 mW 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN75172 QUADRUPLE DIFFRENTIAL LINE DRIVER SLLS038B – OCTOBER 1980 – REVISED MAY 1995 recommended operating conditions MIN NOM MAX UNIT Supply voltage, VCC 4.75 5 5.25 V High-level input voltage, VIH 2 V Low-level input voltage, VIL 0.8 V Common-mode output voltage, VOC –7 to 12 V High-level output current, IOH –60 mA Low-level output current, IOL 60 mA Operating free-air temperature, TA 0 70 °C electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIK Input clamp voltage II = –18 mA –1.5 V VO Output voltage IO = 0 0 6 V VOH High-level output voltage VIH = 2 V, VIL = 0.8 V, IOH = –33 mA 3.7 V VOL Low-level output voltage VIH = 2 V, VIL = 0.8 V, IOH = 33 mA 1.1 V |VOD1| Differential output voltage IO = 0 1.5 6 V |VOD2| Differential output voltage RRLL == 110000 WW , SSeeee FFiigguurree 11 1/2o rV 2OO‡DD11 VV RL = 54 W , See Figure 1 1.5 2.5 5 V VOD3 Differential output voltage See Note 2 1.5 5 V Change in magnitude of D |VOD| differential output voltage§ ±0.2 V +3 VVOOCC CCoommmmoonn-mmooddee oouttpputt voollttaaggee¶¶ RRLL == 5544 WW oorr 110000 WW , SSeeee FFiigguurree 11 VV –1 Change in magnitude of D |VOC| common-mode output voltage§ ±0.2 V IO Output current with power off VCC = 0, VO = – 7 V to 12 V ±100 m A High-impedance-state IOZ output current VO = – 7 V to 12 V ±100 m A IIH High-level input current VI = 2.7 V 20 m A IIL Low-level input current VI = 0.5 V –360 m A VO = – 7 V –180 IOS Short-circuit output current VO = VCC 180 mA VO = 12 V 500 Outputs enabled 38 60 IICCCC SSuuppppllyy ccuurrrreenntt ((aallll ddrriivveerrss)) NNoo llooaadd mmAA Outputs disabled 18 40 †All typical values are at VCC = 5 V and TA = 25°C. ‡The minimum VOD2 with a 100-W load is either 1/2 VOD1 or 2 V, whichever is greater. §D |VOD| and D |VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low level. ¶In ANSI Standard EIA/TIA-422-B, VOC, which is the average of the two output voltages with respect to ground, is called output offset voltage, VOS. NOTE 2: See Figure 3-5 of EIA Standard RS-485. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

SN75172 QUADRUPLE DIFFRENTIAL LINE DRIVER SLLS038B – OCTOBER 1980 – REVISED MAY 1995 SYMBOL EQUIVALENTS DATA SHEET PARAMETER EIA/TIA-422-B RS-485 VO Voa, Vob Voa, Vob |VOD1| Vo Vo |VOD2| Vt (RL = 100 W ) Vt (RL = 54 W ) Vt (Test Termination) |VOD2| Measurement 2) D |VOD| ||Vt| – |Vt|| ||Vt| – |Vt|| VOC |Vos| |Vos| D |VOC| |Vos – Vos| |Vos – Vos| IOS |Isa|,|Isb| IO |Ixa|,|Ixb| Iia,Iib switching characteristics, V = 5 V, T = 25°C CC A PARAMETER TEST CONDITIONS MIN TYP MAX UNIT td(OD) Differential-output delay time 45 65 ns RRLL == 5544 WW , SSeeee FFiigguurree 22 tt(OD) Differential-output transition time 80 120 ns tPZH Output enable time to high level RL = 110 W , See Figure 3 80 120 ns tPZL Output enable time to low level RL = 110 W , See Figure 4 45 80 ns tPHZ Output disable time from high level RL = 110 W , See Figure 3 78 115 ns tPLZ Output disable time from low level RL = 110 W , See Figure 4 18 30 ns PARAMETER MEASUREMENT INFORMATION RL 2 VOD2 RL VOC 2 Figure 1. Differential and Common-Mode Output Voltages 3 V Input 1.5 V 1.5 V RL = CL = 50 pF Output 0 V Generator 54 W (see Note B) td(OD) td(OD) (see Note A) 50 W ≈2.5 V 90% 3 V 50% 50% Output 10% ≈2.5 V tt(OD) tt(OD) 3 V or 0 TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. The input pulse is supplied by a generator having the following characteristics: tr ≤ 5 ns, tf ≤ 5 ns, PRR ≤ 1 MHz, duty cycle = 50%, ZO = 50 W . B. CL includes probe and stray capacitance. Figure 2. Differential-Output Test CIrcuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN75172 QUADRUPLE DIFFRENTIAL LINE DRIVER SLLS038B – OCTOBER 1980 – REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION 3 V S1 Input 1.5 V 1.5 V 0 V to 3 V Output 0 V 0.5 V Generator tPZH (see Note A) 50 W RL = 110 W VOH Output 3 V CL = 50 pF 2.3 V (see Note C) (see Note B) tPHZ Voff ≈ 0 V TEST CIRCUIT VOLTAGE WAVEFORMS NOTES. A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr ≤ 5 ns, tf ≤ 5 ns, ZO = 50 W . B. CL includes probe and stray capacitance. C. To test the active-low enable G, ground G and apply an inverted waveform to G. Figure 3. Test Circuit and Voltage Waveforms 5 V RL = 110 W 3 V S1 Input 1.5 V 1.5 V 0 V to 3 V Output 0 V Generator tPZL tPLZ (see Note A) 50 W 5 V CL = 50 pF (see Note B) Output 2.3 V 0.5 V 3 V VOL (see Note C) VOLTAGE WAVEFORMS TEST CIRCUIT NOTES. A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr ≤ 5 ns, tf ≤ 5 ns, ZO = 50 W . B. CL includes probe and stray capacitance. C. To test the active-low enable G, ground G and apply an inverted waveform to G. Figure 4. Test Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

SN75172 QUADRUPLE DIFFRENTIAL LINE DRIVER SLLS038B – OCTOBER 1980 – REVISED MAY 1995 TYPICAL CHARACTERISTICS HIGH-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE vs vs HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT 5 5 ÁÁÁÁ 4.5 VTAC C= =25 5° CV 4.5 ÁVTACÁ C= =2Á5 5° CVÁ V ÁÁÁÁ e – V 4 ge – 4 oltg 3.5 olta 3.5 V V ut 3 ut 3 p p Out 2.5 Out 2.5 el el ev 2 ev 2 L L h- w- ÁÁHig Á1.5 Lo 1.5 – – ÁÁ VOHÁ1 VOL 1 ÁÁÁ0.5 0.5 0 0 0 –20 –40 –60 –80 –100 –120 0 20 40 60 80 100 120 IOH – High-Level Output Current – mA IOL – Low-Level Output Current – mA Figure 5 Figure 6 DIFFERENTIAL OUTPUT VOLTAGE OUTPUT CURRENT vs vs OUTPUT CURRENT OUTPUT VOLTAGE 4 50 VCC = 5 V 40 Output Dissabled V 3.5 TA = 25°C TA = 25°C – 30 e g 3 a A utput Volt 2.5 Current – 2100 VCC = 0 al O 2 put 0 nti ut –10 e 1.5 O er Á– Á VCC = 5 V – Diff 1 ÁIO IOÁ–20 D ÁÁ–30 O V 0.5 –40 0 –50 0 10 20 30 40 50 60 70 80 90 100 –25 –20 –15 –10 –5 0 5 10 15 20 25 IO – Output Current – mA VO – Output Voltage – V Figure 7 Figure 8 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN75172 QUADRUPLE DIFFRENTIAL LINE DRIVER SLLS038B – OCTOBER 1980 – REVISED MAY 1995 TYPICAL CHARACTERISTICS SUPPLY CURRENT SUPPLY CURRENT vs vs SUPPLY VOLTAGE SUPPLY VOLTAGE 100 30 No Load 90 Outputs Enabled No Load 80 TA = 25°C 25 IOnuptuptu Ot pEennabled mA A TA = 25°C rent – 7600 Inputs ent – m 20 Cur Open urr upply 5400 pply C 15 ÁSÁ ÁuÁ ÁÁICC – ICCÁÁ3200 IGnrpouutnsded ÁÁICC – SICCÁÁ 10 5 10 0 0 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 VCC – Supply Voltage – V VCC – Supply Voltage – V Figure 9 Figure 10 APPLICATION INFORMATION 1/4 SN75172 1/4 SN75174 RT RT 1/4 SN75173 Up to 32 1/4 SN75175 RS-485 Unit Load 1/4 SN75172 1/4 SN75173 1/4 SN75173 1/4 SN75174 NOTE A: The line length should be terminated at both ends in its characteristic impedance (RT = ZO). Stub lengths off the main line should be kept as short as possible. Figure 11 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN75172DW ACTIVE SOIC DW 20 25 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 SN75172 & no Sb/Br) SN75172DWR ACTIVE SOIC DW 20 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 SN75172 & no Sb/Br) SN75172DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 SN75172 & no Sb/Br) SN75172N ACTIVE PDIP N 16 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 SN75172N & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 7-Oct-2018 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN75172DWR SOIC DW 20 2000 330.0 24.4 10.8 13.3 2.7 12.0 24.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 7-Oct-2018 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN75172DWR SOIC DW 20 2000 367.0 367.0 45.0 PackMaterials-Page2

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PACKAGE OUTLINE DW0020A SOIC - 2.65 mm max height SCALE 1.200 SOIC C 10.63 SEATING PLANE TYP 9.97 A PIN 1 ID 0.1 C AREA 18X 1.27 20 1 13.0 2X 12.6 11.43 NOTE 3 10 11 0.51 20X 7.6 0.31 2.65 MAX B 7.4 0.25 C A B NOTE 4 0.33 TYP 0.10 0.25 SEE DETAIL A GAGE PLANE 0.3 1.27 0 - 8 0.1 0.40 DETAIL A TYPICAL 4220724/A 05/2016 NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.43 mm per side. 5. Reference JEDEC registration MS-013. www.ti.com

EXAMPLE BOARD LAYOUT DW0020A SOIC - 2.65 mm max height SOIC 20X (2) SYMM 1 20 20X (0.6) 18X (1.27) SYMM (R0.05) TYP 10 11 (9.3) LAND PATTERN EXAMPLE SCALE:6X SOOPLEDNEINRG MASK METAL MSOELTDAEL RU NMDAESRK SOOPLEDNEINRG MASK 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4220724/A 05/2016 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DW0020A SOIC - 2.65 mm max height SOIC 20X (2) SYMM 1 20 20X (0.6) 18X (1.27) SYMM 10 11 (9.3) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:6X 4220724/A 05/2016 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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