SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 (cid:1) High Speed SN55107A... J OR W PACKAGE (cid:1) SN75107A, SN75107B, SN75108A...D OR N PACKAGE Standard Supply Voltage (TOP VIEW) (cid:1) Dual Channels (cid:1) High Common-Mode Rejection Ratio 1A 1 14 VCC+ (cid:1) 1B 2 13 VCC– High Input Impedance NC 3 12 2A (cid:1) High Input Sensitivity 1Y 4 11 2B (cid:1) Differential Common-Mode Input Voltage 1G 5 10 NC Range of ±3 V S 6 9 2Y (cid:1) Strobe Inputs for Receiver Selection GND 7 8 2G (cid:1) Gate Inputs for Logic Versatility (cid:1) TTL Drive Capability (cid:1) High dc Noise Margin SN55107A...FK PACKAGE (cid:1) (TOP VIEW) Totem-Pole Outputs (cid:1) B Version Has Diode-Protected Input for C +C – B A C CC Power-Off Condition 1 1 NVV description 3 2 1 20 19 NC 4 18 2A NC 5 17 NC These circuits are TTL-compatible, high-speed line receivers. Each is a monolithic dual circuit 1Y 6 16 2B featuring two independent channels. They are NC 7 15 NC designed for general use, as well as for such 1G 8 14 NC 9 10 11 12 13 specific applications as data comparators and balanced, unbalanced, and party-line transmis- S D CG Y N N2 2 sion systems. These devices are unilaterally G interchangeable with and are replacements for NC – No internal connection the SN55107, SN75107, and SN75108, but offer diode-clamped strobe inputs to simplify circuit design. The essential difference between the A and B versions can be seen in the schematics. Input-protection diodes are in series with the collectors of the differential-input transistors of the B versions. These diodes are useful in certain party-line systems that have multiple V power supplies and can be operated with some of the V CC+ CC+ supplies turned off. In such a system, if a supply is turned off and allowed to go to ground, the equivalent input circuit connected to that supply would be as follows: Input Input A Version B Version This would be a problem in specific systems that might have the transmission lines biased to some potential greater than 1.4 V. The SN55107A is characterized for operation over the full military temperature range of –55°C to 125°C. The SN75107A, SN75107B, and SN75108A are characterized for operation from 0°C to 70°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright  1998, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 FUNCTION TABLE DIFFERENTIAL INPUTS STROBES OUTPUT A – B G S Y VID ≥ 25 mV X X H X L H –25 mV < VID < 25 mV L X H H H Indeterminate X L H VID ≤ –25 mV L X H H H L H = high level, L = low level, X = irrelevant logic symbol† SN55107A, SN75107A, and SN75107B SN75108A 6 6 S EN S EN 1 (cid:1) 1A 1 (cid:1) 4 1A 4 2 1Y 2 1Y 1B 1B 5 5 1G 1G 12 12 2A 2A 11 9 11 9 2B 2Y 2B 2Y 8 8 2G 2G †These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, N, and W packages. logic diagram (positive logic) 6 S 1 1A 2 4 1B 1Y 5 1G 8 2G 12 9 2A 2Y 11 2B 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 schematic (each receiver) See 14 Note 2 VCC + 400 W 4 kW 1.6 kW 1 kW 120 W 1 kW See Note 2 4.8 kW 800 W 4, 9 Output Y 1, 12 A 760 W R† 7 Inputs GND B 2, 11 5, 8 Strobe G 4.25 kW 3 kW 3 kW Common to Both Receivers 13 6 VCC – Strobe S To Other Receiver Pin numbers shown are for D, J, N, and W packages. †R = 1 kW for ’107A and SN75107B, 750 W for SN75108A. NOTES: 1. Resistor values shown are nominal. 2. Components shown with dashed lines in the output circuitry are applicable to the ’107A and SN75107B only. Diodes in series with the collectors of the differential input transistors are short circuited on ’107A and SN75108A. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage, V (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V CC+ Supply voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –7 V CC– Differential input voltage, V (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6 V ID Common-mode input voltage, V (see Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5 V IC Strobe input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C stg Case temperature for 60 seconds, T : FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C c Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package . . . . . . . . . . . . . . . . . . . . . 300°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, or W package . . . . . . . . . . . . . 260°C †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 3. All voltage values, except differential voltages, are with respect to network ground terminal. 4. Differential voltage values are at the noninverting (A) terminal with respect to the inverting (B) terminal. 5. Common-mode input voltage is the average of the voltages at the A and B inputs. DISSIPATION RATING TABLE TA ≤ 25°C DERATING FACTOR TA = 70°C TA = 125°C PACKAGE POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING D 950 mW 7.6 mW/°C 608 mW — FK 1375 mW 11.0 mW/°C 880 mW 275 mW J 1375 mW 11.0 mW/°C 880 mW 275 mW N 1150 mW 9.2 mW/°C 736 mW — W 1000 mW 8.0 mW/°C 640 mW 200 mW recommended operating conditions (see Note 6) SN75107A,, SN75107B,, SSNN5555110077AA SN75108A UNIT MIN NOM MAX MIN NOM MAX Supply voltage, VCC+ 4.5 5 5.5 4.75 5 5.25 V Supply voltage, VCC– –4.5 –5 –5.5 –4.75 –5 –5.25 V High-level input voltage between differential inputs, VIDH (see Note 7) 0.025 5 0.025 5 V Low-level input voltage between differential inputs, VIDL (see Note 7) –5‡ –0.025 –5‡ –0.025 V Common-mode input voltage, VIC (see Notes 7 and 8) –3‡ 3 –3‡ 3 V Input voltage, any differential input to GND (see Note 8) –5‡ 3 –5‡ 3 V High-level input voltage at strobe inputs, VIH(S) 2 5.5 2 5.5 V Low-level input voltage at strobe inputs, VIL(S) 0 0.8 0 0.8 V Low-level output current, IOL –16 –16 mA Operating free-air temperature, TA –55 125 0 70 °C ‡The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for input voltage levels only. NOTES: 6. When using only one channel of the line receiver, the strobe input (G) of the unused channel should be grounded and at least one of the differential inputs of the unused receiver should be terminated at some voltage between –3 V and 3 V. 7. The recommended combinations of input voltages fall within the shaded area in Figure 1. 8. The common-mode voltage may be as low as –4 V provided that the more positive of the two inputs is not more negative than –3 V. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 RECOMMENDED COMBINATIONS OF INPUT VOLTAGES 3 2 – V 1 e g a olt 0 V D N –1 G o A t –2 ut p n I –3 –4 –5 –5 –4 –3 –2 –1 0 1 2 3 Input B to GND Voltage – V NOTE A: Recommended input-voltage combinations are in the shaded area. Figure 1. Recommended Combinations of Input Voltages POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 electrical characteristics over recommended free-air temperature range (unless otherwise noted) ’107A, SN75107B SN75108A PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS†† UUNNIITT MIN TYP‡ MAX MIN TYP‡ MAX VCC± = MIN, VIL(S) = 0.8 V, VVOOHH HHiigghh-lleevveell oouuttppuutt vvoollttaaggee VVIIDDHH = 2255 mmVV, IIOOHH = –440000 mm AA, 22.44 VV VIC = –3 V to 3 V VCC± = MIN, VIH(S) = 2 V, VVOOLL LLooww-lleevveell oouuttppuutt vvoollttaaggee VVIIDDLL = –2255 mmVV, IIOOLL = 1166 mmAA, 00.44 00.44 VV VIC = –3 V to 3 V A VID = 5 V 30 75 30 75 IIIIHH HHiigghh-lleevveell iinnppuutt ccuurrrreenntt VVCCCC±± == MMAAXX mm AA B VID = –5 V 30 75 30 75 Low-level input current A VID = –5 V –10 –10 IIIILL VVCCCC±± == MMAAXX mm AA B VID = 5 V –10 –10 Higgh-level input current into VCC± = MAX, VIH(G) = 2.4 V 40 40 m A IIIIHH 1G or 2G VCC± = MAX, VIH(G) = MAX VCC+ 1 1 mA Low-level input current IIIILL VVCCCC±± == MMAAXX, VVIILL((GG)) == 00.44 VV –11.66 –11.66 mmAA into 1G or 2G VCC± = MAX, VIH(S) = 2.4 V 80 80 m A IIIIHH HHiigghh-lleevveell iinnppuutt ccuurrrreenntt iinnttoo SS VCC± = MAX, VIH(S) = MAX VCC+ 2 2 mA IIL Low-level input current into S VCC± = MAX, VIL(S)= 0.4 V –3.2 –3.2 mA IOH High-level output current VCC± = MIN, VOH = MAX VCC+ 250 m A IOS Short-circuit output current§ VCC± = MAX –18 –70 mA IICCCCHH+ Supplyy current from VCCCC++,, VVCCCC±± == MMAAXX, TTAA == 2255°°CC 1188 3300 1188 3300 mmAA outputs high ICCH– Souutpppultys chuigrrhent from VCC–, VCC± = MAX, TA = 25°C –8.4 –15 –8.4 –15 mA †For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ‡All typical values are at VCC+ = 5 V, VCC– = –5 V, TA = 25°C. §Not more than one output should be shorted at a time. switching characteristics, VCC± = ±5 V, TA = 25°C, RL = 390 W (see Figure 2) TEST ’107A, SN75107B SN75108A PPAARRAAMMEETTEERR UUNNIITT CONDITIONS MIN TYP MAX MIN TYP MAX Propaggation delayy time,, low- to higgh-level output,, CL = 50 pF 17 25 ttPPLLHH((DD)) nnss from differential inputs A and B CL = 15 pF 19 25 Propaggation delayy time,, higgh- to low-level output,, CL = 50 pF 17 25 ttPPHHLL((DD)) nnss from differential inputs A and B CL = 15 pF 19 25 Propaggation delayy time,, low- to higgh-level output,, CL = 50 pF 10 15 ttPPLLHH((SS)) nnss from strobe input G or S CL = 15 pF 13 20 Propaggation delayy time, higgh- to low-level output, CL = 50 pF 8 15 ttPPHHLL((SS)) from strobe input G or S CL = 15 pF 13 20 nnss 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 PARAMETER MEASUREMENT INFORMATION Output Differential VCC– ‘107A, SN75107B Input 1A 1Y 1B CL 50 pF Pulse 50 W (see Note C) Generator Vref (see Note A) 100 mV 2A (see Note D) 2B 2Y 390 W 1G S 2G VCC+ 390 W Output SN75108A, CL 15 pF (see Note C) 50 W Strobe Input (see Note B) Pulse Generator (see Note A) TEST CIRCUIT 200 mV Input A 100 mV 100 mV 0 V tp1 tp2 3 V Strobe Input 1.5 V 1.5 V G or S tPLH(D) tPHL(D) tPLH(S) tPHL(S) VOH 1.5 V 1.5 V 1.5 V 1.5 V Output Y VOL VOLTAGE WAVEFORMS NOTES: A. The pulse generators have the following characteristics: ZO = 50 W , tr = 10 ± 5 ns, tf = 10 ± 5 ns, tpd1 = 500 ns, PRR ≤ 1 MHz, tpd2 = 1 m s, PRR ≤ 500 kHz. B. Strobe input pulse is applied to Strobe 1G when inputs 1A-1B are being tested, to Strobe S when inputs 1A-1B or 2A-2B are being tested, and to Strobe 2G when inputs 2A-2B are being tested. C. CL includes probe and jig capacitance. D. All diodes are 1N916. Figure 2. Test Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 TYPICAL CHARACTERISTICS† OUTPUT VOLTAGE HIGH-LEVEL INPUT CURRENT (1A OR 2A) vs vs DIFFERENTIAL INPUT VOLTAGE FREE-AIR TEMPERATURE 6 100 SN75108A VCC± = ±5 V A 5 m– 80 V Inverting Noninverting nt age – 4 Inputs Inputs Curre 60 olt ’107A, ut V p put 3 SN75107B el In Out Lev 40 ÁÁ– Á2 h- O O g ÁÁVV Á Hi 1 VRCL C= ±4 0=0 ± W5 V IIH – IIH 20 TA = 25°C 0 0 –40 –30 –20 –10 0 10 20 30 40 –75 –50 –25 0 25 50 75 100 125 VID – Differential Input Voltage – mV TA – Free-Air Temperature – °C Figure 3 Figure 4 PROPAGATION DELAY TIME SUPPPLY CURRENT (OUTPUTS HIGH) (DIFFERENTIAL INPUTS) vs vs FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE 30 40 VCC± = ±5 V VCC± = ±5 V 25 35 RL = 390 W s n CL = 50 pF A – 30 m e ent – 20 ICC+ y Tim 25 r a Cur Del tPLH(D) y 15 n 20 – Suppl 10 pagatio 15 tPHL(D) | o CCH ICC– Pr– 10 | I 5 pd t 5 0 0 –75 –50 –25 0 25 50 75 100 125 –75 –50 –25 0 25 50 75 100 125 TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C Figure 5 Figure 6 †Values below 0°C and above 70°C apply to SN55107A only. 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 TYPICAL CHARACTERISTICS† PROPAGATION DELAY TIME (LOW-TO-HIGH LEVEL) PROPAGATION DELAY TIME (LOW-TO-HIGH LEVEL) (DIFFERENTIAL INPUTS) (DIFFERENTIAL INPUTS) vs vs FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE 120 40 VCC± = ±5 V VCC± = ±5 V – ns 100 CL = 15 pF – ns 35 CL = 15 pF e e Tim RL = 3900 W Tim 30 ay 80 ay RL = 390 W el el 25 D D n n o o ati 60 ati 20 ag RL = 1950 W ag p p o o 15 D) – PrD) 40 D) – PrD) 10 RL = 195R0 L W = 3900 W LH(LH( 20 RL = 390 W LH(LH( tPtP tPtP 5 0 0 –75 –50 –25 0 25 50 75 100 125 –75 –50 –25 0 25 50 75 100 125 TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C Figure 7 Figure 8 SN75108A SN75108A PROPAGATION DELAY TIME (STROBE INPUTS) PROPAGATION DELAY TIME (STROBE INPUTS) vs vs FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE 40 40 VCC± = ±5 V VCC± = ±5 V 35 RL = 390 W 35 RL = 390 W s me – n 30 CL = 50 pF e – ns 30 CL = 15 pF m ay Ti 25 y Ti 25 Del ela on 20 n D 20 gati atio tPLH(S) opa 15 tPHL(S) pag 15 r o P r – 10 – P 10 d tp tPLH(S) pd tPHL(S) 5 t 5 0 0 –75 –50 –25 0 25 50 75 100 125 –75 –50 –25 0 25 50 75 100 125 TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C Figure 9 Figure 10 †Values below 0°C and above 70°C apply to SN55107A only. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 APPLICATION INFORMATION basic balanced-line transmission system The ’107A, SN75107B, and SN75108A dual line devices are designed specifically for use in high-speed data-transmission systems that utilize balanced terminated transmission lines, such as twisted-pair lines. The system operates in the balanced mode, so noise induced on one line is also induced on the other. The noise appears common mode at the receiver input terminals, where it is rejected. The ground connection between the line driver and receiver is not part of the signal circuit; therefore, system performance is not affected by circulating ground currents. The unique driver-output circuit allows terminated transmission lines to be driven at normal line impedances. High-speed system operation is ensured because line reflections are virtually eliminated when terminated lines are used. Crosstalk is minimized by low signal amplitudes and low line impedances. The typical data delay in a system is approximately 30 + 1.3 L ns, where L is the distance in feet separating the driver and receiver. This delay includes one gate delay in both the driver and receiver. Data is impressed on the balanced-line system by unbalancing the line voltages with the driver output current. The driven line is selected by appropriate driver-input logic levels. The voltage difference is approximately: V ≈ 1/2I • R DIFF O(on) T High series line resistance causes degradation of the signal. However, the receivers detect signals as low as 25 mV. For normal line resistances, data can be recovered from lines of several thousand feet in length. Line-termination resistors (R ) are required only at the extreme ends of the line. For short lines, termination T resistors at the receiver only may be adequate. The signal amplitude is then approximately: V ≈ I • R DIFF O(on) T RT RT RT RT A Data Input Transmission Line Having B Characteristic Impedance ZO Y RT = ZO/2 C Inhibit D L Strobes Driver SN55110A, SN75110A, Receiver SN75112 ‘107A, SN75107B, SN75108A Figure 11. Typical Differential Data Line data-bus or party-line system The strobe feature of the receivers and the inhibit feature of the drivers allow these dual line devices to be used in data-bus or party-line systems. In these applications, several drivers and receivers can share a common transmission line. An enabled driver transmits data to all enabled receivers on the line while other drivers and receivers are disabled. Data is time multiplexed on the transmission line. The device specifications allow widely varying thermal and electrical environments at the various driver and receiver locations. The data-bus system offers maximum performance at minimum cost. 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 APPLICATION INFORMATION Drivers SN55110A, SN75110A, SN75112 Receiver 1 Receiver 2 Receiver 4 Y Y Y RT Strobes Strobes Strobes RT RT RT Location 2 Driver 1 Driver 3 Driver 4 A Receivers Data A A ‘107A, SN75107B, Input B B SN75108A B C C C Inhibit D D D Location 1 Location 3 Location 4 Figure 12. Typical Differential Party Line unbalanced or single-line systems These dual line circuits also can be used in unbalanced or single-line systems. Although these systems do not offer the same performance as balanced systems for long lines, they are adequate for very short lines where environmental noise is not severe. The receiver threshold level is established by applying a dc reference voltage to one receiver input terminal. The signal from the transmission line is applied to the remaining input. The reference voltage should be optimized so that signal swing is symmetrical about it for maximum noise margin. The reference voltage should be in the range of –3 V to 3 V. It can be provided by a voltage supply or by a voltage divider from an available supply voltage. A single-ended output from a driver can be used in single-line systems. Coaxial or shielded line is preferred for minimum noise and crosstalk problems. For large signal swings, the high output current (typically 27 mA) of the SN75112 is recommended. Drivers can be paralleled for higher current. When using only one channel of the line drivers, the other channel should be inhibited and/or have its outputs grounded. SN55110A, SN75110A, SN75112 R ‘107A, SN75107B, SN75108A A Output Input Input B Vref Output C Inhibit Strobes D VO = –IO • R Figure 13. Single-Ended Operation POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 APPLICATION INFORMATION SN75108A dot-AND output connections The SN75108A line receiver features an open-collector-output circuit that can be connected in the dot-AND logic configuration with other similar open-collector outputs. This allows a level of logic to be implemented without additional logic delay. SN75108A SN75108A Output SN5401/SN7401 or Dot-AND Equivalent Connection Figure 14. Dot-AND Connection increasing common-mode input voltage range of receiver The common-mode voltage range (CMVR) is defined as the range of voltage applied simultaneously to both input terminals that, if exceeded, does not allow normal operation of the receiver. The recommended operating CMVR is ±3 V, making it useful in all but the noisiest environments. In extremely noisy environments, common-mode voltage can easily reach ±10 V to ±15 V if some precautions are not taken to reduce ground and power supply noise, as well as crosstalk problems. When the receiver must operate in such conditions, input attenuators should be used to decrease the system common-mode noise to a tolerable level at the receiver inputs. Differential noise is also reduced by the same ratio. These attenuators were omitted intentionally from the receiver input terminals so the designer can select resistors that are compatible with his particular application or environment. Furthermore, the use of attenuators adversely affects the input sensitivity, the propagation delay time, the power dissipation, and in some cases (depending on the selected resistor values) the input impedance; thereby reducing the versatility of the receiver. The ability of the receiver to operate with approximately ±15 V common-mode voltage at the inputs has been checked using the circuit shown in Figure 15. Resistors R1 and R2 provide a voltage-divider network. Dividers with three different values presenting a 5-to-1 attenuation were used to operate the differential inputs at approximately ±3V common-mode voltage. Careful matching of the two attenuators is needed to balance the overdrive at the input stage. The resistors used are shown in Table 1. Table 1 Attenuator 1: R1 = 2 kW , R2 = 0.5 kW Attenuator 2: R1 = 6 kW , R2 = 1.5 kW Attenuator 3: R1 = 12 kW , R2 = 3 kW 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 APPLICATION INFORMATION increasing common-mode input voltage range of receiver (continued) Table 2 shows some of the typical switching results obtained under such conditions. Table 2. Typical Propagation Delays for Receiver With Attenuator Test Circuit Shown in Figure 15 INPUT TYPICAL DEVICE PARAMETERS ATTENUATOR (NS) 1 20 ttPLH 2 32 ’107A 3 42 SN75107B 1 22 ttPHL 2 31 3 33 1 36 ttPLH 2 47 3 57 SSNN7755110088AA 1 29 ttPHL 2 38 3 41 5 V 16 V One Attenuator Receiver on Each Input RL = 390 W or – 14 V R1 14 V R2 – 16 V 5 V 15 V or –15 V R1 R2 Figure 15. Common-Mode Circuit for Testing Input Attenuators With Results Shown in Table 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 Two methods of terminating a transmission line to reduce reflections are shown in Figure 16. The first method uses the resistors as the attenuation network and line termination. The second method uses two additional resistors for the line terminations. APPLICATION INFORMATION R1 (see Note A) R1 Method 1 Method 2 R2 R3 R3 R3 R2 (see Note A) R2 R3 R2 R3 R3 (see Note A) R1 R1 R3 = R1 + R2 = ZO/2 R1 + R2 > ZO R3 = ZO/2 NOTE A: To minimize the loading, the values of R1 and R2 should be fairly large. Examples of possible values are shown in Table 1. Figure 16. Termination Techniques For party-line operation, method 2 should be used as shown in Figure 17. Attenuation Network Z Z Z Z (cid:1) O (cid:1) O (cid:1) O (cid:1) O R3 R3 R3 R3 2 2 2 2 Figure 17. Party-Line Termination Technique 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 APPLICATION INFORMATION furnace control using the SN75108A The furnace control circuit in Figure 18 is an example of the possible use of the SN75108A series in areas other than what would normally be considered electronic systems. A description of the operation of this control follows. When the room temperature is below the desired level, the resistance of the room temperature sensor is high and channel 1 noninverting input is below (less positive than) the reference level set on the input differential amplifier. This situation causes a low output, operating the heat-on relay and turning on the heat. The channel2 noninverting input is below the reference level when the bonnet temperature of the furnace reaches the desired level. This causes a low output, thus operating the blower relay. Normally the furnace is shut down when the room temperature reaches the desired level and the channel 1 output goes high, turning the heat off. The blower remains on as long as the bonnet temperature is high, even after the heat-on relay is off. There is also a safety switch in the bonnet that shuts down the furnace if the temperature there exceeds desired limits. The types of temperature-sensing devices and bias-resistor values used are determined by the particular operating conditions encountered. 5 V Bonnet Room Bonnet Upper Temp. + T Temp. – T Limit Switch Sensor Sensor Channel 1 1 Y A To Heat-on Relay Return Room B Temp. Setting 2 Y 2A To Blower Relay Return 2B Blower on Control Channel 2 Figure 18. Furnace Control Using SN75108A POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 APPLICATION INFORMATION repeaters for long lines In some cases, the driven line may be so long that the noise level on the line reaches the common-mode limits or the attenuation becomes too large and results in poor reception. In such a case, a simple application of a receiver and a driver as repeaters [shown in Figure 19(a)] restores the signal level and allows an adequate signal level at the receiving end. If multichannel operation is desired, then proper gating for each channel must be sent through the repeater station using another repeater set as in Figure 19(b). Repeaters Data In Driver Receiver Driver Receiver Data Out P P (a) SINGLE-CHANNEL LINE Data In Driver Receiver Driver Receiver Data Out P P Clock In Strobe Receiver Driver Receiver Ckt P P (b) MULTICHANNEL LINE WIDTH WITH STROBE Figure 19. Receiver-Driver Repeaters receiver as dual differential comparator There are many applications for differential comparators, such as voltage comparison, threshold detection, controlled Schmitt triggering, and pulse-width control. As a differential comparator, a ’107A or SN75108A can be connected to compare the noninverting input terminal with the inverting input as shown in Figure 20. The output is high or low, resulting from the A input being greater or less than the reference. The strobe inputs allow additional control over the circuit so that either output, or both, can be inhibited. Strobe 1 1A Reference 1 Output 1 1B Strobe 1, 2 2A Output 2 Reference 2 2B Strobe 2 Figure 20. SN75107A Series Receiver as a Dual Differential Comparator 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 APPLICATION INFORMATION window detector The window detector circuit in Figure 21 has a large number of applications in test equipment and in determining upper limits, lower limits, or both at the same time, such as detecting whether a voltage or signal has exceeded its window limits. Illumination of the upper-limit (lower-limit) indicator shows that the input voltage is above (below) the selected upper (lower) limit. A mode selector is provided for selecting the desired test. For window detecting, the upper-and-lower-limits test position is used. 5 V –5 V 5 V 1 kW 1 kW 500 W Upper-Limit Set Indicator Upper 5 kW Limit 500 W Input From Lower-Limit Test Point Indicator Set Lower 1 kW 4 3 4.7 kW Limit 2 4.7 kW 1 4.7 kW Mode Selector MODE SELECTOR LEGEND POSITION CONDITION 1 Off 2 Test for Upper Limit 3 Test for Lower Limit 4 Test for Upper and Lower Limits Figure 21. Window Detector Using SN75108A POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS SLLS069D – JANUARY 1977 – REVISED APRIL 1998 APPLICATION INFORMATION temperature controller with zero-voltage switching The circuit in Figure 22 switches an electric-resistive heater on or off by providing negative-going pulses to the gate of a triac during the time interval when the line voltage is passing through zero. The pulse generator is the 2N5447 and four diodes. This portion of the circuit provides negative-going pulses during the short time (approximately 100 m s) when the line voltage is near zero. These pulses are fed to the inverting input of one channel of the SN75108A. If the room temperature is below the desired level, the resistance of the thermistor is high and the noninverting input of channel 2 is above the reference level determined by the thermostat setting. This provides a high-level output from channel 2. This output is ANDed with the positive-going pulses from the output of channel 1, which are reinverted in the 2N5449. 10-V + 5-V Zener 250 m F Zener 250 m F + VCC + VCC – 2N5447 1A 1B Channel 1 Channel 2 120 V to 2A 220 V, 60 Hz 2B 2N5449 – T SN75108A GND Thermostat Setting Heater Load Figure 22. Zero-Voltage Switching Temperature Controller 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 5962-9690301Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 9690301Q2A SNJ55 107AFK 5962-9690301QCA ACTIVE CDIP J 14 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9690301QC A SNJ55107AJ 5962-9690301QDA ACTIVE CFP W 14 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9690301QD A SNJ55107AW JM38510/10401BCA ACTIVE CDIP J 14 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510 /10401BCA M38510/10401BCA ACTIVE CDIP J 14 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510 /10401BCA SN55107AJ ACTIVE CDIP J 14 1 TBD Call TI N / A for Pkg Type -55 to 125 SN55107AJ SN75107AD ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 SN75107A & no Sb/Br) SN75107ADR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 SN75107A & no Sb/Br) SN75107AN ACTIVE PDIP N 14 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 SN75107AN & no Sb/Br) SN75107ANE4 ACTIVE PDIP N 14 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 SN75107AN & no Sb/Br) SN75107ANSR ACTIVE SO NS 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 SN75107A & no Sb/Br) SN75107BD ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 SN75107B & no Sb/Br) SN75107BDR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 SN75107B & no Sb/Br) SN75107BDRE4 ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 SN75107B & no Sb/Br) SN75107BN ACTIVE PDIP N 14 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 SN75107BN & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN75107BNSR ACTIVE SO NS 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 SN75107B & no Sb/Br) SN75108AD ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 SN75108A & no Sb/Br) SN75108ADR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 SN75108A & no Sb/Br) SNJ55107AFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 9690301Q2A SNJ55 107AFK SNJ55107AJ ACTIVE CDIP J 14 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9690301QC A SNJ55107AJ SNJ55107AW ACTIVE CFP W 14 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9690301QD A SNJ55107AW (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN55107A, SN75107A : •Catalog: SN75107A •Military: SN55107A NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Military - QML certified for Military and Defense Applications Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 19-Dec-2015 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN75107ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN75107ANSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 SN75107BDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN75107BNSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 SN75108ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 19-Dec-2015 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN75107ADR SOIC D 14 2500 367.0 367.0 38.0 SN75107ANSR SO NS 14 2000 367.0 367.0 38.0 SN75107BDR SOIC D 14 2500 367.0 367.0 38.0 SN75107BNSR SO NS 14 2000 367.0 367.0 38.0 SN75108ADR SOIC D 14 2500 367.0 367.0 38.0 PackMaterials-Page2

None

None

None

None

None

PACKAGE OUTLINE J0014A CDIP - 5.08 mm max height SCALE 0.900 CERAMIC DUAL IN LINE PACKAGE PIN 1 ID A 4X .005 MIN (OPTIONAL) [0.13] .015-.060 TYP [0.38-1.52] 1 14 12X .100 [2.54] 14X .014-.026 14X .045-.065 [0.36-0.66] [1.15-1.65] .010 [0.25] C A B .754-.785 [19.15-19.94] 7 8 B .245-.283 .2 MAX TYP .13 MIN TYP [6.22-7.19] [5.08] [3.3] SEATING PLANE C .308-.314 [7.83-7.97] AT GAGE PLANE .015 GAGE PLANE [0.38] 0 -15 14X .008-.014 TYP [0.2-0.36] 4214771/A 05/2017 NOTES: 1. All controlling linear dimensions are in inches. Dimensions in brackets are in millimeters. Any dimension in brackets or parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This package is hermitically sealed with a ceramic lid using glass frit. 4. Index point is provided on cap for terminal identification only and on press ceramic glass frit seal only. 5. Falls within MIL-STD-1835 and GDIP1-T14. www.ti.com

EXAMPLE BOARD LAYOUT J0014A CDIP - 5.08 mm max height CERAMIC DUAL IN LINE PACKAGE (.300 ) TYP [7.62] SEE DETAIL B SEE DETAIL A 1 14 12X (.100 ) [2.54] SYMM 14X ( .039) [1] 7 8 SYMM LAND PATTERN EXAMPLE NON-SOLDER MASK DEFINED SCALE: 5X .002 MAX (.063) [0.05] [1.6] METAL ALL AROUND ( .063) SOLDER MASK [1.6] OPENING METAL .002 MAX SOLDER MASK (R.002 ) TYP [0.05] OPENING [0.05] ALL AROUND DETAIL A DETAIL B SCALE: 15X 13X, SCALE: 15X 4214771/A 05/2017 www.ti.com

None

None

IMPORTANTNOTICEANDDISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated