SN54LVTH162245,, SN74LVTH162245 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS260Q–JUNE1993–REVISEDNOVEMBER2006 FEATURES SN54LVTH162245...WD PACKAGE • MembersoftheTexasInstrumentsWidebus™ SN74LVTH162245...DGG OR DL PACKAGE Family (TOP VIEW) • A-PortOutputsHaveEquivalent22-W Series Resistors,SoNoExternalResistorsAre 1DIR 1 48 1OE Required 1B1 2 47 1A1 • SupportMixed-ModeSignalOperation(5-V 1B2 3 46 1A2 GND 4 45 GND InputandOutputVoltagesWith3.3-VV ) CC 1B3 5 44 1A3 • SupportUnregulatedBatteryOperationDown 1B4 6 43 1A4 to2.7V V 7 42 V CC CC • TypicalVOLP(OutputGroundBounce)<0.8V 1B5 8 41 1A5 atV =3.3V,T =25(cid:176) C CC A 1B6 9 40 1A6 • I andPower-Up3-StateSupportHot GND 10 39 GND off Insertion 1B7 11 38 1A7 • BusHoldonDataInputsEliminatestheNeed 1B8 12 37 1A8 forExternalPullup/PulldownResistors 2B1 13 36 2A1 • DistributedV andGNDPinsMinimize 2B2 14 35 2A2 CC High-SpeedSwitchingNoise GND 15 34 GND • Flow-ThroughArchitectureOptimizesPCB 2B3 16 33 2A3 2B4 17 32 2A4 Layout V 18 31 V • Latch-UpPerformanceExceeds500mAPer CC CC 2B5 19 30 2A5 JESD17 2B6 20 29 2A6 • ESDProtectionExceedsJESD22 GND 21 28 GND – 2000-VHuman-BodyModel(A114-A) 2B7 22 27 2A7 – 200-VMachineModel(A115-A) 2B8 23 26 2A8 – 1000-VCharged-DeviceModel(C101) 2DIR 24 25 2OE DESCRIPTION/ORDERING INFORMATION The 'LVTH162245 devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for low-voltage (3.3-V)V operation,butwiththecapabilitytoprovideaTTLinterfacetoa5-Vsystemenvironment. CC These devices can be used as two 8-bit transceivers or one 16-bit transceiver. The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses areeffectivelyisolated. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when theA-portoutputsareactivated.TheinputcircuitryonbothAandB ports is always active and must have a logic HIGHorLOWlevelappliedtopreventexcessI andI . CC CCZ Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistorswiththebus-holdcircuitryisnotrecommended. The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 22-W series resistors toreduceovershootandundershoot. Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. WidebusisatrademarkofTexasInstruments. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©1993–2006,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas On products compliant to MIL-PRF-38535, all parameters are Instruments standard warranty. Production processing does not testedunlessotherwisenoted.Onallotherproducts,production necessarilyincludetestingofallparameters. processingdoesnotnecessarilyincludetestingofallparameters.

SN54LVTH162245,, SN74LVTH162245 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS260Q–JUNE1993–REVISEDNOVEMBER2006 DESCRIPTION/ORDERING INFORMATION (CONTINUED) When V is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. CC However, to ensure the high-impedance state above 1.5 V, OE should be tied to V through a pullup resistor; CC theminimumvalueoftheresistorisdeterminedbythecurrent-sinkingcapabilityofthedriver. These devices are fully specified for hot-insertion applications using I and power-up 3-state. The I circuitry off off disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, whichpreventsdriverconflict. ORDERINGINFORMATION T PACKAGE(1) ORDERABLEPARTNUMBER TOP-SIDEMARKING A FBGA–GRD 74LVTH162245GRDR Reelof1000 LL2245 FBGA–ZRD(Pb-free) 74LVTH162245ZRDR SN74LVTH162245DL Tubeof25 SN74LVTH162245DLG4 SSOP–DL LVTH162245 SN74LVTH162245DLR Reelof1000 –40(cid:176) Cto85(cid:176) C 74LVTH162245DLRG4 SN74LVTH162245DGGR TSSOP–DGG Reelof2000 74LVTH162245DGGRG4 LVTH162245 74LVTH162245GRE4 VFBGA–GQL SN74LVTH162245KR Reelof1000 LL2245 VFBGA–ZQL(Pb-free) 74LVTH162245ZQLR –55(cid:176) Cto125(cid:176) C CFP–WD Tube SNJ54LVTH162245WD SNJ54LVTH162245WD (1) Packagedrawings,standardpackingquantities,thermaldata,symbolization,andPCBdesignguidelinesareavailableat www.ti.com/sc/package. GQL OR ZQL PACKAGE TERMINALASSIGNMENTS(1) (TOP VIEW) (56-BallGQL/ZQLPackage) 1 2 3 4 5 6 1 2 3 4 5 6 A A 1DIR NC NC NC NC 1OE B B 1B2 1B1 GND GND 1A1 1A2 C D C 1B4 1B3 V V 1A3 1A4 CC CC E D 1B6 1B5 GND GND 1A5 1A6 F E 1B8 1B7 1A7 1A8 G H F 2B1 2B2 2A2 2A1 J G 2B3 2B4 GND GND 2A4 2A3 K H 2B5 2B6 V V 2A6 2A5 CC CC J 2B7 2B8 GND GND 2A8 2A7 K 2DIR NC NC NC NC 2OE abc (1) NC–Nointernalconnection abc 2 SubmitDocumentationFeedback

SN54LVTH162245,, SN74LVTH162245 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS260Q–JUNE1993–REVISEDNOVEMBER2006 GRD OR ZRD PACKAGE TERMINALASSIGNMENTS(1) (TOP VIEW) (54-BallGRD/ZRDPackage) 1 2 3 4 5 6 1 2 3 4 5 6 A 1B1 NC 1DIR 1OE NC 1A1 A B 1B3 1B2 NC NC 1A2 1A3 B C 1B5 1B4 V V 1A4 1A5 CC CC C D 1B7 1B6 GND GND 1A6 1A7 E 2B1 1B8 GND GND 1A8 2A1 D F 2B3 2B2 GND GND 2A2 2A3 E G 2B5 2B4 V V 2A4 2A5 CC CC F H 2B7 2B6 NC NC 2A6 2A7 G J 2B8 NC 2DIR 2OE NC 2A8 H J (1) NC–Nointernalconnection FUNCTIONTABLE(1) (EACH8-BITSECTION) CONTROLINPUTS OUTPUTCIRCUITS OPERATION OE DIR APORT BPORT L L Enabled Hi-Z BdatatoAbus L H Hi-Z Enabled AdatatoBbus H X Hi-Z Hi-Z Isolation (1) InputcircuitsofthedataI/Osalwaysareactive. LOGICDIAGRAM(POSITIVELOGIC) 1 24 1DIR 2DIR 48 25 1OE 2OE 47 36 1A1 2A1 2 13 1B1 2B1 To Seven Other Channels To Seven Other Channels SubmitDocumentationFeedback 3

SN54LVTH162245,, SN74LVTH162245 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS260Q–JUNE1993–REVISEDNOVEMBER2006 Absolute Maximum Ratings(1) overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyvoltagerange –0.5 4.6 V CC V Inputvoltagerange(2) –0.5 7 V I V Voltagerangeappliedtoanyoutputinthehigh-impedanceorpower-offstate(2) –0.5 7 V O V Voltagerangeappliedtoanyoutputinthehighstate(2) –0.5 V +0.5 V O CC SN54LVTH162245(Bport) 96 I Currentintoanyoutputinthelowstate SN74LVTH162245(Bport) 128 mA O Aport 30 SN54LVTH162245(Bport) 48 I Currentintoanyoutputinthehighstate(3) SN74LVTH162245(Bport) 64 mA O Aport 30 I Inputclampcurrent V <0 –50 mA IK I I Outputclampcurrent V <0 –50 mA OK O DGGpackage 70 DLpackage 63 q Packagethermalimpedance(4) (cid:176) C/W JA GQL/ZQLpackage 42 GRD/ZRDpackage 36 T Storagetemperaturerange –65 150 (cid:176) C stg (1) Stressesbeyondthoselistedunder"absolutemaximumratings"maycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder"recommendedoperating conditions"isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Theinputandoutputnegative-voltageratingsmaybeexceedediftheinputandoutputclamp-currentratingsareobserved. (3) ThiscurrentflowsonlywhentheoutputisinthehighstateandV >V . O CC (4) ThepackagethermalimpedanceiscalculatedinaccordancewithJESD51-7. Recommended Operating Conditions(1) SN54LVTH162245 SN74LVTH162245 UNIT MIN MAX MIN MAX V Supplyvoltage 2.7 3.6 2.7 3.6 V CC V High-levelinputvoltage 2 2 V IH V Low-levelinputvoltage 0.8 0.8 V IL V Inputvoltage 5.5 5.5 V I Aport –12 –12 I High-leveloutputcurrent mA OH Bport –24 –32 Aport 12 12 I Low-leveloutputcurrent mA OL Bport 48 64 D t/D v Inputtransitionriseorfallrate Outputsenabled 10 10 ns/V D t/D V Power-upramprate 200 200 m s/V CC T Operatingfree-airtemperature –55 125 –40 85 (cid:176) C A (1) AllunusedcontrolinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.RefertotheTIapplicationreport, CC ImplicationsofSloworFloatingCMOSInputs,literaturenumberSCBA004. 4 SubmitDocumentationFeedback

SN54LVTH162245,, SN74LVTH162245 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS260Q–JUNE1993–REVISEDNOVEMBER2006 Electrical Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) SN54LVTH162245 SN74LVTH162245 PARAMETER TESTCONDITIONS UNIT MIN TYP(1) MAX MIN TYP(1) MAX V V =2.7V, I =–18mA –1.2 –1.2 V IK CC I V =2.7Vto3.6V, I =–100m A V –0.2 V –0.2 CC OH CC CC Aport V =3V, I =–12mA 2 2 CC OH V =2.7Vto3.6V, I =–100m A V –0.2 V –0.2 CC OH CC CC V V OH V =2.7V, I =–8mA 2.4 2.4 CC OH Bport I =–24mA 2 OH V =3V CC I =–32mA 2 OH V =2.7Vto3.6V, I =100m A 0.2 0.2 CC OL Aport V =3V, I =12mA 0.8 0.8 CC OL I =100m A 0.2 0.2 OL V =2.7V CC I =24mA 0.5 0.5 OL V V OL I =16mA 0.4 0.4 OL Bport I =32mA 0.5 0.5 OL V =3V CC I =48mA 0.55 OL I =64mA 0.55 OL Control VCC=3.6V, VI=VCCorGND – 1 – 1 inputs V =0or3.6V, V =5.5V 10 10 CC I I V =5.5V 20 20 m A I I AorB V =3.6V V =V 5 5 port(2) CC I CC V =0 –10 –10 I I V =0, V orV =0to4.5V – 100 m A off CC I O V =0.8V 75 75 I V =3V CC I AorB VI=2V –75 –75 m A I(hold) port 500 V =3.6V,(3) V =0to3.6V CC I –750 I VCC=0to1.5V,VO=0.5Vto3V, – 100(4) – 100 m A OZPU OE=don'tcare I VCC=1.5Vto0,VO=0.5Vto3V, – 100(4) – 100 m A OZPD OE=don'tcare Outputshigh 0.19 0.19 V =3.6V, CC I I =0, Outputslow 5 5 mA CC O V =V orGND I CC Outputsdisabled 0.19 0.19 V =3Vto3.6V, CC D I (5) OneinputatV –0.6V, 0.3 0.2 mA CC CC OtherinputsatV orGND CC C V =3Vor0 4 4 pF I I C V =3Vor0 10 10 pF io O (1) AlltypicalvaluesareatV =3.3V,T =25(cid:176) C. CC A (2) UnusedpinsatV orGND CC (3) Thisisthebus-holdmaximumdynamiccurrent.Itistheminimumoverdrivecurrentrequiredtoswitchtheinputfromonestateto another. (4) OnproductscomplianttoMIL-PRF-38535,thisparameterisnotproductiontested. (5) ThisistheincreaseinsupplycurrentforeachinputthatisatthespecifiedTTLvoltagelevel,ratherthanV orGND. CC SubmitDocumentationFeedback 5

SN54LVTH162245,, SN74LVTH162245 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS260Q–JUNE1993–REVISEDNOVEMBER2006 Switching Characteristics overrecommendedoperatingfree-airtemperaturerange,C =50pF(unlessotherwisenoted)(seeFigure1) L SN54LVTH162245 SN74LVTH162245 FROM TO V =3.3V V =3.3V PARAMETER (INPUT) (OUTPUT) C–C0.3V VCC=2.7V C–C0.3V VCC=2.7V UNIT MIN MAX MIN MAX MIN TYP(1) MAX MIN MAX t 1 3.5 4 1 2.3 3.3 3.7 PLH A B ns t 1 3.5 3.9 1 2.2 3.3 3.5 PHL t 1 4.3 5.3 1 2.8 4 4.6 PLH B A ns t 1 4.2 4.5 1 2.5 3.4 3.6 PHL t 1 4.8 5.9 1 2.8 4.6 5.4 PZH OE B ns t 1 4.8 5.5 1 3 4.6 5.2 PZL t 1 5.5 7.2 1 3.3 5.3 6.3 PZH OE A ns t 1 5.4 6.4 1 3.3 5.1 5.8 PZH t 1.5 5.5 5.8 1.5 3.8 5.2 5.5 PHZ OE B ns t 1.5 5.5 5.8 1.5 3.5 5.1 5.4 PLZ t 1.5 5.8 6.5 1.5 4 5.6 5.9 PHZ OE A ns t 1.2 6.3 6.3 1.5 3.8 5.5 5.5 PLZ t 0.5 sk(LH) ns t 0.5 sk(HL) (1) AlltypicalvaluesareatV =3.3V,T =25(cid:176) C. CC A 6 SubmitDocumentationFeedback

SN54LVTH162245,, SN74LVTH162245 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS260Q–JUNE1993–REVISEDNOVEMBER2006 PARAMETER MEASUREMENT INFORMATION 6 V From Output 500 W S1 Open TEST S1 Under Test GND tPLH/tPHL Open (seCeL N= o5t0e pAF) 500 W ttPPHLZZ//ttPPZZLH G6N VD 2.7 V LOAD CIRCUIT Timing Input 1.5 V 0 V tw tsu th 2.7 V 2.7 V Input 1.5 V 1.5 V Data Input 1.5 V 1.5 V 0 V 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PULSE DURATION SETUP AND HOLD TIMES 2.7 V 2.7 V Output Input 1.5 V 1.5 V 1.5 V 1.5 V Control 0 V 0 V tPLH tPHL tPZL tPLZ Output VOH Waveform 1 3 V Output 1.5 V 1.5 V S1 at 6 V 1.5 V VOL + 0.3 V VOL (see Note B) VOL tPHL tPLH tPZH tPHZ Output Output 1.5 V 1.5 V VOH WSa1v eafto GrmN D2 1.5 V VOH − 0.3 V VOH VOL (see Note B) ≈0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES ENABLE AND DISABLE TIMES INVERTING AND NONINVERTING OUTPUTS LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 W , tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. Figure1.LoadCircuitandVoltageWaveforms SubmitDocumentationFeedback 7

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 5962-9678001QXA ACTIVE CFP WD 48 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9678001QX A SNJ54LVTH16224 5WD 5962-9678001VXA ACTIVE CFP WD 48 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9678001VX A SNV54LVTH16224 5WD 74LVTH162245DGGRG4 ACTIVE TSSOP DGG 48 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVTH162245 & no Sb/Br) 74LVTH162245GRE4 ACTIVE TSSOP DGG 48 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVTH162245 & no Sb/Br) 74LVTH162245ZQLR LIFEBUY BGA ZQL 56 1000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 LL2245 MICROSTAR & no Sb/Br) JUNIOR 74LVTH162245ZRDR LIFEBUY BGA ZRD 54 1000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 LL2245 MICROSTAR & no Sb/Br) JUNIOR SN74LVTH162245DGGR ACTIVE TSSOP DGG 48 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVTH162245 & no Sb/Br) SN74LVTH162245DL ACTIVE SSOP DL 48 25 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVTH162245 & no Sb/Br) SN74LVTH162245DLG4 ACTIVE SSOP DL 48 25 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVTH162245 & no Sb/Br) SN74LVTH162245DLR ACTIVE SSOP DL 48 1000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVTH162245 & no Sb/Br) SNJ54LVTH162245WD ACTIVE CFP WD 48 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9678001QX A SNJ54LVTH16224 5WD (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54LVTH162245, SN54LVTH162245-SP, SN74LVTH162245 : •Catalog: SN74LVTH162245, SN54LVTH162245 •Enhanced Product: SN74LVTH162245-EP, SN74LVTH162245-EP •Military: SN54LVTH162245 •Space: SN54LVTH162245-SP NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 •Enhanced Product - Supports Defense, Aerospace and Medical Applications •Military - QML certified for Military and Defense Applications •Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 12-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) 74LVTH162245ZQLR BGAMI ZQL 56 1000 330.0 16.4 4.8 7.3 1.5 8.0 16.0 Q1 CROSTA RJUNI OR 74LVTH162245ZRDR BGAMI ZRD 54 1000 330.0 16.4 5.8 8.3 1.55 8.0 16.0 Q1 CROSTA RJUNI OR SN74LVTH162245DGGR TSSOP DGG 48 2000 330.0 24.4 8.6 13.0 1.8 12.0 24.0 Q1 SN74LVTH162245DLR SSOP DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 12-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) 74LVTH162245ZQLR BGAMICROSTAR ZQL 56 1000 350.0 350.0 43.0 JUNIOR 74LVTH162245ZRDR BGAMICROSTAR ZRD 54 1000 350.0 350.0 43.0 JUNIOR SN74LVTH162245DGGR TSSOP DGG 48 2000 367.0 367.0 45.0 SN74LVTH162245DLR SSOP DL 48 1000 367.0 367.0 55.0 PackMaterials-Page2

MECHANICAL DATA MCFP010B – JANUARY 1995 – REVISED NOVEMBER 1997 WD (R-GDFP-F**) CERAMIC DUAL FLATPACK 48 LEADS SHOWN 0.120 (3,05) 0.009 (0,23) 0.075 (1,91) 0.004 (0,10) 1.130 (28,70) 0.870 (22,10) 0.370 (9,40) 0.390 (9,91) 0.370 (9,40) 0.250 (6,35) 0.370 (9,40) 0.250 (6,35) 1 48 0.025 (0,635) A 0.014 (0,36) 0.008 (0,20) 24 25 NO. OF 48 56 LEADS** 0.640 0.740 A MAX (16,26) (18,80) 0.610 0.710 A MIN (15,49) (18,03) 4040176/D 10/97 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification only E. Falls within MIL STD 1835: GDFP1-F48 and JEDEC MO-146AA GDFP1-F56 and JEDEC MO-146AB • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

None

None

MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,50 0,08 M 0,17 48 25 6,20 8,30 6,00 7,90 0,15 NOM Gage Plane 0,25 1 24 0°–8° A 0,75 0,50 Seating Plane 0,15 1,20 MAX 0,10 0,05 PINS ** 48 56 64 DIM A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 4040078/F 12/97 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold protrusion not to exceed 0,15. D. Falls within JEDEC MO-153 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

PACKAGE OUTLINE ZQL0056A JRBGA - 1 mm max height SCALE 2.100 PLASTIC BALL GRID ARRAY 4.6 B A 4.4 BALL A1 CORNER 7.1 6.9 1 MAX C SEATING PLANE 0.35 0.15 TYP BALL TYP 0.1 C 3.25 TYP SYMM (0.625) TYP K J (0.575) TYP H G 5.85 F SYMM TYP E D C 0.45 56X NOTE 3 0.35 B 0.15 C B A 0.08 C A 0.65 TYP 1 2 3 4 5 6 BALL A1 CORNER 0.65 TYP 4219711/B 01/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. No metal in this area, indicates orientation. www.ti.com

EXAMPLE BOARD LAYOUT ZQL0056A JRBGA - 1 mm max height PLASTIC BALL GRID ARRAY (0.65) TYP 56X ( 0.33) 1 2 3 4 5 6 A (0.65) TYP B C D E SYMM F G H J K SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK 0.05 MAX 0.05 MIN METAL UNDER OPENING SOLDER MASK EXPOSED METAL ( 0.33) ( 0.33) METAL EXPOSED METAL SOLDER MASK OPENING NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS NOT TO SCALE 4219711/B 01/2017 NOTES: (continued) 4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For information, see Texas Instruments literature number SPRAA99 (www.ti.com/lit/spraa99). www.ti.com

EXAMPLE STENCIL DESIGN ZQL0056A JRBGA - 1 mm max height PLASTIC BALL GRID ARRAY 56X ( 0.33) (0.65) TYP 1 2 3 4 5 6 A (0.65) TYP B C D E SYMM F G H J K SYMM SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4219711/B 01/2017 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. www.ti.com

IMPORTANTNOTICEANDDISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated