SN54LVT16244B,, SN74LVT16244B 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS716E–MARCH2000–REVISEDDECEMBER2006 FEATURES SN54LVT16244B...WD PACKAGE • MemberoftheTexasInstrumentsWidebus™ SN74LVT16244B...DGG, DGV, OR DL PACKAGE Family (TOP VIEW) • State-of-the-ArtAdvancedBiCMOS Technology(ABT)Designfor3.3-VOperation 1OE 1 48 2OE andLowStatic-PowerDissipation 1Y1 2 47 1A1 • SupportMixed-ModeSignalOperation 1Y2 3 46 1A2 GND 4 45 GND (5-VInputandOutputVoltagesWith 1Y3 5 44 1A3 3.3-VV ) CC 1Y4 6 43 1A4 • SupportUnregulatedBatteryOperationDown VCC 7 42 VCC to2.7V 2Y1 8 41 2A1 • TypicalV (OutputGroundBounce)<0.8V OLP 2Y2 9 40 2A2 atV =3.3V,T =25(cid:176) C CC A GND 10 39 GND • I andPower-Up3-StateSupportHot 2Y3 11 38 2A3 off Insertion 2Y4 12 37 2A4 • Latch-UpPerformanceExceeds100mAPer 3Y1 13 36 3A1 JESD78,ClassII 3Y2 14 35 3A2 • ESDProtectionExceedsJESD22 GND 15 34 GND 3Y3 16 33 3A3 – 2000-VHuman-BodyModel(A114-A) 3Y4 17 32 3A4 – 200-VMachineModel(A115-A) VCC 18 31 VCC – 1000-VCharged-DeviceModel(C101) 4Y1 19 30 4A1 4Y2 20 29 4A2 GND 21 28 GND 4Y3 22 27 4A3 4Y4 23 26 4A4 4OE 24 25 3OE DESCRIPTION/ORDERING INFORMATION ORDERINGINFORMATION T PACKAGE(1) ORDERABLEPARTNUMBER TOP-SIDEMARKING A FBGA–GRD SN74LVT16244BGRDR Reelof1000 VD244B FBGA–ZRD(Pb-free) SN74LVT16244BZRDR SN74LVT16244BDL Tubeof25 SN74LVT16244BDLG4 SSOP–DL LVT16244B SN74LVT16244BDLR Reelof1000 74LVT16244BDLRG4 –40(cid:176) Cto85(cid:176) C SN74LVT16244BDGGR TSSOP–DGG Reelof2000 LVT16244B 74LVT16244BDGGRG4 SN74LVT16244BDGVR TVSOP–DGV Reelof2000 VD244B 74LVT16244BDGVRE4 VFBGA–GQL SN74LVT16244BGQLR Reelof1000 VD244B VFBGA–ZQL(Pb-free) SN74LVT16244BZQLR –55(cid:176) Cto125(cid:176) C CFP–WD Tube SNJ54LVT16244BWD SNJ54LVT16244BWD (1) Packagedrawings,standardpackingquantities,thermaldata,symbolization,andPCBdesignguidelinesareavailableat www.ti.com/sc/package. Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. WidebusisatrademarkofTexasInstruments. UNLESS OTHERWISE NOTED this document contains Copyright©2000–2006,TexasInstrumentsIncorporated PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

SN54LVT16244B,, SN74LVT16244B 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS716E–MARCH2000–REVISEDDECEMBER2006 DESCRIPTION/ORDERING INFORMATION (CONTINUED) The 'LVT16244B devices are 16-bit buffers and line drivers designed for low-voltage (3.3-V) V operation, but CC with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical active-lowoutput-enable(OE)inputs. When V is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. CC However, to ensure the high-impedance state above 1.5 V, OE should be tied to V through a pullup resistor; CC theminimumvalueoftheresistorisdeterminedbythecurrent-sinkingcapabilityofthedriver. These devices are fully specified for hot-insertion applications using I and power-up 3-state. The I circuitry off off disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, whichpreventsdriverconflict. GQL OR ZQL PACKAGE TERMINALASSIGNMENTS(1) (TOP VIEW) (56-BallGQL/ZQLPackage) 1 2 3 4 5 6 1 2 3 4 5 6 A A 1OE NC NC NC NC 2OE B B 1Y2 1Y1 GND GND 1A1 1A2 C D C 1Y4 1Y3 VCC VCC 1A3 1A4 E D 2Y2 2Y1 GND GND 2A1 2A2 F E 2Y4 2Y3 2A3 2A4 G F 3Y1 3Y2 3A2 3A1 H J G 3Y3 3Y4 GND GND 3A4 3A3 K H 4Y1 4Y2 V V 4A2 4A1 CC CC J 4Y3 4Y4 GND GND 4A4 4A3 xxxxxx K 4OE NC NC NC NC 3OE xxxxxx xxxxxx (1) NC–Nointernalconnection xxxxxx GRD OR ZRD PACKAGE TERMINALASSIGNMENTS(1) (TOP VIEW) (54-BallGRD/ZRDPackage) 1 2 3 4 5 6 1 2 3 4 5 6 A 1Y1 NC 1OE 2OE NC 1A1 A B 1Y3 1Y2 NC NC 1A2 1A3 B C 2Y1 1Y4 V V 1A4 2A1 CC CC C D 2Y3 2Y2 GND GND 2A2 2A3 D E 3Y1 2Y4 GND GND 2A4 3A1 F 3Y3 3Y2 GND GND 3A2 3A3 E G 4Y1 3Y4 V V 3A4 4A1 CC CC F H 4Y3 4Y2 NC NC 4A2 4A3 G J 4Y4 NC 4OE 3OE NC 4A4 H J (1) NC–Nointernalconnection 2 SubmitDocumentationFeedback

SN54LVT16244B,, SN74LVT16244B 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS716E–MARCH2000–REVISEDDECEMBER2006 FUNCTIONTABLE (EACH4-BITBUFFER) INPUTS OUTPUT OE A Y L H H L L L H X Z LOGICDIAGRAM(POSITIVELOGIC) 1 25 1OE 3OE 47 2 36 13 1A1 1Y1 3A1 3Y1 46 3 35 14 1A2 1Y2 3A2 3Y2 44 5 33 16 1A3 1Y3 3A3 3Y3 43 6 32 17 1A4 1Y4 3A4 3Y4 48 24 2OE 4OE 41 8 30 19 2A1 2Y1 4A1 4Y1 40 9 29 20 2A2 2Y2 4A2 4Y2 38 11 27 22 2A3 2Y3 4A3 4Y3 37 12 26 23 2A4 2Y4 4A4 4Y4 Pin numbers shown are for the DGG, DGV, DL, and WD packages. SubmitDocumentationFeedback 3

SN54LVT16244B,, SN74LVT16244B 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS716E–MARCH2000–REVISEDDECEMBER2006 Absolute Maximum Ratings(1) overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyvoltagerange –0.5 4.6 V CC V Inputvoltagerange(2) –0.5 7 V I V Voltagerangeappliedtoanyoutputinthehigh-impedanceorpower-offstate(2) –0.5 7 V O V Voltagerangeappliedtoanyoutputinthehighstate(2) –0.5 V +0.5 V O CC SN54LVT16244B 96 I Currentintoanyoutputinthelowstate mA O SN74LVT16244B 128 SN54LVT16244B 48 I Currentintoanyoutputinthehighstate(3) mA O SN74LVT16244B 64 I Inputclampcurrent V <0 –50 mA IK I I Outputclampcurrent V <0 –50 mA OK O DGGpackage 70 DGVpackage 58 q Packagethermalimpedance(4) DLpackage 63 (cid:176) C/W JA GQL/ZQLpackage 42 GRD/ZRDpackage 36 T Storagetemperaturerange –65 150 (cid:176) C stg (1) Stressesbeyondthoselistedunder"absolutemaximumratings"maycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder"recommendedoperating conditions"isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Theinputandoutputnegative-voltageratingsmaybeexceedediftheinputandoutputcurrentratingsareobserved. (3) ThiscurrentflowsonlywhentheoutputisinthehighstateandV >V . O CC (4) ThepackagethermalimpedanceiscalculatedinaccordancewithJESD51-7. Recommended Operating Conditions(1) SN54LVT16244B(2) SN74LVT16244B UNIT MIN MAX MIN MAX V Supplyvoltage 2.7 3.6 2.7 3.6 V CC V High-levelinputvoltage 2 2 V IH V Low-levelinputvoltage 0.8 0.8 V IL V Inputvoltage 5.5 5.5 V I I High-leveloutputcurrent –24 –32 mA OH I Low-leveloutputcurrent 48 64 mA OL D t/D v Inputtransitionriseorfallrate Outputsenabled 10 10 ns/V D t/D V Power-upramprate 200 200 m s/V CC T Operatingfree-airtemperature –55 125 –40 85 (cid:176) C A (1) AllunusedinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.RefertotheTIapplicationreport, CC ImplicationsofSloworFloatingCMOSInputs,literaturenumberSCBA004. (2) Productpreview 4 SubmitDocumentationFeedback

SN54LVT16244B,, SN74LVT16244B 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS716E–MARCH2000–REVISEDDECEMBER2006 Electrical Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) SN54LVT16244B(1) SN74LVT16244B PARAMETER TESTCONDITIONS UNIT MIN TYP(2) MAX MIN TYP(2) MAX V V =2.7V, I =–18mA –1.2 –1.2 V IK CC I V =2.7to3.6V, I =–100m A V –0.2 V –0.2 CC OH CC CC V =2.7V, I =–8mA 2.4 2.4 CC OH V V OH I =–24mA 2 OH V =3V CC I =–32mA 2 OH I =100m A 0.2 0.2 OL V =2.7V CC I =24mA 0.5 0.5 OL I =16mA 0.4 0.4 OL V V OL I =32mA 0.5 0.5 OL V =3V CC I =48mA 0.55 OL I =64mA 0.55 OL V =0or3.6V, V =5.5V 50 10 CC I Control V =3.6V, V =V orGND – 1 – 1 I inputs CC I CC m A I V =V 1 1 I CC Datainputs V =3.6V CC V =0 –5 –5 I I V =0, V orV =0to4.5V – 100 m A off CC I O I V =3.6V, V =3V 5 5 m A OZH CC O I V =3.6V, V =0.5V –5 –5 m A OZL CC O I VCC=0to1.5V,VO=0.5Vto3V, – 100(3) – 100 m A OZPU OE=don'tcare I VCC=1.5Vto0,VO=0.5Vto3V, – 100(3) – 100 m A OZPD OE=don'tcare Outputshigh 0.19 0.19 V =3.6V, CC I I =0, Outputslow 5 5 mA CC O V =V orGND I CC Outputsdisabled 0.19 0.19 D I (4) VCC=3Vto3.6V,OneinputatVCC–0.6V, 0.2 0.2 mA CC OtherinputsatV orGND CC C V =3Vor0 4 4 pF i I C V =3Vor0 9 9 pF o O (1) Productpreview (2) AlltypicalvaluesareatV =3.3V,T =25(cid:176) C. CC A (3) OnproductscomplianttoMIL-PRF-38535,thisparameterisnotproductiontested. (4) ThisistheincreaseinsupplycurrentforeachinputthatisatthespecifiedTTLvoltagelevel,ratherthanV orGND. CC SubmitDocumentationFeedback 5

SN54LVT16244B,, SN74LVT16244B 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS716E–MARCH2000–REVISEDDECEMBER2006 Switching Characteristics overrecommendedoperatingfree-airtemperaturerange,C =50pF(unlessotherwisenoted)(seeFigure1) L SN54LVT16244B(1) SN74LVT16244B FROM TO V =3.3V V =3.3V PARAMETER (INPUT) (OUTPUT) C–C0.3V VCC=2.7V C–C0.3V VCC=2.7V UNIT MIN MAX MIN MAX MIN TYP(2) MAX MIN MAX t 1.1 4.4 4.6 1.2 2.3 3.2 3.7 PLH A Y ns t 1.1 3.6 3.9 1.2 2 3.2 3.7 PHL t 1.1 4.6 5.4 1.2 2.6 4 5 PZH OE Y ns t 1.1 5.4 6.2 1.2 2.7 4 5 PZL t 1.6 5.7 6.2 2.2 3.3 4.5 5 PHZ OE Y ns t 1.2 5 4.7 2 3.1 4.2 4.4 PLZ t 0.5 sk(LH) ns t 0.5 sk(HL) (1) Productpreview (2) AlltypicalvaluesareatV =3.3V,T =25(cid:176) C. CC A 6 SubmitDocumentationFeedback

SN54LVT16244B,, SN74LVT16244B 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS716E–MARCH2000–REVISEDDECEMBER2006 PARAMETER MEASUREMENT INFORMATION 6 V From Output 500 W S1 Open TEST S1 Under Test GND tPLH/tPHL Open (seCeL N= o5t0e pAF) 500 W ttPPHLZZ//ttPPZZLH G6N VD LOAD CIRCUIT 2.7 V Timing Input 1.5 V 0 V tw tsu th 2.7 V 2.7 V Input 1.5 V 1.5 V Data Input 1.5 V 1.5 V 0 V 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PULSE DURATION SETUP AND HOLD TIMES 2.7 V 2.7 V Input 1.5 V 1.5 V Output 1.5 V 1.5 V Control 0 V 0 V tPLH tPHL Output tPZL tPLZ VOH Waveform 1 3 V Output 1.5 V 1.5 V S1 at 6 V 1.5 V VOL + 0.3 V VOL (see Note B) VOL tPHL tPLH tPZH tPHZ Output VOH Waveform 2 VOH Output 1.5 V 1.5 V S1 at GND 1.5 V VOH − 0.3 V VOL (see Note B) ≈0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES ENABLE AND DISABLE TIMES INVERTING AND NONINVERTING OUTPUTS LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 W , tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. Figure1.LoadCircuitandVoltageWaveforms SubmitDocumentationFeedback 7

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 74LVT16244BDGGRG4 ACTIVE TSSOP DGG 48 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVT16244B & no Sb/Br) SN74LVT16244BDGGR ACTIVE TSSOP DGG 48 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVT16244B & no Sb/Br) SN74LVT16244BDGVR ACTIVE TVSOP DGV 48 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 VD244B & no Sb/Br) SN74LVT16244BDL ACTIVE SSOP DL 48 25 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVT16244B & no Sb/Br) SN74LVT16244BDLG4 ACTIVE SSOP DL 48 25 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVT16244B & no Sb/Br) SN74LVT16244BDLR ACTIVE SSOP DL 48 1000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVT16244B & no Sb/Br) SN74LVT16244BZQLR LIFEBUY BGA ZQL 56 1000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 VD244B MICROSTAR & no Sb/Br) JUNIOR SN74LVT16244BZRDR LIFEBUY BGA ZRD 54 1000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 VD244B MICROSTAR & no Sb/Br) JUNIOR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 12-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74LVT16244BDGGR TSSOP DGG 48 2000 330.0 24.4 8.6 13.0 1.8 12.0 24.0 Q1 SN74LVT16244BDGVR TVSOP DGV 48 2000 330.0 16.4 7.1 10.2 1.6 12.0 16.0 Q1 SN74LVT16244BDLR SSOP DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.0 Q1 SN74LVT16244BZQLR BGAMI ZQL 56 1000 330.0 16.4 4.8 7.3 1.5 8.0 16.0 Q1 CROSTA RJUNI OR SN74LVT16244BZRDR BGAMI ZRD 54 1000 330.0 16.4 5.8 8.3 1.55 8.0 16.0 Q1 CROSTA RJUNI OR PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 12-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74LVT16244BDGGR TSSOP DGG 48 2000 367.0 367.0 45.0 SN74LVT16244BDGVR TVSOP DGV 48 2000 367.0 367.0 38.0 SN74LVT16244BDLR SSOP DL 48 1000 367.0 367.0 55.0 SN74LVT16244BZQLR BGAMICROSTAR ZQL 56 1000 350.0 350.0 43.0 JUNIOR SN74LVT16244BZRDR BGAMICROSTAR ZRD 54 1000 350.0 350.0 43.0 JUNIOR PackMaterials-Page2

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MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,23 0,40 0,07 M 0,13 24 13 0,16 NOM 4,50 6,60 4,30 6,20 Gage Plane 0,25 0°–(cid:1)8° 0,75 1 12 0,50 A Seating Plane 0,15 1,20 MAX 0,08 0,05 PINS ** 14 16 20 24 38 48 56 DIM A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 4073251/E 08/00 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. D. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

PACKAGE OUTLINE ZQL0056A JRBGA - 1 mm max height SCALE 2.100 PLASTIC BALL GRID ARRAY 4.6 B A 4.4 BALL A1 CORNER 7.1 6.9 1 MAX C SEATING PLANE 0.35 0.15 TYP BALL TYP 0.1 C 3.25 TYP SYMM (0.625) TYP K J (0.575) TYP H G 5.85 F SYMM TYP E D C 0.45 56X NOTE 3 0.35 B 0.15 C B A 0.08 C A 0.65 TYP 1 2 3 4 5 6 BALL A1 CORNER 0.65 TYP 4219711/B 01/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. No metal in this area, indicates orientation. www.ti.com

EXAMPLE BOARD LAYOUT ZQL0056A JRBGA - 1 mm max height PLASTIC BALL GRID ARRAY (0.65) TYP 56X ( 0.33) 1 2 3 4 5 6 A (0.65) TYP B C D E SYMM F G H J K SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK 0.05 MAX 0.05 MIN METAL UNDER OPENING SOLDER MASK EXPOSED METAL ( 0.33) ( 0.33) METAL EXPOSED METAL SOLDER MASK OPENING NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS NOT TO SCALE 4219711/B 01/2017 NOTES: (continued) 4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For information, see Texas Instruments literature number SPRAA99 (www.ti.com/lit/spraa99). www.ti.com

EXAMPLE STENCIL DESIGN ZQL0056A JRBGA - 1 mm max height PLASTIC BALL GRID ARRAY 56X ( 0.33) (0.65) TYP 1 2 3 4 5 6 A (0.65) TYP B C D E SYMM F G H J K SYMM SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4219711/B 01/2017 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. www.ti.com

MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,50 0,08 M 0,17 48 25 6,20 8,30 6,00 7,90 0,15 NOM Gage Plane 0,25 1 24 0°–8° A 0,75 0,50 Seating Plane 0,15 1,20 MAX 0,10 0,05 PINS ** 48 56 64 DIM A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 4040078/F 12/97 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold protrusion not to exceed 0,15. D. Falls within JEDEC MO-153 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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