Product Sample & Technical Tools & Support & Folder Buy Documents Software Community SN74LVC2G34 SCES359J–AUGUST2001–REVISEDOCTOBER2015 SN74LVC2G34 Dual Buffer Gate 1 Features 3 Description • AvailableintheTexasInstruments The SN74LVC2G34 device is a dual buffer gate 1 designed for 1.65-V to 5.5-V V operation. The NanoFree™Package CC SN74LVC2G34 device performs the Boolean function • Supports5.5-VV Operation CC Y=Ainpositivelogic. • InputsAcceptVoltagesto5.5V NanoFree package technology is a major • Maximumt of4.1nsat3.3V pd breakthrough in IC packaging concepts, using the die • LowPowerConsumption,10-µAMaximumI asthepackage. CC • ±24-mAOutputDriveat3.3V This device is fully specified for partial-power-down • TypicalV (OutputGroundBounce) applications using I . The I circuitry disables the OLP off off <0.8VatV =3.3V,T =25°C outputs, preventing damaging current backflow CC A throughthedevicewhenitispowereddown. • TypicalV (OutputV Undershoot) OHV OH >2VatV =3.3V,T =25°C CC A DeviceInformation(1) • I SupportsLiveInsertion,Partial-Power-Down off PARTNUMBER PACKAGE BODYSIZE(NOM) Mode,andBack-DriveProtection SN74LVC2G34DBV SOT-23(6) 2.90mm×1.60mm • CanBeUsedasaDownTranslatortoTranslate SN74LVC2G34DCK SC70(6) 2.00mm×1.25mm InputsFromaMaximumof5.5VDowntotheV CC SN74LVC2G34DRL SOT(6) 1.60mm×1.20mm Level SN74LVC2G34YZP DSBGA(6) 1.41mm×0.91mm • Latch-UpPerformanceExceeds100mAPer JESD78,ClassII (1) For all available packages, see the orderable addendum at theendofthedatasheet. • ESDProtectionExceedsJESD22 – 2000-VHumanBodyModel(A114-A) SimplifiedSchematic – 200-VMachineModel(A115-A) 1 6 – 1000-VCharged-DeviceModel(C101) 1A 1Y 2 Applications • AVReceivers 3 4 2A 2Y • AudioDocks:Portable • Blu-rayPlayerandHomeTheaters • DVDRecordersandPlayers • EmbeddedPCs • MP3PlayersandRecorders(PortableAudio) • PersonalDigitalAssistant(PDA) • Power:Telecom/ServerAC/DCSupply:Single Controller:AnalogandDigital • Solid-StateDrive(SSD):ClientandEnterprise • TV:LCD/DigitalandHigh-Definition(HDTV) • Tablets:Enterprise • VideoAnalytics:Servers • WirelessHeadsets,Keyboards,andMice 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

SN74LVC2G34 SCES359J–AUGUST2001–REVISEDOCTOBER2015 www.ti.com Table of Contents 1 Features.................................................................. 1 8.2 FunctionalBlockDiagram.........................................8 2 Applications........................................................... 1 8.3 FeatureDescription...................................................8 3 Description............................................................. 1 8.4 DeviceFunctionalModes..........................................8 4 RevisionHistory..................................................... 2 9 ApplicationandImplementation.......................... 9 9.1 ApplicationInformation..............................................9 5 PinConfigurationandFunctions......................... 3 9.2 TypicalApplication ...................................................9 6 Specifications......................................................... 3 10 PowerSupplyRecommendations..................... 10 6.1 AbsoluteMaximumRatings .....................................3 11 Layout................................................................... 10 6.2 ESDRatings..............................................................4 6.3 RecommendedOperatingConditions......................4 11.1 LayoutGuidelines.................................................10 6.4 ThermalInformation..................................................4 11.2 LayoutExample....................................................10 6.5 ElectricalCharacteristics...........................................5 12 DeviceandDocumentationSupport................. 11 6.6 SwitchingCharacteristics..........................................5 12.1 DocumentationSupport........................................11 6.7 OperatingCharacteristics..........................................5 12.2 CommunityResources..........................................11 6.8 TypicalCharacteristics..............................................6 12.3 Trademarks...........................................................11 7 ParameterMeasurementInformation..................7 12.4 ElectrostaticDischargeCaution............................11 12.5 Glossary................................................................11 8 DetailedDescription.............................................. 8 13 Mechanical,Packaging,andOrderable 8.1 Overview...................................................................8 Information........................................................... 11 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionI(December2013)toRevisionJ Page • AddedApplications,DeviceInformationtable,PinConfigurationandFunctionssection,ESDRatingstable,Thermal Informationtable,TypicalCharacteristicssection,FeatureDescriptionsection,DeviceFunctionalModes, ApplicationandImplementationsection,PowerSupplyRecommendationssection,Layoutsection,Deviceand DocumentationSupportsection,andMechanical,Packaging,andOrderableInformationsection ..................................... 1 • DeletedpartnumberfromSwitchingCharacteristicstableheaders...................................................................................... 5 ChangesfromRevisionH(February2007)toRevisionI Page • UpdateddocumenttonewTIdatasheetformat.................................................................................................................... 1 • RemovedOrderingInformationtable..................................................................................................................................... 1 • UpdatedFeaturessection...................................................................................................................................................... 1 • Updatedoperatingtemperaturerange................................................................................................................................... 4 2 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC2G34

SN74LVC2G34 www.ti.com SCES359J–AUGUST2001–REVISEDOCTOBER2015 5 Pin Configuration and Functions DBVPackage 6-PinSOT-23 DCKPackage TopView 6-PinSC70 TopView 1A 1 6 1Y 1A 1 6 1Y GND 2 5 VCC GND 2 5 VCC 2A 3 4 2Y 2A 3 4 2Y YZPPackage 6-PinDSBGA DRLPackage BottomView 6-PinSOT TopView 2A 3 4 2Y 1A 1 6 1Y GND 2 5 VCC 1A 1 6 1Y GND 2 5 VCC 2A 3 4 2Y PinFunctions(1) PIN I/O DESCRIPTION NAME NO. 1A 1 I BufferInput1 1Y 6 O BufferOutput1 2A 3 I BufferInput2 2Y 4 O BufferOutput2 GND 2 — Groundpin VCC 5 — Powerpin (1) Seemechanicaldrawingsfordimensions. 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT V Supplyvoltage –0.5 6.5 V CC V Inputvoltage(2) –0.5 6.5 V I V Voltageappliedtoanyoutputinthehigh-impedanceorpower-offstate(2) –0.5 6.5 V O V Voltageappliedtoanyoutputinthehighorlowstate(2)(3) –0.5 V +0.5 V O CC I Inputclampcurrent V <0 –50 mA IK I I Outputclampcurrent V <0 –50 mA OK O I Continuousoutputcurrent ±50 mA O ContinuouscurrentthroughV orGND ±100 mA CC T Junctiontemperature 150 °C J T Storagetemperature –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperating Conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Theinputnegative-voltageandoutputvoltageratingsmaybeexceedediftheinputandoutputcurrentratingsareobserved. (3) ThevalueofV isprovidedintheRecommendedOperatingConditionstable. CC Copyright©2001–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN74LVC2G34

SN74LVC2G34 SCES359J–AUGUST2001–REVISEDOCTOBER2015 www.ti.com 6.2 ESD Ratings VALUE UNIT Electrostatic Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001,allpins(1) 2500 V V (ESD) discharge Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101,allpins(2) 1500 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions(1) MIN MAX UNIT Operating 1.65 5.5 V Supplyvoltage V CC Dataretentiononly 1.5 V =1.65Vto1.95V 0.65×V CC CC V =2.3Vto2.7V 1.7 CC V High-levelinputvoltage V IH V =3Vto3.6V 2 CC V =4.5Vto5.5V 0.7×V CC CC V =1.65Vto1.95V 0.35×V CC CC V =2.3Vto2.7V 0.7 CC V Low-levelinputvoltage V IL V =3Vto3.6V 0.8 CC V =4.5Vto5.5V 0.3×V CC CC V Inputvoltage 0 5.5 V I V Outputvoltage 0 V V O CC V =1.65V –4 CC V =2.3V –8 CC I High-leveloutputcurrent –16 mA OH V =3V CC –24 V =4.5V –32 CC V =1.65V 4 CC V =2.3V 8 CC I Low-leveloutputcurrent 16 mA OL V =3V CC 24 V =4.5V 32 CC V =1.8V±0.15V,2.5V±0.2V 20 CC Δt/Δv Inputtransitionriseorfallrate V =3.3V±0.3V 10 ns/V CC V =5V±0.5V 5 CC DBV,DCK,DRLPackage –40 125 T Operatingfree-airtemperature °C A YZPPackage -40 85 (1) AllunusedinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.RefertotheTIapplicationreport, CC SemiconductorandImplicationsofSloworFloatingCMOSInputs,SCBA004. 6.4 Thermal Information SN74LVC2G34 THERMALMETRIC(1) DBV(SOT-23) DCK(SC70) DRL(SOT) YZP(DSBGA) UNIT 6PINS 6PINS 6PINS 6PINS R Junction-to-ambientthermalresistance 165 259 142 123 °C/W θJA (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. 4 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC2G34

SN74LVC2G34 www.ti.com SCES359J–AUGUST2001–REVISEDOCTOBER2015 6.5 Electrical Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS VCC MIN TYP(1) MAX UNIT IOH=–100µA 1.65Vto5.5V VCC–0.1 IOH=–4mA 1.65V 1.2 IOH=–8mA 2.3V 1.9 VOH V IOH=–16mA 2.4 3V IOH=–24mA 2.3 IOH=–32mA 4.5V 3.8 IOL=100µA 1.65Vto5.5V 0.1 IOL=4mA 1.65V 0.45 IOL=8mA 2.3V 0.3 VOL V IOL=16mA 0.4 3V IOL=24mA 0.55 IOL=32mA 4.5V 0.55 II Ainputs VI=5.5VorGND 0to5.5V ±5 µA Ioff VIorVO=5.5V 0 ±10 µA ICC VI=5.5VorGND,IO=0 1.65Vto5.5V 10 µA ΔICC OOntheerinipnuptuatstaVtCVCC–C0o.r6GVN,D 3Vto5.5V 500 µA Ci VI=VCCorGND 3.3V 3.5 pF (1) AlltypicalvaluesareatV =3.3V,T =25°C. CC A 6.6 Switching Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted)(seeFigure2) FROM TO OPERATINGFREE-AIR PARAMETER (INPUT) (OUTPUT) TEMPERATURE(TA) VCC MIN MAX UNIT VCC=1.8V±0.15V 3.2 8.6 VCC=2.5V±0.2V 1.5 4.4 tpd A Y –40°Cto85°C ns VCC=3.3V±0.3V 1.4 4.1 VCC=5V±0.5V 1 3.2 VCC=1.8V±0.15V 3.2 9.6 VCC=2.5V±0.2V 1.5 4.9 tpd A Y –40°Cto125°C ns VCC=3.3V±0.3V 1.2 4.6 VCC=5V±0.5V 1 3.7 6.7 Operating Characteristics T =25°C A PARAMETER TESTCONDITIONS V TYP UNIT CC V =1.8V 14 CC V =2.5V 14 CC C Powerdissipationcapacitance f=10MHz pF pd V =3.3V 15 CC V =5V 17 CC Copyright©2001–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN74LVC2G34

SN74LVC2G34 SCES359J–AUGUST2001–REVISEDOCTOBER2015 www.ti.com 6.8 Typical Characteristics 2.5 TPD 2 s 1.5 n D - P T 1 0.5 0 -100 -50 0 50 100 150 Temperature - °C D001 Figure1.TPDAcrossTemperatureat3.3-VV CC 6 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC2G34

SN74LVC2G34 www.ti.com SCES359J–AUGUST2001–REVISEDOCTOBER2015 7 Parameter Measurement Information V LOAD R S1 Open From Output L TEST S1 Under Test GND t /t Open C PLH PHL (see NoteA)L RL tPLZ/tPZL VLOAD t /t GND PHZ PZH LOAD CIRCUIT INPUTS V V V C R V CC V t/t M LOAD L L D I r f 1.8 V±0.15 V V £2 ns V /2 2 ×V 30 pF 1 kW 0.15 V CC CC CC 2.5 V±0.2 V V £2 ns V /2 2 ×V 30 pF 500W 0.15 V CC CC CC 3.3 V±0.3 V 3 V £2.5 ns 1.5 V 6 V 50 pF 500W 0.3 V 5 V±0.5 V V £2.5 ns V /2 2 ×V 50 pF 500W 0.3 V CC CC CC V I Timing Input V M 0 V t W VI tsu th V Input V V I M M Data Input V V M M 0 V 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PULSE DURATION SETUPAND HOLD TIMES Input VM VM VI COounttpruotl VM VM VI 0 V 0 V t t t t PLH PHL PZL PLZ V Output V /2 Output VM VM OH WSav1e afot rVm 1 VM V + V LOAD VOL (see NoteL OBAD) OL D VOL t t PHL PLH t t PZH PHZ Output VM VM VOH WSa1v eaOfto uGrtmpNu D2t VM VOH–VD VOH VOL (see Note B) »0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAYTIMES ENABLEAND DISABLE TIMES INVERTINGAND NONINVERTING OUTPUTS LOW-AND HIGH-LEVELENABLING NOTES: A. C includes probe and jig capacitance. L B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR£10 MHz, Z = 50W. O D. The outputs are measured one at a time, with one transition per measurement. E. t and t are the same as t . PLZ PHZ dis F. t and t are the same as t . PZL PZH en G.t and t are the same as t . PLH PHL pd H. All parameters and waveforms are not applicable to all devices. Figure2. LoadCircuitandVoltageWaveforms Copyright©2001–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN74LVC2G34

SN74LVC2G34 SCES359J–AUGUST2001–REVISEDOCTOBER2015 www.ti.com 8 Detailed Description 8.1 Overview The SN74LVC2G34 device contains two buffer gates that each perform the Boolean function Y = A. This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs, preventing off off damagingcurrentbackflowthroughthedevicewhenitispowereddown. 8.2 Functional Block Diagram 1 6 1A 1Y 3 4 2A 2Y 8.3 Feature Description The SN74LVC2G34 device has a wider operating voltage range, operating from 1.65 V to 5.5 V, and allows downvoltagetranslation.TheSN74LVC2G34I featureallowsvoltagesontheinputsandoutputswhenV is off CC 0V. 8.4 Device Functional Modes Table1liststhefunctionalmodesoftheSN74LVC2G34. Table1.FunctionTable INPUT OUTPUT A Y H H L L 8 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC2G34

SN74LVC2G34 www.ti.com SCES359J–AUGUST2001–REVISEDOCTOBER2015 9 Application and Implementation 9.1 Application Information The SN74LVC2G34 is a high-drive CMOS device that can be used as a buffer with a high output drive, such as an LED application. It can produce 24 mA of drive current at 3.3 V, making it ideal for driving multiple outputs and good for high-speed applications up to 100 MHz. The inputs are 5.5-V tolerant allowing it to translate down toV . CC 9.2 Typical Application Buffer Function Basic LED Driver VCC VCC Microcontroller or Microcontroller or Microcontroller or SN74LVC2G34 SN74LVC2G34 Logic Logic Logic Figure3. TypicalApplication 9.2.1 DesignRequirements ThisdeviceusesCMOStechnologyandhasbalancedoutputdrive.Takecaretoavoidbuscontentionbecauseit can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads soroutingandloadconditionsmustbeconsideredtopreventringing. 9.2.2 DetailedDesignProcedure 1. RecommendedInputConditions – Risetimeandfalltimespecs.See(Δt/ΔV)intheRecommendedOperatingConditionstable. – Specifiedhighandlowlevels.See(V andV )intheRecommendedOperatingConditions table. IH IL – Inputs are overvoltage tolerant allowing them to go as high as (VI max) in the Recommended Operating ConditionstableatanyvalidV . CC 2. RecommendedOutputConditions – Loadcurrentsmustnotexceed(I max)peroutputandmustnotexceed(ContinuouscurrentthroughV O CC or GND) total current for the part. These limits are located in the Recommended Operating Conditions table. – OutputsmuchnotbepulledaboveV undernormaloperatingconditions. CC Copyright©2001–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SN74LVC2G34

SN74LVC2G34 SCES359J–AUGUST2001–REVISEDOCTOBER2015 www.ti.com Typical Application (continued) 9.2.3 ApplicationCurve 5 TPD 4 s 3 n D - P T 2 1 0 0 1 2 3 4 5 6 Vcc - V D002 Figure4.TPDAcrossV at25°C CC 10 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in the RecommendedOperatingConditionstable. EachV pinmusthaveagoodbypasscapacitortopreventpowerdisturbance.Fordeviceswithasinglesupply, CC a 0.1-μF capacitor is recommended and if there are multiple V pins then a 0.01-μF or 0.022-μF capacitor is CC recommended for each power pin. It is ok to parallel multiple bypass caps to reject different frequencies of noise. 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor must be installed as close to thepowerpinaspossibleforbestresults. 11 Layout 11.1 Layout Guidelines When using multiple bit logic devices inputs must not ever float. In many cases, functions or parts of functions of digital logic devices are unused; for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins must not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Specified below are the rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low biastopreventthemfromfloating.Thelogiclevelthatmustbeappliedtoanyparticularunusedinputdependson the function of the device. Generally they will be tied to GND or V whichever make more sense or is more CC convenient. 11.2 Layout Example VCC Input Unused Input Output Unused Input Output Input 10 SubmitDocumentationFeedback Copyright©2001–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC2G34

SN74LVC2G34 www.ti.com SCES359J–AUGUST2001–REVISEDOCTOBER2015 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 DocumentationSupport Forrelateddocumentation,seethefollowing: ImplicationsofSloworFloatingCMOSInputs,SCBA004 12.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.3 Trademarks NanoFree,E2EaretrademarksofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.4 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowserbasedversionsofthisdatasheet,refertothelefthandnavigation. Copyright©2001–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:SN74LVC2G34

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN74LVC2G34DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (C345, C34F, C34K, & no Sb/Br) C34O, C34R) SN74LVC2G34DBVRE4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 (C34F, C34R) & no Sb/Br) SN74LVC2G34DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 (C34F, C34R) & no Sb/Br) SN74LVC2G34DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (C345, C34F, C34K, & no Sb/Br) C34R) SN74LVC2G34DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 (C34F, C34R) & no Sb/Br) SN74LVC2G34DCK3 ACTIVE SC70 DCK 6 3000 Pb-Free SNBI Level-1-260C-UNLIM -40 to 85 C9Z (RoHS) SN74LVC2G34DCKR ACTIVE SC70 DCK 6 3000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (C95, C9F, C9K, C9 & no Sb/Br) R) SN74LVC2G34DCKRE4 ACTIVE SC70 DCK 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 C95 & no Sb/Br) SN74LVC2G34DCKRG4 ACTIVE SC70 DCK 6 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 C95 & no Sb/Br) SN74LVC2G34DRLR ACTIVE SOT-5X3 DRL 6 4000 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 (C97, C9R) & no Sb/Br) SN74LVC2G34YZPR ACTIVE DSBGA YZP 6 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 C9N & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN74LVC2G34 : •Enhanced Product: SN74LVC2G34-EP NOTE: Qualified Version Definitions: •Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74LVC2G34DBVR SOT-23 DBV 6 3000 178.0 9.2 3.3 3.23 1.55 4.0 8.0 Q3 SN74LVC2G34DBVR SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 SN74LVC2G34DBVR SOT-23 DBV 6 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 SN74LVC2G34DBVRG4 SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 SN74LVC2G34DBVT SOT-23 DBV 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 SN74LVC2G34DBVTG4 SOT-23 DBV 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 SN74LVC2G34DCKR SC70 DCK 6 3000 180.0 8.4 2.41 2.41 1.2 4.0 8.0 Q3 SN74LVC2G34DCKR SC70 DCK 6 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 SN74LVC2G34DCKR SC70 DCK 6 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74LVC2G34DCKR SC70 DCK 6 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 SN74LVC2G34DCKRG4 SC70 DCK 6 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74LVC2G34DRLR SOT-5X3 DRL 6 4000 180.0 8.4 1.98 1.78 0.69 4.0 8.0 Q3 SN74LVC2G34DRLR SOT-5X3 DRL 6 4000 180.0 9.5 1.78 1.78 0.69 4.0 8.0 Q3 SN74LVC2G34YZPR DSBGA YZP 6 3000 178.0 9.2 1.02 1.52 0.63 4.0 8.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2020 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74LVC2G34DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 SN74LVC2G34DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 SN74LVC2G34DBVR SOT-23 DBV 6 3000 202.0 201.0 28.0 SN74LVC2G34DBVRG4 SOT-23 DBV 6 3000 180.0 180.0 18.0 SN74LVC2G34DBVT SOT-23 DBV 6 250 180.0 180.0 18.0 SN74LVC2G34DBVTG4 SOT-23 DBV 6 250 180.0 180.0 18.0 SN74LVC2G34DCKR SC70 DCK 6 3000 202.0 201.0 28.0 SN74LVC2G34DCKR SC70 DCK 6 3000 180.0 180.0 18.0 SN74LVC2G34DCKR SC70 DCK 6 3000 180.0 180.0 18.0 SN74LVC2G34DCKR SC70 DCK 6 3000 180.0 180.0 18.0 SN74LVC2G34DCKRG4 SC70 DCK 6 3000 180.0 180.0 18.0 SN74LVC2G34DRLR SOT-5X3 DRL 6 4000 202.0 201.0 28.0 SN74LVC2G34DRLR SOT-5X3 DRL 6 4000 184.0 184.0 19.0 SN74LVC2G34YZPR DSBGA YZP 6 3000 220.0 220.0 35.0 PackMaterials-Page2

PACKAGE OUTLINE YZP0006 DSBGA - 0.5 mm max height SCALE 9.000 DIE SIZE BALL GRID ARRAY B E A BALL A1 CORNER D 0.5 MAX C SEATING PLANE 0.19 BALL TYP 0.05 C 0.15 0.5 TYP C SYMM 1 D: Max = 1.418 mm, Min =1 .358 mm B TYP 0.5 E: Max = 0.918 mm, Min =0 .858 mm TYP A 0.25 1 2 6X 0.21 SYMM 0.015 C A B 4219524/A 06/2014 NOTES: NanoFree Is a trademark of Texas Instruments. 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. NanoFreeTM package configuration. www.ti.com

EXAMPLE BOARD LAYOUT YZP0006 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.5) TYP 6X ( 0.225) 1 2 A (0.5) TYP B SYMM C SYMM LAND PATTERN EXAMPLE SCALE:40X ( 0.225) 0.05 MAX 0.05 MIN METAL METAL UNDER MASK SOLDER MASK ( 0.225) OPENING SOLDER MASK OPENING NON-SOLDER MASK DEFINED SOLDER MASK (PREFERRED) DEFINED SOLDER MASK DETAILS NOT TO SCALE 4219524/A 06/2014 NOTES: (continued) 4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information, see Texas Instruments literature number SBVA017 (www.ti.com/lit/sbva017). www.ti.com

EXAMPLE STENCIL DESIGN YZP0006 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.5) TYP 6X ( 0.25) (R0.05) TYP 1 2 A (0.5) TYP B SYMM METAL TYP C SYMM SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:40X 4219524/A 06/2014 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. www.ti.com

PACKAGE OUTLINE DBV0006A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 B A 1.45 MAX PIN 1 INDEX AREA 1 6 2X 0.95 3.05 2.75 1.9 5 2 4 3 0.50 6X 0.25 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214840/B 03/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.15 per side. 4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation. 5. Refernce JEDEC MO-178. www.ti.com

EXAMPLE BOARD LAYOUT DBV0006A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 6X (1.1) 1 6X (0.6) 6 SYMM 2 5 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214840/B 03/2018 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0006A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 6X (1.1) 1 6X (0.6) 6 SYMM 2 5 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214840/B 03/2018 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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PACKAGE OUTLINE DRL0006A SOT - 0.6 mm max height SCALE 8.000 PLASTIC SMALL OUTLINE 1.7 1.5 PIN 1 A ID AREA 1 6 4X 0.5 1.7 1.5 2X 1 NOTE 3 4 3 B 11..31 6X 00..31 00..0050 TYP 0.6 MAX C SEATING PLANE 0.18 6X 0.08 SYMM 0.05 C SYMM 0.27 6X 0.15 0.1 C A B 0.4 6X 0.2 0.05 4223266/A 09/2016 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com

EXAMPLE BOARD LAYOUT DRL0006A SOT - 0.6 mm max height PLASTIC SMALL OUTLINE 6X (0.67) SYMM 1 6X (0.3) 6 SYMM 4X (0.5) 4 3 (R0.05) TYP (1.48) LAND PATTERN EXAMPLE SCALE:30X 0.05 MAX 0.05 MIN AROUND AROUND SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDERMASK DETAILS 4223266/A 09/2016 NOTES: (continued) 4. Publication IPC-7351 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DRL0006A SOT - 0.6 mm max height PLASTIC SMALL OUTLINE 6X (0.67) SYMM 1 6X (0.3) 6 SYMM 4X (0.5) 4 3 (R0.05) TYP (1.48) SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:30X 4223266/A 09/2016 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. www.ti.com

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