SN74LVC1G374 www.ti.com SCES520C–DECEMBER2003–REVISEDDECEMBER2013 Single D-Type Flip-Flop With 3-State Output CheckforSamples:SN74LVC1G374 FEATURES NanoStar™ and NanoFree™ package technology is 1 a major breakthrough in IC packaging concepts, • AvailableintheTexasInstruments NanoStar™ 2 usingthedieasthepackage. andNanoFree™Packages On the positive transition of the clock (CLK) input, the • Supports5-VV Operation CC Q output is set to the logic level set up at the data (D) • InputsAcceptVoltagesto5.5V input. • ProvidesDownTranslationtoV CC A buffered output-enable (OE) input can be used to • Maxtpdof4nsat3.3V place the output in either a normal logic state (high or • LowPowerConsumption,10-μAMaxI low logic levels) or the high-impedance state. In the CC high-impedance state, the output neither loads nor • ±24-mAOutputDriveat3.3V drives the bus lines significantly. The high-impedance • IoffSupportsLiveInsertion,Partial-Power- state and increased drive provide the capability to DownMode,andBackDriveProtection drive bus lines without interface or pullup • Latch-UpPerformanceExceeds100mAPer components. JESD78,ClassII OE does not affect the internal operations of the flip- • ESDProtectionExceedsJESD22 flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance – 2000-VHuman-BodyModel(A114-A) state. – 200-VMachineModel(A115-A) To ensure the high-impedance state during power up – 1000-VCharged-DeviceModel(C101) or power down, OE should be tied to V through a CC pullup resistor; the minimum value of the resistor is DESCRIPTION determined by the current-sinking capability of the This single D-type latch is designed for 1.65-V to 5.5- driver. VV operation. CC This device is fully specified for partial-power-down The SN74LVC1G374 features a 3-state output applications using I . The I circuitry disables the off off designed specifically for driving highly capacitive or outputs, preventing damaging current backflow relatively low-impedance loads. This device is throughthedevicewhenitispowereddown. particularly suitable for implementing buffer registers, input/output (I/O) ports, bidirectional bus drivers, and workingregisters. DBV PACKAGE DCK PACKAGE YEPORYZPPACKAGE (TOPVIEW) (TOPVIEW) (BOTTOM VIEW) CLK 1 6 OE D 34 Q CLK 1 6 OE GND 25 V CC GND 2 5 V CC CLK 16 OE GND 2 5 V CC D 3 4 Q D 3 4 Q See mechanical drawings for dimensions. 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. NanoStar,NanoFreearetrademarksofTexasInstruments. 2 PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2003–2013,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

SN74LVC1G374 SCES520C–DECEMBER2003–REVISEDDECEMBER2013 www.ti.com Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. FunctionTable INPUTS OUTPUT OE CLK D Q L ↑ L L L ↑ H H L HorL X Q H X X Z LogicDiagram(PositiveLogic) 6 OE 1 CLK C1 4 3 Q D D Absolute Maximum Ratings(1) overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyvoltagerange –0.5 6.5 V CC V Inputvoltagerange(2) –0.5 6.5 V I V Voltagerangeappliedtoanyoutputinthehigh-impedanceorpower-offstate(2) –0.5 6.5 V O V Voltagerangeappliedtoanyoutputinthehighorlowstate(2) (3) –0.5 V +0.5 V O CC I Inputclampcurrent V <0 –50 mA IK I I Outputclampcurrent V <0 –50 mA OK O I Continuousoutputcurrent ±50 mA O ContinuouscurrentthroughV orGND ±100 mA CC DBVpackage 165 θ Packagethermalimpedance(4) DCKpackage 259 °C/W JA YEP/YZPpackage 123 T Storagetemperaturerange –65 150 °C stg (1) Stressesbeyondthoselistedunder"absolutemaximumratings"maycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder"recommendedoperating conditions"isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Theinputandoutputnegative-voltageratingsmaybeexceedediftheinputandoutputcurrentratingsareobserved. (3) ThevalueofV isprovidedintherecommendedoperatingconditionstable. CC (4) ThepackagethermalimpedanceiscalculatedinaccordancewithJESD51-7. 2 SubmitDocumentationFeedback Copyright©2003–2013,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G374

SN74LVC1G374 www.ti.com SCES520C–DECEMBER2003–REVISEDDECEMBER2013 Recommended Operating Conditions(1) MIN MAX UNIT Operating 1.65 5.5 V Supplyvoltage V CC Dataretentiononly 1.5 V =1.65Vto1.95V 0.65×V CC CC V =2.3Vto2.7V 1.7 CC V High-levelinputvoltage V IH V =3Vto3.6V 2 CC V =4.5Vto5.5V 0.7×V CC CC V =1.65Vto1.95V 0.35×V CC CC V =2.3Vto2.7V 0.7 CC V Low-levelinputvoltage V IL V =3Vto3.6V 0.8 CC V =4.5Vto5.5V 0.3×V CC CC V Inputvoltage 0 5.5 V I V Outputvoltage 0 V V O CC V =1.65V –4 CC V =2.3V –8 CC I High-leveloutputcurrent –16 mA OH V =3V CC –24 V =4.5V –32 CC V =1.65V 4 CC V =2.3V 8 CC I Low-leveloutputcurrent 16 mA OL V =3V CC 24 V =4.5V 32 CC V =1.8V±0.15V,2.5V±0.2V 20 CC Δt/Δv Inputtransitionriseorfallrate V =3.3V±0.3V 10 ns/V CC V =5V±0.5V 5 CC T Operatingfree-airtemperature –40 125 °C A (1) AllunusedinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.RefertotheTIapplicationreport, CC ImplicationsofSloworFloatingCMOSInputs,literaturenumberSCBA004. Copyright©2003–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN74LVC1G374

SN74LVC1G374 SCES520C–DECEMBER2003–REVISEDDECEMBER2013 www.ti.com Electrical Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) –40°Cto85°C –40°Cto125°C PARAMETER TESTCONDITIONS VCC MIN TYP(1) MAX MIN TYP(1) MAX UNIT 1.65Vto IOH=–100μA 5.5V VCC–0.1 VCC–0.1 IOH=–4mA 1.65V 1.2 1.2 VOH IOH=–8mA 2.3V 1.9 1.9 V IOH=–16mA 2.4 2.4 3V IOH=–24mA 2.3 2.3 IOH=–32mA 4.5V 3.8 3.8 1.65Vto IOL=100μA 5.5V 0.1 0.1 IOL=4mA 1.65V 0.45 0.45 VOL IOL=8mA 2.3V 0.3 0.3 V IOL=16mA 0.4 0.4 3V IOL=24mA 0.55 0.65 IOL=32mA 4.5V 0.55 0.65 II VI=5.5VorGND 0to5.5V ±1 ±2 μA IOZ VO=0to5.5V ±5 ±5 μA Ioff VIorVO=5.5V 0 ±10 ±10 μA 1.65Vto ICC VI=5.5VorGND,IO=0 5.5V 10 10 μA ΔICC OOntheerinipnuptuatstaVtCVCC–C0o.r6GVN,D 3Vto5.5V 500 500 μA Ci VI=VCCorGND 3.3V 3 3 pF Co VO=VCCorGND 3.3V 6 6 pF (1) AlltypicalvaluesareatV =3.3V,T =25°C. CC A Timing Requirements overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted)(seeFigure1) SN74LVC1G374 –40°Cto85°C VCC=1.8V VCC=2.5V VCC=3.3V VCC=5V UNIT ±0.15V ±0.2V ±0.3V ±0.5V MIN MAX MIN MAX MIN MAX MIN MAX fclock Clockfrequency 100 125 150 175 MHz tw Pulseduration,CLKhighorlow 3.3 3 2.8 2.5 ns tsu Setuptime,databeforeCLK↑ 3.5 2.5 2 1.5 ns th Holdtime,dataafterCLK↑ 3.4 1.6 1.5 1.5 ns Timing Requirements overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted)(seeFigure1) SN74LVC1G374 –40°Cto125°C VCC=1.8V VCC=2.5V VCC=3.3V VCC=5V UNIT ±0.15V ±0.2V ±0.3V ±0.5V MIN MAX MIN MAX MIN MAX MIN MAX fclock Clockfrequency 100 125 150 175 MHz tw Pulseduration,CLKhighorlow 3.3 3 2.8 2.5 ns tsu Setuptime,databeforeCLK↑ 3.5 2.5 2 1.5 ns th Holdtime,dataafterCLK↑ 3.4 1.6 1.5 1.5 ns 4 SubmitDocumentationFeedback Copyright©2003–2013,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G374

SN74LVC1G374 www.ti.com SCES520C–DECEMBER2003–REVISEDDECEMBER2013 Switching Characteristics overrecommendedoperatingfree-airtemperaturerange,C =15pF(unlessotherwisenoted)(seeFigure1) L SN74LVC1G374 –40°Cto85°C FROM TO PARAMETER INPUT (OUTPUT) VCC=1.8V VCC=2.5V VCC=3.3V VCC=5V UNIT ±0.15V ±0.2V ±0.3V ±0.5V MIN MAX MIN MAX MIN MAX MIN MAX fmax 100 125 150 175 MHz tpd CLK Q 2.5 15 2 6 1.4 4 1 3 ns ten OE Q 2.2 12 2 4.8 1.3 3.8 1.1 2.5 ns tdis OE Q 2.2 11 2 4.8 1.6 4.5 1.2 3.1 ns Switching Characteristics overrecommendedoperatingfree-airtemperaturerange,C =30pFor50pF(unlessotherwisenoted)(seeFigure2) L SN74LVC1G374 –40°Cto85°C FROM TO PARAMETER INPUT (OUTPUT) VCC=1.8V VCC=2.5V VCC=3.3V VCC=5V UNIT ±0.15V ±0.2V ±0.3V ±0.5V MIN MAX MIN MAX MIN MAX MIN MAX fmax 100 125 150 175 MHz tpd CLK Q 2.7 18.3 1.8 8.2 1.6 6 1 4 ns ten OE Q 2 13 1.5 6.3 0.9 5 0.7 3.5 ns tdis OE Q 2 14 1.1 5.3 1.4 4.5 0.8 3.1 ns Switching Characteristics overrecommendedoperatingfree-airtemperaturerange,C =30pFor50pF(unlessotherwisenoted)(seeFigure2) L SN74LVC1G374 –40°Cto125°C FROM TO PARAMETER INPUT (OUTPUT) VCC=1.8V VCC=2.5V VCC=3.3V VCC=5V UNIT ±0.15V ±0.2V ±0.3V ±0.5V MIN MAX MIN MAX MIN MAX MIN MAX fmax 100 125 150 175 MHz tpd CLK Q 2.7 18.3 1.8 10.2 1.6 7 1 5 ns ten OE Q 2 14 1.5 8.3 0.9 6.5 0.7 5.5 ns tdis OE Q 2 16 1.1 7.3 1.4 6 0.8 5.1 ns Operating Characteristics T =25°C A TEST VCC=1.8V VCC=2.5V VCC=3.3V VCC=5V PARAMETER UNIT CONDITIONS TYP TYP TYP TYP Powerdissipation Outputsenabled 24 24 25 27 C f=10MHz pF pd capacitance Outputsdisabled 8 8 9 11 Copyright©2003–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN74LVC1G374

SN74LVC1G374 SCES520C–DECEMBER2003–REVISEDDECEMBER2013 www.ti.com PARAMETER MEASUREMENT INFORMATION V LOAD R S1 Open From Output L TEST S1 Under Test GND t /t Open C PLH PHL (see NoteA)L RL tPLZ/tPZL VLOAD t /t GND PHZ PZH LOAD CIRCUIT INPUTS V V V C R V CC V t/t M LOAD L L D I r f 1.8 V±0.15 V V £2 ns V /2 2 ×V 15 pF 1 MW 0.15 V CC CC CC 2.5 V±0.2 V V £2 ns V /2 2 ×V 15 pF 1 MW 0.15 V CC CC CC 3.3 V±0.3 V 3 V £2.5 ns 1.5 V 6 V 15 pF 1 MW 0.3 V 5 V±0.5 V V £2.5 ns V /2 2 ×V 15 pF 1 MW 0.3 V CC CC CC V I Timing Input V M 0 V t W VI tsu th V Input V V I M M Data Input V V M M 0 V 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PULSE DURATION SETUPAND HOLD TIMES Input VM VM VI COounttpruotl VM VM VI 0 V 0 V t t t t PLH PHL PZL PLZ V Output V /2 Output VM VM OH WSav1e afot rVm 1 VM V + V LOAD VOL (see NoteL OBAD) OL D VOL t t PHL PLH t t PZH PHZ Output VM VM VOH WSa1v eaOfto uGrtmpNu D2t VM VOH–VD VOH VOL (see Note B) »0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAYTIMES ENABLEAND DISABLE TIMES INVERTINGAND NONINVERTING OUTPUTS LOW-AND HIGH-LEVELENABLING NOTES: A. C includes probe and jig capacitance. L B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR£10 MHz, Z = 50W. O D. The outputs are measured one at a time, with one transition per measurement. E. t and t are the same as t . PLZ PHZ dis F. t and t are the same as t . PZL PZH en G.t and t are the same as t . PLH PHL pd H. All parameters and waveforms are not applicable to all devices. Figure1. LoadCircuitandVoltageWaveforms 6 SubmitDocumentationFeedback Copyright©2003–2013,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G374

SN74LVC1G374 www.ti.com SCES520C–DECEMBER2003–REVISEDDECEMBER2013 PARAMETER MEASUREMENT INFORMATION (continued) V LOAD R S1 Open From Output L TEST S1 Under Test GND t /t Open C PLH PHL (see NoteA)L RL tPLZ/tPZL VLOAD t /t GND PHZ PZH LOAD CIRCUIT INPUTS V V V C R V CC V t/t M LOAD L L D I r f 1.8 V±0.15 V V £2 ns V /2 2 ×V 30 pF 1 kW 0.15 V CC CC CC 2.5 V±0.2 V V £2 ns V /2 2 ×V 30 pF 500W 0.15 V CC CC CC 3.3 V±0.3 V 3 V £2.5 ns 1.5 V 6 V 50 pF 500W 0.3 V 5 V±0.5 V V £2.5 ns V /2 2 ×V 50 pF 500W 0.3 V CC CC CC V I Timing Input V M 0 V t W VI tsu th V Input V V I M M Data Input V V M M 0 V 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PULSE DURATION SETUPAND HOLD TIMES Input VM VM VI COounttpruotl VM VM VI 0 V 0 V t t t t PLH PHL PZL PLZ V Output V /2 Output VM VM OH WSav1e afot rVm 1 VM V + V LOAD VOL (see NoteL OBAD) OL D VOL t t PHL PLH t t PZH PHZ Output VM VM VOH WSa1v eaOfto uGrtmpNu D2t VM VOH–VD VOH VOL (see Note B) »0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAYTIMES ENABLEAND DISABLE TIMES INVERTINGAND NONINVERTING OUTPUTS LOW-AND HIGH-LEVELENABLING NOTES: A. C includes probe and jig capacitance. L B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR£10 MHz, Z = 50W. O D. The outputs are measured one at a time, with one transition per measurement. E. t and t are the same as t . PLZ PHZ dis F. t and t are the same as t . PZL PZH en G.t and t are the same as t . PLH PHL pd H. All parameters and waveforms are not applicable to all devices. Figure2. LoadCircuitandVoltageWaveforms Copyright©2003–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN74LVC1G374

SN74LVC1G374 SCES520C–DECEMBER2003–REVISEDDECEMBER2013 www.ti.com REVISION HISTORY ChangesfromRevisionB(September2006)toRevisionC Page • UpdateddocumenttonewTIdatasheetformat. ................................................................................................................. 1 • RemovedOrderingInformationtable.................................................................................................................................... 2 • AddedESDwarning. ............................................................................................................................................................ 2 • Updatedoperatingtemperaturerange.................................................................................................................................. 3 8 SubmitDocumentationFeedback Copyright©2003–2013,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G374

PACKAGE OPTION ADDENDUM www.ti.com 4-Apr-2019 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 74LVC1G374DCKRG4 ACTIVE SC70 DCK 6 3000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 D45 & no Sb/Br) SN74LVC1G374DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 (CA45, CA4R) & no Sb/Br) SN74LVC1G374DCKR ACTIVE SC70 DCK 6 3000 Green (RoHS CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 125 (D45, D4J, D4R) & no Sb/Br) SN74LVC1G374YZPR ACTIVE DSBGA YZP 6 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 D4N & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 4-Apr-2019 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN74LVC1G374 : •Automotive: SN74LVC1G374-Q1 NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2018 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) 74LVC1G374DCKRG4 SC70 DCK 6 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74LVC1G374DBVR SOT-23 DBV 6 3000 178.0 9.2 3.3 3.23 1.55 4.0 8.0 Q3 SN74LVC1G374DBVR SOT-23 DBV 6 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 SN74LVC1G374DCKR SC70 DCK 6 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74LVC1G374DCKR SC70 DCK 6 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 SN74LVC1G374YZPR DSBGA YZP 6 3000 178.0 9.2 1.02 1.52 0.63 4.0 8.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2018 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) 74LVC1G374DCKRG4 SC70 DCK 6 3000 180.0 180.0 18.0 SN74LVC1G374DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 SN74LVC1G374DBVR SOT-23 DBV 6 3000 202.0 201.0 28.0 SN74LVC1G374DCKR SC70 DCK 6 3000 180.0 180.0 18.0 SN74LVC1G374DCKR SC70 DCK 6 3000 180.0 180.0 18.0 SN74LVC1G374YZPR DSBGA YZP 6 3000 220.0 220.0 35.0 PackMaterials-Page2

PACKAGE OUTLINE DBV0006A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 B A 1.45 MAX PIN 1 INDEX AREA 1 6 2X 0.95 3.05 2.75 1.9 5 2 4 3 0.50 6X 0.25 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214840/B 03/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.15 per side. 4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation. 5. Refernce JEDEC MO-178. www.ti.com

EXAMPLE BOARD LAYOUT DBV0006A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 6X (1.1) 1 6X (0.6) 6 SYMM 2 5 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214840/B 03/2018 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0006A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 6X (1.1) 1 6X (0.6) 6 SYMM 2 5 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214840/B 03/2018 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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PACKAGE OUTLINE YZP0006 DSBGA - 0.5 mm max height SCALE 9.000 DIE SIZE BALL GRID ARRAY B E A BALL A1 CORNER D 0.5 MAX C SEATING PLANE 0.19 BALL TYP 0.05 C 0.15 0.5 TYP C SYMM 1 D: Max = 1.418 mm, Min =1 .358 mm B TYP 0.5 E: Max = 0.918 mm, Min =0 .858 mm TYP A 0.25 1 2 6X 0.21 SYMM 0.015 C A B 4219524/A 06/2014 NOTES: NanoFree Is a trademark of Texas Instruments. 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. NanoFreeTM package configuration. www.ti.com

EXAMPLE BOARD LAYOUT YZP0006 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.5) TYP 6X ( 0.225) 1 2 A (0.5) TYP B SYMM C SYMM LAND PATTERN EXAMPLE SCALE:40X ( 0.225) 0.05 MAX 0.05 MIN METAL METAL UNDER MASK SOLDER MASK ( 0.225) OPENING SOLDER MASK OPENING NON-SOLDER MASK DEFINED SOLDER MASK (PREFERRED) DEFINED SOLDER MASK DETAILS NOT TO SCALE 4219524/A 06/2014 NOTES: (continued) 4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information, see Texas Instruments literature number SBVA017 (www.ti.com/lit/sbva017). www.ti.com

EXAMPLE STENCIL DESIGN YZP0006 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.5) TYP 6X ( 0.25) (R0.05) TYP 1 2 A (0.5) TYP B SYMM METAL TYP C SYMM SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:40X 4219524/A 06/2014 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. www.ti.com

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