Product Sample & Technical Tools & Support & Folder Buy Documents Software Community SN74LVC1G34 SCES519M–DECEMBER2003–REVISEDAPRIL2016 SN74LVC1G34 Single Buffer Gate 1 Features 3 Description • AvailableintheUltraSmall0.64-mm2 This single buffer gate is designed for 1.65-V to 5.5-V 1 V operation. Package(DPW)with0.5-mmPitch CC • Supports5-VV Operation The SN74LVC1G34 device performs the Boolean CC functionY=Ainpositivelogic. • InputsAcceptVoltagesto5.5V • ProvidesDownTranslationtoV The CMOS device has high output drive while CC maintaining low static power dissipation over a broad • Maxt of3.5nsat3.3V pd V Operatingrange. CC • LowPowerConsumption,1-μAMaxI CC The SN74LVC1G34 is available in a variety of • ±24-mAOutputDriveat3.3V packages, including the ultra-small DPW package • IoffSupportsLiveInsertion,PartialPowerDown withabodysizeof0.8mm ×0.8mm. Mode,andBackDriveProtection • Latch-UpPerformanceExceeds100mA DeviceInformation(1) PerJESD78,ClassII DEVICENAME PACKAGE(PINS) BODYSIZE • ESDProtectionExceedsJESD22 SN74LVC1G34YFP DSBGA(4) 0.76mm×0.76mm – 2000-VHuman-BodyModel(A114-A) SN74LVC1G34YZP DSBGA(5) 1.38mm×0.88mm – 200-VMachineModel(A115-A) SN74LVC1G34YZV DSBGA(4) 0.88mm×0.88mm SN74LVC1G34DPW X2SON(5) 0.80mm×0.80mm – 1000-VCharged-DeviceModel(C101) SN74LVC1G34DBV SOT-23(5) 2.90mm×2.80mm 2 Applications SN74LVC1G34DCK SC70(5) 2.00mm×2.10mm SN74LVC1G34DRL SOT(5) 1.60mm×1.60mm • AVReceiver SN74LVC1G34DRY SON(6) 1.45mm×1.00mm • AudioDock:Portable SN74LVC1G34DSF SON(6) 1.00mm×1.00mm • Blu-rayPlayerandHomeTheater (1) For all available packages, see the orderable addendum at • DVDRecorderandPlayer theendofthedatasheet. • EmbeddedPC • MP3Player/Recorder(PortableAudio) • PersonalDigitalAssistant(PDA) • Power:Telecom/ServerAC/DCSupply:Single Controller:AnalogandDigital • SolidStateDrive(SSD):ClientandEnterprise • TV:LCD/DigitalandHigh-Definition(HDTV) • Tablet:Enterprise • VideoAnalytics:Server • WirelessHeadset,Keyboard,andMouse 4 Simplified Schematic A Y 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

SN74LVC1G34 SCES519M–DECEMBER2003–REVISEDAPRIL2016 www.ti.com Table of Contents 1 Features.................................................................. 1 9 DetailedDescription............................................ 11 2 Applications........................................................... 1 9.1 Overview.................................................................11 3 Description............................................................. 1 9.2 FunctionalBlockDiagram.......................................11 4 SimplifiedSchematic............................................. 1 9.3 FeatureDescription.................................................11 9.4 DeviceFunctionalModes........................................11 5 RevisionHistory..................................................... 2 10 ApplicationandImplementation........................ 12 6 PinConfigurationandFunctions......................... 4 10.1 ApplicationInformation..........................................12 7 Specifications......................................................... 5 10.2 TypicalApplication ...............................................12 7.1 AbsoluteMaximumRatings .....................................5 11 PowerSupplyRecommendations..................... 13 7.2 ESDRatings..............................................................5 12 Layout................................................................... 13 7.3 RecommendedOperatingConditions......................6 7.4 ThermalInformation..................................................6 12.1 LayoutGuidelines.................................................13 7.5 ElectricalCharacteristics...........................................7 12.2 LayoutExample....................................................13 7.6 SwitchingCharacteristics,C =15pF......................8 13 DeviceandDocumentationSupport................. 14 L 7.7 SwitchingCharacteristics,–40°Cto85°C.................8 13.1 CommunityResources..........................................14 7.8 SwitchingCharacteristics,–40°Cto125°C...............8 13.2 Trademarks...........................................................14 7.9 OperatingCharacteristics..........................................8 13.3 ElectrostaticDischargeCaution............................14 7.10 TypicalCharacteristics............................................8 13.4 Glossary................................................................14 8 ParameterMeasurementInformation..................9 14 Mechanical,Packaging,andOrderable Information........................................................... 14 5 Revision History ChangesfromRevisionL(April2014)toRevisionM Page • ChangedX2SONfrom4pinto5pinonDeviceInformationtable........................................................................................ 1 • MovedStoragetemperaturerangefromESDRatingstabletoAbsoluteMaximumRatingstable........................................ 5 • AddedJunctiontemperaturetoAbsoluteMaximumRatingstable ....................................................................................... 5 • AddedpackagetemperaturespecificationforDSBGApackage ........................................................................................... 6 ChangesfromRevisionK(March2014)toRevisionL Page • AddedDeviceInformationtable............................................................................................................................................. 1 • AddedPinFunctionstable..................................................................................................................................................... 4 • UpdatedHandlingRatingstable. ........................................................................................................................................... 5 • Updatedoperatingtemperaturerange................................................................................................................................... 6 • AddedThermalInformationtable. ......................................................................................................................................... 6 • AddedTypicalCharacteristics. .............................................................................................................................................. 8 • AddedDetailedDescriptionsection..................................................................................................................................... 11 • AddedApplicationandImplementationsection. ................................................................................................................. 12 ChangesfromRevisionJ(December2013)toRevisionK Page • AddedApplications................................................................................................................................................................. 1 • DPWPackage. ...................................................................................................................................................................... 4 • MovedT toHandlingRatingstable..................................................................................................................................... 5 stg 2 SubmitDocumentationFeedback Copyright©2003–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G34

SN74LVC1G34 www.ti.com SCES519M–DECEMBER2003–REVISEDAPRIL2016 ChangesfromRevisionI(June2011)toRevisionJ Page • UpdateddocumenttonewTIdatasheetformat.................................................................................................................... 1 • RemovedOrderingInformationtable..................................................................................................................................... 1 Copyright©2003–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN74LVC1G34

SN74LVC1G34 SCES519M–DECEMBER2003–REVISEDAPRIL2016 www.ti.com 6 Pin Configuration and Functions DBV PACKAGE DCK PACKAGE DRLPACKAGE DRYPACKAGE (TOPVIEW) (TOPVIEW) (TOPVIEW) (TOPVIEW) N.C. 1 5 VCC N.C. 1 5 VCC N.C. 1 5 VCC N.C. 1 6 VCC A 2 A 2 5 N.C. A 2 A 2 GGNNDD 3 4 Y GND 3 4 Y GND 3 4 Y GND 3 4 Y DPW PACKAGE YZV PACKAGE YFPPACKAGE DSF PACKAGE YZPPACKAGE (TOPVIEW) (TOPVIEW) (TOPVIEW) (TOPVIEW) (TOPVIEW) GND N.CA. 12 3 54 VYCC GNAD BA11 BA22 YVCC GNAD BA11 BA22 YVCC N.CA. 21 65 VNC.CC. DNUA AB11 A2 VCC GND 3 4 Y GND C1 C2 Y See mechanical drawings for dimensions. N.C.–No internal connection DNU–Do not use PinFunctions PIN DRL, DESCRIPTION NAME DPW DRY,DSF YZP YFP,YZV DCK,DBV NC 1 1 1,5 A1 – Notconnected A 2 2 2 B1 A1 Input GND 3 3 3 C1 B1 Ground Y 4 4 4 C2 B2 Output VCC 5 5 6 A2 A2 Powerpin 4 SubmitDocumentationFeedback Copyright©2003–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G34

SN74LVC1G34 www.ti.com SCES519M–DECEMBER2003–REVISEDAPRIL2016 7 Specifications 7.1 Absolute Maximum Ratings(1) overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyvoltagerange –0.5 6.5 V CC V Inputvoltagerange –0.5 6.5 V I V Voltagerangeappliedtoanyoutputinthehigh-impedanceorpower-offstate(2) –0.5 6.5 V O V Voltagerangeappliedtoanyoutputinthehighorlowstate(2)(3) –0.5 V +0.5 V O CC I Inputclampcurrent V <0 –50 mA IK I I Outputclampcurrent V <0 –50 mA OK O I Continuousoutputcurrent ±50 mA O ContinuouscurrentthroughV orGND ±100 mA CC T Storagetemperaturerange -65 150 °C stg T MaxJunctiontemperature 150 °C J (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperating Conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Theinputandoutputnegative-voltageratingsmaybeexceedediftheinputandoutputcurrentratingsareobserved. (3) ThevalueofV isprovidedintheRecommendedOperatingConditionstable. CC 7.2 ESD Ratings MIN MAX UNIT Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001,all pins(1) ±2 V Electrostaticdischarge kV (ESD) Chargeddevicemodel(CDM),perJEDECspecification JESD22-C101,allpins(2) ±1 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. Copyright©2003–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN74LVC1G34

SN74LVC1G34 SCES519M–DECEMBER2003–REVISEDAPRIL2016 www.ti.com 7.3 Recommended Operating Conditions(1) MIN MAX UNIT Operating 1.65 5.5 V Supplyvoltage V CC Dataretentiononly 1.5 V =1.65Vto1.95V 0.65×V CC CC V =2.3Vto2.7V 1.7 CC V High-levelinputvoltage V IH V =3Vto3.6V 2 CC V =4.5Vto5.5V 0.7×V CC CC V =1.65Vto1.95V 0.35×V CC CC V =2.3Vto2.7V 0.7 CC V Low-levelinputvoltage V IL V =3Vto3.6V 0.8 CC V =4.5Vto5.5V 0.3×V CC CC V Inputvoltage 0 5.5 V I V Outputvoltage 0 V V O CC V =1.65V –4 CC V =2.3V –8 CC I High-leveloutputcurrent –16 mA OH V =3V CC –24 V =4.5V –32 CC V =1.65V 4 CC V =2.3V 8 CC I Low-leveloutputcurrent 16 mA OL V =3V CC 24 V =4.5V 32 CC V =1.8V±0.15V,2.5V±0.2V 20 CC Δt/Δv Inputtransitionriseorfallrate V =3.3V±0.3V 10 ns/V CC V =5V±0.5V 10 CC T Operatingfree-airtemperature DSBGApackage –40 85 °C A Allotherpackages -40 125 °C (1) AllunusedinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.RefertotheTIapplicationreport, CC ImplicationsofSloworFloatingCMOSInputs,literaturenumberSCBA004. 7.4 Thermal Information SN74LVC1G34 THERMALMETRIC(1) DBV DCK DRL DRY YZP DPW UNIT 5PINS 5PINS 5PINS 6PINS 5PINS 4PINS RθJA Junction-to-ambientthermalresistance 229 278 243 439 130 340 RθJC(top) Junction-to-case(top)thermalresistance 164 93 78 277 54 215 RθJB Junction-to-boardthermalresistance 62 65 78 271 51 294 °C/W ψJT Junction-to-topcharacterizationparameter 44 2 10 84 1 41 ψJB Junction-to-boardcharacterizationparameter 62 64 77 271 50 294 RθJC(bot) Junction-to-case(bottom)thermalresistance – – – – – 250 (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. 6 SubmitDocumentationFeedback Copyright©2003–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G34

SN74LVC1G34 www.ti.com SCES519M–DECEMBER2003–REVISEDAPRIL2016 7.5 Electrical Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) –40°Cto85°C –40°Cto125°C PARAMETER TESTCONDITIONS VCC MIN TYP(1) MAX MIN TYP(1) MAX UNIT IOH=–100μA 1.65Vto5.5V VCC –0.1 VCC –0.1 IOH=–4mA 1.65V 1.2 1.2 IOH=–8mA 2.3V 1.9 1.9 VOH V IOH=–16mA 2.4 2.4 3V IOH=–24mA 2.3 2.3 IOH=–32mA 4.5V 3.8 3.8 IOL=100μA 1.65Vto5.5V 0.1 0.1 IOL=4mA 1.65V 0.45 0.45 IOL=8mA 2.3V 0.3 0.3 VOL V IOL=16mA 0.4 0.4 3V IOL=24mA 0.55 0.55 IOL=32mA 4.5V 0.55 0.55 II VI=5.5VorGND 0to5.5V ±1 ±2 μA Ioff VIorVO=5.5V 0 ±10 ±10 μA ICC VI=5.5VorGND, IO=0 1.65Vto5.5V 1 10 μA ΔICC OOntheerinipnuptuatstaVtCVCCC–o0r.6GVN,D 3Vto5.5V 500 500 μA Ci VI=VCCorGND 3.3V 3.5 pF (1) AlltypicalvaluesareatV =3.3V,T =25°C. CC A Copyright©2003–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN74LVC1G34

SN74LVC1G34 SCES519M–DECEMBER2003–REVISEDAPRIL2016 www.ti.com 7.6 Switching Characteristics, C = 15 pF L overrecommendedoperatingfree-airtemperaturerange,C =15pF(unlessotherwisenoted)(seeFigure3) L –40°Cto85°C PARAMETER FROM TO VCC=1.8V VCC=2.5V VCC=3.3V VCC=5V UNIT (INPUT) (OUTPUT) ±0.15V ±0.2V ±0.3V ±0.5V MIN MAX MIN MAX MIN MAX MIN MAX tpd A Y 2 9.9 1.5 6 1 3.5 1 2.9 ns 7.7 Switching Characteristics, –40°C to 85°C overrecommendedoperatingfree-airtemperaturerange,C =30pFor50pF(unlessotherwisenoted)(seeFigure4) L –40°Cto85°C PARAMETER FROM TO VCC=1.8V VCC=2.5V VCC=3.3V VCC=5V UNIT (INPUT) (OUTPUT) ±0.15V ±0.2V ±0.3V ±0.5V MIN MAX MIN MAX MIN MAX MIN MAX tpd A Y 3.2 8.6 1.5 4.4 1.5 4.1 1 3.2 ns 7.8 Switching Characteristics, –40°C to 125°C overrecommendedoperatingfree-airtemperaturerange,C =30pFor50pF(unlessotherwisenoted)(seeFigure4) L –40°Cto125°C PARAMETER FROM TO VCC=1.8V VCC=2.5V VCC=3.3V VCC=5V UNIT (INPUT) (OUTPUT) ±0.15V ±0.2V ±0.3V ±0.5V MIN MAX MIN MAX MIN MAX MIN MAX tpd A Y 3.2 9.5 1.5 5.1 1.5 4.7 1 3.9 ns 7.9 Operating Characteristics T =25°C A TEST VCC=1.8V VCC=2.5V VCC=3.3V VCC=5V PARAMETER UNIT CONDITIONS TYP TYP TYP TYP C Powerdissipationcapacitance f=10MHz 16 16 16 18 pF pd 7.10 Typical Characteristics 2.5 5 TPD TPD 2 4 s 1.5 s 3 n n D - D - P P T 1 T 2 0.5 1 0 0 -100 -50 0 50 100 150 0 1 2 3 4 5 6 Temperature - °C Vcc - V D001 D002 Figure1.TPDAcrossTemperatureat3.3VVcc Figure2.TPDAcrossVccat25°C 8 SubmitDocumentationFeedback Copyright©2003–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G34

SN74LVC1G34 www.ti.com SCES519M–DECEMBER2003–REVISEDAPRIL2016 8 Parameter Measurement Information VLOAD From Output RL S1 Open TEST S1 Under Test GND tPLH/tPHL Open (see Note CAL) RL tPLZ/tPZL VLOAD tPHZ/tPZH GND LOAD CIRCUIT INPUTS VCC VI tr/tf VM VLOAD CL RL VD 1.8 V ± 0.15 V VCC ≤2 ns VCC/2 2 × VCC 15 pF 1 MW 0.15 V 2.5 V ± 0.2 V VCC ≤2 ns VCC/2 2 × VCC 15 pF 1 MW 0.15 V 3.3 V ± 0.3 V 3 V ≤2.5 ns 1.5 V 6 V 15 pF 1 MW 0.3 V 5 V ± 0.5 V VCC ≤2.5 ns VCC/2 2 × VCC 15 pF 1 MW 0.3 V VI Timing Input VM 0 V tw VI tsu th VI Input VM VM Data Input VM VM 0 V 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PULSE DURATION SETUP AND HOLD TIMES VI VI Output Input VM VM Control VM VM 0 V 0 V tPLH tPHL tPZL tPLZ Output VOH Waveform 1 VLOAD/2 Output VM VM VOL (Ss1e ea tN VoLteO ABD) VM VOL + VD VOL tPHL tPLH tPZH tPHZ Output VM VM VOH WSa1v eaOfto uGrtmpNu D2t VM VOH − VD VOH VOL (see Note B) ≈0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES ENABLE AND DISABLE TIMES INVERTING AND NONINVERTING OUTPUTS LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 W . D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure3. LoadCircuitandVoltageWaveforms Copyright©2003–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SN74LVC1G34

SN74LVC1G34 SCES519M–DECEMBER2003–REVISEDAPRIL2016 www.ti.com Parameter Measurement Information (continued) VLOAD From Output RL S1 Open TEST S1 Under Test GND tPLH/tPHL Open (see Note CAL) RL tPLZ/tPZL VLOAD tPHZ/tPZH GND LOAD CIRCUIT INPUTS VCC VI tr/tf VM VLOAD CL RL VD 1.8 V ± 0.15 V VCC ≤2 ns VCC/2 2 × VCC 30 pF 1 kW 0.15 V 2.5 V ± 0.2 V VCC ≤2 ns VCC/2 2 × VCC 30 pF 500 W 0.15 V 3.3 V ± 0.3 V 3 V ≤2.5 ns 1.5 V 6 V 50 pF 500 W 0.3 V 5 V ± 0.5 V VCC ≤2.5 ns VCC/2 2 × VCC 50 pF 500 W 0.3 V VI Timing Input VM 0 V tw VI tsu th VI Input VM VM Data Input VM VM 0 V 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PULSE DURATION SETUP AND HOLD TIMES VI VI Output Input VM VM Control VM VM 0 V 0 V tPLH tPHL tPZL tPLZ Output VOH Waveform 1 VLOAD/2 Output VM VM VOL (Ss1e ea tN VoLteO ABD) VM VOL + VD VOL tPHL tPLH tPZH tPHZ Output VM VM VOH WSa1v eaOfto uGrtmpNu D2t VM VOH − VD VOH VOL (see Note B) ≈0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES ENABLE AND DISABLE TIMES INVERTING AND NONINVERTING OUTPUTS LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 W . D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure4. LoadCircuitandVoltageWaveforms 10 SubmitDocumentationFeedback Copyright©2003–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G34

SN74LVC1G34 www.ti.com SCES519M–DECEMBER2003–REVISEDAPRIL2016 9 Detailed Description 9.1 Overview The SN74LVC1G34 device contains one buffer gate device and performs the Boolean function Y = A. This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs, off off preventingdamagingcurrentbackflowthroughthedevicewhenitispowereddown. The DPW package technology is a major breakthrough in IC packaging. Its tiny 0.64 mm square footprint saves significant board space over other package options while still retaining the traditional manufacturing friendly lead pitchof0.5mm. 9.2 Functional Block Diagram A Y 9.3 Feature Description • Wideoperatingvoltagerange. – Operatesfrom1.65Vto5.5V. • Allowsdownvoltagetranslation. • Inputsacceptvoltagesto5.5V. • I featureallowsvoltagesontheinputsandoutputswhenV is0V. off CC 9.4 Device Functional Modes FunctionTable INPUT OUTPUT A Y H H L L Copyright©2003–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:SN74LVC1G34

SN74LVC1G34 SCES519M–DECEMBER2003–REVISEDAPRIL2016 www.ti.com 10 Application and Implementation 10.1 Application Information The SN74LVC1G34 is a high drive CMOS device that can be used as a buffer with a high output drive, such as an LED application. It can produce 24 mA of drive current at 3.3 V making it ideal for driving multiple outputs and good for high speed applications up to 100 MHz. The inputs are 5.5 V tolerant allowing it to translate down to V . CC 10.2 Typical Application Basic LED Driver Buffer Function VCC VCC uC or Logic uC or Logic uC or Logic LVC1G34 LVC1G34 10.2.1 DesignRequirements This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive will also create fast edgesintolightloadssoroutingandloadconditionsshouldbeconsideredtopreventringing. 10.2.2 DetailedDesignProcedure 1. RecommendedInputConditions – Risetimeandfalltimespecs.See(Δt/ΔV)intheRecommendedOperatingConditionstable. – Specifiedhighandlowlevels.See(V andV )intheRecommendedOperatingConditions table. IH IL – Inputs are overvoltage tolerant allowing them to go as high as (VI max) in the Recommended Operating ConditionstableatanyvalidV . CC 2. RecommendOutputConditions – Load currents should not exceed (I max) per output and should not exceed (Continuous current through O V orGND)totalcurrentforthepart.TheselimitsarelocatedintheAbsoluteMaxRatings table. CC – OutputsshouldnotbepulledaboveV . CC 12 SubmitDocumentationFeedback Copyright©2003–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G34

SN74LVC1G34 www.ti.com SCES519M–DECEMBER2003–REVISEDAPRIL2016 Typical Application (continued) 10.2.3 ApplicationCurves 10 Icc 1.8V 9 Icc 2.5V 8 Icc 3.3V Icc 5V 7 6 A m c - 5 Ic 4 3 2 1 0 0 20 40 60 80 Frequency - MHz D003 Figure5.IccvsFrequency 11 Power Supply Recommendations The power supply can be any voltage between the min and max supply voltage rating located in the RecommendedOperatingConditionstable. Each Vcc pin should have a good bypass capacitor to prevent power disturbance. For devices with a single supply a 0.1-μF capacitor is recommended and if there are multiple Vcc pins then a 0.01-μF or 0.022-μF capacitor is recommended for each power pin. It is ok to parallel multiple bypass caps to reject different frequencies of noise. 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor should be installedasclosetothepowerpinaspossibleforbestresults. 12 Layout 12.1 Layout Guidelines When using multiple bit logic devices inputs should not ever float. In many cases, functions or parts of functions of digital logic devices are unused; for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Specified below are the rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to Gnd or Vcc whichever make more sense or is more convenient. 12.2 Layout Example VCC Input Unused Input Output Unused Input Output Input Copyright©2003–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:SN74LVC1G34

SN74LVC1G34 SCES519M–DECEMBER2003–REVISEDAPRIL2016 www.ti.com 13 Device and Documentation Support 13.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 13.2 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 13.3 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 13.4 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 14 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 14 SubmitDocumentationFeedback Copyright©2003–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G34

PACKAGE OPTION ADDENDUM www.ti.com 1-Aug-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) SN74LVC1G34DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (C345, C34F, C34J, & no Sb/Br) C34K, C34R) (C34H, C34P, C34S) SN74LVC1G34DBVRE4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 C345 & no Sb/Br) C34S SN74LVC1G34DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 C345 & no Sb/Br) C34S SN74LVC1G34DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (C345, C34J, C34K, & no Sb/Br) C34R) (C34H, C34S) SN74LVC1G34DBVTE4 ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 C345 & no Sb/Br) C34S SN74LVC1G34DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 C345 & no Sb/Br) C34S SN74LVC1G34DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (C95, C9F, C9J, C9 & no Sb/Br) K, C9R) (C9H, C9P, C9S) SN74LVC1G34DCKRE4 ACTIVE SC70 DCK 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 C95 & no Sb/Br) C9S SN74LVC1G34DCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 C95 & no Sb/Br) C9S SN74LVC1G34DCKT ACTIVE SC70 DCK 5 250 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (C95, C9J, C9K, C9 & no Sb/Br) R) (C9H, C9S) SN74LVC1G34DCKTG4 ACTIVE SC70 DCK 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 C95 & no Sb/Br) C9S SN74LVC1G34DPWR ACTIVE X2SON DPW 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 P4 & no Sb/Br) SN74LVC1G34DRLR ACTIVE SOT-5X3 DRL 5 4000 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 (C97, C9R) & no Sb/Br) SN74LVC1G34DRYR ACTIVE SON DRY 6 5000 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 C9 & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 1-Aug-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) SN74LVC1G34DSFR ACTIVE SON DSF 6 5000 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 C9 & no Sb/Br) SN74LVC1G34YFPR ACTIVE DSBGA YFP 4 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 C9 & no Sb/Br) N SN74LVC1G34YZPR ACTIVE DSBGA YZP 5 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 C9N & no Sb/Br) SN74LVC1G34YZVR ACTIVE DSBGA YZV 4 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 C9 & no Sb/Br) N (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 1-Aug-2020 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74LVC1G34DBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 SN74LVC1G34DBVR SOT-23 DBV 5 3000 178.0 9.2 3.3 3.23 1.55 4.0 8.0 Q3 SN74LVC1G34DBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 SN74LVC1G34DBVRG4 SOT-23 DBV 5 3000 178.0 9.2 3.3 3.23 1.55 4.0 8.0 Q3 SN74LVC1G34DBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 SN74LVC1G34DBVT SOT-23 DBV 5 250 178.0 9.2 3.3 3.23 1.55 4.0 8.0 Q3 SN74LVC1G34DBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 SN74LVC1G34DBVTG4 SOT-23 DBV 5 250 178.0 9.2 3.3 3.23 1.55 4.0 8.0 Q3 SN74LVC1G34DCKR SC70 DCK 5 3000 180.0 8.4 2.47 2.3 1.25 4.0 8.0 Q3 SN74LVC1G34DCKR SC70 DCK 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 SN74LVC1G34DCKR SC70 DCK 5 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74LVC1G34DCKRG4 SC70 DCK 5 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74LVC1G34DCKT SC70 DCK 5 250 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 SN74LVC1G34DCKT SC70 DCK 5 250 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74LVC1G34DCKT SC70 DCK 5 250 180.0 8.4 2.47 2.3 1.25 4.0 8.0 Q3 SN74LVC1G34DCKTG4 SC70 DCK 5 250 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74LVC1G34DPWR X2SON DPW 5 3000 178.0 8.4 0.91 0.91 0.5 2.0 8.0 Q3 SN74LVC1G34DRLR SOT-5X3 DRL 5 4000 180.0 9.5 1.78 1.78 0.69 4.0 8.0 Q3 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2020 Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74LVC1G34DRYR SON DRY 6 5000 180.0 9.5 1.15 1.6 0.75 4.0 8.0 Q1 SN74LVC1G34DSFR SON DSF 6 5000 180.0 9.5 1.16 1.16 0.5 4.0 8.0 Q2 SN74LVC1G34YFPR DSBGA YFP 4 3000 178.0 9.2 0.89 0.89 0.58 4.0 8.0 Q1 SN74LVC1G34YZPR DSBGA YZP 5 3000 178.0 9.2 1.02 1.52 0.63 4.0 8.0 Q1 SN74LVC1G34YZVR DSBGA YZV 4 3000 178.0 9.2 1.0 1.0 0.63 4.0 8.0 Q1 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74LVC1G34DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74LVC1G34DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74LVC1G34DBVR SOT-23 DBV 5 3000 202.0 201.0 28.0 SN74LVC1G34DBVRG4 SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74LVC1G34DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 SN74LVC1G34DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 SN74LVC1G34DBVT SOT-23 DBV 5 250 202.0 201.0 28.0 SN74LVC1G34DBVTG4 SOT-23 DBV 5 250 180.0 180.0 18.0 SN74LVC1G34DCKR SC70 DCK 5 3000 202.0 201.0 28.0 SN74LVC1G34DCKR SC70 DCK 5 3000 180.0 180.0 18.0 SN74LVC1G34DCKR SC70 DCK 5 3000 180.0 180.0 18.0 SN74LVC1G34DCKRG4 SC70 DCK 5 3000 180.0 180.0 18.0 PackMaterials-Page2

PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2020 Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74LVC1G34DCKT SC70 DCK 5 250 180.0 180.0 18.0 SN74LVC1G34DCKT SC70 DCK 5 250 180.0 180.0 18.0 SN74LVC1G34DCKT SC70 DCK 5 250 202.0 201.0 28.0 SN74LVC1G34DCKTG4 SC70 DCK 5 250 180.0 180.0 18.0 SN74LVC1G34DPWR X2SON DPW 5 3000 205.0 200.0 33.0 SN74LVC1G34DRLR SOT-5X3 DRL 5 4000 184.0 184.0 19.0 SN74LVC1G34DRYR SON DRY 6 5000 184.0 184.0 19.0 SN74LVC1G34DSFR SON DSF 6 5000 184.0 184.0 19.0 SN74LVC1G34YFPR DSBGA YFP 4 3000 220.0 220.0 35.0 SN74LVC1G34YZPR DSBGA YZP 5 3000 220.0 220.0 35.0 SN74LVC1G34YZVR DSBGA YZV 4 3000 220.0 220.0 35.0 PackMaterials-Page3

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PACKAGE OUTLINE DSF0006A X2SON - 0.4 mm max height SCALE 10.000 PLASTIC SMALL OUTLINE - NO LEAD 1.05 B A 0.95 PIN 1 INDEX AREA 1.05 0.95 0.4 MAX C SEATING PLANE 0.05 C (0.11) TYP SYMM 0.05 0.00 3 4 2X SYMM 0.7 4X 0.35 6 1 0.22 6X 0.12 (0.1) PIN 1 ID 0.45 0.07 C B A 6X 0.35 0.05 C 4220597/A 06/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Reference JEDEC registration MO-287, variation X2AAF. www.ti.com

EXAMPLE BOARD LAYOUT DSF0006A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD 6X (0.6) (R0.05) TYP 1 6X (0.17) 6 SYMM 4X (0.35) 4 3 SYMM (0.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:40X 0.07 MIN 0.07 MAX EXPOSED METAL ALL AROUND ALL AROUND EXPOSED METAL SOLDER MASK SOLDER MASK METAL METAL UNDER OPENING OPENING SOLDER MASK NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4220597/A 06/2017 NOTES: (continued) 4. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). www.ti.com

EXAMPLE STENCIL DESIGN DSF0006A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD 6X (0.6) (R0.05) TYP 1 6X (0.17) 6 SYMM 4X (0.35) 4 3 SYMM (0.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:40X 4220597/A 06/2017 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 1.45 B A 0.90 PIN 1 INDEX AREA 1 5 2X 0.95 3.05 2.75 1.9 1.9 2 4 3 0.5 5X 0.3 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com

EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM 2 (1.9) 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com

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PACKAGE OUTLINE DPW0005A X2SON - 0.4 mm max height SCALE 12.000 PLASTIC SMALL OUTLINE - NO LEAD B 0.85 A 0.75 PIN 1 INDEX AREA 0.85 0.75 0.4 MAX C SEATING PLANE NOTE 3 (0.1) 0.05 (0.25) 4X (0.05) 0.00 0.25 0.1 2 4 NOTE 3 2X 3 2X (0.26) 0.48 5 1 0.27 0.27 4X 0.17 0.17 0.1 C A B (0.06) 0.05 C 0.32 3X 0.23 4223102/B 09/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The size and shape of this feature may vary. www.ti.com

EXAMPLE BOARD LAYOUT DPW0005A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD (0.78) SYMM ( 0.1) 4X (0.42) VIA 0.05 MIN ALL AROUND 1 TYP 5 4X (0.22) SYMM 4X (0.26) (0.48) 3 2 4 (R0.05) TYP SOLDER MASK 4X (0.06) OPENING, TYP ( 0.25) (0.21) TYP METAL UNDER EXPOSED METAL SOLDER MASK CLEARANCE TYP LAND PATTERN EXAMPLE SOLDER MASK DEFINED SCALE:60X 4223102/B 09/2017 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, refer to QFN/SON PCB application note in literature No. SLUA271 (www.ti.com/lit/slua271). www.ti.com

EXAMPLE STENCIL DESIGN DPW0005A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD 4X (0.42) 4X (0.06) 5 4X (0.22) 1 ( 0.24) 4X (0.26) SYMM (0.21) (0.48) TYP SOLDER MASK 3 EDGE 2 4 (R0.05) TYP SYMM (0.78) SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL EXPOSED PAD 92% PRINTED SOLDER COVERAGE BY AREA SCALE:100X 4223102/B 09/2017 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

PACKAGE OUTLINE YZP0005 DSBGA - 0.5 mm max height SCALE 8.000 DIE SIZE BALL GRID ARRAY B E A BALL A1 CORNER D C 0.5 MAX SEATING PLANE 0.19 0.05 C 0.15 BALL TYP 0.5 TYP C SYMM 1 B D: Max = 1.418 mm, Min =1 .357 mm TYP 0.5 TYP E: Max = 0.918 mm, Min =0 .857 mm A 0.25 5X 1 2 0.21 0.015 C A B SYMM 4219492/A 05/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com

EXAMPLE BOARD LAYOUT YZP0005 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.5) TYP 5X ( 0.23) 1 2 A (0.5) TYP SYMM B C SYMM LAND PATTERN EXAMPLE SCALE:40X SOLDER MASK 0.05 MAX 0.05 MIN ( 0.23) OPENING SOLDER MASK OPENING ( 0.23) METAL METAL UNDER SOLDER MASK NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS NOT TO SCALE 4219492/A 05/2017 NOTES: (continued) 3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009). www.ti.com

EXAMPLE STENCIL DESIGN YZP0005 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.5) TYP 5X ( 0.25) (R0.05) TYP 1 2 A (0.5) TYP B SYMM C METAL SYMM TYP SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:40X 4219492/A 05/2017 NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. www.ti.com

D: Max = 0.918 mm, Min =0 .858 mm E: Max = 0.918 mm, Min =0 .858 mm

PACKAGE OUTLINE YFP0004 DSBGA - 0.5 mm max height SCALE 10.000 DIE SIZE BALL GRID ARRAY B E A BALL A1 CORNER D C 0.5 MAX SEATING PLANE 0.19 0.13 BALL TYP 0.05 C 0.4 TYP B D: Max = 0.79 mm, Min = 0.73 mm SYMM 0.4 E: Max = 0.79 mm, Min = 0.73 mm TYP A 0.25 4X 0.21 1 2 0.015 C A B SYMM 4223507/A 01/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com

EXAMPLE BOARD LAYOUT YFP0004 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.4) TYP 4X ( 0.23) 1 2 A SYMM (0.4) TYP B SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:50X ( 0.23) 0.05 MAX 0.05 MIN METAL UNDER METAL SOLDER MASK EXPOSED SOLDER MASK EXPOSED ( 0.23) METAL OPENING METAL SOLDER MASK OPENING NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS NOT TO SCALE 4223507/A 01/2017 NOTES: (continued) 3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009). www.ti.com

EXAMPLE STENCIL DESIGN YFP0004 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.4) TYP 4X ( 0.25) (R0.05) TYP 1 2 A SYMM (0.4) TYP B METAL TYP SYMM SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:50X 4223507/A 01/2017 NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. www.ti.com

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GENERIC PACKAGE VIEW DRY 6 USON - 0.6 mm max height PLASTIC SMALL OUTLINE - NO LEAD Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4207181/G

PACKAGE OUTLINE DRY0006A USON - 0.6 mm max height SCALE 8.500 PLASTIC SMALL OUTLINE - NO LEAD B 1.05 A 0.95 PIN 1 INDEX AREA 1.5 1.4 0.6 MAX C SEATING PLANE 0.05 0.00 0.08 C 3X 0.6 SYMM (0.127) TYP (0.05) TYP 3 4 4X 0.5 SYMM 2X 1 6 1 0.25 6X 0.15 0.4 0.3 0.1 C A B 0.05 C PIN 1 ID (OPTIONAL) 0.35 5X 0.25 4222894/A 01/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com

EXAMPLE BOARD LAYOUT DRY0006A USON - 0.6 mm max height PLASTIC SMALL OUTLINE - NO LEAD SYMM (0.35) 5X (0.3) 1 6 6X (0.2) SYMM 4X (0.5) 4 3 (R0.05) TYP (0.6) LAND PATTERN EXAMPLE 1:1 RATIO WITH PKG SOLDER PADS EXPOSED METAL SHOWN SCALE:40X 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND EXPOSED EXPOSED METAL METAL SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DETAILS 4222894/A 01/2018 NOTES: (continued) 3. For more information, see QFN/SON PCB application report in literature No. SLUA271 (www.ti.com/lit/slua271). www.ti.com

EXAMPLE STENCIL DESIGN DRY0006A USON - 0.6 mm max height PLASTIC SMALL OUTLINE - NO LEAD SYMM (0.35) 5X (0.3) 1 6 6X (0.2) SYMM 4X (0.5) 4 3 (R0.05) TYP (0.6) SOLDER PASTE EXAMPLE BASED ON 0.075 - 0.1 mm THICK STENCIL SCALE:40X 4222894/A 01/2018 NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

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