ICGOO在线商城 > 集成电路(IC) > 逻辑 - 缓冲器,驱动器,接收器,收发器 > SN74LVC1G06DCKR
数量阶梯 | 香港交货 | 国内含税 |
+xxxx | $xxxx | ¥xxxx |
查看当月历史价格
查看今年历史价格
SN74LVC1G06DCKR产品简介:
ICGOO电子元器件商城为您提供SN74LVC1G06DCKR由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 SN74LVC1G06DCKR价格参考¥0.64-¥1.24。Texas InstrumentsSN74LVC1G06DCKR封装/规格:逻辑 - 缓冲器,驱动器,接收器,收发器, Buffer, Inverting 1 Element 1 Bit per Element Open Drain Output SC-70-5。您可以下载SN74LVC1G06DCKR参考资料、Datasheet数据手册功能说明书,资料中有SN74LVC1G06DCKR 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC)半导体 |
描述 | IC INVERTER SINGLE 1INPUT SC705缓冲器和线路驱动器 Single Invert w/OD |
产品分类 | |
品牌 | Texas Instruments |
产品手册 | http://www.ti.com/lit/gpn/sn74lvc1g06 |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 逻辑集成电路,缓冲器和线路驱动器,Texas Instruments SN74LVC1G06DCKR74LVC |
数据手册 | |
产品型号 | SN74LVC1G06DCKR |
PCN设计/规格 | |
不同V、最大CL时的最大传播延迟 | 3ns @ 5V,50pF |
产品目录页面 | |
产品种类 | 缓冲器和线路驱动器 |
传播延迟时间 | 4 ns at 3.3 V, 3 ns at 5 V |
低电平输出电流 | 32 mA |
供应商器件封装 | SC-70-5 |
其它名称 | 296-8484-6 |
包装 | Digi-Reel® |
单位重量 | 2.500 mg |
商标 | Texas Instruments |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
封装 | Reel |
封装/外壳 | 6-TSSOP(5 引线),SC-88A,SOT-353 |
封装/箱体 | SC-70-5 |
工作温度 | -40°C ~ 125°C |
工厂包装数量 | 3000 |
最大工作温度 | + 85 C |
最小工作温度 | - 40 C |
极性 | Inverting |
标准包装 | 1 |
每芯片的通道数量 | 1 |
特性 | 开路漏极 |
电压-电源 | 1.65 V ~ 5.5 V |
电流-输出高,低 | -,32mA |
电流-静态(最大值) | 10µA |
电源电压-最大 | 5.5 V |
电源电压-最小 | 1.65 V |
电路数 | 1 |
系列 | SN74LVC1G06 |
输入数 | 1 |
输入线路数量 | 1 |
输出类型 | Open Drain |
输出线路数量 | 1 |
逻辑电平-低 | 0.7 V ~ 0.8 V |
逻辑电平-高 | 1.7 V ~ 2 V |
逻辑类型 | |
逻辑系列 | LVC |
Product Order Technical Tools & Support & Reference Folder Now Documents Software Community Design SN74LVC1G06 SCES295Z–JUNE2000–REVISEDNOVEMBER2017 SN74LVC1G06 Single Inverter Buffer/Driver With Open-Drain Output 1 Features 3 Description • ESDProtectionExceedsJESD22 This single inverter buffer and driver is designed for 1 1.65-Vto5.5-VV operation. – 2000-VHumanBodyModel(A114-A) CC NanoFree package technology is a major – 200-VMachineModel(A115-A) breakthrough in IC packaging concepts, using the die – 1000-VCharged-DeviceModel(C101) asthepackage. • AvailableintheTexasInstruments The output of the SN74LVC1G06 device is open- NanoFree™Package drain and can be connected to other open-drain • Supports5-VVCCOperation outputs to implement active-low wired-OR or active- • InputandOpen-DrainOutputAccept high wired-AND functions. The maximum sink current Voltagesupto5.5V is32mA. • Maximumt of4.5nsat3.3Vat125°C This device is fully specified for partial-power-down pd • LowPowerConsumption,10-µAMaximumICC applications using Ioff.The Ioff circuitry disables the outputs when the device is powered down. This • ±24-mAOutputDriveat3.3Vforopen-drain inhibits current backflow into the device which devices preventsdamagetothedevice. • I SupportsPartial-Power-DownModeandBack- off DriveProtection DeviceInformation(1) • Latch-UpPerformanceExceeds100mAPer PARTNUMBER PACKAGE BODYSIZE(NOM) JESD78,ClassII SN74LVC1G06DBV SOT-23(5) 2.90mm×1.60mm • CanBeUsedForUporDownTranslation SN74LVC1G06DCK SC70(5) 2.00mm×1.25mm • SchmittTriggerActiononAllPorts SN74LVC1G06DRL SOT-5X3(5) 1.60mm×1.20mm SN74LVC1G06DRY SON(6) 1.45mm×1.00mm 2 Applications SN74LVC1G06DSF SON(6) 1.00mmx1.00mm • AVReceivers SN74LVC1G06YZP DSBGA(5) 1.40mm×0.90mm • Blu-rayPlayersandHomeTheaters SN74LVC1G06YZV DSBGA(4) 0.90mm×0.90mm • DVDRecordersandPlayers SN74LVC1G06DPW X2SON(5) 0.80mmx0.80mm • DesktoporNotebookPCs (1) For all available packages, see the orderable addendum at theendofthedatasheet. • DigitalRadioorInternetRadioPlayers • DigitalVideoCameras(DVC) LogicDiagram(PositiveLogic) • EmbeddedPCs 2 4 A Y • GPS:PersonalNavigationDevices • MobileInternetDevices • NetworkProjectorFront-Ends • PortableMediaPlayers • ProAudioMixers • SmokeDetectors • SolidStateDrive(SSD):Enterprise • High-Definition(HDTV) • Tablets:Enterprise • AudioDocks:Portable • DLPFrontProjectionSystems • DVRandDVS • DigitalPictureFrame(DPF) • DigitalStillCameras 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.
SN74LVC1G06 SCES295Z–JUNE2000–REVISEDNOVEMBER2017 www.ti.com Table of Contents 1 Features.................................................................. 1 8.2 FunctionalBlockDiagram.........................................9 2 Applications........................................................... 1 8.3 FeatureDescription...................................................9 3 Description............................................................. 1 8.4 DeviceFunctionalModes........................................10 4 RevisionHistory..................................................... 2 9 ApplicationandImplementation........................ 11 9.1 ApplicationInformation............................................11 5 PinConfigurationandFunctions......................... 3 9.2 TypicalApplication .................................................11 6 Specifications......................................................... 4 10 PowerSupplyRecommendations..................... 13 6.1 AbsoluteMaximumRatings......................................4 11 Layout................................................................... 13 6.2 ESDRatings ............................................................4 6.3 RecommendedOperatingConditions......................5 11.1 LayoutGuidelines.................................................13 6.4 ThermalInformation..................................................5 11.2 LayoutExample....................................................13 6.5 ElectricalCharacteristifcs..........................................6 12 DeviceandDocumentationSupport................. 14 6.6 SwitchingCharacteristics:–40°Cto+85°C...............6 12.1 ReceivingNotificationofDocumentationUpdates14 6.7 SwitchingCharacteristics:–40°Cto+125°C.............6 12.2 CommunityResources..........................................14 6.8 OperatingCharacteristics..........................................6 12.3 Trademarks...........................................................14 6.9 TypicalCharacteristics..............................................7 12.4 ElectrostaticDischargeCaution............................14 7 ParameterMeasurementInformation..................8 12.5 Glossary................................................................14 8 DetailedDescription.............................................. 9 13 Mechanical,Packaging,andOrderable Information........................................................... 14 8.1 Overview...................................................................9 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionY(February2017)toRevisionZ Page • ChangedvaluesintheThermalInformationtabletoalignwithJEDECstandards............................................................... 5 • UpdatedFeatureDescriptiontoincludemoredetailedinformationaboutspecificdevicefeatures...................................... 9 • AddedDPWlayoutexample................................................................................................................................................ 13 ChangesfromRevisionX(August2015)toRevisionY Page • ChangedLogicDiagram(PositiveLogic)labelsfrom:A-1,Y-3to:A-2,Y-4.......................................................................... 1 • AddedReceivingNotificationofDocumentationUpdatessection....................................................................................... 14 ChangesfromRevisionW(December2013)toRevisionX Page • AddedDeviceInformationtable,PinConfigurationandFunctionssection,ESDRatingstable,ThermalInformation table,TypicalCharacteristicssection,FeatureDescriptionsection,DeviceFunctionalModes,Applicationand Implementationsection,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentation Supportsection,andMechanical,Packaging,andOrderableInformationsection ............................................................... 1 ChangesfromRevisionV(November2012)toRevisionW Page • UpdateddocumenttonewTIdatasheetformat.................................................................................................................... 1 • RemovedOrderingInformationtable..................................................................................................................................... 1 • UpdatedI inFeatures.......................................................................................................................................................... 1 off • Updatedoperatingtemperaturerange................................................................................................................................... 5 2 SubmitDocumentationFeedback Copyright©2000–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G06
SN74LVC1G06 www.ti.com SCES295Z–JUNE2000–REVISEDNOVEMBER2017 5 Pin Configuration and Functions DBVPackage 5-PinSOT-23 DRLPackage TopView 5-PinSOT-5X3 TopView NC 1 5 V NC 1 5 V CC CC A 2 A 2 GND 3 4 Y GND 3 4 Y DCKPackage 5-PinSC70 DPWPackage TopView 5-PinX2SON TopView NC 1 5 V CC NC V GND CC A 2 A Y GND 3 4 Y DRYPackage 6-PinSON DSFPackage TopView 6-PinSON TopView NC 1 6 VCC NC 1 6 VCC A 2 5 NC A 2 5 NC GND 3 4 Y GND 3 4 Y YZPPackage 5-PinDSBGA YZVPackage TopView 4-PinDSBGA TopView NC V A1 A2 CC A V A A1 A2 CC B1 GND Y B1 B2 GND Y C1 C2 PinFunctions(1)(2) PIN DBV,DCK, DRY, I/O DESCRIPTION NAME YZP YZV DRL,DPW DSF A 2 2 B1 A1 I Input DNU — — A1 — — Donotuse GND 3 3 C1 B1 — Ground 1 NC 1 — — — Notconnected 5 V 5 6 A2 A2 — Powerpin CC Y 4 4 C2 B2 O Output (1) NC–Nointernalconnection (2) Seemechanicaldrawingsfordimensions. Copyright©2000–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN74LVC1G06
SN74LVC1G06 SCES295Z–JUNE2000–REVISEDNOVEMBER2017 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT V Supplyvoltage –0.5 6.5 V CC V Inputvoltage(2) –0.5 6.5 V I V Voltageappliedtoanyoutputinthehigh-impedanceorpower-offstate(2) –0.5 6.5 V O V Voltageappliedtoanyoutputinthehighorlowstate(2)(3) –0.5 6.5 V O I Inputclampcurrent V <0 –50 mA IK I I Outputclampcurrent V <0 –50 mA OK O I Continuousoutputcurrent ±50 mA O ContinuouscurrentthroughV orGND ±100 mA CC T Junctiontemperature –65 150 °C j T Storagetemperature –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperating Conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Theinputandoutputnegative-voltageratingsmaybeexceedediftheinputandoutputcurrentratingsareobserved. (3) ThevalueofV isprovidedintheRecommendedOperatingConditionstable. CC 6.2 ESD Ratings VALUE UNIT Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) 2000 V Electrostaticdischarge Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) 1000 V (ESD) MachineModel(MM),perA115-A 200 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 4 SubmitDocumentationFeedback Copyright©2000–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G06
SN74LVC1G06 www.ti.com SCES295Z–JUNE2000–REVISEDNOVEMBER2017 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT Operating 1.65 5.5 V Supplyvoltage V CC Dataretentiononly 1.5 V =1.65Vto1.95V 0.65×V CC CC V =2.3Vto2.7V 1.7 CC V High-levelinputvoltage V IH V =3Vto3.6V 2 CC V =4.5Vto5.5V 0.7×V CC CC V =1.65Vto1.95V 0.35×V CC CC V =2.3Vto2.7V 0.7 CC V Low-levelinputvoltage V IL V =3Vto3.6V 0.8 CC V =4.5Vto5.5V 0.3×V CC CC V Inputvoltage 0 5.5 V I V Outputvoltage 0 5.5 V O V =1.65V 4 CC V =2.3V 8 CC I Low-leveloutputcurrent 16 mA OL V =3V CC 24 V =4.5V 32 CC V =1.8V±0.15V,2.5V±0.2V 20 CC Δt/Δv Inputtransitionriseorfallrate V =3.3V±0.3V 10 ns/V CC V =5V±0.5V 5 CC T Operatingfree-airtemperature –40 125 °C A (1) AllunusedinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.SeeImplicationsofSloworFloating CC CMOSInputsapplicationreport. 6.4 Thermal Information SN74LVC1G06 THERMALMETRIC(1) DBV DCK DRL DRY DPW YZV YZP UNIT (SOT-23) (SC70) (SOT-5X3) (SON) (X2SON) (DSBGA) (DSBGA) 5PINS 5PINS 5PINS 5PINS 5PINS 4PINS 5PINS Junction-to-ambient R 231.5 276.1 296.2 369.6 511 168.2 144.4 °C/W θJA thermalresistance Junction-to-case(top) R 139.4 178.9 137.3 257.6 241.9 2.1 1.3 °C/W θJC(top) thermalresistance Junction-to-board R 71.1 70.9 145.3 230.8 374.2 55.9 39.9 °C/W θJB thermalresistance Junction-to-top ψ characterization 45.2 47 14.7 77.2 45 1.1 0.5 °C/W JT parameter Junction-to-board ψ characterization 70.7 69.3 145.9 231 373.3 56.3 39.7 °C/W JB parameter Junction-to-case R (bottom)thermal N/A N/A N/A N/A 168 N/A N/A °C/W θJC(bot) resistance (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. Copyright©2000–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN74LVC1G06
SN74LVC1G06 SCES295Z–JUNE2000–REVISEDNOVEMBER2017 www.ti.com 6.5 Electrical Characteristifcs overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS V MIN TYP(1) MAX UNIT CC I =100μA 1.65Vto5.5V 0.1 OL I =4mA 1.65V 0.45 OL High-level I =8mA 2.3V 0.3 OL V output V OL voltage IOL=16mA 0.4 3V I =24mA 0.55 OL I =32mA 4.5V 0.55 OL Inflection- I V =5.5VorGND Ainput 0to5.5V ±1 µA I pointcurrent I Off-state I V orV =5.5V 0 ±10 µA off current I O I V =5.5VorGND,I =0 1.65Vto5.5V 10 µA CC I O OneinputatV –0.6V, ΔI CC 3Vto5.5V 500 µA CC OtherinputsatV orGND CC Input C V =V orGND 3.3V 4 pF I capacitance I CC Off-state C V =V orGND 3.3V 5 pF O capacitance O CC (1) AlltypicalvaluesareatV =3.3V,T =25°C. CC A 6.6 Switching Characteristics: –40°C to +85°C overrecommendedoperatingfree-airtemperaturerange,T =–40°Cto+85°C(unlessotherwisenoted)(seeFigure3) A FROM PARAMETER TO(OUTPUT) V MIN MAX UNIT (INPUT) CC 1.8V±0.15V 2.2 6.5 Propagation 2.5V±0.2V 1.1 4 t A Y ns pd delay 3.3V±0.3V 1.2 4 5V±0.5V 1 3 6.7 Switching Characteristics: –40°C to +125°C overrecommendedoperatingfree-airtemperaturerange,T =–40°Cto+125°C(unlessotherwisenoted)(seeFigure3) A PARAMETER FROM(INPUT) TO(OUTPUT) V MIN MAX UNIT CC 1.8V±0.15V 2.2 7 Propagation 2.5V±0.2V 1.1 4.5 t A Y ns pd delay 3.3V±0.3V 1.2 4.5 5V±0.5V 1 3.5 6.8 Operating Characteristics T =25°C A PARAMETER TESTCONDITIONS V TYP UNIT CC 1.8V 3 2.5V 3 C Powerdissipationcapacitance f=10MHz pF pd 3.3V 4 5V 6 6 SubmitDocumentationFeedback Copyright©2000–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G06
SN74LVC1G06 www.ti.com SCES295Z–JUNE2000–REVISEDNOVEMBER2017 6.9 Typical Characteristics 2.5 6 TPD TPD 5 2 4 s 1.5 s n n D - D - 3 P P T 1 T 2 0.5 1 0 0 -100 -50 0 50 100 150 0 1 2 3 4 5 6 Temperature - °C Vcc - V D001 D002 Figure1.TPDAcrossTemperatureat3.3-VV Figure2.TPDAcrossV at25°C CC CC Copyright©2000–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN74LVC1G06
SN74LVC1G06 SCES295Z–JUNE2000–REVISEDNOVEMBER2017 www.ti.com 7 Parameter Measurement Information VLOAD From Output RL S1 Open TEST S1 Under Test GND tPZL (see Notes E and F) VLOAD CL RL tPLZ (see Notes E and G) VLOAD (see Note A) tPHZ/tPZH VLOAD LOAD CIRCUIT INPUT VCC VI tr/tf VM VLOAD CL RL VD 1.8 V ± 0.15 V VCC ≤ 2 ns VCC/2 2 × VCC 30 pF 1 kW 0.15 V 2.5 V ± 0.2 V VCC ≤ 2 ns VCC/2 2 × VCC 30 pF 500 W 0.15 V 3.3 V ± 0.3 V 3 V ≤ 2.5 ns 1.5 V 6 V 50 pF 500 W 0.3 V 5 V ± 0.5 V VCC ≤ 2.5 ns VCC/2 2 × VCC 50 pF 500 W 0.3 V VI Timing Input VM 0 V tw tsu th VI Input VM VM Data Input VM VM VI 0 V 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PULSE DURATION SETUP AND HOLD TIMES VI Output VI Input VM VM Control VM VM 0 V 0 V tPLH tPHL tPZL tPLZ VOH Output VLOAD/2 Output VM VM VOL (WSs1ea eva etN fVooLtreOm AB D1) VM VOL + VD VOL tPHL tPLH tPZH tPHZ Output VM VM VVOOHL (WSs1ea eva etNO fVoouLtretOmp ABu D2)t VM VLOAD/2 − VD ≈V0L OVAD/2 VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES ENABLE AND DISABLE TIMES INVERTING AND NONINVERTING OUTPUTS LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 W . D. The outputs are measured one at a time, with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at VM. G. tPLZ is measured at VOL + VD . H. All parameters and waveforms are not applicable to all devices. Figure3. LoadCircuitandVoltageWaveforms(OpenDrain) 8 SubmitDocumentationFeedback Copyright©2000–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G06
SN74LVC1G06 www.ti.com SCES295Z–JUNE2000–REVISEDNOVEMBER2017 8 Detailed Description 8.1 Overview The SN74LVC1G06 device contains one open-drain inverter with a maximum sink current of 32 mA. This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs when the off off deviceispowereddown.Thisinhibitscurrentbackflowintothedevicewhichpreventsdamagetothedevice. 8.2 Functional Block Diagram 2 4 A Y Figure4. LogicDiagram(PositiveLogic) 8.3 Feature Description 8.3.1 CMOSOpen-DrainOutputs The open-drain output allows the device to sink current to GND but not to source current from V . When the CC outputisnotactivelypullingthelinelow,itwillgointoahighimpedancestate(tri-state).Thisallowsthedeviceto be used for a wide variety of applications, including up-translation and down-translation, as the output voltage canbedeterminedbyanexternalpullup. The drive capability of this device creates fast edges into light loads so routing and load conditions should be considered to prevent ringing. Additionally, the outputs of this device are capable of driving larger currents than the device can sustain without being damaged. It is important for the power output of the device to be limited to avoid thermal runaway and damage due to over-current. The electrical and thermal limits defined in the Absolute MaximumRatingsmustbefollowedatalltimes. 8.3.2 StandardCMOSInputs The impendence for standard CMOS inputs is high. Typically, a CMOS input is modeled as a resistor in parallel withtheinputcapacitanceasshownintheElectricalCharacteristics.Theworstcaseresistanceiscalculatedwith the maximum input voltage, given in the Absolute Maximum Ratings, and the maximum input leakage current, givenintheElectricalCharacteristics,usingohm'slaw(R=V ÷ I). Signals applied to the inputs need to have fast edge rates, as defined by Δt/Δv in the Recommended Operating Conditions to avoid excessive current consumption and oscillations. If a slow or noisy input signal is required, a devicewithaSchmitt-triggerinputshouldbeusedtoconditiontheinputsignalbeforethestandardCMOSinput. Copyright©2000–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SN74LVC1G06
SN74LVC1G06 SCES295Z–JUNE2000–REVISEDNOVEMBER2017 www.ti.com Feature Description (continued) 8.3.3 NegativeClampingDiodes TheinputsandoutputstothisdevicehavenegativeclampingdiodesasdepictedinFigure5. CAUTION Voltages beyond the values specified in the Absolute Maximum Ratings table can cause damage to the device. The input negative-voltage and the output voltage ratings maybeexceedediftheinputandoutputclamp-currentratingsareobserved. Device VCC Input Logic Output -IIK -IOK GND Figure5. ElectricalPlacementofClampingDiodesforEachInputandOutput 8.3.4 PartialPowerDown(I ) off Each input and output enter a high impedance state when the supply voltage is 0 V. The maximum leakage into oroutofanyinputoroutputpinonthedeviceisspecifiedbyI intheElectricalCharacteristics. off 8.3.5 Over-voltageTolerantInputs Input signals to this device can be driven above the supply voltage as long as the input signals remain below the maximuminputvoltagevaluespecifiedintheRecommendedOperatingConditions. 8.4 Device Functional Modes Table1liststhefunctionalmodesoftheSN74LVC1G06. Table1.FunctionTable INPUT OUTPUT A Y L Hi-Z H L 10 SubmitDocumentationFeedback Copyright©2000–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G06
SN74LVC1G06 www.ti.com SCES295Z–JUNE2000–REVISEDNOVEMBER2017 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information The SN74LVC1G06 is a high-drive CMOS device that can be used to implement a high output drive buffer, such as an LED application. It can sink 32 mA of current at 4.5 V making it ideal for high-drive applications. It is good for high-speed applications up to 100 MHz. The inputs are 5.5-V tolerant allowing it to translate up or down to V .BelowshowsasimpleLEDdriverapplicationforasinglechannelofthedevice. CC 9.2 Typical Application VPU V CC From MCU Figure6. TypicalApplicationDiagram 9.2.1 DesignRequirements ThisdeviceusesCMOStechnologyandhasbalancedoutputdrive.Takecaretoavoidbuscontentionbecauseit can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads soroutingandloadconditionsshouldbeconsideredtopreventringing. 9.2.2 DetailedDesignProcedure 1. RecommendedInputConditions – Risetimeandfalltimespecs.See(Δt/ΔV)intheRecommendedOperatingConditionstable. – Specifiedhighandlowlevels.See(V andV )intheRecommendedOperatingConditions table. IH IL – Inputs are overvoltage tolerant allowing them to go as high as (V max) in the Recommended Operating I ConditionstableatanyvalidV . CC 2. RecommendedOutputConditions – Load currents should not exceed (I max) per output and should not exceed (Continuous current through O V orGND)totalcurrentforthepart.TheselimitsarelocatedintheAbsoluteMaximumRatings table. CC – Outputsshouldnotbepulledabove5.5V. Copyright©2000–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:SN74LVC1G06
SN74LVC1G06 SCES295Z–JUNE2000–REVISEDNOVEMBER2017 www.ti.com Typical Application (continued) 9.2.3 ApplicationCurve 1600 Icc 1.8V 1400 Icc 2.5V Icc 3.3V 1200 Icc 5V 1000 A µ c - 800 c I 600 400 200 0 0 20 40 60 80 Frequency - MHz D001 Figure7. I vsFrequency CC 12 SubmitDocumentationFeedback Copyright©2000–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G06
SN74LVC1G06 www.ti.com SCES295Z–JUNE2000–REVISEDNOVEMBER2017 10 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in the RecommendedOperatingConditionstable. The V pin must have a good bypass capacitor to prevent power disturbance. A 0.1-µF capacitor is CC recommended, and it is ok to parallel multiple bypass caps to reject different frequencies of noise. 0.1-µF and 1- µF capacitors are commonly used in parallel. The bypass capacitor must be installed as close to the power pin aspossibleforbestresults. 11 Layout 11.1 Layout Guidelines Even low data rate digital signals can contain high-frequency signal components due to fast edge rates. When a printed-circuit board (PCB) trace turns a corner at a 90° angle, a reflection can occur. A reflection occurs primarily because of the change of width of the trace. At the apex of the turn, the trace width increases to 1.414 times the width. This increase upsets the transmission-line characteristics, especially the distributed capacitance and self–inductance of the trace which results in the reflection. Not all PCB traces can be straight and therefore sometracesmustturncorners.Figure8 showsprogressivelybettertechniquesofroundingcorners.Onlythelast example(BEST)maintainsconstanttracewidthandminimizesreflections. An example layout is given in Figure 9 for the DPW (X2SON-5) package. This example layout includes a 0402 (metric) capacitor and uses the measurements found in the example board layout appended to this end of this datasheet. A via of diameter 0.1 mm (3.973 mil) is placed directly in the center of the device. This via can be usedtotraceoutthecenterpinconnectionthroughanotherboardlayer,oritcanbeleftoutofthelayout 11.2 Layout Example WORST BETTER BEST Figure8. TraceExample 0402 0.1 (cid:133)F Bypass Capacitor mil 4 8 mil 8 mil 8 mil SOLDER MASK OPENING, TYP METAL UNDER SOLDER MASK, TYP Figure9. ExampleLayoutWithDPW(X2SON-5)Package Copyright©2000–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:SN74LVC1G06
SN74LVC1G06 SCES295Z–JUNE2000–REVISEDNOVEMBER2017 www.ti.com 12 Device and Documentation Support 12.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 12.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.3 Trademarks NanoFree,E2EaretrademarksofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.4 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowserbasedversionsofthisdatasheet,refertothelefthandnavigation. 14 SubmitDocumentationFeedback Copyright©2000–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC1G06
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN74LVC1G06DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (C065, C06F, C06J, & no Sb/Br) C06R, C06T) (C06H, C06P, C06S) SN74LVC1G06DBVRE4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 C06F & no Sb/Br) SN74LVC1G06DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 C06F & no Sb/Br) SN74LVC1G06DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (C065, C06F, C06J, & no Sb/Br) C06R) (C06H, C06P, C06S) SN74LVC1G06DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 C06F & no Sb/Br) SN74LVC1G06DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 (CT5, CTF, CTK, CT & no Sb/Br) R, CTT) (CTH, CTS) SN74LVC1G06DCKRE4 ACTIVE SC70 DCK 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 (CT5, CTF, CTK, CT & no Sb/Br) R, CTT) (CTH, CTS) SN74LVC1G06DCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 (CT5, CTF, CTK, CT & no Sb/Br) R, CTT) (CTH, CTS) SN74LVC1G06DCKT ACTIVE SC70 DCK 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 (CT5, CTF, CTK, CT & no Sb/Br) R) (CTH, CTS) SN74LVC1G06DCKTE4 ACTIVE SC70 DCK 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 (CT5, CTF, CTK, CT & no Sb/Br) R) (CTH, CTS) SN74LVC1G06DCKTG4 ACTIVE SC70 DCK 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 (CT5, CTF, CTK, CT & no Sb/Br) R) (CTH, CTS) SN74LVC1G06DPWR ACTIVE X2SON DPW 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 CO & no Sb/Br) SN74LVC1G06DRLR ACTIVE SOT-5X3 DRL 5 4000 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 (CT7, CTR) & no Sb/Br) Addendum-Page 1
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN74LVC1G06DRYR ACTIVE SON DRY 6 5000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 CT & no Sb/Br) SN74LVC1G06DSFR ACTIVE SON DSF 6 5000 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 CT & no Sb/Br) SN74LVC1G06YZPR ACTIVE DSBGA YZP 5 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 CTN & no Sb/Br) SN74LVC1G06YZVR ACTIVE DSBGA YZV 4 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 CT & no Sb/Br) N (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 2
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN74LVC1G06 : •Enhanced Product: SN74LVC1G06-EP NOTE: Qualified Version Definitions: •Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 3
PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74LVC1G06DBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 SN74LVC1G06DBVR SOT-23 DBV 5 3000 178.0 9.2 3.3 3.23 1.55 4.0 8.0 Q3 SN74LVC1G06DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 SN74LVC1G06DBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 SN74LVC1G06DBVRG4 SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 SN74LVC1G06DBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 SN74LVC1G06DBVT SOT-23 DBV 5 250 178.0 9.2 3.3 3.23 1.55 4.0 8.0 Q3 SN74LVC1G06DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 SN74LVC1G06DBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 SN74LVC1G06DBVTG4 SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 SN74LVC1G06DCKR SC70 DCK 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 SN74LVC1G06DCKR SC70 DCK 5 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74LVC1G06DCKR SC70 DCK 5 3000 180.0 8.4 2.47 2.3 1.25 4.0 8.0 Q3 SN74LVC1G06DCKT SC70 DCK 5 250 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74LVC1G06DCKT SC70 DCK 5 250 180.0 8.4 2.47 2.3 1.25 4.0 8.0 Q3 SN74LVC1G06DPWR X2SON DPW 5 3000 178.0 8.4 0.91 0.91 0.5 2.0 8.0 Q3 SN74LVC1G06DRLR SOT-5X3 DRL 5 4000 180.0 8.4 1.98 1.78 0.69 4.0 8.0 Q3 SN74LVC1G06DRLR SOT-5X3 DRL 5 4000 180.0 9.5 1.78 1.78 0.69 4.0 8.0 Q3 PackMaterials-Page1
PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2020 Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74LVC1G06DRYR SON DRY 6 5000 180.0 9.5 1.15 1.6 0.75 4.0 8.0 Q1 SN74LVC1G06DSFR SON DSF 6 5000 180.0 9.5 1.16 1.16 0.5 4.0 8.0 Q2 SN74LVC1G06YZPR DSBGA YZP 5 3000 178.0 9.2 1.02 1.52 0.63 4.0 8.0 Q1 SN74LVC1G06YZVR DSBGA YZV 4 3000 178.0 9.2 1.0 1.0 0.63 4.0 8.0 Q1 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74LVC1G06DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74LVC1G06DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74LVC1G06DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74LVC1G06DBVR SOT-23 DBV 5 3000 202.0 201.0 28.0 SN74LVC1G06DBVRG4 SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74LVC1G06DBVT SOT-23 DBV 5 250 202.0 201.0 28.0 SN74LVC1G06DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 SN74LVC1G06DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 SN74LVC1G06DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 SN74LVC1G06DBVTG4 SOT-23 DBV 5 250 180.0 180.0 18.0 SN74LVC1G06DCKR SC70 DCK 5 3000 180.0 180.0 18.0 SN74LVC1G06DCKR SC70 DCK 5 3000 180.0 180.0 18.0 SN74LVC1G06DCKR SC70 DCK 5 3000 202.0 201.0 28.0 PackMaterials-Page2
PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2020 Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74LVC1G06DCKT SC70 DCK 5 250 180.0 180.0 18.0 SN74LVC1G06DCKT SC70 DCK 5 250 202.0 201.0 28.0 SN74LVC1G06DPWR X2SON DPW 5 3000 205.0 200.0 33.0 SN74LVC1G06DRLR SOT-5X3 DRL 5 4000 202.0 201.0 28.0 SN74LVC1G06DRLR SOT-5X3 DRL 5 4000 184.0 184.0 19.0 SN74LVC1G06DRYR SON DRY 6 5000 184.0 184.0 19.0 SN74LVC1G06DSFR SON DSF 6 5000 184.0 184.0 19.0 SN74LVC1G06YZPR DSBGA YZP 5 3000 220.0 220.0 35.0 SN74LVC1G06YZVR DSBGA YZV 4 3000 220.0 220.0 35.0 PackMaterials-Page3
PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 1.45 B A 0.90 PIN 1 INDEX AREA 1 5 2X 0.95 3.05 2.75 1.9 1.9 2 4 3 0.5 5X 0.3 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com
EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com
EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM 2 (1.9) 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com
None
PACKAGE OUTLINE DPW0005A X2SON - 0.4 mm max height SCALE 12.000 PLASTIC SMALL OUTLINE - NO LEAD B 0.85 A 0.75 PIN 1 INDEX AREA 0.85 0.75 0.4 MAX C SEATING PLANE NOTE 3 (0.1) 0.05 (0.25) 4X (0.05) 0.00 0.25 0.1 2 4 NOTE 3 2X 3 2X (0.26) 0.48 5 1 0.27 0.27 4X 0.17 0.17 0.1 C A B (0.06) 0.05 C 0.32 3X 0.23 4223102/B 09/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The size and shape of this feature may vary. www.ti.com
EXAMPLE BOARD LAYOUT DPW0005A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD (0.78) SYMM ( 0.1) 4X (0.42) VIA 0.05 MIN ALL AROUND 1 TYP 5 4X (0.22) SYMM 4X (0.26) (0.48) 3 2 4 (R0.05) TYP SOLDER MASK 4X (0.06) OPENING, TYP ( 0.25) (0.21) TYP METAL UNDER EXPOSED METAL SOLDER MASK CLEARANCE TYP LAND PATTERN EXAMPLE SOLDER MASK DEFINED SCALE:60X 4223102/B 09/2017 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, refer to QFN/SON PCB application note in literature No. SLUA271 (www.ti.com/lit/slua271). www.ti.com
EXAMPLE STENCIL DESIGN DPW0005A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD 4X (0.42) 4X (0.06) 5 4X (0.22) 1 ( 0.24) 4X (0.26) SYMM (0.21) (0.48) TYP SOLDER MASK 3 EDGE 2 4 (R0.05) TYP SYMM (0.78) SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL EXPOSED PAD 92% PRINTED SOLDER COVERAGE BY AREA SCALE:100X 4223102/B 09/2017 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com
PACKAGE OUTLINE YZP0005 DSBGA - 0.5 mm max height SCALE 8.000 DIE SIZE BALL GRID ARRAY B E A BALL A1 CORNER D C 0.5 MAX SEATING PLANE 0.19 0.05 C 0.15 BALL TYP 0.5 TYP C SYMM 1 B D: Max = 1.418 mm, Min =1 .358 mm TYP 0.5 TYP E: Max = 0.918 mm, Min =0 .858 mm A 0.25 5X 1 2 0.21 0.015 C A B SYMM 4219492/A 05/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com
EXAMPLE BOARD LAYOUT YZP0005 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.5) TYP 5X ( 0.23) 1 2 A (0.5) TYP SYMM B C SYMM LAND PATTERN EXAMPLE SCALE:40X SOLDER MASK 0.05 MAX 0.05 MIN ( 0.23) OPENING SOLDER MASK OPENING ( 0.23) METAL METAL UNDER SOLDER MASK NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS NOT TO SCALE 4219492/A 05/2017 NOTES: (continued) 3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009). www.ti.com
EXAMPLE STENCIL DESIGN YZP0005 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.5) TYP 5X ( 0.25) (R0.05) TYP 1 2 A (0.5) TYP B SYMM C METAL SYMM TYP SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:40X 4219492/A 05/2017 NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. www.ti.com
D: Max = 0.918 mm, Min =0 .858 mm E: Max = 0.918 mm, Min =0 .858 mm
None
None
PACKAGE OUTLINE DSF0006A X2SON - 0.4 mm max height SCALE 10.000 PLASTIC SMALL OUTLINE - NO LEAD 1.05 B A 0.95 PIN 1 INDEX AREA 1.05 0.95 0.4 MAX C SEATING PLANE 0.05 C (0.11) TYP SYMM 0.05 0.00 3 4 2X SYMM 0.7 4X 0.35 6 1 0.22 6X 0.12 (0.1) PIN 1 ID 0.45 0.07 C B A 6X 0.35 0.05 C 4220597/A 06/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Reference JEDEC registration MO-287, variation X2AAF. www.ti.com
EXAMPLE BOARD LAYOUT DSF0006A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD 6X (0.6) (R0.05) TYP 1 6X (0.17) 6 SYMM 4X (0.35) 4 3 SYMM (0.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:40X 0.07 MIN 0.07 MAX EXPOSED METAL ALL AROUND ALL AROUND EXPOSED METAL SOLDER MASK SOLDER MASK METAL METAL UNDER OPENING OPENING SOLDER MASK NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4220597/A 06/2017 NOTES: (continued) 4. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). www.ti.com
EXAMPLE STENCIL DESIGN DSF0006A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD 6X (0.6) (R0.05) TYP 1 6X (0.17) 6 SYMM 4X (0.35) 4 3 SYMM (0.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:40X 4220597/A 06/2017 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com
None
None
GENERIC PACKAGE VIEW DRY 6 USON - 0.6 mm max height PLASTIC SMALL OUTLINE - NO LEAD Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4207181/G
PACKAGE OUTLINE DRY0006A USON - 0.6 mm max height SCALE 8.500 PLASTIC SMALL OUTLINE - NO LEAD B 1.05 A 0.95 PIN 1 INDEX AREA 1.5 1.4 0.6 MAX C SEATING PLANE 0.05 0.00 0.08 C 3X 0.6 SYMM (0.127) TYP (0.05) TYP 3 4 4X 0.5 SYMM 2X 1 6 1 0.25 6X 0.15 0.4 0.3 0.1 C A B 0.05 C PIN 1 ID (OPTIONAL) 0.35 5X 0.25 4222894/A 01/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com
EXAMPLE BOARD LAYOUT DRY0006A USON - 0.6 mm max height PLASTIC SMALL OUTLINE - NO LEAD SYMM (0.35) 5X (0.3) 1 6 6X (0.2) SYMM 4X (0.5) 4 3 (R0.05) TYP (0.6) LAND PATTERN EXAMPLE 1:1 RATIO WITH PKG SOLDER PADS EXPOSED METAL SHOWN SCALE:40X 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND EXPOSED EXPOSED METAL METAL SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DETAILS 4222894/A 01/2018 NOTES: (continued) 3. For more information, see QFN/SON PCB application report in literature No. SLUA271 (www.ti.com/lit/slua271). www.ti.com
EXAMPLE STENCIL DESIGN DRY0006A USON - 0.6 mm max height PLASTIC SMALL OUTLINE - NO LEAD SYMM (0.35) 5X (0.3) 1 6 6X (0.2) SYMM 4X (0.5) 4 3 (R0.05) TYP (0.6) SOLDER PASTE EXAMPLE BASED ON 0.075 - 0.1 mm THICK STENCIL SCALE:40X 4222894/A 01/2018 NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com
IMPORTANTNOTICEANDDISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated