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SN74LVC07APWT产品简介:
ICGOO电子元器件商城为您提供SN74LVC07APWT由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 SN74LVC07APWT价格参考¥2.31-¥5.71。Texas InstrumentsSN74LVC07APWT封装/规格:逻辑 - 缓冲器,驱动器,接收器,收发器, Buffer, Non-Inverting 6 Element 1 Bit per Element Open Drain Output 14-TSSOP。您可以下载SN74LVC07APWT参考资料、Datasheet数据手册功能说明书,资料中有SN74LVC07APWT 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC)半导体 |
描述 | IC BUFF/DVR HEX NON-INV 14TSSOP缓冲器和线路驱动器 Hex Buffer/Driver w/Open-Drain Output |
产品分类 | |
品牌 | Texas Instruments |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 逻辑集成电路,缓冲器和线路驱动器,Texas Instruments SN74LVC07APWT74LVC |
数据手册 | |
产品型号 | SN74LVC07APWT |
产品种类 | 缓冲器和线路驱动器 |
传播延迟时间 | 3.6 ns at 3.3 V, 3.3 ns at 2.7 V, 2.6 ns at 5 V |
低电平输出电流 | 24 mA |
供应商器件封装 | 14-TSSOP |
元件数 | 6 |
其它名称 | 296-31895-1 |
包装 | 剪切带 (CT) |
单位重量 | 57.200 mg |
商标 | Texas Instruments |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
封装 | Reel |
封装/外壳 | 14-TSSOP(0.173",4.40mm 宽) |
封装/箱体 | TSSOP-14 |
工作温度 | -40°C ~ 85°C |
工厂包装数量 | 250 |
最大工作温度 | + 85 C |
最小工作温度 | - 40 C |
极性 | Non-Inverting |
标准包装 | 1 |
每元件位数 | 1 |
每芯片的通道数量 | 5 |
电压-电源 | 1.65 V ~ 5.5 V |
电流-输出高,低 | -,24mA |
电源电压-最大 | 5.5 V |
电源电压-最小 | 1.65 V |
电源电流 | 0.01 mA |
系列 | SN74LVC07A |
输入线路数量 | 6 |
输出类型 | Open Drain |
输出线路数量 | 6 |
逻辑类型 | 缓冲器/线路驱动器,非反相并带开漏极 |
逻辑系列 | LVC |
高电平输出电流 | - 24 mA |
Product Sample & Technical Tools & Support & Folder Buy Documents Software Community SN74LVC07A SCAS595W–OCTOBER1997–REVISEDOCTOBER2016 SN74LVC07A Hex Buffer and Driver With Open-Drain Outputs 1 Features 3 Description • OperatesFrom1.65Vto5V The SN74LVC07A device is a hex buffer and driver 1 thatisdesignedfor1.65-Vto5.5-VV operation. • InputsandOpen-DrainOutputsAcceptVoltages CC Upto5.5V DeviceInformation(1) • Maxt of2.6nsat5V pd PARTNUMBER PACKAGE BODYSIZE(NOM) • Latch-UpPerformanceExceeds250mA SN74LVC07AD SOIC(14) 8.65mm×3.91mm PerJESD17 SN74LVC07ADB SSOP(14) 6.20mm×5.30mm • I SupportsLiveInsertion,Partial-Power-Down off SN74LVC07ADGV TVSOP(14) 3.60mm×4.40mm Mode,andBack-DriveProtection SN74LVC07APW TSSOP(14) 5.00mm×4.40mm SN74LVC07ANS SO(14) 10.30mm×5.30mm 2 Applications SN74LVC07ARGY VQFN(14) 3.50mm×3.50mm • AVReceiver (1) For all available packages, see the orderable addendum at • AudioDock:Portable theendofthedatasheet. • Blu-rayPlayerandHomeTheater • MP3PlayerorRecorder • PersonalDigitalAssistant(PDA) • Power:Telecom/ServerAC/DCSupply:Single Controller:AnalogandDigital • SolidStateDrive(SSD):ClientandEnterprise • TV:LCD,Digital,andHigh-Definition(HDTV) • Tablet:Enterprise • VideoAnalytics:Server • WirelessHeadset,Keyboard,andMouse SimplifiedSchematic A Y Copyright © 2016Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.
SN74LVC07A SCAS595W–OCTOBER1997–REVISEDOCTOBER2016 www.ti.com Table of Contents 1 Features.................................................................. 1 8.1 Overview.................................................................12 2 Applications........................................................... 1 8.2 FunctionalBlockDiagram.......................................12 3 Description............................................................. 1 8.3 FeatureDescription.................................................12 8.4 DeviceFunctionalModes........................................12 4 RevisionHistory..................................................... 2 9 ApplicationandImplementation........................ 13 5 PinConfigurationandFunctions......................... 4 9.1 ApplicationInformation............................................13 6 Specifications......................................................... 5 9.2 TypicalApplication .................................................13 6.1 AbsoluteMaximumRatings .....................................5 10 PowerSupplyRecommendations..................... 14 6.2 ESDRatings..............................................................5 11 Layout................................................................... 14 6.3 RecommendedOperatingConditions......................5 6.4 ThermalInformation..................................................6 11.1 LayoutGuidelines.................................................14 6.5 ElectricalCharacteristics—DCLimitChanges..........6 11.2 LayoutExample....................................................15 6.6 SwitchingCharacteristics..........................................6 12 DeviceandDocumentationSupport................. 16 6.7 OperatingCharacteristics..........................................7 12.1 DocumentationSupport........................................16 6.8 TypicalCharacteristics..............................................7 12.2 ReceivingNotificationofDocumentationUpdates16 7 ParameterMeasurementInformation..................8 12.3 CommunityResources..........................................16 7.1 V =1.8V±0.15V.................................................8 12.4 Trademarks...........................................................16 CC 7.2 V =2.5V±0.2V...................................................9 12.5 ElectrostaticDischargeCaution............................16 CC 7.3 V =2.7and3.3V±0.3V...................................10 12.6 Glossary................................................................16 CC 7.4 V =5V±0.5V....................................................11 13 Mechanical,Packaging,andOrderable CC Information........................................................... 16 8 DetailedDescription............................................ 12 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionV(May2015)toRevisionW Page • ChangedPinFunctionstable ................................................................................................................................................ 4 • AddedJunctiontemperaturetotheAbsoluteMaximumRatingstable.................................................................................. 5 • ReformattedtheElectricalCharacteristicsandtheSwitchingCharacteristicstables ........................................................... 6 • ChangedTypicalApplicationDiagram ................................................................................................................................ 13 • AddedReceivingNotificationofDocumentationUpdatessection ...................................................................................... 16 ChangesfromRevisionU(June2014)toRevisionV Page • ChangedHandlingRatingstabletoESDRatingstable ........................................................................................................ 5 • AddedindustrystandardtermstopackagedesignatorsintheThermalInformationtable.................................................... 6 • Changedfrom"High"to"High-Z"intheFunctionTable ..................................................................................................... 12 ChangesfromRevisionT(February2011)toRevisionU Page • UpdateddocumenttonewTIdatasheetformat.................................................................................................................... 1 • RemovedOrderingInformationtable..................................................................................................................................... 1 • AddedApplications................................................................................................................................................................. 1 • AddedI Featuresbullet........................................................................................................................................................ 1 off • AddedDeviceInformationtable............................................................................................................................................. 1 • AddedHandlingRatingstable................................................................................................................................................ 5 • ChangedMAXoperatingfree-airtemperaturefrom85°Cto125°C....................................................................................... 5 • UpdatedThermalInformationtable. ...................................................................................................................................... 6 • Added–40°CTO+125°CtemperaturerangetoElectricalCharacteristicstable................................................................... 6 • AddedSwitchingCharacteristicstablefor–40°CTO125°Ctemperaturerange................................................................... 6 2 SubmitDocumentationFeedback Copyright©1997–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC07A
SN74LVC07A www.ti.com SCAS595W–OCTOBER1997–REVISEDOCTOBER2016 • AddedTypicalCharacteristics................................................................................................................................................ 7 Copyright©1997–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN74LVC07A
SN74LVC07A SCAS595W–OCTOBER1997–REVISEDOCTOBER2016 www.ti.com 5 Pin Configuration and Functions D,DB,DGV,NS,PWPackage 14-PinSOIC,SSOP,TVSOP,SO,TSSOP TopView RGYPackage 14-PinVQFN TopView PinFunctions PIN I/O DESCRIPTION NO. NAME 1 1A I Input1 2 1Y O Output1 3 2A I Input2 4 2Y O Output2 5 3A I Input3 6 3Y O Output3 7 GND — Groundpin 8 4Y O Output4 9 4A I Input4 10 5Y O Output5 11 5A I Input5 12 6Y O Output6 13 6A I Input6 14 V — Powerpin CC 4 SubmitDocumentationFeedback Copyright©1997–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC07A
SN74LVC07A www.ti.com SCAS595W–OCTOBER1997–REVISEDOCTOBER2016 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT V Supplyvoltage –0.5 6.5 V CC V Inputvoltage(2) –0.5 6.5 V I V Outputvoltage –0.5 6.5 V O I Inputclampcurrent V <0 –50 mA IK I I Outputclampcurrent V <0 –50 mA OK O I Continuousoutputcurrent ±50 mA O ContinuouscurrentthroughV orGND ±100 mA CC T Junctiontemperature 150 °C j T Storagetemperature –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperating Conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Theinputandoutputnegative-voltageratingsmaybeexceedediftheinputandoutputcurrentratingsareobserved. 6.2 ESD Ratings VALUE UNIT Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±4000 V(ESD) Electrostaticdischarge Chargeddevicemodel(CDM),perJEDECspecificationJESD22- V C101(2) ±1500 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT V Supplyvoltage 1.65 5.5 V CC V =1.65Vto1.95V 0.65×V CC CC V =2.3Vto2.7V 1.7 CC V High-levelinputvoltage V IH V =2.7Vto3.6V 2 CC V =4.5Vto5.5V 0.7×V CC CC V =1.65Vto1.95V 0.35×V CC CC V =2.3Vto2.7V 0.7 CC V Low-levelinputvoltage V IL V =2.7Vto3.6V 0.8 CC V =4.5Vto5.5V 0.3×V CC CC V Inputvoltage 0 5.5 V I V Outputvoltage 0 5.5 V O V =1.65V 4 CC V =2.3V 12 CC I Low-leveloutputcurrent V =2.7V 12 mA OL CC V =3V 24 CC V =4.5V 24 CC T Operatingfree-airtemperature –40 125 °C A (1) AllunusedinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.SeeImplicationsofSloworFloating CC CMOSInputs,SCBA004. Copyright©1997–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN74LVC07A
SN74LVC07A SCAS595W–OCTOBER1997–REVISEDOCTOBER2016 www.ti.com 6.4 Thermal Information SN74LVC07A THERMALMETRIC(1) D DB DGV NS PW RGY UNIT (SOIC) (SSOP) (TVSOP) (SO) (TSSOP) (VQFN) 14PINS R Junction-to-ambientthermalresistance 177.4 135.1 157.7 120.3 160.3 80.6 °C/W θJA R Junction-to-case(top)thermalresistance 75.4 86.7 78.3 76.3 84.4 97.0 °C/W θJC(top) R Junction-to-boardthermalresistance 70.6 82.4 90.8 79.0 102.1 56.7 °C/W θJB ψ Junction-to-topcharacterizationparameter 34.7 43.7 21.0 36.2 24.3 16.7 °C/W JT ψ Junction-to-boardcharacterizationparameter 70.4 81.9 90.1 78.7 101.4 56.8 °C/W JB R Junction-to-case(bottom)thermalresistance n/a n/a n/a n/a n/a 35.8 °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 6.5 Electrical Characteristics—DC Limit Changes T =–40°Cto+125°C,unlessotherwisenoted A PARAMETER TESTCONDITIONS V MIN TYP(1) MAX UNIT CC I =100µA 1.65Vto5.5V 0.2 OL I =4mA 1.65V 0.45 OL V 2.3V 0.7 V OL I =12mA OL 2.7V 0.4 I =24mA 3V 0.55 OL I V =5.5VorGND 3.6V ±5 µA I I I V orV =5.5V 0V ±10 µA off I O I V =V orGND, I =0 3.6V 10 µA CC I CC O OneinputatV –0.6V, ΔI CC 2.7Vto3.6V 500 µA CC OtherinputsatV orGND CC C V =V orGND 3.3V 5.0 pF i I CC (1) AlltypicalvaluesareatV =3.3V,T =25°C. CC A 6.6 Switching Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted)(seeFigure3throughFigure6) FROM TO PARAMETER TESTCONDITIONS MIN MAX UNIT (INPUT) (OUTPUT) V =1.8V±0.15V 1 5.6 CC V =2.5V±0.2V 1 3.4 CC –40°Cto85°C V =2.7V 1 3.3 CC V =3.3V±0.3V 1 3.6 CC V =5V±0.5V 1 2.6 CC t A Y ns pd V =1.8V±0.15V 1 6.1 CC V =2.5V±0.2V 1 3.9 CC –40°Cto125°C V =2.7V 1 3.8 CC V =3.3V±0.3V 1 4.1 CC V =5V±0.5V 1 3.1 CC 6 SubmitDocumentationFeedback Copyright©1997–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC07A
SN74LVC07A www.ti.com SCAS595W–OCTOBER1997–REVISEDOCTOBER2016 6.7 Operating Characteristics T =25°C A TEST VCC=1.8V VCC=2.5V VCC=3.3V VCC=5V PARAMETER UNIT CONDITIONS TYP TYP TYP TYP Powerdissipationcapacitance C f=10MHz 1.8 2 2.5 3.78 pF pd perbufferanddriver 6.8 Typical Characteristics 2.5 2.5 2 2 s 1.5 s 1.5 n n D - D - P P T 1 T 1 0.5 0.5 TPD in ns TPD in ns 0 0 0 1 2 3 4 5 6 -100 -50 0 50 100 150 VCC - V D001 Temperature (qC) D002 Figure1.TPDvsV Figure2.TPDvsTemperature CC Copyright©1997–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN74LVC07A
SN74LVC07A SCAS595W–OCTOBER1997–REVISEDOCTOBER2016 www.ti.com 7 Parameter Measurement Information 7.1 V = 1.8 V ± 0.15 V CC 2 × VCC 1 kW S1 Open From Output TEST S1 Under Test GND tPZL (see Note F) 2 × VCC (seCeL N= o3t0e pAF) 1 kW tPLZ (see Note G) 2 × VCC tPHZ/tPZH 2 × VCC LOAD CIRCUIT tw VCC Timing VCC Input VCC/2 VCC/2 Input VCC/2 0 V 0 V VOLTAGE WAVEFORMS PULSE DURATION tsu th IDnpautat VCC/2 VCC/2 VCC COounttpruotl VCC 0 V (low-level VCC/2 VCC/2 VOLTAGE WAVEFORMS enabling) 0 V SETUP AND HOLD TIMES tPZL tPLZ Output VCC Waveform 1 VCC Input VCC/2 VCC/2 S1 at 2 × VCC VCC/2 VOL + 0.15 V 0 V (see Note B) VOL tPLH tPHL tPZH tPHZ Output VCC/2 VCC/2 VCC SW1 aavt e2Of o×u rtVmpCu C2t VCC/2 VCC − 0.15 VVCC VOL (see Note B) 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 W , tr ≤ 2 ns, tf ≤ 2 ns. D. The outputs are measured one at a time, with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at VCC/2. G. tPLZ is measured at VOL + 0.15 V. H. All parameters and waveforms are not applicable to all devices. Figure3. LoadCircuitandVoltageWaveforms 8 SubmitDocumentationFeedback Copyright©1997–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC07A
SN74LVC07A www.ti.com SCAS595W–OCTOBER1997–REVISEDOCTOBER2016 7.2 V = 2.5 V ± 0.2 V CC 2 × VCC 500 W S1 Open From Output TEST S1 Under Test GND tPZL (see Note F) 2 × VCC (seCeL N= o3t0e pAF) 500 W tPLZ (see Note G) 2 × VCC tPHZ/tPZH 2 × VCC LOAD CIRCUIT tw VCC Timing VCC Input VCC/2 VCC/2 Input VCC/2 0 V 0 V VOLTAGE WAVEFORMS PULSE DURATION tsu th IDnpautat VCC/2 VCC/2 VCC COounttpruotl VCC 0 V (low-level VCC/2 VCC/2 VOLTAGE WAVEFORMS enabling) 0 V SETUP AND HOLD TIMES tPZL tPLZ Output VCC Waveform 1 VCC Input VCC/2 VCC/2 S1 at 2 × VCC VCC/2 VOL + 0.15 V 0 V (see Note B) VOL tPLH tPHL tPZH tPHZ Output VCC/2 VCC/2 VCC SW1 aavt e2Of o×u rtVmpCu C2t VCC/2 VCC − 0.15 VVCC VOL (see Note B) 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 W , tr ≤ 2 ns, tf ≤ 2 ns. D. The outputs are measured one at a time, with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at VCC/2. G. tPLZ is measured at VOL + 0.15 V. H. All parameters and waveforms are not applicable to all devices. Figure4. LoadCircuitandVoltageWaveforms Copyright©1997–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SN74LVC07A
SN74LVC07A SCAS595W–OCTOBER1997–REVISEDOCTOBER2016 www.ti.com 7.3 V = 2.7 and 3.3 V ± 0.3 V CC 6 V 500 W S1 Open From Output TEST S1 Under Test GND tPZL (see Note F) 6 V CL = 50 pF 500 W tPLZ (see Note G) 6 V (see Note A) tPHZ/tPZH 6 V LOAD CIRCUIT tw 2.7 V Timing 2.7 V Input 1.5 V 1.5 V 1.5 V Input 0 V 0 V VOLTAGE WAVEFORMS PULSE DURATION tsu th 2.7 V Output Data 2.7 V 1.5 V 1.5 V Control Input 0 V (low-level 1.5 V 1.5 V enabling) 0 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES tPZL tPLZ Output 3 V 2.7 V Waveform 1 Input 1.5 V 1.5 V S1 at 6 V 1.5 V VOL + 0.3 V 0 V (see Note B) VOL tPLH tPHL tPZH tPHZ Output 3 V 3 V Waveform 2 2.7 V Output 1.5 V 1.5 V S1 at 6 V 1.5 V VOL (see Note B) 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 W , tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at 1.5 V. G. tPLZ is measured at VOL + 0.3 V. H. All parameters and waveforms are not applicable to all devices. Figure5. LoadCircuitandVoltageWaveforms 10 SubmitDocumentationFeedback Copyright©1997–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC07A
SN74LVC07A www.ti.com SCAS595W–OCTOBER1997–REVISEDOCTOBER2016 7.4 V = 5 V ± 0.5 V CC 2 x V CC 500Ω 2 x V CC 2 x V CC 500Ω 2 x V CC Output Waveform 1 S1 at 2 x V CC (see Note B) Output Waveform 2 0.3 V S1 at 2 x V CC (see Note B) NOTES: A. C includes probe and jig capacitance. L B. Waveform 1 is for an output with internal connections such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal connections such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR≤10 MHz, Z = 50Ω, t ≤2.5 ns, t ≤2.5 ns. O r f D. The outputs are measured one at a time, with one transition per measurement. E. Since this device has open-drain outputs,t andt are the same ast . PLZ PZL pd F. t is measured atV /2. PZL CC G. t is measured atV + 0.3 V. PLZ OL H. All parameters and waveforms are not applicable to all devices. Figure6. LoadCircuitandVoltageWaveforms Copyright©1997–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:SN74LVC07A
SN74LVC07A SCAS595W–OCTOBER1997–REVISEDOCTOBER2016 www.ti.com 8 Detailed Description 8.1 Overview The outputs of the SN74LVC07A device are open drain and can be connected to other open-drain outputs to implementactive-lowwired-ORoractive-highwired-ANDfunctions.Themaximumsinkcurrentis24mA. Inputs can be driven from 1.8-V, 2.5-V, 3.3-V (LVTTL), or 5-V (CMOS) devices. This feature allows the use of thisdeviceastranslatorsinamixed-systemenvironment. This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs, off off preventingdamagingcurrentbackflowthroughthedevicewhenitispowereddown. 8.2 Functional Block Diagram A Y Copyright © 2016Texas Instruments Incorporated 8.3 Feature Description • Wideoperatingvoltagerange – Operatesfrom1.65Vto5.5V • Allowsupordownvoltagetranslation – Inputsandoutputsacceptvoltagesto5.5V • I feature off – AllowsvoltagesontheinputsandoutputswhenV is0V CC 8.4 Device Functional Modes Table1liststhefunctionalmodesoftheSN74LVC07A. Table1.FunctionTable INPUT OUTPUT A Y H Hi-Z L L 12 SubmitDocumentationFeedback Copyright©1997–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC07A
SN74LVC07A www.ti.com SCAS595W–OCTOBER1997–REVISEDOCTOBER2016 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information The SN74LVC07A device is a high-drive, open-drain CMOS device that can be used for a multitude of buffer- type functions. It can produce 24 mA of drive current at 3.3 V. Therefore, this device is ideal for driving multiple inputs and for high-speed applications up to 100 MHz. The inputs and outputs are 5.5-V tolerant allowing the devicetotranslateupto5.5VordowntoV . CC 9.2 Typical Application Buffer Function Basic LED Driver VPU VPU Wired OR µC or Logic µC or Logic µC or Logic LVC07A LVC07A µC or Logic LVC07A Copyright © 2016Texas Instruments Incorporated Figure7. TypicalApplicationDiagram 9.2.1 DesignRequirements ThisdeviceusesCMOStechnologyandhasbalancedoutputdrive.Takecaretoavoidbuscontentionbecauseit can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads; therefore,routingandloadconditionsmustbeconsideredtopreventringing. 9.2.2 DetailedDesignProcedure 1. RecommendedInputConditions – Risetimeandfalltimespecs:See(Δt/ΔV)intheRecommendedOperatingConditionstable. – Specifiedhighandlowlevels:See(V andV )intheRecommendedOperatingConditions table. IH IL – Inputsareovervoltagetolerantallowingthemtogoashighas5.5VatanyvalidV . CC 2. RecommendedOutputConditions Copyright©1997–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:SN74LVC07A
SN74LVC07A SCAS595W–OCTOBER1997–REVISEDOCTOBER2016 www.ti.com Typical Application (continued) – Loadcurrentsmustnotexceed25mAperoutputand50mAtotalforthepart. – Outputsmustnotbepulledabove5.5V. 9.2.3 ApplicationCurve 1600 ICC 1.8 V 1400 ICC 2.5 V ICC 3.3 V 1200 ICC 5 V 1000 s n D - 800 P T 600 400 200 0 0 20 40 60 80 VCC - V D003 Figure8. I vsFrequency CC 10 Power Supply Recommendations The power supply can be any voltage between the MIN and MAX supply voltage rating located in the RecommendedOperatingConditionstable. EachV pinmusthaveagoodbypasscapacitortopreventpowerdisturbance.Fordeviceswithasinglesupply, CC 0.1 µf is recommended; if there are multiple V pins, then 0.01 µf or 0.022 µf is recommended for each power CC pin. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. A 0.1 µf and a 1 µf are commonly used in parallel. The bypass capacitor must be installed as close to the power pin as possible for bestresults. 11 Layout 11.1 Layout Guidelines Whenusingmultiplebitlogicdevicesinputsmustneverfloat. In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins must not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Figure 9 specifies the rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that must be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND orV ,whichevermakesmoresenseorismoreconvenient.Itisgenerallyacceptabletofloatoutputs,unlessthe CC partisatransceiver. 14 SubmitDocumentationFeedback Copyright©1997–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC07A
SN74LVC07A www.ti.com SCAS595W–OCTOBER1997–REVISEDOCTOBER2016 11.2 Layout Example V cc Input Unused Input Output Unused Input Output Input Figure9. LayoutDiagram Copyright©1997–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:SN74LVC07A
SN74LVC07A SCAS595W–OCTOBER1997–REVISEDOCTOBER2016 www.ti.com 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 RelatedDocumentation Forrelateddocumentationseethefollowing: • ImplicationsofSloworFloatingCMOSInputs,SCBA004. • SemiconductorandICPackageThermalMetrics,SPRA953. 12.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 12.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.4 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.5 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.6 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 16 SubmitDocumentationFeedback Copyright©1997–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC07A
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN74LVC07AD ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVC07A & no Sb/Br) SN74LVC07ADBR ACTIVE SSOP DB 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC07A & no Sb/Br) SN74LVC07ADBRG4 ACTIVE SSOP DB 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC07A & no Sb/Br) SN74LVC07ADE4 ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVC07A & no Sb/Br) SN74LVC07ADGVR ACTIVE TVSOP DGV 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC07A & no Sb/Br) SN74LVC07ADR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 LVC07A & no Sb/Br) SN74LVC07ADRG3 ACTIVE SOIC D 14 2500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LVC07A & no Sb/Br) SN74LVC07ADRG4 ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVC07A & no Sb/Br) SN74LVC07ADT ACTIVE SOIC D 14 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVC07A & no Sb/Br) SN74LVC07ANSR ACTIVE SO NS 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVC07A & no Sb/Br) SN74LVC07APW ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC07A & no Sb/Br) SN74LVC07APWE4 ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC07A & no Sb/Br) SN74LVC07APWG4 ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC07A & no Sb/Br) SN74LVC07APWR ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 LC07A & no Sb/Br) SN74LVC07APWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC07A & no Sb/Br) SN74LVC07APWRG3 ACTIVE TSSOP PW 14 2000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LC07A & no Sb/Br) SN74LVC07APWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC07A & no Sb/Br) Addendum-Page 1
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN74LVC07APWT ACTIVE TSSOP PW 14 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC07A & no Sb/Br) SN74LVC07APWTG4 ACTIVE TSSOP PW 14 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC07A & no Sb/Br) SN74LVC07ARGYR ACTIVE VQFN RGY 14 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 LC07A & no Sb/Br) SN74LVC07ARGYRG4 ACTIVE VQFN RGY 14 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 LC07A & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 2
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN74LVC07A : •Automotive: SN74LVC07A-Q1 •Enhanced Product: SN74LVC07A-EP NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects •Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 3
PACKAGE MATERIALS INFORMATION www.ti.com 9-Jun-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74LVC07ADGVR TVSOP DGV 14 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1 SN74LVC07ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74LVC07ADR SOIC D 14 2500 330.0 16.8 6.5 9.5 2.1 8.0 16.0 Q1 SN74LVC07ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74LVC07ADRG3 SOIC D 14 2500 330.0 16.8 6.5 9.5 2.1 8.0 16.0 Q1 SN74LVC07ADRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74LVC07ADRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74LVC07ADT SOIC D 14 250 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74LVC07ANSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 SN74LVC07APWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LVC07APWRG3 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LVC07APWRG4 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LVC07APWT TSSOP PW 14 250 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LVC07ARGYR VQFN RGY 14 3000 330.0 12.4 3.75 3.75 1.15 8.0 12.0 Q1 PackMaterials-Page1
PACKAGE MATERIALS INFORMATION www.ti.com 9-Jun-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74LVC07ADGVR TVSOP DGV 14 2000 367.0 367.0 35.0 SN74LVC07ADR SOIC D 14 2500 367.0 367.0 38.0 SN74LVC07ADR SOIC D 14 2500 364.0 364.0 27.0 SN74LVC07ADR SOIC D 14 2500 333.2 345.9 28.6 SN74LVC07ADRG3 SOIC D 14 2500 364.0 364.0 27.0 SN74LVC07ADRG4 SOIC D 14 2500 367.0 367.0 38.0 SN74LVC07ADRG4 SOIC D 14 2500 333.2 345.9 28.6 SN74LVC07ADT SOIC D 14 250 210.0 185.0 35.0 SN74LVC07ANSR SO NS 14 2000 367.0 367.0 38.0 SN74LVC07APWR TSSOP PW 14 2000 367.0 367.0 35.0 SN74LVC07APWRG3 TSSOP PW 14 2000 364.0 364.0 27.0 SN74LVC07APWRG4 TSSOP PW 14 2000 367.0 367.0 35.0 SN74LVC07APWT TSSOP PW 14 250 367.0 367.0 35.0 SN74LVC07ARGYR VQFN RGY 14 3000 367.0 367.0 35.0 PackMaterials-Page2
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MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,23 0,40 0,07 M 0,13 24 13 0,16 NOM 4,50 6,60 4,30 6,20 Gage Plane 0,25 0°–(cid:1)8° 0,75 1 12 0,50 A Seating Plane 0,15 1,20 MAX 0,08 0,05 PINS ** 14 16 20 24 38 48 56 DIM A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 4073251/E 08/00 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. D. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,65 0,15 M 0,22 28 15 0,25 0,09 5,60 8,20 5,00 7,40 Gage Plane 1 14 0,25 A 0°–(cid:1)8° 0,95 0,55 Seating Plane 2,00 MAX 0,05 MIN 0,10 PINS ** 14 16 20 24 28 30 38 DIM A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 4040065/E 12/01 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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