Product Sample & Technical Tools & Support & Folder Buy Documents Software Community SN54LV86A,SN74LV86A SCLS392G–APRIL1998–REVISEDFEBRUARY2015 SNx4LV86A Quadruple 2-Input Exclusive-OR Gates 1 Features 3 Description • 2-Vto5.5-VV Operation The ’LV86A devices are quadruple 2-input exclusive- 1 CC ORgatesdesignedfor2-Vto5.5-VV operation. • Maxt of8nsat5V CC pd These devices contain four independent 2-input • TypicalV (OutputGroundBounce) <0.8Vat OLP exclusive-OR gates. They perform the Boolean V =3.3V,T =25°C CC A functionY=A ⊕ BorY=AB+ABinpositivelogic. • TypicalV (OutputV Undershoot)>2.3Vat OHV OH V =3.3V,T =25°C A common application is as a true/complement CC A element. If one of the inputs is low, the other input is • SupportMixed-ModeVoltageOperationonAll reproduced in true form at the output. If one of the Ports inputs is high, the signal on the other input is • Latch-UpPerformanceExceeds250mAper reproducedinvertedattheoutput. JESD17 DeviceInformation(1) • ESDProtectionExceedsJESD22 PARTNUMBER PACKAGE BODYSIZE(NOM) – 2000-VHuman-BodyModel(A114-A) VQFN(14) 3.50mm×3.50mm – 200-VMachineModel(A115-A) SOIC(14) 8.65mm×3.91mm – 1000-VCharged-DeviceModel(C101) LV86A SOP(14) 10.30mm×5.30mm 2 Applications SSOP(14) 6.20mm×5.30mm TSSOP(14) 5.00mm×4.40mm • EPOS (1) For all available packages, see the orderable addendum at • ProgrammableLogicController(PLC) theendofthedatasheet. • DCSandPAC:AnalogInputModule • MedicalMeters:Portable • ServerMotherboard • Printer 4 Simplified Schematic =1 A. Thesearefiveequivalentexclusive-ORsymbolsvalidforan’LV86Agateinpositivelogic;negationcanbeshownat anytwoports.SeeFunctionalBlockDiagramformoreinformation. 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

SN54LV86A,SN74LV86A SCLS392G–APRIL1998–REVISEDFEBRUARY2015 www.ti.com Table of Contents 1 Features.................................................................. 1 9 DetailedDescription.............................................. 9 2 Applications........................................................... 1 9.1 Overview...................................................................9 3 Description............................................................. 1 9.2 FunctionalBlockDiagram.........................................9 4 SimplifiedSchematic............................................. 1 9.3 FeatureDescription...................................................9 9.4 DeviceFunctionalModes..........................................9 5 RevisionHistory..................................................... 2 10 ApplicationandImplementation........................ 10 6 PinConfigurationandFunctions......................... 3 10.1 ApplicationInformation..........................................10 7 Specifications......................................................... 4 10.2 TypicalApplication................................................10 7.1 AbsoluteMaximumRatings......................................4 11 PowerSupplyRecommendations..................... 11 7.2 ESDRatings..............................................................4 12 Layout................................................................... 11 7.3 RecommendedOperatingConditions.......................5 7.4 ThermalInformation..................................................5 12.1 LayoutGuidelines.................................................11 7.5 ElectricalCharacteristics...........................................6 12.2 LayoutExample....................................................11 7.6 SwitchingCharacteristics,V =2.5V±0.2V.........6 13 DeviceandDocumentationSupport................. 12 CC 7.7 SwitchingCharacteristics,V =3.3V±0.3V.........6 13.1 RelatedLinks........................................................12 CC 7.8 SwitchingCharacteristics,V =5V±0.5V............6 13.2 Trademarks...........................................................12 CC 7.9 NoiseCharacteristicsforSN74LV86A......................7 13.3 ElectrostaticDischargeCaution............................12 7.10 OperatingCharacteristics........................................7 13.4 Glossary................................................................12 7.11 TypicalCharacteristics............................................7 14 Mechanical,Packaging,andOrderable Information........................................................... 12 8 ParameterMeasurementInformation..................8 5 Revision History ChangesfromRevisionF(April2005)toRevisionG Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection ................................................................................................. 1 • Updatedoperatingfree-airtemperaturemaximumfrom85°Cto125°CforSN74LV86A ..................................................... 5 2 SubmitDocumentationFeedback Copyright©1998–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN54LV86A SN74LV86A

SN54LV86A,SN74LV86A www.ti.com SCLS392G–APRIL1998–REVISEDFEBRUARY2015 6 Pin Configuration and Functions SN54LV86A:JorWPackage SN74LV86A:D,DB,DGV,NS,orPWPackage SN54LV86A:FKPackage (TopView) (TopView) C B A C CB 1A 1 14 VCC 1 1 N V 4 1B 2 13 4B 3 2 1 20 19 1Y 3 12 4A 1Y 4 18 4A 2A 4 11 4Y NC 5 17 NC 2B 5 10 3B 2A 6 16 4Y 2Y 6 9 3A NC 7 15 NC GND 7 8 3Y 2B 8 14 3B 9 10 1112 13 YD CY A 2N N3 3 G B. NC−Nointernalconnection PinFunctions PIN I/O DESCRIPTION 1 1A Ainput1 2 1B Binput1 3 1Y Output1 4 2A Ainput2 5 2B Binput2 6 2Y Output2 7 GND ground 8 3Y Output3 9 3A Ainput3 10 3B Binput3 11 4Y Output4 12 4A Ainput4 13 4B Binput4 14 V Powerpin CC Copyright©1998–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN54LV86A SN74LV86A

SN54LV86A,SN74LV86A SCLS392G–APRIL1998–REVISEDFEBRUARY2015 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted) (1) MIN MAX UNIT V Supplyvoltage –0.5 7 V CC V Inputvoltage(2) –0.5 7 V I V Voltageappliedtoanyoutputinthehigh-impedanceorpower-offstate(2) –0.5 7 V O V Outputvoltage(2)(3) –0.5 V +0.5V V O CC I Inputclampcurrent,V <0 –20 mA IK I I Outputclampcurrent,V <0 –50 mA OK O I Continuousoutputcurrent,V =0toV –25 25 mA O O CC ContinuouscurrentthroughV orGND –50 50 mA CC T Storagetemperature –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Theinputandoutputnegative-voltageratingsmaybeexceedediftheinputandoutputcurrentratingsareobserved. (3) Thisvalueislimitedto5.5-Vmaximum. 7.2 ESD Ratings VALUE UNIT Electrostatic Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) 2000 V V (ESD) discharge Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) 1000 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 4 SubmitDocumentationFeedback Copyright©1998–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN54LV86A SN74LV86A

SN54LV86A,SN74LV86A www.ti.com SCLS392G–APRIL1998–REVISEDFEBRUARY2015 7.3 Recommended Operating Conditions see (1) MIN MAX UNIT V Supplyvoltage 2 5.5 V CC V =2V 1.5 CC V =2.3Vto2.7V V ×0.7 CC CC V High-levelinputvoltage V IH V =3Vto3.6V V ×0.7 CC CC V =4.5Vto5.5V V ×0.7 CC CC V =2V 0.5 CC V =2.3Vto2.7V V ×0.3 CC CC V Low-levelinputvoltage V IL V =3Vto3.6V V ×0.3 CC CC V =4.5Vto5.5V V ×0.3 CC CC V Inputvoltage 0 5.5 V I V Outputvoltage 0 V V O CC V =2V –50 µA CC V =2.3Vto2.7V –2 CC I High-leveloutputcurrent OH V =3Vto3.6V –6 mA CC V =4.5Vto5.5V –12 CC V =2V 50 µA CC V =2.3Vto2.7V 2 CC I Low-leveloutputcurrent OL V =3Vto3.6V 6 mA CC V =4.5Vto5.5V 12 CC V =2.3Vto2.7V 200 CC Δt/Δv Inputtransitionriseorfallrate V =3Vto3.6V 100 ns/V CC V =4.5Vto5.5V 20 CC T Operatingfree-airtemperature –55 125 °C A (1) AllunusedinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.RefertotheTIapplicationreport, CC ImplicationsofSloworFloatingCMOSInputs,SCBA004. 7.4 Thermal Information D DB DGV NS PW THERMALMETRIC(1) UNIT 14PINS R Junction-to-ambientthermalresistance(2) 90.6 107.1 129.0 90.7 122.6 θJA R Junction-to-case(top)thermalresistance 50.9 59.6 52.1 48.3 51.4 θJC(top) R Junction-to-boardthermalresistance 44.8 54.4 62.0 49.4 64.4 °C/W θJB ψ Junction-to-topcharacterizationparameter 14.7 20.5 6.5 14.6 6.7 JT ψ Junction-to-boardcharacterizationparameter 44.5 53.8 61.3 49.1 63.8 JB (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. (2) ThepackagethermalimpedanceiscalculatedinaccordancewithJESD51-7. Copyright©1998–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN54LV86A SN74LV86A

SN54LV86A,SN74LV86A SCLS392G–APRIL1998–REVISEDFEBRUARY2015 www.ti.com 7.5 Electrical Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) SN74LV86A SN54LV86A PARAMETER TESTCONDITIONS V –40°Cto125°C UNIT CC MIN TYP MAX MIN TYP MAX I =–50µA 2to5.5V V –0.1 V –0.1 OH CC CC I =–2mA 2.3V 2 2 OH V V OH I =–6mA 3V 2.48 2.48 OH I =–12mA 4.5V 3.8 3.8 OH I =50µA 2to5.5V 0.1 0.1 OL I =2mA 2.3V 0.4 0.4 OL V V OL I =6mA 3V 0.44 0.44 OL I =12mA 4.5V 0.55 0.55 OL I V =5.5VorGND 0to5.5V ±1 ±1 µA I I I V =V orGND,I =0 5.5V 20 20 µA CC I CC O I V orV =0to5.5V 0 5 5 µA off I O C V =V orGND 3.3V 1.4 1.4 pF i I CC 7.6 Switching Characteristics, V = 2.5 V ±0.2 V CC overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted)(seeFigure3) LOAD TA=25°C PARAMETER FROM(INPUT) TO(OUTPUT) MIN MAX UNIT CAPACITANCE MIN TYP MAX C =15pF 7.9(1) 17.6(1) 1(2) 21(2) L t AorB Y ns pd C =50pF 10.5 22.6 1 26.5 L (1) OnproductscomplianttoMIL-PRF-38535,thisparameterisnotproductiontested. (2) ThisnoteappliestoSN54LV86Aonly:OnproductscomplianttoMIL-PRF-38535,thisparameterisnotproductiontested. 7.7 Switching Characteristics, V = 3.3 V ±0.3 V CC overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted)(seeFigure3) LOAD TA=25°C PARAMETER FROM(INPUT) TO(OUTPUT) MIN MAX UNIT CAPACITANCE MIN TYP MAX C =15pF 5.5(1) 11(1) 1(2) 13(2) L t AorB Y ns pd C =50pF 7.4 14.5 1 16.5 L (1) OnproductscomplianttoMIL-PRF-38535,thisparameterisnotproductiontested. (2) ThisnoteappliestoSN54LV86Aonly:OnproductscomplianttoMIL-PRF-38535,thisparameterisnotproductiontested. 7.8 Switching Characteristics, V = 5 V ±0.5 V CC overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted)(seeFigure3) LOAD TA=25°C PARAMETER FROM(INPUT) TO(OUTPUT) MIN MAX UNIT CAPACITANCE MIN TYP MAX C =15pF 3.7(1) 6.8(1) 1(2) 8(2) L t AorB Y ns pd C =50pF 5.3 8.8 1 10 L (1) OnproductscomplianttoMIL-PRF-38535,thisparameterisnotproductiontested. (2) ThisnoteappliestoSN54LV86Aonly:OnproductscomplianttoMIL-PRF-38535,thisparameterisnotproductiontested. 6 SubmitDocumentationFeedback Copyright©1998–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN54LV86A SN74LV86A

SN54LV86A,SN74LV86A www.ti.com SCLS392G–APRIL1998–REVISEDFEBRUARY2015 7.9 Noise Characteristics for SN74LV86A V =3.3V,C =50pF,T =25°C(see (1)) CC L A PARAMETER MIN TYP MAX UNIT V Quietoutput,maximumdynamicV 0.2 0.8 OL(P) OL V Quietoutput,minimumdynamicV –0.1 –0.8 OL(V) OL V Quietoutput,minimumdynamicV 3.1 V OH(V) OH V High-leveldynamicinputvoltage 2.31 IH(D) V Low-leveldynamicinputvoltage 0.99 IL(D) (1) Characteristicsareforsurface-mountpackagesonly. 7.10 Operating Characteristics T =25°C A PARAMETER TESTCONDITIONS V TYP UNIT CC 3.3V 8.4 C Powerdissipationcapacitance C =50pF,ƒ=10MHz pF pd L 5V 8.8 7.11 Typical Characteristics 7 9 8 6 7 5 6 s) 4 s) 5 n n t (pd 3 t (pd 4 3 2 2 1 1 0 0 -100 -50 0 50 100 150 0 1 2 3 4 5 6 Temperature (°C) D001 VCC (V) D002 Figure1.t vsTemperatureat3.3V Figure2.t vsV at25°C pd pd CC Copyright©1998–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN54LV86A SN74LV86A

SN54LV86A,SN74LV86A SCLS392G–APRIL1998–REVISEDFEBRUARY2015 www.ti.com 8 Parameter Measurement Information VCC From Output Test From Output RL= 1 kΩ S1 Open TEST S1 UnderTest Point UnderTest GND tPLH/tPHL Open CL CL tPLZ/tPZL VCC (see NoteA) (see NoteA) tPHZ/tPZH GND Open Drain VCC LOAD CIRCUIT FOR LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3-STATEAND OPEN-DRAIN OUTPUTS VCC Timing Input 50% VCC tw 0 V th VCC tsu VCC Input 50% VCC 50% VCC Data Input 50% VCC 50% VCC 0 V 0 V VOLTAGEWAVEFORMS VOLTAGEWAVEFORMS PULSEDURATION SETUPAND HOLD TIMES VCC VCC Output Input 50% VCC 50% VCC Control 50% VCC 50% VCC 0 V 0 V tPLH tPHL tPZL tPLZ VOH Output ≈VCC In-Phase 50%VCC 50% VCC Waveform 1 50% VCC Output VOL S1 at VCC VOL+0.3VVOL (see Note B) tPHL tPLH tPZH tPHZ Output VOH VOH Out-of-Phase 50% VCC 50% VCC Waveform 2 50% VCC VOH−0.3V Output VOL (seSe1 Nato GteN BD) ≈0 V VOLTAGEWAVEFORMS VOLTAGEWAVEFORMS PROPAGATIONDELAYTIMES ENABLEAND DISABLE TIMES INVERTINGAND NONINVERTING OUTPUTS LOW-AND HIGH-LEVELENABLING A. C includesprobeandjigcapacitance. L B. Waveform1isforanoutputwithinternalconditionssuchthattheoutputislow,exceptwhendisabledbytheoutput control.Waveform2isforanoutputwithinternalconditionssuchthattheoutputishigh,exceptwhendisabledbythe outputcontrol. C. Allinputpulsesaresuppliedbygeneratorshavingthefollowingcharacteristics:PRR≤1MHz,Z =50Ω,t ≤3ns,t O r f ≤3ns. D. Theoutputsaremeasuredoneatatime,withoneinputtransitionpermeasurement. E. t andt arethesameast . PLZ PHZ dis F. t andt arethesameast . PZL PZH en G. t andt arethesameast . PHL PLH pd H. Allparametersandwaveformsarenotapplicabletoalldevices. Figure3. LoadCircuitandVoltageWaveforms 8 SubmitDocumentationFeedback Copyright©1998–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN54LV86A SN74LV86A

SN54LV86A,SN74LV86A www.ti.com SCLS392G–APRIL1998–REVISEDFEBRUARY2015 9 Detailed Description 9.1 Overview The’LV86Adevicesarequadruple2-inputexclusive-ORgatesdesignedfor2-Vto5.5-VV operation. CC These devices contain four independent 2-input exclusive-OR gates. They perform the Boolean function Y = A ⊕ BorY=AB+ABinpositivelogic. A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output. 9.2 Functional Block Diagram An exclusive-OR gate has many applications, some of which can be represented better by alternative logic symbols. =1 A. Thesearefiveequivalentexclusive-ORsymbolsvalidforan’LV86Agateinpositivelogic;negationcanbeshownat anytwoports. Figure4. ExclusiveOR = 2k 2k+1 Theoutputisactive Theoutputisactive Theoutputisactive (low)ifallinputs (low)ifaneven (high)ifanodd standatthesame numberofinputs numberofinputs logiclevel(thatis,A (thatis,0or2)are (thatis,only1ofthe =B). active. 2)areactive. Figure5. Logic-IdentityElement Figure6. Even-ParityElement Figure7. Odd-ParityElement 9.3 Feature Description • Wideoperatingvoltagerange,operatesfrom2to5.5V • Allowsdownvoltagetranslation,inputsacceptvoltagesto5.5V 9.4 Device Functional Modes Table1.FunctionTable (EachGate) INPUTS OUTPUT A B Y L L L L H H H L H H H L Copyright©1998–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SN54LV86A SN74LV86A

SN54LV86A,SN74LV86A SCLS392G–APRIL1998–REVISEDFEBRUARY2015 www.ti.com 10 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 10.1 Application Information The SN74LV86A is a low drive CMOS device that can be used for a multitude of bus interface type applications where output ringing is a concern. The low drive and slow edge rates will minimize overshoot and undershoot on theoutputs.Theinputscanacceptvoltagesto5.5VatanyvalidV makingitIdealfordowntranslation. CC 10.2 Typical Application 5-V Regulated 5-V Bus Driver 0.1 PF 5-V Accessory Figure8. TypicalApplicationSchematic 10.2.1 DesignRequirements This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive will also create fast edgesintolightloadssoroutingandloadconditionsshouldbeconsideredtopreventringing. 10.2.2 DetailedDesignProcedure 1. RecommendedInputconditions – Risetimeandfalltimespecssee(Δt/ΔV)inRecommendedOperatingConditions. – SpecifiedHighandlowlevels.See(V andV )inRecommendedOperatingConditions. IH IL 2. Recommendoutputconditions – Loadcurrentsshouldnotexceed25mAperoutputand50mAtotalforthepart – OutputsshouldnotbepulledaboveV CC 10 SubmitDocumentationFeedback Copyright©1998–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN54LV86A SN74LV86A

SN54LV86A,SN74LV86A www.ti.com SCLS392G–APRIL1998–REVISEDFEBRUARY2015 Typical Application (continued) 10.2.3 ApplicationCurve Figure9.SwitchingCharacteristicsComparison 11 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in RecommendedOperatingConditions. Each V terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single CC supply, TI recommends 0.1 µF and if there are multiple V terminals then .01 or .022 µF is recommended for CC eachpowerterminal.Itisokaytoparallelmultiplebypasscapacitorstorejectdifferentfrequenciesofnoise.A0.1 µF and 1 µF are commonly used in parallel. The bypass capacitor should be installed as close to the power terminalaspossibleforbestresults. 12 Layout 12.1 Layout Guidelines Whenusingmultiplebitlogicdevicesinputsshouldnoteverfloat. In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Specified below are the rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or V whichever make more sense or is more convenient. It is generally okay to float outputs unless the CC partisatransceiver.Ifthetransceiverhasanoutputenablepinitwilldisabletheoutputssectionofthepartwhen asserted.ThiswillnotdisabletheinputsectionoftheIOssotheyalsocannotfloatwhendisabled. 12.2 Layout Example V Input CC Unused Input Output Unused Input Output Input Figure10. LayoutRecommendation Copyright©1998–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:SN54LV86A SN74LV86A

SN54LV86A,SN74LV86A SCLS392G–APRIL1998–REVISEDFEBRUARY2015 www.ti.com 13 Device and Documentation Support 13.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstosampleorbuy. Table2.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY SN54LV86A Clickhere Clickhere Clickhere Clickhere Clickhere SN74LV86A Clickhere Clickhere Clickhere Clickhere Clickhere 13.2 Trademarks Alltrademarksarethepropertyoftheirrespectiveowners. 13.3 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 13.4 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 14 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 12 SubmitDocumentationFeedback Copyright©1998–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN54LV86A SN74LV86A

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN74LV86AD ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LV86A & no Sb/Br) SN74LV86ADBR ACTIVE SSOP DB 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LV86A & no Sb/Br) SN74LV86ADGVR ACTIVE TVSOP DGV 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LV86A & no Sb/Br) SN74LV86ADR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LV86A & no Sb/Br) SN74LV86ANSR ACTIVE SO NS 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 74LV86A & no Sb/Br) SN74LV86APW ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LV86A & no Sb/Br) SN74LV86APWR ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LV86A & no Sb/Br) SN74LV86APWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LV86A & no Sb/Br) SN74LV86APWT ACTIVE TSSOP PW 14 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LV86A & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN74LV86A : •Automotive: SN74LV86A-Q1 •Enhanced Product: SN74LV86A-EP NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects •Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2018 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74LV86ADGVR TVSOP DGV 14 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1 SN74LV86ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74LV86ANSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 SN74LV86APWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LV86APWT TSSOP PW 14 250 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2018 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74LV86ADGVR TVSOP DGV 14 2000 367.0 367.0 35.0 SN74LV86ADR SOIC D 14 2500 367.0 367.0 38.0 SN74LV86ANSR SO NS 14 2000 367.0 367.0 38.0 SN74LV86APWR TSSOP PW 14 2000 367.0 367.0 35.0 SN74LV86APWT TSSOP PW 14 250 367.0 367.0 35.0 PackMaterials-Page2

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MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,23 0,40 0,07 M 0,13 24 13 0,16 NOM 4,50 6,60 4,30 6,20 Gage Plane 0,25 0°–(cid:1)8° 0,75 1 12 0,50 A Seating Plane 0,15 1,20 MAX 0,08 0,05 PINS ** 14 16 20 24 38 48 56 DIM A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 4073251/E 08/00 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. D. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,65 0,15 M 0,22 28 15 0,25 0,09 5,60 8,20 5,00 7,40 Gage Plane 1 14 0,25 A 0°–(cid:1)8° 0,95 0,55 Seating Plane 2,00 MAX 0,05 MIN 0,10 PINS ** 14 16 20 24 28 30 38 DIM A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 4040065/E 12/01 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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