(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:3)(cid:8)(cid:9) (cid:1)(cid:2)(cid:10)(cid:4)(cid:5)(cid:6)(cid:7)(cid:3)(cid:8) (cid:11)(cid:12)(cid:13)(cid:14) (cid:4)(cid:15)(cid:14)(cid:16)(cid:2)(cid:17) (cid:18)(cid:19) (cid:20)(cid:15)(cid:14)(cid:16)(cid:2)(cid:17) (cid:11)(cid:13)(cid:18)(cid:13) (cid:1)(cid:17)(cid:14)(cid:17)(cid:6)(cid:18)(cid:19)(cid:21)(cid:1)(cid:22)(cid:23)(cid:12)(cid:14)(cid:18)(cid:16)(cid:24)(cid:14)(cid:17)(cid:25)(cid:17)(cid:21)(cid:1) (cid:26)(cid:16)(cid:18)(cid:5) (cid:8)(cid:15)(cid:1)(cid:18)(cid:13)(cid:18)(cid:17) (cid:19)(cid:12)(cid:18)(cid:24)(cid:12)(cid:18)(cid:1) SCLS133E − DECEMBER 1982 − REVISED SEPTEMBER 2003 (cid:1) 3-State Version of ’HC153 SN54HC253...J OR W PACKAGE (cid:1) SN74HC253...D, DB, N, OR NS PACKAGE Wide Operating Voltage Range of 2 V to 6 V (TOP VIEW) (cid:1) High-Current Inverting Outputs Drive Up To 15 LSTTL Loads 1OE 1 16 VCC (cid:1) Low Power Consumption, 80-µA Max I B 2 15 2OE CC (cid:1) Typical tpd = 9 ns 1C3 3 14 A (cid:1) ±6-mA Output Drive at 5 V 1C2 4 13 2C3 1C1 5 12 2C2 (cid:1) Low Input Current of 1 µA Max 1C0 6 11 2C1 (cid:1) Permit Multiplexing From n Lines to One 1Y 7 10 2C0 Line GND 8 9 2Y (cid:1) Perform Parallel-to-Serial Conversion SN54HC253...FK PACKAGE description/ordering information (TOP VIEW) E CE Each of these data selectors/multiplexers O C CO B1 N V 2 contains inverters and drivers to supply full binary decoding data selection to the AND-OR gates. 3 2 1 2019 Separate output-control inputs are provided for 1C3 4 18 A each of the two 4-line sections. 1C2 5 17 2C3 NC 6 16 NC The 3-state outputs can interface with and drive 1C1 7 15 2C2 data lines of bus-organized systems. With all but 1C0 8 14 2C1 one of the common outputs disabled (in the 9 10 11 12 13 high-impedance state), the low impedance of the Y D C Y0 single enabled output drives the bus line to a high 1 N N 2C G 2 or low logic level. Each output has its own output-enable (OE) input. The outputs are NC − No internal connection disabled when their respective OE is high. ORDERING INFORMATION ORDERABLE TOP-SIDE TA PACKAGE† PART NUMBER MARKING PDIP − N Tube of 25 SN74HC253N SN74HC253N Tube of 40 SN74HC253D SSOOIICC −− DD Reel of 2500 SN74HC253DR HHCC225533 −−4400°°CC ttoo 8855°°CC Reel of 250 SN74HC253DT SOP − NS Reel of 2000 SN74HC253NSR HC253 SSOP − DB Reel of 2000 SN74HC253DBR HC253 CDIP − J Tube of 25 SNJ54HC253J SNJ54HC253J −−5555°CC ttoo 112255°CC CFP − W Tube of 150 SNJ54HC253W SNJ54HC253W LCCC − FK Tube of 55 SNJ54HC253FK SNJ54HC253FK †Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet. (cid:24)(cid:21)(cid:19)(cid:11)(cid:12)(cid:6)(cid:18)(cid:16)(cid:19)(cid:2) (cid:11)(cid:13)(cid:18)(cid:13) (cid:27)(cid:28)(cid:29)(cid:30)(cid:31)!"#(cid:27)(cid:30)(cid:28) (cid:27)$ %&(cid:31)(cid:31)’(cid:28)# "$ (cid:30)(cid:29) (&)*(cid:27)%"#(cid:27)(cid:30)(cid:28) +"#’, Copyright  2003, Texas Instruments Incorporated (cid:24)(cid:31)(cid:30)+&%#$ %(cid:30)(cid:28)(cid:29)(cid:30)(cid:31)! #(cid:30) $(’%(cid:27)(cid:29)(cid:27)%"#(cid:27)(cid:30)(cid:28)$ (’(cid:31) #-’ #’(cid:31)!$ (cid:30)(cid:29) (cid:18)’."$ (cid:16)(cid:28)$#(cid:31)&!’(cid:28)#$ (cid:19)(cid:28) ((cid:31)(cid:30)+&%#$ %(cid:30)!(*(cid:27)"(cid:28)# #(cid:30) (cid:23)(cid:16)(cid:14)(cid:15)(cid:24)(cid:21)2(cid:15)(cid:8)3(cid:3)(cid:8)(cid:3)(cid:9) "** ("(cid:31)"!’#’(cid:31)$ "(cid:31)’ #’$#’+ $#"(cid:28)+"(cid:31)+ /"(cid:31)(cid:31)"(cid:28)#0, (cid:24)(cid:31)(cid:30)+&%#(cid:27)(cid:30)(cid:28) ((cid:31)(cid:30)%’$$(cid:27)(cid:28)1 +(cid:30)’$ (cid:28)(cid:30)# (cid:28)’%’$$"(cid:31)(cid:27)*0 (cid:27)(cid:28)%*&+’ &(cid:28)*’$$ (cid:30)#-’(cid:31)/(cid:27)$’ (cid:28)(cid:30)#’+, (cid:19)(cid:28) "** (cid:30)#-’(cid:31) ((cid:31)(cid:30)+&%#$(cid:9) ((cid:31)(cid:30)+&%#(cid:27)(cid:30)(cid:28) #’$#(cid:27)(cid:28)1 (cid:30)(cid:29) "** ("(cid:31)"!’#’(cid:31)$, ((cid:31)(cid:30)%’$$(cid:27)(cid:28)1 +(cid:30)’$ (cid:28)(cid:30)# (cid:28)’%’$$"(cid:31)(cid:27)*0 (cid:27)(cid:28)%*&+’ #’$#(cid:27)(cid:28)1 (cid:30)(cid:29) "** ("(cid:31)"!’#’(cid:31)$, POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:3)(cid:8)(cid:9) (cid:1)(cid:2)(cid:10)(cid:4)(cid:5)(cid:6)(cid:7)(cid:3)(cid:8) (cid:11)(cid:12)(cid:13)(cid:14) (cid:4)(cid:15)(cid:14)(cid:16)(cid:2)(cid:17) (cid:18)(cid:19) (cid:20)(cid:15)(cid:14)(cid:16)(cid:2)(cid:17) (cid:11)(cid:13)(cid:18)(cid:13) (cid:1)(cid:17)(cid:14)(cid:17)(cid:6)(cid:18)(cid:19)(cid:21)(cid:1)(cid:22)(cid:23)(cid:12)(cid:14)(cid:18)(cid:16)(cid:24)(cid:14)(cid:17)(cid:25)(cid:17)(cid:21)(cid:1) (cid:26)(cid:16)(cid:18)(cid:5) (cid:8)(cid:15)(cid:1)(cid:18)(cid:13)(cid:18)(cid:17) (cid:19)(cid:12)(cid:18)(cid:24)(cid:12)(cid:18)(cid:1) SCLS133E − DECEMBER 1982 − REVISED SEPTEMBER 2003 FUNCTION TABLE INPUTS SELECT† DATA OOUUTTPPUUTT OOEE YY B A C0 C1 C2 C3 X X X X X X H Z L L L X X X L L L L H X X X L H L H X L X X L L L H X H X X L H H L X X L X L L H L X X H X L H H H X X X L L L H H X X X H L H †Select inputs A and B are common to both sections. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:3)(cid:8)(cid:9) (cid:1)(cid:2)(cid:10)(cid:4)(cid:5)(cid:6)(cid:7)(cid:3)(cid:8) (cid:11)(cid:12)(cid:13)(cid:14) (cid:4)(cid:15)(cid:14)(cid:16)(cid:2)(cid:17) (cid:18)(cid:19) (cid:20)(cid:15)(cid:14)(cid:16)(cid:2)(cid:17) (cid:11)(cid:13)(cid:18)(cid:13) (cid:1)(cid:17)(cid:14)(cid:17)(cid:6)(cid:18)(cid:19)(cid:21)(cid:1)(cid:22)(cid:23)(cid:12)(cid:14)(cid:18)(cid:16)(cid:24)(cid:14)(cid:17)(cid:25)(cid:17)(cid:21)(cid:1) (cid:26)(cid:16)(cid:18)(cid:5) (cid:8)(cid:15)(cid:1)(cid:18)(cid:13)(cid:18)(cid:17) (cid:19)(cid:12)(cid:18)(cid:24)(cid:12)(cid:18)(cid:1) SCLS133E − DECEMBER 1982 − REVISED SEPTEMBER 2003 logic diagram (positive logic) 14 A 2 B 1 1OE 6 1C0 TG TG 5 1C1 TG 7 1Y 4 1C2 TG TG 3 1C3 TG 15 2OE 10 2C0 TG TG 11 2C1 TG 9 2Y 12 2C2 TG TG 13 2C3 TG Pin numbers shown are for the D, DB, J, N, NS, and W packages. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:3)(cid:8)(cid:9) (cid:1)(cid:2)(cid:10)(cid:4)(cid:5)(cid:6)(cid:7)(cid:3)(cid:8) (cid:11)(cid:12)(cid:13)(cid:14) (cid:4)(cid:15)(cid:14)(cid:16)(cid:2)(cid:17) (cid:18)(cid:19) (cid:20)(cid:15)(cid:14)(cid:16)(cid:2)(cid:17) (cid:11)(cid:13)(cid:18)(cid:13) (cid:1)(cid:17)(cid:14)(cid:17)(cid:6)(cid:18)(cid:19)(cid:21)(cid:1)(cid:22)(cid:23)(cid:12)(cid:14)(cid:18)(cid:16)(cid:24)(cid:14)(cid:17)(cid:25)(cid:17)(cid:21)(cid:1) (cid:26)(cid:16)(cid:18)(cid:5) (cid:8)(cid:15)(cid:1)(cid:18)(cid:13)(cid:18)(cid:17) (cid:19)(cid:12)(cid:18)(cid:24)(cid:12)(cid:18)(cid:1) SCLS133E − DECEMBER 1982 − REVISED SEPTEMBER 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V CC Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA IK I I CC Output clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA OK O O CC Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA O O CC Continuous current through V or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA CC Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C stg †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) SN54HC253 SN74HC253 UUNNIITT MIN NOM MAX MIN NOM MAX VCC Supply voltage 2 5 6 2 5 6 V VCC = 2 V 1.5 1.5 VVIIHH HHiigghh--lleevveell iinnppuutt vvoollttaaggee VCC = 4.5 V 3.15 3.15 VV VCC = 6 V 4.2 4.2 VCC = 2 V 0.5 0.5 VVIILL LLooww--lleevveell iinnppuutt vvoollttaaggee VCC = 4.5 V 1.35 1.35 VV VCC = 6 V 1.8 1.8 VI Input voltage 0 VCC 0 VCC V VO Output voltage 0 VCC 0 VCC V VCC = 2 V 1000 1000 ∆∆tt//∆∆vv IInnppuutt ttrraannssiittiioonn rriissee//ffaallll ttiimmee VCC = 4.5 V 500 500 nnss VCC = 6 V 400 400 TA Operating free-air temperature −55 125 −40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:3)(cid:8)(cid:9) (cid:1)(cid:2)(cid:10)(cid:4)(cid:5)(cid:6)(cid:7)(cid:3)(cid:8) (cid:11)(cid:12)(cid:13)(cid:14) (cid:4)(cid:15)(cid:14)(cid:16)(cid:2)(cid:17) (cid:18)(cid:19) (cid:20)(cid:15)(cid:14)(cid:16)(cid:2)(cid:17) (cid:11)(cid:13)(cid:18)(cid:13) (cid:1)(cid:17)(cid:14)(cid:17)(cid:6)(cid:18)(cid:19)(cid:21)(cid:1)(cid:22)(cid:23)(cid:12)(cid:14)(cid:18)(cid:16)(cid:24)(cid:14)(cid:17)(cid:25)(cid:17)(cid:21)(cid:1) (cid:26)(cid:16)(cid:18)(cid:5) (cid:8)(cid:15)(cid:1)(cid:18)(cid:13)(cid:18)(cid:17) (cid:19)(cid:12)(cid:18)(cid:24)(cid:12)(cid:18)(cid:1) SCLS133E − DECEMBER 1982 − REVISED SEPTEMBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TA = 25°C SN54HC253 SN74HC253 PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS VVCCCC UUNNIITT MIN TYP MAX MIN MAX MIN MAX 2 V 1.9 1.998 1.9 1.9 IIOOHH == −−2200 µµAA 4.5 V 4.4 4.499 4.4 4.4 VVOOHH VVII == VVIIHH oorr VVIILL 6 V 5.9 5.999 5.9 5.9 VV IOH = −6 mA 4.5 V 3.98 4.3 3.7 3.84 IOH = −7.8 mA 6 V 5.48 5.8 5.2 5.34 2 V 0.002 0.1 0.1 0.1 IIOOLL == 2200 µµAA 4.5 V 0.001 0.1 0.1 0.1 VVOOLL VVII == VVIIHH oorr VVIILL 6 V 0.001 0.1 0.1 0.1 VV IOL = 6 mA 4.5 V 0.17 0.26 0.4 0.33 IOL = 7.8 mA 6 V 0.15 0.26 0.4 0.33 II VI = VCC or 0 6 V ±0.1 ±100 ±1000 ±1000 nA IOZ VO = VCC or 0 6 V ±0.01 ±0.5 ±10 ±5 µA ICC VI = VCC or 0, IO = 0 6 V 8 160 80 µA Ci 2 V to 6 V 3 10 10 10 pF switching characteristics over recommended operating free-air temperature range, C = 50 pF L (unless otherwise noted) (see Figure 1) FFRROOMM TTOO TA = 25°C SN54HC253 SN74HC253 PPAARRAAMMEETTEERR (INPUT) (OUTPUT) VVCCCC MIN TYP MAX MIN MAX MIN MAX UUNNIITT 2 V 62 150 225 190 AA oorr BB AAnnyy YY 4.5 V 19 30 45 38 6 V 16 26 38 32 ttppdd nnss 2 V 54 126 210 175 DDaattaa YY 4.5 V 16 28 42 35 ((AAnnyy CC)) 6 V 13 23 36 30 2 V 28 100 150 125 tteenn OOEE YY 4.5 V 11 20 30 25 nnss 6 V 9 17 26 21 2 V 21 135 203 170 ttddiiss OOEE YY 4.5 V 14 30 45 38 nnss 6 V 12 35 38 31 2 V 28 60 90 75 tttt YY 4.5 V 8 12 18 15 nnss 6 V 6 10 15 13 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:3)(cid:8)(cid:9) (cid:1)(cid:2)(cid:10)(cid:4)(cid:5)(cid:6)(cid:7)(cid:3)(cid:8) (cid:11)(cid:12)(cid:13)(cid:14) (cid:4)(cid:15)(cid:14)(cid:16)(cid:2)(cid:17) (cid:18)(cid:19) (cid:20)(cid:15)(cid:14)(cid:16)(cid:2)(cid:17) (cid:11)(cid:13)(cid:18)(cid:13) (cid:1)(cid:17)(cid:14)(cid:17)(cid:6)(cid:18)(cid:19)(cid:21)(cid:1)(cid:22)(cid:23)(cid:12)(cid:14)(cid:18)(cid:16)(cid:24)(cid:14)(cid:17)(cid:25)(cid:17)(cid:21)(cid:1) (cid:26)(cid:16)(cid:18)(cid:5) (cid:8)(cid:15)(cid:1)(cid:18)(cid:13)(cid:18)(cid:17) (cid:19)(cid:12)(cid:18)(cid:24)(cid:12)(cid:18)(cid:1) SCLS133E − DECEMBER 1982 − REVISED SEPTEMBER 2003 switching characteristics over recommended operating free-air temperature range, C = 150 pF L (unless otherwise noted) (see Figure 1) FFRROOMM TTOO TA = 25°C SN54HC253 SN74HC253 PPAARRAAMMEETTEERR (INPUT) (OUTPUT) VVCCCC MIN TYP MAX MIN MAX MIN MAX UUNNIITT 2 V 76 235 355 295 AA oorr BB AAnnyy YY 4.5 V 23 47 71 59 6 V 20 41 60 51 ttppdd nnss 2 V 68 220 335 275 DDaattaa YY 4.5 V 20 44 67 55 ((AAnnyy CC)) 6 V 17 38 57 51 2 V 44 185 280 230 tteenn OOEE YY 4.5 V 16 37 56 46 nnss 6 V 14 32 48 40 2 V 45 210 315 265 tttt YY 4.5 V 17 42 63 53 nnss 6 V 13 36 53 45 operating characteristics, T = 25°C A PARAMETER TEST CONDITIONS TYP UNIT Cpd Power dissipation capacitance per multiplexer No load 45 pF 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:3)(cid:8)(cid:9) (cid:1)(cid:2)(cid:10)(cid:4)(cid:5)(cid:6)(cid:7)(cid:3)(cid:8) (cid:11)(cid:12)(cid:13)(cid:14) (cid:4)(cid:15)(cid:14)(cid:16)(cid:2)(cid:17) (cid:18)(cid:19) (cid:20)(cid:15)(cid:14)(cid:16)(cid:2)(cid:17) (cid:11)(cid:13)(cid:18)(cid:13) (cid:1)(cid:17)(cid:14)(cid:17)(cid:6)(cid:18)(cid:19)(cid:21)(cid:1)(cid:22)(cid:23)(cid:12)(cid:14)(cid:18)(cid:16)(cid:24)(cid:14)(cid:17)(cid:25)(cid:17)(cid:21)(cid:1) (cid:26)(cid:16)(cid:18)(cid:5) (cid:8)(cid:15)(cid:1)(cid:18)(cid:13)(cid:18)(cid:17) (cid:19)(cid:12)(cid:18)(cid:24)(cid:12)(cid:18)(cid:1) SCLS133E − DECEMBER 1982 − REVISED SEPTEMBER 2003 PARAMETER MEASUREMENT INFORMATION VCC PARAMETER RL CL S1 S2 S1 tPZH 50 pF Open Closed Test ten 1 kΩ or From Output Point RL tPZL 150 pF Closed Open Under Test tPHZ Open Closed CL S2 tdis tPLZ 1 kΩ 50 pF Closed Open (see Note A) 50 pF tpd or tt −− or Open Open 150 pF LOAD CIRCUIT VCC Input 50% 50% 0 V tPLH tPHL In-Phase VOH 90% 90% Output 50% 50% 10% 10% VOL tr tf Output tPHL tPLH Control VCC VOH (Low-Level 50% 50% Out-of-Phase 90% 50% 50% 90% Enabling) 0 V Output 10% 10% VOL tPZL tPLZ tf tr Output ≈VCC ≈VCC Waveform 1 50% VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES (See Note B) 10% VOL tPZH tPHZ VCC Output VOH 90% 90% 90% Input 50% 50% Waveform 2 50% 10% 10% 0 V (See Note B) ≈0 V tr tf VOLTAGE WAVEFORM VOLTAGE WAVEFORMS INPUT RISE AND FALL TIMES ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS NOTES: A. CL includes probe and test-fixture capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. D. The outputs are measured one at a time with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 5962-88682012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 88682012A SNJ54HC 253FK 5962-8868201EA ACTIVE CDIP J 16 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-8868201EA SNJ54HC253J SN54HC253J ACTIVE CDIP J 16 1 TBD Call TI N / A for Pkg Type -55 to 125 SN54HC253J SN74HC253D ACTIVE SOIC D 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 HC253 & no Sb/Br) SN74HC253DBR ACTIVE SSOP DB 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 HC253 & no Sb/Br) SN74HC253DR ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 HC253 & no Sb/Br) SN74HC253DT ACTIVE SOIC D 16 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 HC253 & no Sb/Br) SN74HC253N ACTIVE PDIP N 16 25 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 SN74HC253N & no Sb/Br) SN74HC253NE4 ACTIVE PDIP N 16 25 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 SN74HC253N & no Sb/Br) SN74HC253NSR ACTIVE SO NS 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 HC253 & no Sb/Br) SNJ54HC253FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 88682012A SNJ54HC 253FK SNJ54HC253J ACTIVE CDIP J 16 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-8868201EA SNJ54HC253J (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54HC253, SN74HC253 : •Catalog: SN74HC253 •Automotive: SN74HC253-Q1, SN74HC253-Q1 •Enhanced Product: SN74HC253-EP, SN74HC253-EP •Military: SN54HC253 NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects •Enhanced Product - Supports Defense, Aerospace and Medical Applications •Military - QML certified for Military and Defense Applications Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2018 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74HC253DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 SN74HC253NSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2018 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74HC253DR SOIC D 16 2500 333.2 345.9 28.6 SN74HC253NSR SO NS 16 2000 367.0 367.0 38.0 PackMaterials-Page2

None

None

None

None

None

MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,65 0,15 M 0,22 28 15 0,25 0,09 5,60 8,20 5,00 7,40 Gage Plane 1 14 0,25 A 0°–(cid:1)8° 0,95 0,55 Seating Plane 2,00 MAX 0,05 MIN 0,10 PINS ** 14 16 20 24 28 30 38 DIM A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 4040065/E 12/01 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

None

IMPORTANTNOTICEANDDISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated