(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:11) (cid:12)(cid:13)(cid:14)(cid:15)(cid:16)(cid:13)(cid:11)(cid:17)(cid:10) (cid:8)(cid:9)(cid:18)(cid:2)(cid:11)(cid:13)(cid:19) (cid:11)(cid:20)(cid:1)(cid:18)(cid:19)(cid:18)(cid:21)(cid:10)(cid:9)(cid:2)(cid:20)(cid:16) (cid:22)(cid:14)(cid:19)(cid:10) SCLS478A − APRIL 2003 − REVISED JANUARY 2004 (cid:1) (cid:1) Controlled Baseline Outputs Can Drive Up To 10 LSTTL Loads − One Assembly/Test Site, One Fabrication (cid:1) Low Power Consumption, 20-µA Max I CC Site (cid:1) (cid:1) Typical tpd = 8 ns Extended Temperature Performance of Up (cid:1) ±4-mA Output Drive at 5 V To −55°C to 125°C (cid:1) (cid:1) Low Input Current of 1 µA Max Enhanced Diminishing Manufacturing Sources (DMS) Support D OR PW PACKAGE (cid:1) Enhanced Product-Change Notification (TOP VIEW) (cid:1) Qualification Pedigree† (cid:1) 2-V to 6-V V Operation 1Y 1 14 VCC CC 1A 2 13 4Y †Component qualification in accordance with JEDEC and industry 1B 3 12 4B standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly 2Y 4 11 4A Accelerated Stress Test (HAST) or biased 85/85, temperature 2A 5 10 3Y cycle, autoclave or unbiased HAST, electromigration, bond 2B 6 9 3B intermetallic life, and mold compound life. Such qualification GND 7 8 3A testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. description/ordering information The SN74HC02 contains four independent 2-input NOR gates. It performs the Boolean function Y = A + B or Y = A • B in positive logic. ORDERING INFORMATION ORDERABLE TOP-SIDE TA PACKAGE‡ PART NUMBER MARKING −40°C to 125°C TSSOP − PW Tape and reel SN74HC02QPWREP SHC02EP −55°C to 125°C SOIC − D Tape and reel SN74HC02MDREP HC02MEP ‡Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS OOUUTTPPUUTT A B Y H X L X H L L L H logic diagram (positive logic) A Y B Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet. (cid:11)(cid:16)(cid:20)(cid:15)(cid:13)(cid:6)(cid:19)(cid:18)(cid:20)(cid:2) (cid:15)(cid:14)(cid:19)(cid:14) (cid:23)(cid:24)(cid:25)(cid:26)(cid:27)(cid:28)(cid:29)(cid:30)(cid:23)(cid:26)(cid:24) (cid:23)(cid:31) !"(cid:27)(cid:27)#(cid:24)(cid:30) (cid:29)(cid:31) (cid:26)(cid:25) $"%&(cid:23)!(cid:29)(cid:30)(cid:23)(cid:26)(cid:24) ’(cid:29)(cid:30)#( Copyright  2004, Texas Instruments Incorporated (cid:11)(cid:27)(cid:26)’"!(cid:30)(cid:31) !(cid:26)(cid:24)(cid:25)(cid:26)(cid:27)(cid:28) (cid:30)(cid:26) (cid:31)$#!(cid:23)(cid:25)(cid:23)!(cid:29)(cid:30)(cid:23)(cid:26)(cid:24)(cid:31) $#(cid:27) (cid:30))# (cid:30)#(cid:27)(cid:28)(cid:31) (cid:26)(cid:25) (cid:19)#*(cid:29)(cid:31) (cid:18)(cid:24)(cid:31)(cid:30)(cid:27)"(cid:28)#(cid:24)(cid:30)(cid:31) (cid:31)(cid:30)(cid:29)(cid:24)’(cid:29)(cid:27)’ +(cid:29)(cid:27)(cid:27)(cid:29)(cid:24)(cid:30),( (cid:11)(cid:27)(cid:26)’"!(cid:30)(cid:23)(cid:26)(cid:24) $(cid:27)(cid:26)!#(cid:31)(cid:31)(cid:23)(cid:24)- ’(cid:26)#(cid:31) (cid:24)(cid:26)(cid:30) (cid:24)#!#(cid:31)(cid:31)(cid:29)(cid:27)(cid:23)&, (cid:23)(cid:24)!&"’# (cid:30)#(cid:31)(cid:30)(cid:23)(cid:24)- (cid:26)(cid:25) (cid:29)&& $(cid:29)(cid:27)(cid:29)(cid:28)#(cid:30)#(cid:27)(cid:31)( POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:11) (cid:12)(cid:13)(cid:14)(cid:15)(cid:16)(cid:13)(cid:11)(cid:17)(cid:10) (cid:8)(cid:9)(cid:18)(cid:2)(cid:11)(cid:13)(cid:19) (cid:11)(cid:20)(cid:1)(cid:18)(cid:19)(cid:18)(cid:21)(cid:10)(cid:9)(cid:2)(cid:20)(cid:16) (cid:22)(cid:14)(cid:19)(cid:10) SCLS478A − APRIL 2003 − REVISED JANUARY 2004 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V CC Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA IK I I CC Output clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA OK O O CC Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA O O CC Continuous current through V or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA CC Package thermal impedance, θJA (see Note 2):D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C stg †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) MIN NOM MAX UNIT VCC Supply voltage 2 5 6 V VCC = 2 V 1.5 VVIIHH HHiigghh--lleevveell iinnppuutt vvoollttaaggee VCC = 4.5 V 3.15 VV VCC = 6 V 4.2 VCC = 2 V 0.5 VVIILL LLooww--lleevveell iinnppuutt vvoollttaaggee VCC = 4.5 V 1.35 VV VCC = 6 V 1.8 VI Input voltage 0 VCC V VO Output voltage 0 VCC V VCC = 2 V 1000 ∆∆tt//∆∆vv IInnppuutt ttrraannssiittiioonn rriissee//ffaallll ttiimmee VCC = 4.5 V 500 nnss VCC = 6 V 400 Q-suffix device −40 125 TTAA OOppeerraattiinngg ffrreeee--aaiirr tteemmppeerraattuurree °°CC M-suffix device −55 125 NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:11) (cid:12)(cid:13)(cid:14)(cid:15)(cid:16)(cid:13)(cid:11)(cid:17)(cid:10) (cid:8)(cid:9)(cid:18)(cid:2)(cid:11)(cid:13)(cid:19) (cid:11)(cid:20)(cid:1)(cid:18)(cid:19)(cid:18)(cid:21)(cid:10)(cid:9)(cid:2)(cid:20)(cid:16) (cid:22)(cid:14)(cid:19)(cid:10) SCLS478A − APRIL 2003 − REVISED JANUARY 2004 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TA = 25°C PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS VVCCCC MMIINN MMAAXX UUNNIITT MIN TYP MAX 2 V 1.9 1.998 1.9 IIOOHH == −−2200 µµAA 4.5 V 4.4 4.499 4.4 VVOOHH VVII == VVIIHH oorr VVIILL 6 V 5.9 5.999 5.9 VV IOH = −4 mA 4.5 V 3.98 4.3 3.7 IOH = −5.2 mA 6 V 5.48 5.8 5.2 2 V 0.002 0.1 0.1 IIOOLL == 2200 µµAA 4.5 V 0.001 0.1 0.1 VVOOLL VVII == VVIIHH oorr VVIILL 6 V 0.001 0.1 0.1 VV IOL = 4 mA 4.5 V 0.17 0.26 0.4 IOL = 5.2 mA 6 V 0.15 0.26 0.4 II VI = VCC or 0 6 V ±0.1 ±100 ±1000 nA ICC VI = VCC or 0, IO = 0 6 V 2 40 µA Ci 2 V to 6 V 3 10 10 pF switching characteristics over recommended operating free-air temperature range, C = 50 pF L (unless otherwise noted) (see Figure 1) FFRROOMM TTOO TA = 25°C PPAARRAAMMEETTEERR (INPUT) (OUTPUT) VVCCCC MIN TYP MAX MMIINN MMAAXX UUNNIITT 2 V 45 90 135 ttppdd AA oorr BB YY 4.5 V 9 18 27 nnss 6 V 8 15 23 2 V 38 75 110 tttt YY 4.5 V 8 15 22 nnss 6 V 6 13 19 operating characteristics, T = 25°C A PARAMETER TEST CONDITIONS TYP UNIT Cpd Power dissipation capacitance per gate No load 22 pF POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

(cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:11) (cid:12)(cid:13)(cid:14)(cid:15)(cid:16)(cid:13)(cid:11)(cid:17)(cid:10) (cid:8)(cid:9)(cid:18)(cid:2)(cid:11)(cid:13)(cid:19) (cid:11)(cid:20)(cid:1)(cid:18)(cid:19)(cid:18)(cid:21)(cid:10)(cid:9)(cid:2)(cid:20)(cid:16) (cid:22)(cid:14)(cid:19)(cid:10) SCLS478A − APRIL 2003 − REVISED JANUARY 2004 PARAMETER MEASUREMENT INFORMATION From Output Test VCC Under Test Point Input 50% 50% 0 V CL = 50 pF (see Note A) tPLH tPHL In-Phase VOH 90% 90% Output 50% 50% LOAD CIRCUIT 10% 10% VOL tr tf 90% 90% VCC tPHL tPLH VOH Input 105%0% 501%0% Out-of-Phase 90% 50% 50% 90% 0 V Output 10% 10% VOL tr tf tf tr VOLTAGE WAVEFORM VOLTAGE WAVEFORMS INPUT RISE AND FALL TIMES PROPAGATION DELAY AND OUTPUT TRANSITION TIMES NOTES: A. CL includes probe and test-fixture capacitance. B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. C. The outputs are measured one at a time with one input transition per measurement. D. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN74HC02QPWREP ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SHC02EP & no Sb/Br) V62/04687-02YE ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SHC02EP & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 OTHER QUALIFIED VERSIONS OF SN74HC02-EP : •Catalog: SN74HC02 •Automotive: SN74HC02-Q1 •Military: SN54HC02 NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects •Military - QML certified for Military and Defense Applications Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74HC02QPWREP TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74HC02QPWREP TSSOP PW 14 2000 367.0 367.0 35.0 PackMaterials-Page2

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