Product Sample & Technical Tools & Support & Folder Buy Documents Software Community SN54HC02,SN74HC02 SCLS076F–DECEMBER1982–REVISEDAPRIL2015 SNx4HC02 Quadruple 2-Input Positive-NOR Gates 1 Features 3 Description • WideOperatingVoltageRangeof2Vto6V The SNx4HC02 devices contain four independent 2- 1 input NOR gates. They perform the Boolean function • OutputsCanDriveUpto10LSTTLLoads Y= A+BorY= A•Binpositivelogic. • LowPowerConsumption:MaximumI of20µA CC • Typicalt =8ns DeviceInformation(1) pd • ±4-mAOutputDriveat5V PARTNUMBER PACKAGE BODYSIZE(NOM) • LowInputCurrentof1-µAMaximum SN74HC02D SOIC(14) 4.90mm×3.91mm SN74HC02N PDIP(14) 19.30mm×6.35mm 2 Applications SN74HC02PW TSSOP(14) 5.00mm×4.40mm • Education SN74HC02NS SO(14) 10.30mm×5.30mm SN74HC02DB SSOP(14) 6.20mm×5.30mm • Toys SN54HC02J CDIP(14) 19.94mm×7.62mm • MusicalInstruments SN54HC02W CFP(14) 9.21mm×7.11mm • MedicalHealthcareandFitness SN54HC02FK LCCC(20) 8.89mm×8.89mm • GridInfrastructure (1) For all available packages, see the orderable addendum at • ElectronicPointofSale theendofthedatasheet. • TestandMeasurement • FactoryAutomationandControl • BuildingAutomation • RSLatch • FallingEdgeDetector SNx4HC02FunctionalBlockDiagram 1 14 1Y V CC 2 13 1A 4Y 3 12 1B 4B 4 11 2Y 4A 5 10 2A 3Y 6 9 2B 3B 7 8 GND 3A Copyright © 2016, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA. On products compliant to MIL-PRF-38535, all parameters are testedunlessotherwisenoted.Onallotherproducts,production processingdoesnotnecessarilyincludetestingofallparameters.

SN54HC02,SN74HC02 SCLS076F–DECEMBER1982–REVISEDAPRIL2015 www.ti.com Table of Contents 1 Features.................................................................. 1 8.2 FunctionalBlockDiagram.........................................8 2 Applications........................................................... 1 8.3 FeatureDescription...................................................8 3 Description............................................................. 1 8.4 DeviceFunctionalModes..........................................8 4 RevisionHistory..................................................... 2 9 ApplicationandImplementation........................ 10 9.1 ApplicationInformation............................................10 5 PinConfigurationandFunctions......................... 3 9.2 TypicalApplication .................................................10 6 Specifications......................................................... 4 10 PowerSupplyRecommendations..................... 11 6.1 AbsoluteMaximumRatings......................................4 11 Layout................................................................... 11 6.2 ESDRatings–SN74HC02.......................................4 6.3 RecommendedOperatingConditions.......................4 11.1 LayoutGuidelines.................................................11 6.4 ThermalInformation–SN74HC02............................5 11.2 LayoutExample....................................................11 6.5 ThermalInformation–SN54HC02............................5 12 DeviceandDocumentationSupport................. 12 6.6 ElectricalCharacteristics...........................................5 12.1 DocumentationSupport........................................12 6.7 SwitchingCharacteristics..........................................6 12.2 RelatedLinks........................................................12 6.8 OperatingCharacteristics..........................................6 12.3 CommunityResources..........................................12 6.9 TypicalCharacteristics..............................................6 12.4 Trademarks...........................................................12 7 ParameterMeasurementInformation..................7 12.5 ElectrostaticDischargeCaution............................12 12.6 Glossary................................................................12 8 DetailedDescription.............................................. 8 13 Mechanical,Packaging,andOrderable 8.1 Overview...................................................................8 Information........................................................... 12 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionE(August2003)toRevisionF Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection.................................................................................................. 1 • Removedorderinginformation............................................................................................................................................... 1 2 SubmitDocumentationFeedback Copyright©1982–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN54HC02 SN74HC02

SN54HC02,SN74HC02 www.ti.com SCLS076F–DECEMBER1982–REVISEDAPRIL2015 5 Pin Configuration and Functions D,DB,N,NS,PW,J,orWPackage FKPackage 14-PinSOIC,SSOP,PDIP,SO,TSSOP,CDIP,orCFP 20-PinLCCC TopView TopView 1A 1Y NC V 4Y CC 1Y 1 14 VCC 3 2 1 20 19 1A 2 13 4Y 1B 4 18 4B NC 5 17 NC 1B 3 12 4B 2Y 6 16 4A 2Y 4 11 4A NC 7 15 NC 2A 5 10 3Y 2A 8 14 3Y 2B 6 9 3B 9 10 11 12 13 GND 7 8 3A 2B GND NC 3A 3B PinFunctions PIN SOIC,SSOP, PDIP,SO, I/O DESCRIPTION NAME LCCC TSSOP,CDIP, CFP 1Y 1 2 O Gate1output 1A 2 3 I Gate1inputA 1B 3 4 I Gate1inputB 2Y 4 6 O Gate2output 2A 5 8 I Gate2inputA 2B 6 9 I Gate2inputB GND 7 10 — GroundPin 3A 8 12 I Gate3inputA 3B 9 13 I Gate3inputB 3Y 10 14 O Gate3output 4A 11 16 I Gate4inputA 4B 12 18 I Gate4inputB 4Y 13 19 O Gate4output V 14 20 — Powerpin CC 1,5,7,11,15, NC — — Nointernalconnection 17 Copyright©1982–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN54HC02 SN74HC02

SN54HC02,SN74HC02 SCLS076F–DECEMBER1982–REVISEDAPRIL2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT V Supplyvoltage –0.5 7 V CC I Inputclampcurrent(2) V <0orV >V ±20 mA IK I I CC I Outputclampcurrent(2) V <0orV >V ±20 mA OK O O CC I Continuousoutputcurrent V =0toV ±25 mA O O CC ContinuouscurrentthroughV orGND ±50 mA CC T Operatingvirtualjunctiontemperature 150 °C j T Storagetemperature –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperating Conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Theinputandoutputvoltageratingsmaybeexceedediftheinputandoutputcurrentratingsareobserved. 6.2 ESD Ratings – SN74HC02 VALUE UNIT Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±1500 V Electrostaticdischarge V (ESD) Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±2000 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions See (1). MIN NOM MAX UNIT V Supplyvoltage 2 5 6 V CC V =2V 1.5 CC V High-levelinputvoltage V =4.5V 3.15 V IH CC V =6V 4.2 CC V =2V 0.5 CC V Low-levelinputvoltage V =4.5V 1.35 V IL CC V =6V 1.8 CC V Inputvoltage 0 V V I CC V Outputvoltage 0 V V O CC V =2V 1000 CC ∆t/∆v Inputtransitionriseandfalltime V =4.5V 500 ns/V CC V =6V 400 CC SN54HC02 –55 125 T Operatingfree-airtemperature °C A SN74HC02 –40 85 (1) AllunusedinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.SeetheTIapplicationreport, CC ImplicationsofSloworFloatingCMOSInputs,SCBA004. 4 SubmitDocumentationFeedback Copyright©1982–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN54HC02 SN74HC02

SN54HC02,SN74HC02 www.ti.com SCLS076F–DECEMBER1982–REVISEDAPRIL2015 6.4 Thermal Information – SN74HC02 SN74HC02 THERMALMETRIC(1) D DB N NS PW UNIT (SOIC) (SSOP) (PDIP) (SO) (TSSOP) 14PINS 14PINS 14PINS 14PINS 14PINS RθJA Junction-to-ambientthermalresistance(1) 94 105.4 54.9 88.8 119.6 °C/W RθJC(top) Junction-to-case(top)thermalresistance 53.2 57.3 42.5 46.5 48.4 °C/W RθJB Junction-to-boardthermalresistance 48.7 52.7 34.7 47.6 61.3 °C/W ψJT Junction-to-topcharacterizationparameter 15.6 22.6 27.9 16.8 5.6 °C/W ψJB Junction-to-boardcharacterizationparameter 48.4 52.2 34.6 47.2 60.7 °C/W (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. 6.5 Thermal Information – SN54HC02 SN54HC02 THERMALMETRIC(1) J W FK UNIT (CDIP) (CFP) (LCCC) 14PINS 14PINS 20PINS RθJC(top) Junction-to-case(top)thermalresistance 53.8 89.6 61.1 °C/W RθJB Junction-to-boardthermalresistance 73.1 164.1 59.8 °C/W RθJC(bot) Junction-to-case(bottom)thermalresistance 26.7 15.5 11.7 °C/W (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. 6.6 Electrical Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS V T MIN TYP MAX UNIT CC A 2V 1.9 1.998 I =–20µA 4.5V 4.4 4.499 OH 6V 5.9 5.999 T =25°C 3.98 4.3 A V V =V orV I =–4mA 4.5V SN54HC02 3.7 V OH I IH IL OH SN74HC02 3.84 T =25°C 5.48 5.8 A I =–5.2mA 6V SN54HC02 5.2 OH SN74HC02 5.34 2V 0.002 0.1 I =20µA 4.5V 0.001 0.1 OL 6V 0.001 0.1 T =25°C 0.17 0.26 A V V =V orV I =4mA 4.5V SN54HC02 0.4 V OL I IH IL OL SN74HC02 0.33 T =25°C 0.15 0.26 A I =5.2mA 6V SN54HC02 0.4 OL SN74HC02 0.33 T =25°C ±0.1 ±100 A II VI=VCCor0 6V SN54HC02, nA ±1000 SN74HC02 T =25°C 2 A I V =V or0,I =0 6V SN54HC02 40 µA CC I CC O SN74HC02 20 C 2Vto6V 3 10 pF i Copyright©1982–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN54HC02 SN74HC02

SN54HC02,SN74HC02 SCLS076F–DECEMBER1982–REVISEDAPRIL2015 www.ti.com 6.7 Switching Characteristics overrecommendedoperatingfree-airtemperaturerange,C =50pF(unlessotherwisenoted)(seeFigure2) L FROM TO PARAMETER V T MIN TYP MAX UNIT (INPUT) (OUTPUT) CC A T =25°C 45 90 A 2V SN54HC02 135 SN74HC02 115 T =25°C 9 18 A t AorB Y 4.5V SN54HC02 27 ns pd SN74HC02 23 T =25°C 8 15 A 6V SN54HC02 23 SN74HC02 20 T =25°C 38 75 A 2V SN54HC02 110 SN74HC02 95 T =25°C 8 15 A t AorB Y 4.5V SN54HC02 22 ns t SN74HC02 19 T =25°C 6 13 A 6V SN54HC02 19 SN74HC02 16 6.8 Operating Characteristics T =25°C A PARAMETER TESTCONDITIONS TYP UNIT C Powerdissipationcapacitancepergate Noload 22 pF pd 6.9 Typical Characteristics 80 70 60 ) s n ( ax) 40 TA = 25oC m CL = 50 pF ( tt 20 10 0 2 4 5 6 Vcc Figure1.t vsVCC t 6 SubmitDocumentationFeedback Copyright©1982–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN54HC02 SN74HC02

SN54HC02,SN74HC02 www.ti.com SCLS076F–DECEMBER1982–REVISEDAPRIL2015 7 Parameter Measurement Information FromOutput Test VCC UnderTest Point Input 50% 50% 0V CL=50pF (seeNoteA) tPLH tPHL In-Phase VOH 90% 90% Output 50% 50% LOADCIRCUIT 10% 10% VOL tr tf 90% 90% VCC tPHL tPLH VOH Input 105%0% 501%0% Out-of-Phase 90% 50% 50% 90% 0V Output 10% 10% VOL tr tf tf tr VOLTAGEWAVEFORM VOLTAGEWAVEFORMS INPUTRISEANDFALLTIMES PROPAGATIONDELAYANDOUTPUTTRANSITIONTIMES A. C includesprobeandtest-fixturecapacitance. L B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having thefollowingcharacteristics:PRR≤1MHz,Z =50Ω,t =6ns,t =6ns. O r f C. Theoutputsaremeasuredoneatatimewithoneinputtransitionpermeasurement. D. t andt arethesameast . PLH PHL pd Figure2. LoadCircuitandVoltageWaveforms Copyright©1982–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN54HC02 SN74HC02

SN54HC02,SN74HC02 SCLS076F–DECEMBER1982–REVISEDAPRIL2015 www.ti.com 8 Detailed Description 8.1 Overview The SNx4HC02 devices are quad 2-input NOR gates. These devices are members of the High-Speed CMOS (HC) logic family. The HC family of logic is optimized to operate with a 5-V supply, is low noise without characteristic overshoot and undershoot, has low power consumption, small propagation delay, balanced propagationdelayandtransitiontimes,andoperatesoverawidetemperaturerange. 8.2 Functional Block Diagram 1 14 1Y V CC 2 13 1A 4Y 3 12 1B 4B 4 11 2Y 4A 5 10 2A 3Y 6 9 2B 3B 7 8 GND 3A Copyright © 2016, Texas Instruments Incorporated 8.3 Feature Description 8.3.1 OperatingVoltageRange TheSNx4HCseriesofdevicesofferawideoperatingvoltagerangefrom2Vto6V. 8.3.2 LSTTLLoads TheoutputsoftheSNx4HCseriescandriveupto10LSTTLloads. 8.3.3 LowPowerConsumption TheSNx4HC02offerslowpowerconsumptionof20 μAmaximum. 8.3.4 OutputDriveCapability At5V,theoutputshave ±4mAofoutputdrivecapability. 8.3.5 LowInputCurrentLeakage Inputshavelowinputcurrentleakageof1 μAmaximum. 8.4 Device Functional Modes Table1liststhefunctionalmodesoftheSNx4HC02. Table1.FunctionTable INPUTS OUTPUT A B Y H X L X H L L L H 8 SubmitDocumentationFeedback Copyright©1982–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN54HC02 SN74HC02

SN54HC02,SN74HC02 www.ti.com SCLS076F–DECEMBER1982–REVISEDAPRIL2015 A Y B Figure3. LogicDiagram(PositiveLogic) Copyright©1982–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SN54HC02 SN74HC02

SN54HC02,SN74HC02 SCLS076F–DECEMBER1982–REVISEDAPRIL2015 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information The SNX4HC02 is a low-drive CMOS device that can be used for a multitude of NOR type functions. The device can produce 4 mA of drive current at 5 V, making it Ideal for driving multiple outputs and good for low-noise applications.ThisapplicationisforusingasingleSNX4HC02asafallingedgedetectorcircuit. The edge detector operates by using the inherent propagation delay from input to output of each device stage. In steady-state, the inputs to the output stage will always be different, and thus the output will always be low. Only duringthebrieftimewhenbothinputsarelow(thatis,immediatelyfollowingafallingedgeonV ),theoutputwill IN behigh. 9.2 Typical Application V IN V OUT Copyright © 2016, Texas Instruments Incorporated Figure4. FallingEdgeDetectorSchematic 9.2.1 DesignRequirements ThisdeviceusesCMOStechnologyandhasbalancedoutputdrive.Takecaretoavoidbuscontentionbecauseit can drive currents that would exceed maximum limits. The high drive also creates fast edges into light loads, so routingandloadconditionsmustbeconsideredtopreventringing. The output pulse time will be approximately three times t from Switching Characteristics for the selected V , pd CC device,andtemperaturerange. 9.2.2 DetailedDesignProcedure 1. Recommended Input Conditions – For rise time and fall time specifications, see Δt/ΔV in Recommended OperatingConditions. – Forspecifiedhighandlowlevels,seeV andV inRecommendedOperatingConditions. IH IL – Inputsarenotovervoltagetolerant,allowingthemtogoashighasV . CC 2. RecommendOutputConditions – Loadcurrentsmustnotexceed20mAperoutputand50mAtotalforthepart. – OutputsmustnotbepulledaboveV . CC 10 SubmitDocumentationFeedback Copyright©1982–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN54HC02 SN74HC02

SN54HC02,SN74HC02 www.ti.com SCLS076F–DECEMBER1982–REVISEDAPRIL2015 Typical Application (continued) 9.2.3 ApplicationCurve 150 s) n 125 h ( gt en 100 L e s Pul 75 ut p ut 50 O al c pi 25 y T 0 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 Supply Voltage (V) C001 Figure5. TypicalOutputPulseLengthOverV Range CC 10 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in Recommended Operating Conditions. Each V pin must have a good bypass capacitor to prevent power CC disturbance. For devices with a single supply, TI recommends a 0.1-μF bypass capacitor. If there are multiple V pins,TIrecommendsa0.01-μFor0.022-μFbypasscapacitorsforeachpowerpin.Itisacceptabletoparallel CC multiplebypasscapacitorstorejectdifferentfrequenciesofnoise.Twobypasscapacitorsofvalue0.1 μFand 1 μF are commonly used in parallel. For best results, install the bypass capacitor(s) as close to the power pin as possible. 11 Layout 11.1 Layout Guidelines When using multiple bit logic devices, inputs must not float. In many cases, functions or parts of functions of digital logic devices are unused. Some examples are when only two inputs of a triple-input AND gate are used, or when only 3 of the 4-buffer gates are used. Such input pins must not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Specified in Absolute Maximum Ratings are rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that must be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or V , whichever makes more sense or is more convenient. It is acceptable to float outputs unless the part is a CC transceiver. If the transceiver has an output enable pin, it will disable the outputs section of the part when asserted.ThiswillnotdisabletheinputsectionoftheI/Ossotheyalsocannotfloatwhendisabled. 11.2 Layout Example Figure6. LayoutRecommendation Copyright©1982–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:SN54HC02 SN74HC02

SN54HC02,SN74HC02 SCLS076F–DECEMBER1982–REVISEDAPRIL2015 www.ti.com 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 RelatedDocumentation Forrelateddocumentation,seethefollowing: ImplicationsofSloworFloatingCMOSInputs,SCBA004 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstosampleorbuy. Table2.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY SN54HC02 Clickhere Clickhere Clickhere Clickhere Clickhere SN74HC02 Clickhere Clickhere Clickhere Clickhere Clickhere 12.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.4 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.5 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.6 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 12 SubmitDocumentationFeedback Copyright©1982–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN54HC02 SN74HC02

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 5962-8404101VCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8404101VC A SNV54HC02J 84041012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 84041012A SNJ54HC 02FK 8404101CA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 8404101CA SNJ54HC02J 8404101DA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 8404101DA SNJ54HC02W JM38510/65101B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 65101B2A JM38510/65101BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 65101BCA JM38510/65101BDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 65101BDA M38510/65101B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 65101B2A M38510/65101BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 65101BCA M38510/65101BDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 65101BDA SN54HC02J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SN54HC02J SN74HC02D ACTIVE SOIC D 14 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 & no Sb/Br) SN74HC02DBR ACTIVE SSOP DB 14 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 & no Sb/Br) SN74HC02DE4 ACTIVE SOIC D 14 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 & no Sb/Br) SN74HC02DR ACTIVE SOIC D 14 2500 Green (RoHS CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 HC02 & no Sb/Br) SN74HC02DRE4 ACTIVE SOIC D 14 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN74HC02DRG4 ACTIVE SOIC D 14 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 & no Sb/Br) SN74HC02DT ACTIVE SOIC D 14 250 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 & no Sb/Br) SN74HC02N ACTIVE PDIP N 14 25 Green (RoHS CU NIPDAU | CU SN N / A for Pkg Type -40 to 85 SN74HC02N & no Sb/Br) SN74HC02NE4 ACTIVE PDIP N 14 25 Green (RoHS CU NIPDAU N / A for Pkg Type -40 to 85 SN74HC02N & no Sb/Br) SN74HC02NSR ACTIVE SO NS 14 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 & no Sb/Br) SN74HC02NSRG4 ACTIVE SO NS 14 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 & no Sb/Br) SN74HC02PW ACTIVE TSSOP PW 14 90 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 & no Sb/Br) SN74HC02PWG4 ACTIVE TSSOP PW 14 90 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 & no Sb/Br) SN74HC02PWR ACTIVE TSSOP PW 14 2000 Green (RoHS CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 HC02 & no Sb/Br) SN74HC02PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 & no Sb/Br) SN74HC02PWT ACTIVE TSSOP PW 14 250 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 & no Sb/Br) SNJ54HC02FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 84041012A SNJ54HC 02FK SNJ54HC02J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 8404101CA SNJ54HC02J SNJ54HC02W ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 8404101DA SNJ54HC02W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54HC02, SN54HC02-SP, SN74HC02 : •Catalog: SN74HC02, SN54HC02 •Automotive: SN74HC02-Q1, SN74HC02-Q1 •Enhanced Product: SN74HC02-EP, SN74HC02-EP •Military: SN54HC02 •Space: SN54HC02-SP NOTE: Qualified Version Definitions: Addendum-Page 3

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 •Catalog - TI's standard catalog product •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects •Enhanced Product - Supports Defense, Aerospace and Medical Applications •Military - QML certified for Military and Defense Applications •Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application Addendum-Page 4

PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2018 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74HC02DR SOIC D 14 2500 330.0 16.8 6.5 9.5 2.1 8.0 16.0 Q1 SN74HC02DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74HC02DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74HC02DRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74HC02DRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74HC02DT SOIC D 14 250 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74HC02PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74HC02PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74HC02PWRG4 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74HC02PWT TSSOP PW 14 250 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2018 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74HC02DR SOIC D 14 2500 364.0 364.0 27.0 SN74HC02DR SOIC D 14 2500 333.2 345.9 28.6 SN74HC02DR SOIC D 14 2500 367.0 367.0 38.0 SN74HC02DRG4 SOIC D 14 2500 333.2 345.9 28.6 SN74HC02DRG4 SOIC D 14 2500 367.0 367.0 38.0 SN74HC02DT SOIC D 14 250 210.0 185.0 35.0 SN74HC02PWR TSSOP PW 14 2000 367.0 367.0 35.0 SN74HC02PWR TSSOP PW 14 2000 364.0 364.0 27.0 SN74HC02PWRG4 TSSOP PW 14 2000 367.0 367.0 35.0 SN74HC02PWT TSSOP PW 14 250 367.0 367.0 35.0 PackMaterials-Page2

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PACKAGE OUTLINE J0014A CDIP - 5.08 mm max height SCALE 0.900 CERAMIC DUAL IN LINE PACKAGE PIN 1 ID A 4X .005 MIN (OPTIONAL) [0.13] .015-.060 TYP [0.38-1.52] 1 14 12X .100 [2.54] 14X .014-.026 14X .045-.065 [0.36-0.66] [1.15-1.65] .010 [0.25] C A B .754-.785 [19.15-19.94] 7 8 B .245-.283 .2 MAX TYP .13 MIN TYP [6.22-7.19] [5.08] [3.3] SEATING PLANE C .308-.314 [7.83-7.97] AT GAGE PLANE .015 GAGE PLANE [0.38] 0 -15 14X .008-.014 TYP [0.2-0.36] 4214771/A 05/2017 NOTES: 1. All controlling linear dimensions are in inches. Dimensions in brackets are in millimeters. Any dimension in brackets or parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This package is hermitically sealed with a ceramic lid using glass frit. 4. Index point is provided on cap for terminal identification only and on press ceramic glass frit seal only. 5. Falls within MIL-STD-1835 and GDIP1-T14. www.ti.com

EXAMPLE BOARD LAYOUT J0014A CDIP - 5.08 mm max height CERAMIC DUAL IN LINE PACKAGE (.300 ) TYP [7.62] SEE DETAIL B SEE DETAIL A 1 14 12X (.100 ) [2.54] SYMM 14X ( .039) [1] 7 8 SYMM LAND PATTERN EXAMPLE NON-SOLDER MASK DEFINED SCALE: 5X .002 MAX (.063) [0.05] [1.6] METAL ALL AROUND ( .063) SOLDER MASK [1.6] OPENING METAL .002 MAX SOLDER MASK (R.002 ) TYP [0.05] OPENING [0.05] ALL AROUND DETAIL A DETAIL B SCALE: 15X 13X, SCALE: 15X 4214771/A 05/2017 www.ti.com

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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,65 0,15 M 0,22 28 15 0,25 0,09 5,60 8,20 5,00 7,40 Gage Plane 1 14 0,25 A 0°–(cid:1)8° 0,95 0,55 Seating Plane 2,00 MAX 0,05 MIN 0,10 PINS ** 14 16 20 24 28 30 38 DIM A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 4040065/E 12/01 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

IMPORTANTNOTICEANDDISCLAIMER TIPROVIDESTECHNICALANDRELIABILITYDATA(INCLUDINGDATASHEETS),DESIGNRESOURCES(INCLUDINGREFERENCE DESIGNS),APPLICATIONOROTHERDESIGNADVICE,WEBTOOLS,SAFETYINFORMATION,ANDOTHERRESOURCES“ASIS” ANDWITHALLFAULTS,ANDDISCLAIMSALLWARRANTIES,EXPRESSANDIMPLIED,INCLUDINGWITHOUTLIMITATIONANY IMPLIEDWARRANTIESOFMERCHANTABILITY,FITNESSFORAPARTICULARPURPOSEORNON-INFRINGEMENTOFTHIRD PARTYINTELLECTUALPROPERTYRIGHTS. TheseresourcesareintendedforskilleddevelopersdesigningwithTIproducts.Youaresolelyresponsiblefor(1)selectingtheappropriate TIproductsforyourapplication,(2)designing,validatingandtestingyourapplication,and(3)ensuringyourapplicationmeetsapplicable standards,andanyothersafety,security,orotherrequirements.Theseresourcesaresubjecttochangewithoutnotice.TIgrantsyou permissiontousetheseresourcesonlyfordevelopmentofanapplicationthatusestheTIproductsdescribedintheresource.Other reproductionanddisplayoftheseresourcesisprohibited.NolicenseisgrantedtoanyotherTIintellectualpropertyrightortoanythird partyintellectualpropertyright.TIdisclaimsresponsibilityfor,andyouwillfullyindemnifyTIanditsrepresentativesagainst,anyclaims, damages,costs,losses,andliabilitiesarisingoutofyouruseoftheseresources. TI’sproductsareprovidedsubjecttoTI’sTermsofSale(www.ti.com/legal/termsofsale.html)orotherapplicabletermsavailableeitheron ti.comorprovidedinconjunctionwithsuchTIproducts.TI’sprovisionoftheseresourcesdoesnotexpandorotherwisealterTI’sapplicable warrantiesorwarrantydisclaimersforTIproducts. MailingAddress:TexasInstruments,PostOfficeBox655303,Dallas,Texas75265 Copyright©2018,TexasInstrumentsIncorporated