ICGOO在线商城 > 集成电路(IC) > 逻辑 - 栅极和逆变器 > SN74F20NSR
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SN74F20NSR产品简介:
ICGOO电子元器件商城为您提供SN74F20NSR由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 SN74F20NSR价格参考¥1.25-¥3.60。Texas InstrumentsSN74F20NSR封装/规格:逻辑 - 栅极和逆变器, NAND Gate IC 2 Channel 14-SOP。您可以下载SN74F20NSR参考资料、Datasheet数据手册功能说明书,资料中有SN74F20NSR 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC) |
描述 | IC GATE NAND 2CH 4-INP 14-SO |
产品分类 | |
品牌 | Texas Instruments |
数据手册 | |
产品图片 | |
产品型号 | SN74F20NSR |
rohs | 无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 74F |
不同V、最大CL时的最大传播延迟 | 5ns @ 5V,50pF |
供应商器件封装 | 14-SO |
其它名称 | 296-3564-6 |
包装 | Digi-Reel® |
安装类型 | 表面贴装 |
封装/外壳 | 14-SOIC(0.209",5.30mm 宽) |
工作温度 | 0°C ~ 70°C |
标准包装 | 1 |
特性 | - |
电压-电源 | 4.5 V ~ 5.5 V |
电流-输出高,低 | 1mA,20mA |
电流-静态(最大值) | - |
电路数 | 2 |
输入数 | 4 |
逻辑电平-低 | 0.8V |
逻辑电平-高 | 2V |
逻辑类型 | 与非门 |
SN54F20, SN74F20 DUAL 4-INPUT POSITIVE-NAND GATES SDFS041A – MARCH 1987 – REVISED OCTOBER 1993 • Package Options Include Plastic SN54F20...J PACKAGE Small-Outline Packages, Ceramic Chip SN74F20...D OR N PACKAGE (TOP VIEW) Carriers, and Standard Plastic and Ceramic 300-mil DIPs 1A 1 14 VCC description 1B 2 13 2D NC 3 12 2C These devices contain two independent 4-input 1C 4 11 NC NAND gates. They perform the Boolean functions 1D 5 10 2B Y = A • B • C • D or Y = A + B + C + D in positive 1Y 6 9 2A logic. GND 7 8 2Y The SN54F20 is characterized for operation over the full military temperature range of –55°C to SN54F20...FK PACKAGE 125°C. The SN74F20 is characterized for (TOP VIEW) operation from 0°C to 70°C. C B A C CD 1 1 NV 2 FUNCTION TABLE (each gate) 3 2 1 20 19 NC 4 18 2C INPUTS OUTPUT NC 5 17 NC A B C D Y 1C 6 16 NC H H H H L NC 7 15 NC L X X X H 1D 8 14 2B 9 10 11 12 13 X L X X H X X L X H Y D CY A 1 N N2 2 X X X L H G NC – No internal connection logic symbol† 1 & 1A 2 1B 6 4 1Y 1C 5 1D 9 2A 10 2B 8 12 2Y 2C 13 2D †This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages. logic diagram, each gate (positive logic) A B Y C D PRODUCTION DATA information is current as of publication date. Copyright 1993, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–1
SN54F20, SN74F20 DUAL 4-INPUT POSITIVE-NAND GATES SDFS041A – MARCH 1987 – REVISED OCTOBER 1993 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V CC Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.2 V to 7 V I Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA to 5 mA Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V CC Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA Operating free-air temperature range: SN54F20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C SN74F20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed. recommended operating conditions SN54F20 SN74F20 UUNNIITT MIN NOM MAX MIN NOM MAX VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V VIH High-level input voltage 2 2 V VIL Low-level input voltage 0.8 0.8 V IIK Input clamp current –18 –18 mA IOH High-level output current –1 –1 mA IOL Low-level output current 20 20 mA TA Operating free-air temperature –55 125 0 70 °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54F20 SN74F20 PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS UUNNIITT MIN TYP‡ MAX MIN TYP‡ MAX VIK VCC = 4.5 V, II = –18 mA –1.2 –1.2 V VCC = 4.5 V, IOH = –1 mA 2.5 3.4 2.5 3.4 VVOOHH VV VCC = 4.75 V, IOH = –1 mA 2.7 VOL VCC = 4.5 V, IOL = 20 mA 0.3 0.5 0.3 0.5 V II VCC = 5.5 V, VI = 7 V 0.1 0.1 mA IIH VCC = 5.5 V, VI = 2.7 V 20 20 m A IIL VCC = 5.5 V, VI = 0.5 V –0.6 –0.6 mA IOS§ VCC = 5.5 V, VO = 0 –60 –150 –60 –150 mA ICCH VCC = 5.5 V, VI = 0 0.9 1.4 0.9 1.4 mA ICCL VCC = 5.5 V, VI = 4.5 V 3.4 5.1 3.4 5.1 mA ‡All typical values are at VCC = 5 V, TA = 25°C. §Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. 2–2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54F20, SN74F20 DUAL 4-INPUT POSITIVE-NAND GATES SDFS041A – MARCH 1987 – REVISED OCTOBER 1993 switching characteristics (see Note 2) VCC = 5 V, VCC = 4.5 V to 5.5 V, CL = 50 pF, CL = 50 pF, FROM TO RL = 500 W , RL = 500W , PARAMETER ((IINNPPUUTT)) ((OOUUTTPPUUTT)) TA = 25°C TA = MIN to MAX† UNIT ′F20 SN54F20 SN74F20 MIN TYP MAX MIN MAX MIN MAX tPLH 1.6 3.3 5 1.2 7 1.6 6 AA, BB, CC, oorr DD YY nnss tPHL 1 2.8 4.3 1 6.5 1 5.3 †For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. NOTE 2: Load circuits and waveforms are shown in Section 1. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–3
PACKAGE OPTION ADDENDUM www.ti.com 22-Jul-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) 5962-9758401Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 9758401Q2A SNJ54F 20FK 5962-9758401QCA ACTIVE CDIP J 14 1 TBD SNPB N / A for Pkg Type -55 to 125 5962-9758401QC A SNJ54F20J 5962-9758401QDA ACTIVE CFP W 14 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9758401QD A SNJ54F20W JM38510/33004B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 33004B2A JM38510/33004BCA ACTIVE CDIP J 14 1 TBD SNPB N / A for Pkg Type -55 to 125 JM38510/ 33004BCA JM38510/33004BDA ACTIVE CFP W 14 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/ 33004BDA M38510/33004B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 33004B2A M38510/33004BCA ACTIVE CDIP J 14 1 TBD SNPB N / A for Pkg Type -55 to 125 JM38510/ 33004BCA M38510/33004BDA ACTIVE CFP W 14 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/ 33004BDA SN54F20J ACTIVE CDIP J 14 1 TBD SNPB N / A for Pkg Type -55 to 125 SN54F20J SN74F20D ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 F20 & no Sb/Br) SN74F20DR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 F20 & no Sb/Br) SN74F20DRE4 ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 F20 & no Sb/Br) SN74F20N ACTIVE PDIP N 14 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 SN74F20N & no Sb/Br) SN74F20NSR ACTIVE SO NS 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 74F20 & no Sb/Br) Addendum-Page 1
PACKAGE OPTION ADDENDUM www.ti.com 22-Jul-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) SNJ54F20FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 9758401Q2A SNJ54F 20FK SNJ54F20J ACTIVE CDIP J 14 1 TBD SNPB N / A for Pkg Type -55 to 125 5962-9758401QC A SNJ54F20J SNJ54F20W ACTIVE CFP W 14 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9758401QD A SNJ54F20W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and Addendum-Page 2
PACKAGE OPTION ADDENDUM www.ti.com 22-Jul-2020 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54F20, SN74F20 : •Catalog: SN74F20 •Military: SN54F20 NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Military - QML certified for Military and Defense Applications Addendum-Page 3
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74F20DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74F20NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 PackMaterials-Page1
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74F20DR SOIC D 14 2500 367.0 367.0 38.0 SN74F20NSR SO NS 14 2000 367.0 367.0 38.0 PackMaterials-Page2
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PACKAGE OUTLINE J0014A CDIP - 5.08 mm max height SCALE 0.900 CERAMIC DUAL IN LINE PACKAGE PIN 1 ID A 4X .005 MIN (OPTIONAL) [0.13] .015-.060 TYP [0.38-1.52] 1 14 12X .100 [2.54] 14X .014-.026 14X .045-.065 [0.36-0.66] [1.15-1.65] .010 [0.25] C A B .754-.785 [19.15-19.94] 7 8 B .245-.283 .2 MAX TYP .13 MIN TYP [6.22-7.19] [5.08] [3.3] SEATING PLANE C .308-.314 [7.83-7.97] AT GAGE PLANE .015 GAGE PLANE [0.38] 0 -15 14X .008-.014 TYP [0.2-0.36] 4214771/A 05/2017 NOTES: 1. All controlling linear dimensions are in inches. Dimensions in brackets are in millimeters. Any dimension in brackets or parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This package is hermitically sealed with a ceramic lid using glass frit. 4. Index point is provided on cap for terminal identification only and on press ceramic glass frit seal only. 5. Falls within MIL-STD-1835 and GDIP1-T14. www.ti.com
EXAMPLE BOARD LAYOUT J0014A CDIP - 5.08 mm max height CERAMIC DUAL IN LINE PACKAGE (.300 ) TYP [7.62] SEE DETAIL B SEE DETAIL A 1 14 12X (.100 ) [2.54] SYMM 14X ( .039) [1] 7 8 SYMM LAND PATTERN EXAMPLE NON-SOLDER MASK DEFINED SCALE: 5X .002 MAX (.063) [0.05] [1.6] METAL ALL AROUND ( .063) SOLDER MASK [1.6] OPENING METAL .002 MAX SOLDER MASK (R.002 ) TYP [0.05] OPENING [0.05] ALL AROUND DETAIL A DETAIL B SCALE: 15X 13X, SCALE: 15X 4214771/A 05/2017 www.ti.com
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