SN74CB3T1G125 SINGLE FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS150A–OCTOBER2003–REVISEDSEPTEMBER2006 FEATURES • OutputVoltageTranslationTracksV • LowPowerConsumption CC • SupportsMixed-ModeSignalOperationonAll (ICC=20m AMax) DataI/OPorts • V OperatingRangeFrom2.3Vto3.6V CC – 5-VInputDownto3.3-VOutputLevelShift • DataI/OsSupport0-to5-VSignalingLevels With3.3-VV (0.8V,1.2V,1.5V,1.8V,2.5V,3.3V,5V) CC – 5-V/3.3-VInputDownto2.5-VOutputLevel • ControlInputsCanBeDrivenbyTTLor ShiftWith2.5-VV 5-V/3.3-VCMOSOutputs CC • 5-V-TolerantI/Os,WithDevicePoweredUpor • I SupportsPartial-Power-DownMode off PoweredDown Operation • BidirectionalDataFlowWithNear-Zero • Latch-UpPerformanceExceeds250mAPer PropagationDelay JESD17 • LowON-StateResistance(r )Characteristics • ESDPerformanceTestedPerJESD22 on (ron=5W Typ) – 2000-VHuman-BodyModel • LowInput/OutputCapacitanceMinimizes (A114-B,ClassII) Loading(Cio(OFF)=5pFTyp) – 1000-VCharged-DeviceModel(C101) • DataandControlInputsProvideUndershoot • SupportsDigitalApplications:Level ClampDiodes Translation,USBInterface,BusIsolation • IdealforLow-PowerPortableEquipment DBV PACKAGE DCK PACKAGE (TOPVIEW) (TOPVIEW) OE 1 5 V OE 1 5 V CC CC A 2 A 2 GND 3 4 B GND 3 4 B See mechanical drawings for dimensions. DESCRIPTION/ORDERING INFORMATION The SN74CB3T1G125 is a high-speed TTL-compatible FET bus switch with low ON-state resistance (r ), on allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks V . The SN74CB3T1G125 supports systems using 5-V TTL, CC 3.3-VLVTTL,and2.5-VCMOSswitchingstandards,aswellasuser-definedswitchinglevels(seeFigure1). The SN74CB3T1G125 is a 1-bit bus switch with a single ouput-enable (OE) input. When OE is low, the bus switchisON,and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE ishigh,thebusswitchisOFF,andahigh-impedancestateexistsbetweentheAandBports. ORDERINGINFORMATION T PACKAGE(1) ORDERABLEPARTNUMBER TOP-SIDEMARKING(2) A SOT(SOT-23)–DBV Reelof3000 SN74CB3T1G125DBVR W25_ –40(cid:176) Cto85(cid:176) C SOT(SC-70)–DCK Reelof3000 SN74CB3T1G125DCKR WM_ (1) Packagedrawings,standardpackingquantities,thermaldata,symbolization,andPCBdesignguidelinesareavailableat www.ti.com/sc/package. (2) Theactualtop-sidemarkinghasoneadditionalcharacterthatdesignatestheassembly/testsite. Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2003–2006,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

SN74CB3T1G125 SINGLE FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS150A–OCTOBER2003–REVISEDSEPTEMBER2006 DESCRIPTION/ORDERING INFORMATION (CONTINUED) VCC 5.5 V VCC IN OUT ≈VCC ≈VCC − 1 V CB3T ≈VCC − 1 V 0 V 0 V Input Voltages Output Voltages NOTE A: If the input high voltage (VIH) level is greater than or equal to VCC – 1 V, and less than or equal to 5.5 V, then the output high voltage (VOH) level will be equal to approximately the VCC voltage level. Figure1.TypicalDCVoltageTranslationCharacteristics This device is fully specified for partial-power-down applications using I . The I feature ensures that damaging off off currentwillnotbackflowthroughthedevicewhenitispowereddown.Thedevicehasisolationduringpoweroff. To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup CC resistor;theminimumvalueoftheresistorisdeterminedbythecurrent-sinkingcapabilityofthedriver. FUNCTIONTABLE INPUT INPUT/OUTPUT FUNCTION OE A L B Aport=Bport H Z Disconnect LOGICDIAGRAM(POSITIVELOGIC) 2 4 A SW B 1 OE 2 SubmitDocumentationFeedback

SN74CB3T1G125 SINGLE FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS150A–OCTOBER2003–REVISEDSEPTEMBER2006 SIMPLIFIED SCHEMATIC, EACH FET SWITCH (SW) A B VG(1) Control Circuit EN(2) (1) Gate voltage (VG) is equal to approximately VCC + VT when the switch is ON and VI > VCC + VT. (2) EN is the internal enable signal applied to the switch. Absolute Maximum Ratings(1) overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyvoltagerange –0.5 7 V CC V Controlinputvoltagerange(2)(3) –0.5 7 V IN V SwitchI/Ovoltagerange(2)(3)(4) –0.5 7 V I/O I Controlinputclampcurrent V <0 –50 mA IK IN I I/Oportclampcurrent V <0 –50 mA I/OK I/O I ON-stateswitchcurrent(5) – 128 mA IO ContinuouscurrentthroughV orGND – 100 mA CC DBVpackage 206 q Packagethermalimpedance(6) (cid:176) C/W JA DCKpackage 252 T Storagetemperaturerange –65 150 (cid:176) C stg (1) Stressesbeyondthoselistedunder"absolutemaximumratings"maycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder"recommendedoperating conditions"isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Allvoltagesarewithrespecttoground,unlessotherwisespecified. (3) Theinputandoutputvoltageratingsmaybeexceedediftheinputandoutputclamp-currentratingsareobserved. (4) V andV areusedtodenotespecificconditionsforV . I O I/O (5) I andI areusedtodenotespecificconditionsforI . I O I/O (6) ThepackagethermalimpedanceiscalculatedinaccordancewithJESD51-7. Recommended Operating Conditions(1) MIN MAX UNIT V Supplyvoltage 2.3 3.6 V CC V =2.3Vto2.7V 1.7 5.5 CC V High-levelcontrolinputvoltage V IH V =2.7Vto3.6V 2 5.5 CC V =2.3Vto2.7V 0 0.7 CC V Low-levelcontrolinputvoltage V IL V =2.7Vto3.6V 0 0.8 CC V Datainput/outputvoltage 0 5.5 V I/O T Operatingfree-airtemperature –40 85 (cid:176) C A (1) AllunusedcontrolinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.RefertotheTIapplicationreport, CC ImplicationsofSloworFloatingCMOSInputs,literaturenumberSCBA004. SubmitDocumentationFeedback 3

SN74CB3T1G125 SINGLE FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS150A–OCTOBER2003–REVISEDSEPTEMBER2006 Electrical Characteristics(1) overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP(2) MAX UNIT V V =3V,I =–18mA –1.2 V IK CC I V SeeFigure3andFigure4 OH I Controlinputs V =3.6V,V =3.6Vto5.5VorGND – 10 m A IN CC IN V =V –0.7Vto5.5V – 20 V =3.6V, I CC CC I SwitchON, V =0.7VtoV –0.7V –40 m A I I CC VIN=VCCorGND V =0to0.7V – 5 I I (3) V =3.6V,V =0to5.5V,V =0,SwitchOFF,V =V orGND – 10 m A OZ CC O I IN CC I V =0,V =0to5.5V,V =0 10 m A off CC O I I VCC=3.6V,II/O=0, VI=VCCorGND 20 m A CC SwitchONorOFF,VIN=VCCorGND VI=5.5V 20 D I (4) Controlinputs V =3Vto3.6V,OneinputatV –0.6V,OtherinputsatV orGND 300 m A CC CC CC CC C Controlinputs V =3.3V,V =V orGND 3 pF in CC IN CC C V =3.3V,V =5.5V,3.3V,orGND,SwitchOFF,V =V orGND 5 pF io(OFF) CC I/O IN CC C VCC=3.3V,SwitchON, VI/O=5.5Vor3.3V 4 pF io(ON) VIN=VCCorGND VI/O=GND 12 VCC=2.3V,TYPatVCC=2.5V, IO=24mA 5 8 r (5) VI=0 IO=16mA 5 8 W on I =64mA 5 7 O V =3V,V =0 CC I I =32mA 5 7 O (1) V andI refertocontrolinputs.V,V ,I,andI refertodatapins. IN IN I O I O (2) AlltypicalvaluesareatV =3.3V(unlessotherwisenoted),T =25(cid:176) C. CC A (3) ForI/Oports,theparameterI includestheinputleakagecurrent. OZ (4) ThisistheincreaseinsupplycurrentforeachinputthatisatthespecifiedTTLvoltagelevel,ratherthanV orGND. CC (5) MeasuredbythevoltagedropbetweenAandBterminalsattheindicatedcurrentthroughtheswitch.ON-stateresistanceisdetermined bythelowerofthevoltagesofthetwo(AorB)terminals. Switching Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted)(seeFigure2) V =2.5V V =3.3V CC CC PARAMETER FROM TO – 0.2V – 0.3V UNIT (INPUT) (OUTPUT) MIN MAX MIN MAX t (1) AorB BorA 0.15 0.25 ns pd t OE AorB 1 7.5 1 6.5 ns en t OE AorB 1 5.5 1 6 ns dis (1) ThepropagationdelayisthecalculatedRCtimeconstantofthetypicalON-stateresistanceoftheswitchandthespecifiedload capacitance,whendrivenbyanidealvoltagesource(zerooutputimpedance). 4 SubmitDocumentationFeedback

SN74CB3T1G125 SINGLE FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS150A–OCTOBER2003–REVISEDSEPTEMBER2006 PARAMETER MEASUREMENT INFORMATION V CC Input Generator V IN 50W 50W V G1 TEST CIRCUIT DUT Input Generator 2 x V CC VI V R S1 Open O L 50W GND 50W C VG2 (see NoteA)L RL TEST V S1 R V C V CC L I L D t 2.5 V±0.2 V Open 500W 3.6 V or GND 30 pF pd(s) 3.3 V±0.3 V Open 500W 5.5 V or GND 50 pF 2.5 V±0.2 V 2 x V 500W GND 30 pF 0.15 V tPLZ/tPZL 3.3 V±0.3 V 2 x VCC 500W GND 50 pF 0.15 V CC t /t 2.5 V±0.2 V Open 500W 3.6 V 30 pF 0.15 V PHZ PZH 3.3 V±0.3 V Open 500W 5.5 V 50 pF 0.15 V V Output CC V /2 V /2 Control CC CC (V ) 0 V IN t t PZL PLZ Output V Output VCC Waveform 1 V /2 CC Control V /2 V /2 S1 at 2 xV CC V + V (VIN) CC CC 0 V (see Note BCC) OL D VOL tPLH tPHL tPZH tPHZ V Output V Output VCC/2 VCC/2 OH WSa1v aetf oOrpme n2 VCC/2 VOH–VD OH V 0 V OL (see Note B) VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAYTIMES (t ) ENABLEAND DISABLE TIMES pd(s) NOTES: A. C includes probe and jig capacitance. L B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR£10 MHz, Z = 50W, t £ 2.5ns, O r t £2.5 ns. t D. The outputs are measured one at a time, with one transition per measurement. E. t and t are the same as t . PLZ PHZ dis F. t and t are the same as t . PZL PZH en G.t and t are the same as t .The tpd propagation delay is the calculated RC time constant of the typical ON-state PLH PHL pd(s) resistance of the switch nd the specified load capacitance, when driven by an ideal voltage source (zero output impedance). H. All parameters and waveforms are not applicable to all devices. Figure2.TestCircuitandVoltageWaveforms SubmitDocumentationFeedback 5

SN74CB3T1G125 SINGLE FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS150A–OCTOBER2003–REVISEDSEPTEMBER2006 TYPICAL CHARACTERISTICS OUTPUT VOLTAGE OUTPUT VOLTAGE vs vs INPUT VOLTAGE INPUT VOLTAGE 4.0 4.0 VCC = 2.3 V VCC = 3 V IO = 1 m A IO = 1 m A TA = 25°C TA = 25°C V 3.0 V 3.0 e - e - g g a a Volt 2.0 Volt 2.0 ut ut p p ut ut O O V - O 1.0 V - O 1.0 0.0 0.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 VI - Input Voltage - V VI - Input Voltage - V Figure3.DataOutputVoltagevsDataInputVoltage 6 SubmitDocumentationFeedback

SN74CB3T1G125 SINGLE FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS150A–OCTOBER2003–REVISEDSEPTEMBER2006 TYPICAL CHARACTERISTICS OUTPUT VOLTAGE HIGH OUTPUT VOLTAGE HIGH vs vs SUPPLY VOLTAGE SUPPLY VOLTAGE 4.0 4.0 VCC = 2.3 V to 3.6 V VCC = 2.3 V to 3.6 V gh - Vgh - V 3.5 VTAI == 58.55° CV 180 m0 Am A h - V 3.5 VTAI == 52.55° CV 180 m0 Am A age Hiage Hi 3.0 1264 mmAA ge Hig 3.0 1264 mmAA VoltVolt olta put put 2.5 ut V 2.5 OutOut utp V - V - OHOH2.0 V - OOH2.0 1.5 1.5 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 VCC - Supply Voltage - V VCC - Supply Voltage - V OUTPUT VOLTAGE HIGH vs SUPPLY VOLTAGE 4.0 VCC = 2.3 V to 3.6 V V VI = 5.5 V 100 m A h - 3.5 TA = -40°C 8 mA e Hig 1264 mmAA g 3.0 a olt V ut 2.5 p ut O V - OH2.0 1.5 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 VCC - Supply Voltage - V Figure4.V Values OH SubmitDocumentationFeedback 7

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 74CB3T1G125DBVRE4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 W25F & no Sb/Br) 74CB3T1G125DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 W25F & no Sb/Br) 74CB3T1G125DCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 (WM5, WMF, WMJ, WM & no Sb/Br) R) SN74CB3T1G125DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 85 (W25F, W25J, W25R) & no Sb/Br) SN74CB3T1G125DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 85 (WM5, WMF, WMJ, WM & no Sb/Br) R) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN74CB3T1G125 : •Automotive: SN74CB3T1G125-Q1 NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 4-Jun-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74CB3T1G125DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 SN74CB3T1G125DBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 SN74CB3T1G125DBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 SN74CB3T1G125DCKR SC70 DCK 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 SN74CB3T1G125DCKR SC70 DCK 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 SN74CB3T1G125DCKR SC70 DCK 5 3000 180.0 8.4 2.47 2.3 1.25 4.0 8.0 Q3 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 4-Jun-2020 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74CB3T1G125DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74CB3T1G125DBVR SOT-23 DBV 5 3000 202.0 201.0 28.0 SN74CB3T1G125DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74CB3T1G125DCKR SC70 DCK 5 3000 180.0 180.0 18.0 SN74CB3T1G125DCKR SC70 DCK 5 3000 180.0 180.0 18.0 SN74CB3T1G125DCKR SC70 DCK 5 3000 202.0 201.0 28.0 PackMaterials-Page2

PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 1.45 B A 0.90 PIN 1 INDEX AREA 1 5 2X 0.95 3.05 2.75 1.9 1.9 2 4 3 0.5 5X 0.3 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com

EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM 2 (1.9) 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com

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