ICGOO在线商城 > 集成电路(IC) > 逻辑 - 信号开关,多路复用器,解码器 > SN74CB3T16211DGGR
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ICGOO电子元器件商城为您提供SN74CB3T16211DGGR由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 SN74CB3T16211DGGR价格参考。Texas InstrumentsSN74CB3T16211DGGR封装/规格:逻辑 - 信号开关,多路复用器,解码器, Bus Switch 12 x 1:1 56-TSSOP。您可以下载SN74CB3T16211DGGR参考资料、Datasheet数据手册功能说明书,资料中有SN74CB3T16211DGGR 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC)半导体 |
描述 | IC SWITCH FET BUS W/SHFT 56TSSOP数字总线开关 IC 24-Bit SSTL 3 Infc Buff W/3-St Otpt |
产品分类 | |
品牌 | Texas Instruments |
产品手册 | http://www.ti.com/lit/gpn/sn74cb3t16211 |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 开关 IC,数字总线开关 IC,Texas Instruments SN74CB3T16211DGGR74CB |
数据手册 | |
产品型号 | SN74CB3T16211DGGR |
产品目录页面 | |
产品种类 | 数字总线开关 IC |
传播延迟时间 | 0.25 ns |
供应商器件封装 | 56-TSSOP |
其它名称 | 296-16978-1 |
包装 | 剪切带 (CT) |
单位重量 | 252.800 mg |
商标 | Texas Instruments |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
导通电阻—最大值 | 9.5 Ohms |
封装 | Reel |
封装/外壳 | 56-TFSOP(0.240",6.10mm 宽) |
封装/箱体 | TSSOP-56 |
工作温度 | -40°C ~ 85°C |
工厂包装数量 | 2000 |
开关数量 | 24 |
技术 | CB3T |
最大工作温度 | + 85 C |
最小工作温度 | - 40 C |
标准包装 | 1 |
独立电路 | 2 |
电压-电源 | 2.3 V ~ 3.6 V |
电压源 | 单电源 |
电流-输出高,低 | - |
电源电压-最大 | 3.6 V |
电源电压-最小 | 3.6 V |
电源电流 | 70 uA |
电路 | 12 x 1:1 |
类型 | FET 总线开关 |
系列 | SN74CB3T16211 |
逻辑系列 | CB3T |
SN74CB3T16211 www.ti.com SCDS147C–OCTOBER2003–REVISEDAUGUST2012 24-BIT FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V TOLERANT LEVEL SHIFTER CheckforSamples:SN74CB3T16211 FEATURES 1 DGG, DGV, OR DL PACKAGE • MemberoftheTexasInstrumentsWidebus™ 2 (TOP VIEW) Family • OutputVoltageTranslationTracksVCC NC 1 56 1OE • SupportsMixed-ModeSignalOperationon 1A1 2 55 2OE AllDataI/OPorts 1A2 3 54 1B1 – 5-VInputDownto3.3-VOutputLevel 1A3 4 53 1B2 ShiftWith3.3-VV 1A4 5 52 1B3 CC – 5-V/3.3-VInputDownto2.5-VOutput 1A5 6 51 1B4 LevelShiftWith2.5-VV 1A6 7 50 1B5 CC GND 8 49 GND • 5-VTolerantI/OsWithDevicePoweredUp 1A7 9 48 1B6 orPoweredDown 1A8 10 47 1B7 • BidirectionalDataFlowWithNear-Zero 1A9 11 46 1B8 PropagationDelay 1A10 12 45 1B9 • LowON-StateResistance(r )Characteristics on 1A11 13 44 1B10 (r =5ΩTyp) on 1A12 14 43 1B11 • LowInput/OutputCapacitanceMinimizes 2A1 15 42 1B12 Loading(Cio(OFF)=5pFTyp) 2A2 16 41 2B1 • DataandControlInputsProvide V 17 40 2B2 CC UndershootClampDiodes 2A3 18 39 2B3 • LowPowerConsumption GND 19 38 GND (I =70μAMax) 2A4 20 37 2B4 CC 2A5 21 36 2B5 • V OperatingRangeFrom2.3Vto3.6V CC 2A6 22 35 2B6 • DataI/OsSupport0-to5-VSignalingLevels 2A7 23 34 2B7 (0.8V,1.2V,1.5V,1.8V,2.5V,3.3V,5V) 2A8 24 33 2B8 • ControlInputsCanBeDrivenbyTTL 2A9 25 32 2B9 or5-V/3.3-VCMOSOutputs 2A10 26 31 2B10 • IoffSupportsPartial-Power-DownMode 2A11 27 30 2B11 Operation 2A12 28 29 2B12 • Latch-UpPerformanceExceeds250mAPer JESD17 NC - No internal connection • ESDPerformanceTestedPerJESD22 BRK – 2000-VHuman-BodyModel BRK (A114-B,ClassII) BRK – 1000-VCharged-DeviceModel(C101) BRK BRK • SupportsDigitalApplications:Level Translation,PCIInterface,BusIsolation • IdealforLow-PowerPortableEquipment 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. WidebusisatrademarkofTexasInstruments. 2 PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2003–2012,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.
SN74CB3T16211 SCDS147C–OCTOBER2003–REVISEDAUGUST2012 www.ti.com DESCRIPTION/ORDERING INFORMATION The SN74CB3T16211 is a high-speed TTL-compatible FET bus switch with low ON-state resistance (r ), on allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks V . The SN74CB3T16211 supports systems using 5-V TTL, CC 3.3-VLVTTL,and2.5-VCMOSswitchingstandards,aswellasuser-definedswitchinglevels(seeFigure1). DESCRIPTION/ORDERING INFORMATION (CONTINUED) Figure1. TypicalDCVoltage-TranslationCharacteristics The I/O port of this device has a pullup current source that maintains the output voltage at V when the device CC is ON, and the input is greater than or equal to V – 1. Because of the pullup current source, the output voltage CC level may be less than V when the operating frequency is low and the I/O port is connected to a pulldown CC resistor. In order to maintain the output voltage at V , a pullup resistor must be connected to V instead of a CC CC pulldownresistortoground. The SN74CB3T16211 is organized as two 12-bit bus switches with separate output-enable (1OE, 2OE) inputs. It can be used as two 12-bit bus switches or as one 24-bit bus switch. When OE is low, the associated 12-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE ishigh,theassociated12-bitbusswitchisOFF,andahigh-impedancestateexistsbetweentheAandBports. This device is fully specified for partial-power-down applications using I . The I feature ensures that damaging off off currentwillnotbackflowthroughthedevicewhenitispowereddown.Thedevicehasisolationduringpoweroff. To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup CC resistor;theminimumvalueoftheresistorisdeterminedbythecurrent-sinkingcapabilityofthedriver. Table1.ORDERINGINFORMATION T PACKAGE(1) ORDERABLEPARTNUMBER TOP-SIDEMARKING A Tube SN74CB3T16211DL SSOP–DL CB3T16211 Tapeandreel SN74CB3T16211DLR Tube SN74CB3T16211DGG TSSOP–DGG CB3T16211 –40°Cto85°C Tapeandreel SN74CB3T16211DGGR TVSOP–DGV Tapeandreel SN74CB3T16211DGVR KR211 VFBGA–GQL(Pb-free) Tapeandreel SN74CB3T16211GQLR KR211 VFBGA–ZQL(Pb-free) Tapeandreel SN74CB3T16211ZQLR KR211 (1) Packagedrawings,standardpackingquantities,thermaldata,symbolization,andPCBdesignguidelinesareavailableat www.ti.com/sc/package. 2 SubmitDocumentationFeedback Copyright©2003–2012,TexasInstrumentsIncorporated ProductFolderLinks:SN74CB3T16211
SN74CB3T16211 www.ti.com SCDS147C–OCTOBER2003–REVISEDAUGUST2012 brk GQL OR ZQL PACKAGE brk (TOP VIEW) 1 2 3 4 5 6 Table2.TERMINALASSIGNMENTS A 1 2 3 4 5 6 B A 1A2 1A1 NC(1) 1OE 2OE 1B1 B 1A5 1A4 1A3 1B2 1B3 1B4 C C 1A7 GND 1A6 1B5 GND 1B6 D D 1A10 1A8 1A9 1B8 1B7 1B9 E E 1A12 1A11 1B10 1B11 F F 2A1 2A2 2B1 1B12 G G V GND 2A3 2B3 GND 2B2 CC H H 2A4 2A5 2A6 2B6 2B5 2B4 J J 2A7 2A8 2A9 2B9 2B8 2B7 K K 2A10 2A11 2A12 2B12 2B11 2B10 brk (1) NC–Nointernalconnection Table3.FUNCTIONTABLE (EACH12-BITBUSSWITCH) INPUT INPUT/OUTPUT FUNCTION OE A L B Aport=Bport H Z Disconnect LOGICDIAGRAM(POSITIVELOGIC) 2 54 1A1 SW 1B1 14 42 1A12 SW 1B12 56 1OE 15 41 2A1 SW 2B1 28 29 2A12 SW 2B12 55 2OE Copyright©2003–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN74CB3T16211
SN74CB3T16211 SCDS147C–OCTOBER2003–REVISEDAUGUST2012 www.ti.com SIMPLIFIEDSCHEMATIC,EACHFETSWITCH(SW) A B VG(1) Control Circuit EN(2) (1) Gate voltage (VG) is approximately equal to VCC + VT when the switch is ON and VI > VCC + VT. (2) Internal enable signal applied to the switch Absolute Maximum Ratings(1) overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyvoltagerange(2) –0.5 7 V CC V Controlinputvoltagerange(2) (3) –0.5 7 V IN V SwitchI/Ovoltagerange(2) (3) (4) –0.5 7 V I/O I Controlinputclampcurrent V <0 –50 mA IK IN I I/Oportclampcurrent V <0 –50 mA I/OK I/O I ON-stateswitchcurrent(5) ±128 mA I/O ContinuouscurrentthroughV orGND ±100 mA CC DGGpackage 64 DGVpackage 48 θ Packagethermalimpedance(6) °C/W JA DLpackage 56 GQL/ZQLpackage 42 T Storagetemperaturerange –65 150 °C stg (1) Stressesbeyondthoselistedunder"absolutemaximumratings"maycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder"recommendedoperating conditions"isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Allvoltagesarewithrespecttoground,unlessotherwisespecified. (3) Theinputandoutputvoltageratingsmaybeexceedediftheinputandoutputclamp-currentratingsareobserved. (4) V andV areusedtodenotespecificconditionsforV . I O I/O (5) I andI areusedtodenotespecificconditionsforI . I O I/O (6) ThepackagethermalimpedanceiscalculatedinaccordancewithJESD51-7. Recommended Operating Conditions(1) MIN MAX UNIT V Supplyvoltage 2.3 3.6 V CC V =2.3Vto2.7V 1.7 5.5 CC V High-levelcontrolinputvoltage V IH V =2.7Vto3.6V 2 5.5 CC V =2.3Vto2.7V 0 0.7 CC V Low-levelcontrolinputvoltage V IL V =2.7Vto3.6V 0 0.8 CC V Datainput/outputvoltage 0 5.5 V I/O T Operatingfree-airtemperature –40 85 °C A (1) AllunusedcontrolinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.RefertotheTIapplicationreport, CC ImplicationsofSloworFloatingCMOSInputs,literaturenumberSCBA004. 4 SubmitDocumentationFeedback Copyright©2003–2012,TexasInstrumentsIncorporated ProductFolderLinks:SN74CB3T16211
SN74CB3T16211 www.ti.com SCDS147C–OCTOBER2003–REVISEDAUGUST2012 Electrical Characteristics(1) overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP(2) MAX UNIT V V =3V,I =–18mA –1.2 V IK CC I V SeeFigure3andFigure4 OH I Controlinputs V =3.6V,V =3.6Vto5.5VorGND ±10 μA IN CC IN V =V –0.7Vto5.5V ±20 I CC V =3.6V,SwitchON, I CC V =0.7VtoV –0.7V –40 μA I V =V orGND I CC IN CC V =0to0.7V ±5 I I (3) VCC=3.6V,VO=0to5.5V,VI=0, ±10 μA OZ SwitchOFF,V =V orGND IN CC I V =0,V =0to5.5V,V =0 10 μA off CC O I I VCC=3.6V,II/O=0, VI=VCCorGND 70 μA CC SwitchONorOFF,VIN=VCCorGND VI=5.5V 70 ΔI (4) Controlinputs VCC=3Vto3.6V,OneinputatVCC–0.6V, 300 μA CC OtherinputsatV orGND CC C Controlinputs V =3.3V,V =V orGND 4 pF in CC IN CC V =3.3V,V =5.5V,3.3V,orGND, C CC I/O 5 pF io(OFF) SwitchOFF,V =V orGND IN CC C VCC=3.3V,SwitchON, VI/O=5.5Vor3.3V 5 pF io(ON) VIN=VCCorGND VI/O=GND 13 VCC=2.3V,TYPatVCC=2.5V, IO=24mA 5 9.5 r (5) VI=0 IO=16mA 5 9.5 Ω on I =64mA 5 8.5 O V =3V,V =0 CC I I =32mA 5 8.5 O (1) V andI refertocontrolinputs.V,V ,I,andI refertodatapins. IN IN I O I O (2) AlltypicalvaluesareatV =3.3V(unlessotherwisenoted),T =25°C. CC A (3) ForI/Oports,theparameterI includestheinputleakagecurrent. OZ (4) ThisistheincreaseinsupplycurrentforeachinputthatisatthespecifiedTTLvoltagelevel,ratherthanV orGND. CC (5) MeasuredbythevoltagedropbetweenAandBterminalsattheindicatedcurrentthroughtheswitch.ON-stateresistanceisdetermined bythelowerofthevoltagesofthetwo(AorB)terminals. Switching Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted)(seeFigure2) V =2.5V V =3.3V CC CC PARAMETER FROM TO ±0.2V ±0.3V UNIT (INPUT) (OUTPUT) MIN MAX MIN MAX t (1) AorB BorA 0.15 0.25 ns pd t OE AorB 1 12 1 10 ns en t OE AorB 1 7.5 1 8.5 ns dis (1) ThepropagationdelayisthecalculatedRCtimeconstantofthetypicalON-stateresistanceoftheswitchandthespecifiedload capacitance,whendrivenbyanidealvoltagesource(zerooutputimpedance). Copyright©2003–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN74CB3T16211
SN74CB3T16211 SCDS147C–OCTOBER2003–REVISEDAUGUST2012 www.ti.com PARAMETER MEASUREMENT INFORMATION VCC Input Generator VIN 50 Ω VG1 50 Ω TEST CIRCUIT DUT 2 × VCC Input Generator S1 VI VO RL Open 50 Ω GND VG2 50 Ω CL RL (see Note A) TEST VCC S1 RL VI CL V∆ tpd(s) 2.5 V ± 0.2 V Open 500 Ω 3.6 V or GND 30 pF 3.3 V ± 0.3 V Open 500 Ω 5.5 V or GND 50 pF tPLZ/tPZL 23..53 VV ±± 00..23 VV 22 ×× VVCCCC 550000 ΩΩ GGNNDD 3500 ppFF 00.1.35 V V 2.5 V ± 0.2 V Open 500 Ω 3.6 V 30 pF 0.15 V tPHZ/tPZH 3.3 V ± 0.3 V Open 500 Ω 5.5 V 50 pF 0.3 V Output VCC Control VCC/2 VCC/2 (VIN) 0 V tPZL tPLZ Output Output VCC Waveform 1 VCC Control VCC/2 VCC/2 S1 at 2 × VCC VCC/2 VOL + V∆ (VIN) 0 V (see Note B) VOL tPZH tPHZ tPLH tPHL Output VOH VOH Waveform 2 VOH − V∆ Output VCC/2 VCC/2 S1 at Open VCC/2 VOL (see Note B) 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (tpd(s)) ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd(s). The tpd propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). H. All parameters and waveforms are not applicable to all devices. Figure2. TestCircuitandVoltageWaveforms 6 SubmitDocumentationFeedback Copyright©2003–2012,TexasInstrumentsIncorporated ProductFolderLinks:SN74CB3T16211
SN74CB3T16211 www.ti.com SCDS147C–OCTOBER2003–REVISEDAUGUST2012 TYPICAL CHARACTERISTICS OUTPUT VOLTAGE OUTPUT VOLTAGE vs vs INPUT VOLTAGE INPUT VOLTAGE 4 4 VCC = 2.3 V VCC = 3 V IO = 1 m A IO = 1 m A V TA = 25°C V TA = 25°C Output Voltage – 23 Output Voltage – 23 V – O 1 V – O 1 0 0 0 1 2 3 4 5 6 0 1 2 3 4 5 6 VI - Input Voltage - V VI - Input Voltage - V Figure3.DataOutputVoltagevsDataInputVoltage Copyright©2003–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN74CB3T16211
SN74CB3T16211 SCDS147C–OCTOBER2003–REVISEDAUGUST2012 www.ti.com TYPICAL CHARACTERISTICS (continued) OUTPUT VOLTAGE HIGH OUTPUT VOLTAGE HIGH vs vs SUPPLY VOLTAGE SUPPLY VOLTAGE 4 4 VCC = 2.3 V to 3.6 V VCC = 2.3 V to 3.6 V h – V 3.5 VTAI == 58.55° CV 100 m A h – V 3.5 VTAI == 52.55° CV 100 m A g 8 mA g 8 mA Hi 16 mA Hi 16 mA age 3 24 mA age 3 24 mA olt olt V V ut 2.5 ut 2.5 p p ut ut O O – – H 2 H 2 O O V V 1.5 1.5 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 VCC – Supply Voltage – V VCC – Supply Voltage – V OUTPUT VOLTAGE HIGH vs SUPPLY VOLTAGE 4 VCC = 2.3 V to 3.6 V h – V 3.5 VTAI == 5−.450 V°C 180 m0 Am A g Hi 16 mA e 24 mA g 3 a olt V put 2.5 ut O – H 2 O V 1.5 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 VCC – Supply Voltage – V Figure4.V Values OH 8 SubmitDocumentationFeedback Copyright©2003–2012,TexasInstrumentsIncorporated ProductFolderLinks:SN74CB3T16211
SN74CB3T16211 www.ti.com SCDS147C–OCTOBER2003–REVISEDAUGUST2012 REVISION HISTORY ChangesfromRevisionB(January2006)toRevisionC Page • Updatedgraphicandnoteinfigure1. .................................................................................................................................. 2 Copyright©2003–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SN74CB3T16211
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 74CB3T16211DGGRE4 ACTIVE TSSOP DGG 56 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 CB3T16211 & no Sb/Br) SN74CB3T16211DGGR ACTIVE TSSOP DGG 56 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 CB3T16211 & no Sb/Br) SN74CB3T16211DGVR ACTIVE TVSOP DGV 56 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 KR211 & no Sb/Br) SN74CB3T16211DL ACTIVE SSOP DL 56 20 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 CB3T16211 & no Sb/Br) SN74CB3T16211DLR ACTIVE SSOP DL 56 1000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 CB3T16211 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 1
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 7-Nov-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74CB3T16211DLR SSOP DL 56 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.0 Q1 PackMaterials-Page1
PACKAGE MATERIALS INFORMATION www.ti.com 7-Nov-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74CB3T16211DLR SSOP DL 56 1000 367.0 367.0 55.0 PackMaterials-Page2
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PACKAGE OUTLINE DGG0056A TSSOP - 1.2 mm max height SCALE 1.200 SMALL OUTLINE PACKAGE C 8.3 SEATING PLANE TYP 7.9 A PIN 1 ID 0.1 C AREA 54X 0.5 56 1 14.1 2X 13.9 13.5 NOTE 3 28 29 0.27 B 6.2 56X 0.17 1.2 MAX 6.0 0.08 C A B (0.15) TYP 0.25 SEE DETAIL A GAGE PLANE 0.15 0.75 0 - 8 0.05 0.50 DETAIL A TYPICAL 4222167/A 07/2015 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. Reference JEDEC registration MO-153. www.ti.com
EXAMPLE BOARD LAYOUT DGG0056A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 56X (1.5) SYMM 1 56 56X (0.3) 54X (0.5) (R0.05) TYP SYMM 28 29 (7.5) LAND PATTERN EXAMPLE SCALE:6X SOOPLEDNEINRG MASK METAL MSOELTDAEL RU NMDAESRK SOOPLEDNEINRG MASK 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4222167/A 07/2015 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com
EXAMPLE STENCIL DESIGN DGG0056A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 56X (1.5) SYMM 1 56 56X (0.3) 54X (0.5) (R0.05) TYP SYMM 28 29 (7.5) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:6X 4222167/A 07/2015 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com
MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,23 0,40 0,07 M 0,13 24 13 0,16 NOM 4,50 6,60 4,30 6,20 Gage Plane 0,25 0°–(cid:1)8° 0,75 1 12 0,50 A Seating Plane 0,15 1,20 MAX 0,08 0,05 PINS ** 14 16 20 24 38 48 56 DIM A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 4073251/E 08/00 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. D. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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