ICGOO在线商城 > 集成电路(IC) > 逻辑 - 栅极和逆变器 > SN74ALVC00DR
数量阶梯 | 香港交货 | 国内含税 |
+xxxx | $xxxx | ¥xxxx |
查看当月历史价格
查看今年历史价格
SN74ALVC00DR产品简介:
ICGOO电子元器件商城为您提供SN74ALVC00DR由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 SN74ALVC00DR价格参考¥0.77-¥2.20。Texas InstrumentsSN74ALVC00DR封装/规格:逻辑 - 栅极和逆变器, NAND Gate IC 4 Channel 14-SOIC。您可以下载SN74ALVC00DR参考资料、Datasheet数据手册功能说明书,资料中有SN74ALVC00DR 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC)半导体 |
描述 | IC GATE NAND 4CH 2-INP 14-SOIC逻辑门 Quad 2-Input |
产品分类 | |
品牌 | Texas Instruments |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 逻辑集成电路,逻辑门,Texas Instruments SN74ALVC00DR74ALVC |
数据手册 | |
产品型号 | SN74ALVC00DR |
不同V、最大CL时的最大传播延迟 | 3ns @ 3.3V,50pF |
产品 | NAND |
产品种类 | 逻辑门 |
传播延迟时间 | 8 ns |
低电平输出电流 | 24 mA |
供应商器件封装 | 14-SOIC |
其它名称 | 296-5101-1 |
包装 | 剪切带 (CT) |
单位重量 | 129.400 mg |
商标 | Texas Instruments |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
封装 | Reel |
封装/外壳 | 14-SOIC(0.154",3.90mm 宽) |
封装/箱体 | SOIC-14 |
工作温度 | -40°C ~ 85°C |
工作温度范围 | - 40 C to + 85 C |
工厂包装数量 | 2500 |
最大工作温度 | + 85 C |
最小工作温度 | - 40 C |
栅极数量 | 4 Gate |
标准包装 | 1 |
特性 | - |
电压-电源 | 1.65 V ~ 3.6 V |
电流-输出高,低 | 24mA,24mA |
电流-静态(最大值) | 10µA |
电源电压-最大 | 3.6 V |
电源电压-最小 | 1.65 V |
电路数 | 4 |
系列 | SN74ALVC00 |
输入/输出线数量 | 2 / 1 |
输入数 | 2 |
输入线路数量 | 2 |
输出线路数量 | 1 |
逻辑电平-低 | 0.7 V ~ 0.8 V |
逻辑电平-高 | 1.7 V ~ 2 V |
逻辑类型 | 与非门 |
逻辑系列 | ALVC |
高电平输出电流 | - 24 mA |
SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G–JULY1997–REVISEDAUGUST2004 FEATURES • ESDProtectionExceedsJESD22 • OperatesFrom1.65Vto3.6V – 2000-VHuman-BodyModel(A114-A) • Maxt of3nsat3.3V – 200-VMachineModel(A115-A) pd • –24-mA OutputDriveat3.3V – 1000-VCharged-DeviceModel(C101) • Latch-UpPerformanceExceeds250mAPer JESD17 D, DGV, NS, OR PW PACKAGE RGY PACKAGE (TOP VIEW) (TOP VIEW) C 1A 1 14 VCC 1A VC 1B 2 13 4B 1 14 1Y 3 12 4A 1B 2 13 4B 2A 4 11 4Y 1Y 3 12 4A 2B 5 10 3B 2A 4 11 4Y 2Y 6 9 3A 2B 5 10 3B GND 7 8 3Y 2Y 6 9 3A 7 8 D Y N 3 G DESCRIPTION/ORDERING INFORMATION Thisquadruple2-inputpositive-NANDgateisdesignedfor1.65-Vto3.6-VV operation. CC TheSN74ALVC00performstheBooleanfunctionY=A·BorY=A+Binpositivelogic. ORDERINGINFORMATION T PACKAGE(1) ORDERABLEPARTNUMBER TOP-SIDEMARKING A QFN-RGY Tapeandreel SN74ALVC00RGYR VA00 Tube SN74ALVC00D SOIC-D ALVC00 Tapeandreel SN74ALVC00DR -40(cid:176)C to85(cid:176)C SOP-NS Tapeandreel SN74ALVC00NSR ALVC00 TSSOP-PW Tapeandreel SN74ALVC00PWR VA00 TVSOP-DGV Tapeandreel SN74ALVC00DGVR VA00 (1) Packagedrawings,standardpackingquantities,thermaldata,symbolization,andPCBdesignguidelinesareavailableat www.ti.com/sc/package. FUNCTIONTABLE (eachgate) INPUTS OUTPUT A B Y H H L L X H X L H LOGICDIAGRAM,EACHGATE(POSITIVELOGIC) A Y B Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©1997–2004,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.
SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G–JULY1997–REVISEDAUGUST2004 ABSOLUTE MAXIMUM RATINGS(1) overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyvoltagerange -0.5 4.6 V CC V Inputvoltagerange(2) -0.5 4.6 V I V Outputvoltagerange(2)(3) -0.5 V +0.5 V O CC I Inputclampcurrent V <0 -50 mA IK I I Outputclampcurrent V <0 -50 mA OK O I Continuousoutputcurrent –50 mA O ContinuouscurrentthroughV orGND –100 mA CC Dpackage(4) 86 DGVpackage(4) 127 q Packagethermalimpedance NSpackage(4) 76 (cid:176)C/W JA PWpackage(4) 113 RGYpackage(5) 47 T Storagetemperaturerange -65 150 (cid:176)C stg (1) Stressesbeyondthoselistedunder"absolutemaximumratings"maycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder"recommendedoperating conditions"isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Theinputnegative-voltageandoutputvoltageratingsmaybeexceedediftheinputandoutputcurrentratingsareobserved. (3) Thisvalueislimitedto4.6Vmaximum. (4) ThepackagethermalimpedanceiscalculatedinaccordancewithJESD51-7. (5) ThepackagethermalimpedanceiscalculatedinaccordancewithJESD51-5. RECOMMENDED OPERATING CONDITIONS(1) MIN MAX UNIT V Supplyvoltage 1.65 3.6 V CC V =1.65Vto1.95V 0.65· V CC CC V High-levelinputvoltage V =2.3Vto2.7V 1.7 V IH CC V =2.7Vto3.6V 2 CC V =1.65Vto1.95V 0.35· V CC CC V Low-levelinputvoltage V =2.3Vto2.7V 0.7 V IL CC V =2.7Vto3.6V 0.8 CC V Inputvoltage 0 3.6 V I V Outputvoltage 0 V V O CC V =1.65V -4 CC V =2.3V -12 CC I High-leveloutputcurrent mA OH V =2.7V -12 CC V =3V -24 CC V =1.65V 4 CC V =2.3V 12 CC I Low-leveloutputcurrent mA OL V =2.7V 12 CC V =3V 24 CC Dt/Dv Inputtransitionriseorfallrate 5 ns/V T Operatingfree-airtemperature -40 85 (cid:176)C A (1) AllunusedinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.RefertotheTIapplicationreport, CC ImplicationsofSloworFloatingCMOSInputs,literaturenumberSCBA004. 2
SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G–JULY1997–REVISEDAUGUST2004 ELECTRICAL CHARACTERISTICS overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS V MIN TYP(1) MAX UNIT CC I =-100mA 1.65Vto3.6V V -0.2 OH CC I =-4mA 1.65V 1.2 OH I =-6mA 2.3V 2 OH V 2.3V 1.7 V OH I =-12mA 2.7V 2.2 OH 3V 2.4 I =-24mA 3V 2 OH I =100mA 1.65Vto3.6V 0.2 OL I =4mA 1.65V 0.45 OL I =6mA 2.3V 0.4 OL V V OL 2.3V 0.7 I =12mA OL 2.7V 0.4 I =24mA 3V 0.55 OL I V =V orGND 3.6V –5 mA I I CC I V =V orGND,I =0 3.6V 10 mA CC I CC O DI OneinputatV -0.6V,OtherinputsatV orGND 3Vto3.6V 750 mA CC CC CC C V =V orGND 3.3V 4.5 pF i I CC (1) AlltypicalvaluesareatV =3.3V,T =25(cid:176)C. CC A SWITCHING CHARACTERISTICS overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted)(seeFigure1) V =1.8V V =2.5V V =3.3V PARAMETER FROM TO C– C0.15V C–C0.2V VCC=2.7V C–C0.3V UNIT (INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX MIN MAX t AorB Y 1 4.4 1 2.8 3.2 1 3 ns pd OPERATING CHARACTERISTICS T =25(cid:176)C A V =1.8V V =2.5V V =3.3V CC CC CC PARAMETER TESTCONDITIONS UNIT TYP TYP TYP C Powerdissipationcapacitancepergate C =0pF,f=10MHz 20 21 23 pF pd L 3
SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE www.ti.com SCES115G–JULY1997–REVISEDAUGUST2004 PARAMETER MEASUREMENT INFORMATION VLOAD From Output RL S1 Open TEST S1 Under Test GND tpd Open (see Note CAL) RL ttPPHLZZ//ttPPZZLH VGLNOADD LOAD CIRCUIT INPUT VCC VM VLOAD CL RL VD VI tr/tf 1.8 V ± 0.15 V VCC ≤2 ns VCC/2 2 × VCC 30 pF 1 kW 0.15 V 2.5 V ± 0.2 V VCC ≤2 ns VCC/2 2 × VCC 30 pF 500 W 0.15 V 2.7 V 2.7 V ≤2.5 ns 1.5 V 6 V 50 pF 500 W 0.3 V 3.3 V ± 0.3 V 2.7 V ≤2.5 ns 1.5 V 6 V 50 pF 500 W 0.3 V tw VI Timing VI Input VM VM Input VM 0 V 0 V VOLTAGE WAVEFORMS PULSE DURATION tsu th IDnpautat VM VM VI COounttpruotl VI 0 V (low-level VM VM enabling) 0 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES tPZL tPLZ Output VI Waveform 1 VLOAD/2 Input VM VM S1 at VLOAD VM VOL + VD 0 V (see Note B) VOL tPLH tPHL tPZH tPHZ Output VM VM VOH WSa1v eaOfto uGrtmpNu D2t VM VOH − VD VOH VOL (see Note B) 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 W . D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure1.LoadCircuitandVoltageWaveforms 4
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN74ALVC00D ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 ALVC00 & no Sb/Br) SN74ALVC00DE4 ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 ALVC00 & no Sb/Br) SN74ALVC00DGVR ACTIVE TVSOP DGV 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 VA00 & no Sb/Br) SN74ALVC00DR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 ALVC00 & no Sb/Br) SN74ALVC00NSR ACTIVE SO NS 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 ALVC00 & no Sb/Br) SN74ALVC00PWR ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 VA00 & no Sb/Br) SN74ALVC00PWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 VA00 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1
PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN74ALVC00 : •Automotive: SN74ALVC00-Q1 •Enhanced Product: SN74ALVC00-EP NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects •Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 12-Aug-2013 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74ALVC00DGVR TVSOP DGV 14 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1 SN74ALVC00DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74ALVC00NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 SN74ALVC00PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1
PACKAGE MATERIALS INFORMATION www.ti.com 12-Aug-2013 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74ALVC00DGVR TVSOP DGV 14 2000 367.0 367.0 35.0 SN74ALVC00DR SOIC D 14 2500 367.0 367.0 38.0 SN74ALVC00NSR SO NS 14 2000 367.0 367.0 38.0 SN74ALVC00PWR TSSOP PW 14 2000 367.0 367.0 35.0 PackMaterials-Page2
None
MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,23 0,40 0,07 M 0,13 24 13 0,16 NOM 4,50 6,60 4,30 6,20 Gage Plane 0,25 0°–(cid:1)8° 0,75 1 12 0,50 A Seating Plane 0,15 1,20 MAX 0,08 0,05 PINS ** 14 16 20 24 38 48 56 DIM A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 4073251/E 08/00 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. D. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265
None
None
None
None
IMPORTANTNOTICEANDDISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated