Product Sample & Technical Tools & Support & Folder Buy Documents Software Community SN74AHC1G00 SCLS313O–MARCH1996–REVISEDAPRIL2016 SN74AHC1G00 Single 2-Input Positive-NAND Gate 1 Features 2 Applications • OperatingRange:2Vto5.5V • IPPhones 1 • Maximumt of6.5nsat5V • NotebookPCs pd • LowPowerConsumption:MaximumI of10μA • Printers CC • ±8-mAOutputDriveat5V • AccessControlandSecurity • SchmittTriggerActionatAllInputsMakesthe • SolarInverters CircuitTolerantforSlowerInputRiseandFall • PersonalElectronics Time • Latch-UpPerformanceExceeds250mAPer 3 Description JESD17 The SN74AHC1G00 performs the Boolean function • ESDProtectionExceedsJESD22 Y= A•BorY= A+Binpositivelogic. – 2000-VHuman-BodyModel(A114-A) DeviceInformation(1) – 1000-VCharged-DeviceModel(C101) PARTNUMBER PACKAGE BODYSIZE(NOM) SN74AHC1G00DBV SOT-23(5) 2.90mm×1.60mm SN74AHC1G00DCK SC70(5) 2.00mm×1.25mm SN74AHC1G00DRL SOT(5) 1.60mm×1.20mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. LogicDiagram(PositiveLogic) 1 A 4 2 Y B 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

SN74AHC1G00 SCLS313O–MARCH1996–REVISEDAPRIL2016 www.ti.com Table of Contents 1 Features.................................................................. 1 8.2 FunctionalBlockDiagram.........................................9 2 Applications........................................................... 1 8.3 FeatureDescription...................................................9 3 Description............................................................. 1 8.4 DeviceFunctionalModes..........................................9 4 RevisionHistory..................................................... 2 9 ApplicationandImplementation........................ 10 9.1 ApplicationInformation............................................10 5 PinConfigurationandFunctions......................... 3 9.2 TypicalApplication .................................................10 6 Specifications......................................................... 4 10 PowerSupplyRecommendations..................... 12 6.1 AbsoluteMaximumRatings......................................4 11 Layout................................................................... 12 6.2 ESDRatings ............................................................4 6.3 RecommendedOperatingConditions.......................4 11.1 LayoutGuidelines.................................................12 6.4 ThermalInformation .................................................5 11.2 LayoutExample....................................................12 6.5 ElectricalCharacteristics...........................................5 12 DeviceandDocumentationSupport................. 13 6.6 SwitchingCharacteristics:V =3.3V±0.3V........6 12.1 DocumentationSupport .......................................13 CC 6.7 SwitchingCharacteristics:V =5V±0.5V...........6 12.2 CommunityResources..........................................13 CC 6.8 OperatingCharacteristics..........................................7 12.3 Trademarks...........................................................13 6.9 TypicalCharacteristics..............................................7 12.4 ElectrostaticDischargeCaution............................13 7 ParameterMeasurementinformation..................8 12.5 Glossary................................................................13 8 DetailedDescription.............................................. 9 13 Mechanical,Packaging,andOrderable Information........................................................... 13 8.1 Overview...................................................................9 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionN(May2013)toRevisionO Page • AddedDeviceInformationtable,ESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes, ApplicationandImplementationsection,PowerSupplyRecommendationssection,Layoutsection,Deviceand DocumentationSupportsection,andMechanical,Packaging,andOrderableInformationsection. .................................... 1 ChangesfromOriginal(March1996)toRevisionN Page • ChangeddocumentformatfromQuicksilvertoDocZone...................................................................................................... 1 2 SubmitDocumentationFeedback Copyright©1996–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74AHC1G00

SN74AHC1G00 www.ti.com SCLS313O–MARCH1996–REVISEDAPRIL2016 5 Pin Configuration and Functions DBVPackage DCKPackage 5-PinSOT-23 5-PinSC70 TopView TopView A 1 5 VCC  A 1 5 VCC  B 2 B 2 GND 3 4 Y GND 3 4 Y DRLPackage 5-PinSOT TopView A 1 5 VCC  B 2 GND 3 4 Y PinFunctions PIN I/O DESCRIPTION NO. NAME 1 A I Ainput 2 B I Binput 3 GND — Ground 4 Y O Output 5 V — Power CC Copyright©1996–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN74AHC1G00

SN74AHC1G00 SCLS313O–MARCH1996–REVISEDAPRIL2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted) (1) MIN MAX UNIT V Supplyvoltage –0.5 7 V CC V Inputvoltage(2) –0.5 7 V I V Outputvoltage(2) –0.5 V +0.5 V O CC I Inputclampcurrent V <0 –20 mA IK I I Outputclampcurrent V <0orV >V ±20 mA OK O O CC I Continuousoutputcurrent V =0toV ±25 mA O O CC ContinuouscurrentthroughV orGND ±50 mA CC T Maximumjunctiontemperature 150 °C J T Storagetemperature –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Theinputandoutputvoltageratingsmaybeexceedediftheinputandoutputcurrentratingsareobserved. 6.2 ESD Ratings VALUE UNIT Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±2000 V(ESD) Electrostaticdischarge Charged-devicemodel(CDM),perJEDECspecificationJESD22- V C101(2) ±1000 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions See (1) MIN MAX UNIT V Supplyvoltage 2 5.5 V CC V =2V 1.5 CC V High-levelinputvoltage V =3V 2.1 V IH CC V =5.5V 3.85 CC V =2V 0.5 CC V Low-levelinputvoltage V =3V 0.9 V IL CC V =5.5V 1.65 CC V Inputvoltage 0 5.5 V I V Outputvoltage 0 V V O CC V =2V –50 µA CC I High-leveloutputcurrent V =3.3V±0.3V –4 OH CC mA V =5V±0.5V –8 CC V =2V 50 µA CC I Low-leveloutputcurrent V =3.3V±0.3V 4 OL CC mA V =5V±0.5V 8 CC V =3.3V±0.3V 100 CC Δt/Δv Inputtransitionriseorfallrate ns/V V =5V±0.5V 20 CC T Operatingfree-airtemperature –40 125 °C A (1) AllunusedinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.SeetheTIapplicationreport, CC ImplicationsofSloworFloatingCMOSInputs,SCBA004. 4 SubmitDocumentationFeedback Copyright©1996–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74AHC1G00

SN74AHC1G00 www.ti.com SCLS313O–MARCH1996–REVISEDAPRIL2016 6.4 Thermal Information SN74AHC1G00 THERMALMETRIC(1) DBV(SOT-23) DCK(SC70) DRL(SOT) UNIT 5PINS 5PINS 5PINS R Junction-to-ambientthermalresistance 240 276.53 256 °C/W θJA R Junction-to-case(top)thermalresistance 174.5 118.5 130 °C/W θJC(top) R Junction-to-boardthermalresistance 73.7 62.8 152 °C/W θJB ψ Junction-to-topcharacterizationparameter 54.9 6.7 9.9 °C/W JT ψ Junction-to-boardcharacterizationparameter 72.9 62.1 152 °C/W JB (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. 6.5 Electrical Characteristics overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER(1) TESTCONDITIONS V MIN TYP MAX UNIT CC T =25°C 1.9 2 A T =–40°Cto+85°C 2V 1.9 A T =–40°Cto+125°C 1.9 A T =25°C 2.9 3 A I =–50µA T =–40°Cto+85°C 3V 2.9 OH A T =–40°Cto+125°C 2.9 A T =25°C 4.4 4.5 A V T =–40°Cto+85°C 4.5V 4.4 V OH A T =–40°Cto+125°C 4.4 A T =25°C 2.58 A I =–4mA T =–40°Cto+85°C 3V 2.48 OH A T =–40°Cto+125°C 2.48 A T =25°C 3.94 A I =–8mA T =–40°Cto+85°C 4.5V 3.8 OH A T =–40°Cto+125°C 3.8 A T =25°C 0.1 A T =–40°Cto+85°C 2V 0.1 A T =–40°Cto+125°C 0.1 A T =25°C 0.1 A I =50µA T =–40°Cto+85°C 3V 0.1 OL A T =–40°Cto+125°C 0.1 A T =25°C 0.1 A V T =–40°Cto+85°C 4.5V 0.1 V OL A T =–40°Cto+125°C 0.1 A T =25°C 0.36 A I =4mA T =–40°Cto+85°C 3V 0.44 OL A T =–40°Cto+125°C 0.44 A T =25°C 0.36 A I =8mA T =–40°Cto+85°C 4.5V 0.44 OL A T =–40°Cto+125°C 0.44 A T =25°C ±0.1 A I V =5.5VorGND T =–40°Cto+85°C 0Vto5.5V ±1 µA I I A T =–40°Cto+125°C ±1 A (1) RecommendedT =–40°Cto+125°C A Copyright©1996–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN74AHC1G00

SN74AHC1G00 SCLS313O–MARCH1996–REVISEDAPRIL2016 www.ti.com Electrical Characteristics (continued) overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER(1) TESTCONDITIONS V MIN TYP MAX UNIT CC T =25°C 1 A I V =V orGND, I =0 T =–40°Cto+85°C 5.5V 10 µA CC I CC O A T =–40°Cto+125°C 10 A T =25°C 2 10 A C V =V orGND T =–40°Cto+85°C 5V 10 pF i I CC A T =–40°Cto+125°C 10 A 6.6 Switching Characteristics: V = 3.3 V ± 0.3 V CC overrecommendedoperatingfree-airtemperaturerange,V =3.3V±0.3V(unlessotherwisenoted)(seeFigure2) CC PARAMETER FROM TO OUTPUT T (1) MIN TYP MAX UNIT (INPUT) (OUTPUT) CAPACITANCE A 25°C 5.5 7.9 t –40°Cto+85°C 1 9.5 PLH –40°Cto+125°C 1 10.5 AorB Y C =15pF ns L 25°C 5.5 7.9 t –40°Cto+85°C 1 9.5 PHL –40°Cto+125°C 1 10.5 25°C 8 11.4 t –40°Cto+85°C 1 13 PLH –40°Cto+125°C 1 14 AorB Y C =50pF ns L 25°C 8 11.4 t –40°Cto+85°C 1 13 PHL –40°Cto+125°C 1 14 (1) RecommendedT =–40°Cto+125°C A 6.7 Switching Characteristics: V = 5 V ± 0.5 V CC overrecommendedoperatingfree-airtemperaturerange,V =5V±0.5V(unlessotherwisenoted)(seeFigure2) CC PARAMETER FROM TO OUTPUT T (1) MIN TYP MAX UNIT (INPUT) (OUTPUT) CAPACITANCE A 25°C 3.7 5.5 t –40°Cto+85°C 1 6.5 PLH –40°Cto+125°C 1 7 AorB Y C =15pF ns L 25°C 3.7 5.5 t –40°Cto+85°C 1 6.5 PHL –40°Cto+125°C 1 7 25°C 5.2 7.5 t –40°Cto+85°C 1 6.5 PLH –40°Cto+125°C 1 9 AorB Y C =50pF ns L 25°C 5.2 7.5 t –40°Cto+85°C 1 6.5 PHL –40°Cto+125°C 1 9 (1) RecommendedT =–40°Cto+125°C A 6 SubmitDocumentationFeedback Copyright©1996–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74AHC1G00

SN74AHC1G00 www.ti.com SCLS313O–MARCH1996–REVISEDAPRIL2016 6.8 Operating Characteristics V =5V,T =25°C CC A PARAMETER TESTCONDITIONS MIN TYP MAX UNIT C Powerdissipationcapacitance Noload,f=1MHz 9.5 pF pd 6.9 Typical Characteristics 14 12 Vcc=3.3 +/-0.3 V A/B to Y s) CL = 50 pF n 10 ( ) x a m Vcc=5 +/-0.5 V ( 8 L H A/B to Y / H L C = 50 pF tP L 6 4 0 25 50 85 125 Temperature ((cid:176)C) C =50pF L Figure1.PropagationDelayvsTemperature Copyright©1996–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN74AHC1G00

SN74AHC1G00 SCLS313O–MARCH1996–REVISEDAPRIL2016 www.ti.com 7 Parameter Measurement information VCC From Output Test From Output RL= 1 kΩ S1 Open TEST S1 UnderTest Point UnderTest GND tPLH/tPHL Open CL CL tPLZ/tPZL VCC (see NoteA) (see NoteA) tPHZ/tPZH GND Open Drain VCC LOAD CIRCUIT FOR LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3-STATEAND OPEN-DRAIN OUTPUTS VCC Timing Input 50% VCC tw th 0 V VCC tsu VCC Input 50% VCC 50% VCC Data Input 50% VCC 50% VCC 0 V 0 V VOLTAGEWAVEFORMS VOLTAGEWAVEFORMS PULSEDURATION SETUPAND HOLD TIMES VCC VCC Output Input 50% VCC 50% VCC Control 50% VCC 50% VCC 0 V 0 V tPLH tPHL tPZL tPLZ Output VOH Waveform 1 ≈VCC InO-Puhtapsuet 50%VCC 50% VCC S1 at VCC 50% VCC VOL+0.3V VOL (see Note B) VOL tPHL tPLH tPZH tPHZ Output Out-ofO-Puhtapsuet 50% VCC 50% VCVVCOOHL (WseSae1v eNaftoo GtremN B D2) 50% VCC VOH−0.3VV≈0O VH VOLTAGEWAVEFORMS VOLTAGEWAVEFORMS PROPAGATIONDELAYTIMES ENABLEAND DISABLE TIMES INVERTINGAND NONINVERTING OUTPUTS LOW-AND HIGH-LEVELENABLING A. C includesprobeandjigcapacitance. L B. Waveform1 is for an outputwith internalconditions such that theoutputis lowexceptwhendisabledby theoutput control. Waveform2isforanoutputwithinternalconditionssuchthattheoutputishighexceptwhendisabledbytheoutput control. C. Allinputpulsesaresuppliedbygeneratorshavingthefollowingcharacteristics:PRR≤1MHz,Z =50Ω,t ≤3ns,t O r f ≤3ns. D. Theoutputsaremeasuredoneatatimewithoneinputtransitionpermeasurement. E. Allparametersandwaveformsarenotapplicabletoalldevices. Figure2. LoadCircuitandVoltageWaveforms 8 SubmitDocumentationFeedback Copyright©1996–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74AHC1G00

SN74AHC1G00 www.ti.com SCLS313O–MARCH1996–REVISEDAPRIL2016 8 Detailed Description 8.1 Overview The SN74AHC1G00 device performs the NAND Boolean function Y = A × B or Y = A + B in positive logic. The devicehasawideoperatingrangeofV from2Vto5V. CC 8.2 Functional Block Diagram 1 A 4 2 Y B Figure3. LogicDiagram(PositiveLogic) 8.3 Feature Description The SN74AHC1G00 device has wide operating voltage range for logic system from 2 V to 5 V. The low propagation delay allows fast switching and higher speeds of operation. In addition, the low power consumption of 10-uA (maximum) makes this device a good choice for portable and battery power-sensitive applications. The Schmitttriggeractiononallinputshavenoiserejectioncapabilities. 8.4 Device Functional Modes Table1liststhefunctionsoftheSN74AHC1G00device. Table1.FunctionTable INPUTS OUTPUT A B Y H H L L X H X L H Copyright©1996–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SN74AHC1G00

SN74AHC1G00 SCLS313O–MARCH1996–REVISEDAPRIL2016 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information The SN74AHC1G00 device is a low-drive CMOS device with 8-mA output drive at 5 V. It can be used for a multitude of bus interface type applications where output ringing is a concern. The low drive and slow edge rates minimizes overshoot and undershoot on the outputs. The NAND gates are used to build simple SR flip flop. They couldbeusedinremovingnoisefromaswitchdebouncecircuit 9.2 Typical Application S Q Q R Figure4. TypicalApplication 9.2.1 DesignRequirements This SN74AHC1G00 device uses CMOS technology and has balanced output drive. Take care to avoid bus contention becuase it can drive currents that would exceed maximum limits. The high drive also creates fast edgesintolightloads.Routingandloadconditionsmustbeconsideredtopreventringing. 9.2.2 DetailedDesignProcedure • Recommendedinputconditions: – Specifiedhighandlowlevels.SeeV andV inRecommendedOperatingConditions. IH IL – Inputsareovervoltagetolerantallowingthemtogoashighas5.5VatanyvalidV . CC • Recommendedoutputconditions: – Loadcurrentsmustnotexceed25mAperoutputand50mAtotalforthepart. – OutputsshouldnotbepulledaboveV . CC 10 SubmitDocumentationFeedback Copyright©1996–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74AHC1G00

SN74AHC1G00 www.ti.com SCLS313O–MARCH1996–REVISEDAPRIL2016 Typical Application (continued) 9.2.3 ApplicationCurve 12 10 Vcc=3.3 +/-0.3 V A/B to Y s) CL = 15 pF n 8 ( ) x a m Vcc=5 +/-0.5 V ( 6 L H A/B to Y / H L C = 15 pF tP L 4 2 0 25 50 85 125 Temperature ((cid:176)C) C =15pF L Figure5.PropagationDelayvsTemperature Copyright©1996–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:SN74AHC1G00

SN74AHC1G00 SCLS313O–MARCH1996–REVISEDAPRIL2016 www.ti.com 10 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in the RecommendedOperatingConditions. Each V terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single CC supply, TI recommends a 0.1-μF capacitor; if there are multiple V terminals, then TI recommends a 0.01-μF or CC 0.022-μF capacitor for each power terminal. Multiple bypass capacitors can be paralleled to reject different frequencies of noise. Frequencies of 0.1 μF and 1 μF are commonly used in parallel. The bypass capacitor must beinstalledascloseaspossibletothepowerterminalforbestresults. 11 Layout 11.1 Layout Guidelines Whenusingmultiplebitlogicdevicesinputsmustnoteverfloat. In many cases, functions or parts of functions of digital logic devices are unused. For example, when only two inputs of a triple-input AND gate are used or only three of the four buffer gates are used. Such input pins must not be left unconnected because the undefined voltages at the outside connections result in undefined operationalstates.Thefollowingaretherulesmustbeobservedunderallcircumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or V whichever make more sense or is more convenient. Floating outputs is CC generally acceptable, unless the part is a transceiver. If the transceiver has an output enable pin, it disables the outputssectionofthepartwhenasserted.Thisdoesnotdisabletheinputsectionoftheinputandoutput,sothey alsocannotfloatwhendisabled. 11.2 Layout Example VCC Input Unused Input Output Unused Input Output Input Figure6. LayoutRecommendation 12 SubmitDocumentationFeedback Copyright©1996–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN74AHC1G00

SN74AHC1G00 www.ti.com SCLS313O–MARCH1996–REVISEDAPRIL2016 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 RelatedDocumentation Forrelateddocumentationseethefollowing: • IntroductiontoLogic,SLVA700 • ImplicationsofSloworFloatingCMOSInputs,SCBA004 12.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.3 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.4 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©1996–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:SN74AHC1G00

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN74AHC1G00DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (A003, A00G, A00J, & no Sb/Br) A00L, A00S) SN74AHC1G00DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 A00G & no Sb/Br) SN74AHC1G00DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (A003, A00G, A00L, & no Sb/Br) A00S, A04J) SN74AHC1G00DCK3 ACTIVE SC70 DCK 5 3000 Pb-Free SNBI Level-1-260C-UNLIM -40 to 125 AAY (RoHS) SN74AHC1G00DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (AA3, AAG, AAJ, AA & no Sb/Br) L, AAS) SN74AHC1G00DCKRE4 ACTIVE SC70 DCK 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 AA3 & no Sb/Br) SN74AHC1G00DCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 AA3 & no Sb/Br) SN74AHC1G00DCKT ACTIVE SC70 DCK 5 250 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (AA3, AAG, AAJ, AA & no Sb/Br) L, AAS) SN74AHC1G00DCKTG4 ACTIVE SC70 DCK 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 AA3 & no Sb/Br) SN74AHC1G00DRLR ACTIVE SOT-5X3 DRL 5 4000 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 (AAB, AAS) & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN74AHC1G00 : •Automotive: SN74AHC1G00-Q1 NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74AHC1G00DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 SN74AHC1G00DBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 SN74AHC1G00DBVR SOT-23 DBV 5 3000 178.0 9.2 3.3 3.23 1.55 4.0 8.0 Q3 SN74AHC1G00DBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 SN74AHC1G00DBVRG4 SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 SN74AHC1G00DBVT SOT-23 DBV 5 250 178.0 9.2 3.3 3.23 1.55 4.0 8.0 Q3 SN74AHC1G00DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 SN74AHC1G00DBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 SN74AHC1G00DBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 SN74AHC1G00DCKR SC70 DCK 5 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74AHC1G00DCKR SC70 DCK 5 3000 180.0 8.4 2.47 2.3 1.25 4.0 8.0 Q3 SN74AHC1G00DCKR SC70 DCK 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 SN74AHC1G00DCKR SC70 DCK 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 SN74AHC1G00DCKRG4 SC70 DCK 5 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74AHC1G00DCKT SC70 DCK 5 250 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 SN74AHC1G00DCKT SC70 DCK 5 250 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74AHC1G00DCKT SC70 DCK 5 250 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 SN74AHC1G00DCKT SC70 DCK 5 250 180.0 8.4 2.47 2.3 1.25 4.0 8.0 Q3 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2020 Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74AHC1G00DCKTG4 SC70 DCK 5 250 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74AHC1G00DRLR SOT-5X3 DRL 5 4000 180.0 8.4 1.98 1.78 0.69 4.0 8.0 Q3 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74AHC1G00DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74AHC1G00DBVR SOT-23 DBV 5 3000 202.0 201.0 28.0 SN74AHC1G00DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74AHC1G00DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74AHC1G00DBVRG4 SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74AHC1G00DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 SN74AHC1G00DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 SN74AHC1G00DBVT SOT-23 DBV 5 250 202.0 201.0 28.0 SN74AHC1G00DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 SN74AHC1G00DCKR SC70 DCK 5 3000 180.0 180.0 18.0 SN74AHC1G00DCKR SC70 DCK 5 3000 202.0 201.0 28.0 SN74AHC1G00DCKR SC70 DCK 5 3000 180.0 180.0 18.0 SN74AHC1G00DCKR SC70 DCK 5 3000 180.0 180.0 18.0 SN74AHC1G00DCKRG4 SC70 DCK 5 3000 180.0 180.0 18.0 SN74AHC1G00DCKT SC70 DCK 5 250 180.0 180.0 18.0 PackMaterials-Page2

PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2020 Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74AHC1G00DCKT SC70 DCK 5 250 180.0 180.0 18.0 SN74AHC1G00DCKT SC70 DCK 5 250 180.0 180.0 18.0 SN74AHC1G00DCKT SC70 DCK 5 250 202.0 201.0 28.0 SN74AHC1G00DCKTG4 SC70 DCK 5 250 180.0 180.0 18.0 SN74AHC1G00DRLR SOT-5X3 DRL 5 4000 202.0 201.0 28.0 PackMaterials-Page3

PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 1.45 B A 0.90 PIN 1 INDEX AREA 1 5 2X 0.95 3.05 2.75 1.9 1.9 2 4 3 0.5 5X 0.3 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com

EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM 2 (1.9) 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com

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