SN54AHC126, SN74AHC126 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS SCLS257L – DECEMBER 1995 – REVISED JULY 2003 (cid:0) Operating Range 2-V to 5.5-V V SN54AHC126...J OR W PACKAGE CC (cid:0) SN74AHC126...D, DB, DGV, N, NS, OR PW PACKAGE Latch-Up Performance Exceeds 250 mA Per (TOP VIEW) JESD 17 1OE 1 14 VCC description/ordering information 1A 2 13 4OE The ’AHC126 devices are quadruple bus buffer 1Y 3 12 4A gates featuring independent line drivers with 2OE 4 11 4Y 3-state outputs. Each output is disabled when the 2A 5 10 3OE associated output-enable (OE) input is low. When 2Y 6 9 3A OE is high, the respective gate passes the data GND 7 8 3Y from the A input to its Y output. To ensure the high-impedance state during power SN54AHC126...FK PACKAGE up or power down, OE should be tied to GND (TOP VIEW) through a pulldown resistor; the minimum value of E CE the resistor is determined by the current-sourcing 1A 1O NCVC4O capability of the driver. 3 2 1 20 19 1Y 4 18 4A NC 5 17 NC 2OE 6 16 4Y NC 7 15 NC 2A 8 14 3OE 9 10 11 12 13 Y D CY A 2 N N3 3 G NC – No internal connection ORDERING INFORMATION ORDERABLE TOP-SIDE TA PACKAGE† PART NUMBER MARKING PDIP – N Tube SN74AHC126N SN74AHC126N Tube SN74AHC126D SSOOIICC –– DD AAHHCC112266 Tape and reel SN74AHC126DR SOP – NS Tape and reel SN74AHC126NSR AHC126 ––4400°°CC ttoo 8855°°CC SSOP – DB Tape and reel SN74AHC126DBR HA126 Tube SN74AHC126PW TTSSSSOOPP – PPWW HHAA112266 Tape and reel SN74AHC126PWR TVSOP – DGV Tape and reel SN74AHC126DGVR HA126 CDIP – J Tube SNJ54AHC126J SNJ54AHC126J –55°C to 125°C CFP – W Tube SNJ54AHC126W SNJ54AHC126W LCCC – FK Tube SNJ54AHC126FK SNJ54AHC126FK †Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright  2003, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments On products compliant to MIL-PRF-38535, all parameters are tested standard warranty. Production processing does not necessarily include unless otherwise noted. On all other products, production testing of all parameters. processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

SN54AHC126, SN74AHC126 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS SCLS257L – DECEMBER 1995 – REVISED JULY 2003 FUNCTION TABLE (each buffer) INPUTS OUTPUT OE A Y H H H H L L L X Z logic diagram (positive logic) 1 10 1OE 3OE 2 3 9 8 1A 1Y 3A 3Y 4 13 2OE 4OE 5 6 12 11 2A 2Y 4A 4Y Pin numbers shown are for the D, DB, DGV, J, N, NS, PW, and W packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V CC Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V I Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through V or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA CC Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W JA DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C stg †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54AHC126, SN74AHC126 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS SCLS257L – DECEMBER 1995 – REVISED JULY 2003 recommended operating conditions (see Note 3) SN54AHC126 SN74AHC126 UUNNIITT MIN MAX MIN MAX VCC Supply voltage 2 5.5 2 5.5 V VCC = 2 V 1.5 1.5 VIH High-level input voltage VCC = 3 V 2.1 2.1 V VCC = 5.5 V 3.85 3.85 VCC = 2 V 0.5 0.5 VIL Low-level input voltage VCC = 3 V 0.9 0.9 V VCC = 5.5 V 1.65 1.65 VI Input voltage 0 5.5 0 5.5 V VO Output voltage 0 VCC 0 VCC V VCC = 2 V –50 –50 (cid:0)A IOH High-level output current VCC = 3.3 V ± 0.3 V –4 –4 mmAA VCC = 5 V ±0.5 V –8 –8 VCC = 2 V 50 50 (cid:0)A IOL Low-level output current VCC = 3.3 V±0.3 V 4 4 mmAA VCC = 5 V ±0.5 V 8 8 VCC = 3.3 V ± 0.3 V 100 100 ∆∆tt//∆∆vv IInnppuutt ttrraannssiittiioonn rriissee oorr ffaallll rraattee nnss//VV VCC = 5 V ±0.5 V 20 20 TA Operating free-air temperature –55 125 –40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TA = 25°C SN54AHC126 SN74AHC126 PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS VVCCCC UUNNIITT MIN TYP MAX MIN MAX MIN MAX 2 V 1.9 2 1.9 1.9 IOH = –50 (cid:0)A 3 V 2.9 3 2.9 2.9 VOOHH 4.5 V 4.4 4.5 4.4 4.4 V IOH = –4 mA 3 V 2.58 2.48 2.48 IOH = –8 mA 4.5 V 3.94 3.8 3.8 2 V 0.1 0.1 0.1 IOL = 50 (cid:0)A 3 V 0.1 0.1 0.1 VOOLL 4.5 V 0.1 0.1 0.1 V IOL = 4 mA 3 V 0.36 0.5 0.44 IOL = 8 mA 4.5 V 0.36 0.5 0.44 II VI = 5.5 V or GND 0 V to 5.5 V ±0.1 ±1* ±1 (cid:0)A IOZ VO = VCC or GND 5.5 V ±0.25 ±2.5 ±2.5 (cid:0)A ICC VI = VCC or GND, IO = 0 5.5 V 4 40 40 (cid:0)A Ci VI = VCC or GND 5 V 4 10 10 pF * On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

SN54AHC126, SN74AHC126 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS SCLS257L – DECEMBER 1995 – REVISED JULY 2003 switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V±0.3 V (unless otherwise noted) (see Figure 1) FROM TO LOAD TA = 25°C SN54AHC126 SN74AHC126 PPAARRAAMMEETTEERR UUNNIITT (INPUT) (OUTPUT) CAPACITANCE MIN TYP MAX MIN MAX MIN MAX tPLH 5.6* 8* 1* 9.5* 1 9.5 AA YY CCLL == 1155 ppFF nnss tPHL 5.6* 8* 1* 9.5* 1 9.5 tPZH 5.4* 8* 1* 9.5* 1 9.5 OOEE YY CCLL == 1155 ppFF nnss tPZL 5.4* 8* 1* 9.5* 1 9.5 tPHZ 7* 9.7* 1* 11.5* 1 11.5 OOEE YY CCLL == 1155 ppFF nnss tPLZ 7* 9.7* 1* 11.5* 1 11.5 tPLH 8.1 11.5 1 13 1 13 AA YY CCLL == 5500 ppFF nnss tPHL 8.1 11.5 1 13 1 13 tPZH 7.9 11.5 1 13 1 13 OOEE YY CCLL == 5500 ppFF nnss tPZL 7.9 11.5 1 13 1 13 tPHZ 9.5 13.2 1 15 1 15 OOEE YY CCLL == 5500 ppFF nnss tPLZ 9.5 13.2 1 15 1 15 tsk(o) CL = 50 pF 1.5** 1.5 ns ∗ On products compliant to MIL-PRF-38535, this parameter is not production tested. ∗∗ On products compliant to MIL-PRF-38535, this parameter does not apply. switching characteristics over recommended operating free-air temperature range, VCC = 5 V±0.5 V (unless otherwise noted) (see Figure 1) FROM TO LOAD TA = 25°C SN54AHC126 SN74AHC126 PPAARRAAMMEETTEERR UUNNIITT (INPUT) (OUTPUT) CAPACITANCE MIN TYP MAX MIN MAX MIN MAX tPLH 3.8* 5.5* 1* 6.5* 1 6.5 AA YY CCLL == 1155 ppFF nnss tPHL 3.8* 5.5* 1* 6.5* 1 6.5 tPZH 3.6* 5.1* 1* 6* 1 6 OOEE YY CCLL == 1155 ppFF nnss tPZL 3.6* 5.1* 1* 6* 1 6 tPHZ 4.6* 6.8* 1* 8* 1 8 OOEE YY CCLL == 1155 ppFF nnss tPLZ 4.6* 6.8* 1* 8* 1 8 tPLH 5.3 7.5 1 8.5 1 8.5 AA YY CCLL == 5500 ppFF nnss tPHL 5.3 7.5 1 8.5 1 8.5 tPZH 5.1 7.1 1 8 1 8 OOEE YY CCLL == 5500 ppFF nnss tPZL 5.1 7.1 1 8 1 8 tPHZ 6.1 8.8 1 10 1 10 OOEE YY CCLL == 5500 ppFF nnss tPLZ 6.1 8.8 1 10 1 10 tsk(o) CL = 50 pF 1** 1 ns ∗ On products compliant to MIL-PRF-38535, this parameter is not production tested. ∗∗ On products compliant to MIL-PRF-38535, this parameter does not apply. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54AHC126, SN74AHC126 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS SCLS257L – DECEMBER 1995 – REVISED JULY 2003 noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 4) SN74AHC126 PPAARRAAMMEETTEERR UUNNIITT MIN MAX VOL(P) Quiet output, maximum dynamic VOL 0.8 V VOL(V) Quiet output, minimum dynamic VOL –0.8 V VOH(V) Quiet output, minimum dynamic VOH 4.4 V VIH(D) High-level dynamic input voltage 3.5 V VIL(D) Low-level dynamic input voltage 1.5 V NOTE 4: Characteristics are for surface-mount packages only. operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS TYP UNIT Cpd Power dissipation capacitance No load, f = 1 MHz 14 pF POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

SN54AHC126, SN74AHC126 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS SCLS257L – DECEMBER 1995 – REVISED JULY 2003 PARAMETER MEASUREMENT INFORMATION VCC From Output Test From Output RL = 1 kΩ S1 Open TEST S1 Under Test Point Under Test GND tPLH/tPHL Open CL CL tPLZ/tPZL VCC (see Note A) (see Note A) tPHZ/tPZH GND Open Drain VCC LOAD CIRCUIT FOR LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3-STATE AND OPEN-DRAIN OUTPUTS VCC Timing Input 50% VCC tw th 0 V VCC tsu VCC Input 50% VCC 50% VCC Data Input 50% VCC 50% VCC 0 V 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PULSE DURATION SETUP AND HOLD TIMES VCC VCC Output Input 50% VCC 50% VCC Control 50% VCC 50% VCC 0 V 0 V tPLH tPHL tPZL tPLZ Output VOH Waveform 1 ≈VCC InO-Puhtapsuet 50% VCC 50% VCC S1 at VCC 50% VCC VOL + 0.3 V VOL (see Note B) VOL tPHL tPLH tPZH tPHZ Output Out-ofO-Puhtapsuet 50% VCC 50% VCVVCOOHL (WseSae1v eNaftoo GtremN B D2) 50% VCC VOH – 0.3 VV≈0O VH VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES ENABLE AND DISABLE TIMES INVERTING AND NONINVERTING OUTPUTS LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time with one input transition per measurement. E. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 5962-9686201Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 9686201Q2A SNJ54AHC 126FK 5962-9686201QDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9686201QD A SNJ54AHC126W SN74AHC126D ACTIVE SOIC D 14 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC126 & no Sb/Br) SN74AHC126DBR ACTIVE SSOP DB 14 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA126 & no Sb/Br) SN74AHC126DG4 ACTIVE SOIC D 14 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC126 & no Sb/Br) SN74AHC126DGVR ACTIVE TVSOP DGV 14 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA126 & no Sb/Br) SN74AHC126DR ACTIVE SOIC D 14 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC126 & no Sb/Br) SN74AHC126N ACTIVE PDIP N 14 25 Green (RoHS CU NIPDAU N / A for Pkg Type -40 to 85 SN74AHC126N & no Sb/Br) SN74AHC126NSR ACTIVE SO NS 14 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 AHC126 & no Sb/Br) SN74AHC126PW ACTIVE TSSOP PW 14 90 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA126 & no Sb/Br) SN74AHC126PWR ACTIVE TSSOP PW 14 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA126 & no Sb/Br) SN74AHC126PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HA126 & no Sb/Br) SNJ54AHC126FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 9686201Q2A SNJ54AHC 126FK SNJ54AHC126W ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9686201QD A SNJ54AHC126W Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54AHC126, SN74AHC126 : •Catalog: SN74AHC126 •Military: SN54AHC126 NOTE: Qualified Version Definitions: Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 •Catalog - TI's standard catalog product •Military - QML certified for Military and Defense Applications Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2018 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74AHC126DGVR TVSOP DGV 14 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1 SN74AHC126DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74AHC126NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 SN74AHC126PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2018 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74AHC126DGVR TVSOP DGV 14 2000 367.0 367.0 35.0 SN74AHC126DR SOIC D 14 2500 367.0 367.0 38.0 SN74AHC126NSR SO NS 14 2000 367.0 367.0 38.0 SN74AHC126PWR TSSOP PW 14 2000 367.0 367.0 35.0 PackMaterials-Page2

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MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,23 0,40 0,07 M 0,13 24 13 0,16 NOM 4,50 6,60 4,30 6,20 Gage Plane 0,25 0°–(cid:1)8° 0,75 1 12 0,50 A Seating Plane 0,15 1,20 MAX 0,08 0,05 PINS ** 14 16 20 24 38 48 56 DIM A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 4073251/E 08/00 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. D. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,65 0,15 M 0,22 28 15 0,25 0,09 5,60 8,20 5,00 7,40 Gage Plane 1 14 0,25 A 0°–(cid:1)8° 0,95 0,55 Seating Plane 2,00 MAX 0,05 MIN 0,10 PINS ** 14 16 20 24 28 30 38 DIM A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 4040065/E 12/01 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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