SN54ACT245, SN74ACT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS452E – SEPTEMBER 1994 – REVISED OCTOBER 2002 (cid:0) (cid:0) 4.5-V to 5.5-V V Operation Max t of 8 ns at 5 V CC pd (cid:0) (cid:0) Inputs Accept Voltages to 5.5 V Inputs Are TTL-Voltage Compatible SN54ACT245...J OR W PACKAGE SN54ACT245...FK PACKAGE SN74ACT245...DB, DW, N, NS, OR PW PACKAGE (TOP VIEW) (TOP VIEW) A2 A1 DIRVCCOE DIR 1 20 VCC A1 2 19 OE 3 2 1 20 19 A2 3 18 B1 A3 4 18 B1 A3 4 17 B2 A4 5 17 B2 A4 5 16 B3 A5 6 16 B3 A5 6 15 B4 A6 7 15 B4 A6 7 14 B5 A7 8 14 B5 9 10 11 12 13 A7 8 13 B6 A8 9 12 B7 A8 ND B8 B7 B6 GND 10 11 B8 G description/ordering information These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. When the output-enable (OE) is low, the device passes noninverted data from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input. A high on OE disables the device so that the buses are effectively isolated. To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup CC resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION ORDERABLE TOP-SIDE TA PACKAGE† PART NUMBER MARKING PDIP – N Tube SN74ACT245N SN74ACT245N Tube SN74ACT245DW SSOOIICC – DDWW AACCTT224455 Tape and reel SN74ACT245DWR –4400°°CC ttoo 8855°°CC SOP – NS Tape and reel SN74ACT245NSR ACT245 SSOP – DB Tape and reel SN74ACT245DBR AD245 TSSOP – PW Tape and reel SN74ACT245PWR AD245 CDIP – J Tube SNJ54ACT245J SNJ54ACT245J –55°C to 125°C CFP – W Tube SNJ54ACT245W SNJ54ACT245W LCCC – FK Tube SNJ54ACT245K SNJ54ACT245FK †Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright  2002, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments On products compliant to MIL-PRF-38535, all parameters are tested standard warranty. Production processing does not necessarily include unless otherwise noted. On all other products, production testing of all parameters. processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

SN54ACT245, SN74ACT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS452E – SEPTEMBER 1994 – REVISED OCTOBER 2002 FUNCTION TABLE (each transceiver) INPUTS OOPPEERRAATTIIOONN OE DIR L L B data to A bus L H A data to B bus H X Isolation logic diagram (positive logic) 1 DIR 19 OE 2 A1 18 B1 To Seven Other Channels absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V CC Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through V or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA CC Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W JA DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C stg †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54ACT245, SN74ACT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS452E – SEPTEMBER 1994 – REVISED OCTOBER 2002 recommended operating conditions (see Note 3) SN54ACT245 SN74ACT245 UUNNIITT MIN MAX MIN MAX VCC Supply voltage 4.5 5.5 4.5 5.5 V VIH High-level input voltage 2 2 V VIL Low-level input voltage 0.8 0.8 V VI Input voltage 0 VCC 0 VCC V VO Output voltage 0 VCC 0 VCC V IOH High-level output current –24 –24 mA IOL Low-level output current 24 24 mA (cid:0)t/(cid:0)v Input transition rise or fall rate 8 8 ns/V TA Operating free-air temperature –55 125 –40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TA = 25°C SN54ACT245 SN74ACT245 PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS VVCCCC UUNNIITT MIN TYP MAX MIN MAX MIN MAX 4.5 V 4.4 4.49 4.4 4.4 IIOOHH == –5500 (cid:1)(cid:1)AA 5.5 V 5.4 5.49 5.4 5.4 4.5 V 3.88 3.7 3.76 VVOOHH IIOOHH == –2244 mmAA VV 5.5 V 4.86 4.7 4.76 IOH = –50 mA† 5.5 V 3.85 IOH = –75 mA† 5.5 V 3.85 4.5 V 0.001 0.1 0.1 0.1 IIOOLL == 5500 (cid:1)(cid:1)AA 5.5 V 0.001 0.1 0.1 0.1 4.5 V 0.36 0.5 0.44 VVOOLL IIOOLL == 2244 mmAA VV 5.5 V 0.36 0.5 0.44 IOL = 50 mA† 5.5 V 1.65 IOL = 75 mA† 5.5 V 1.65 IOZ A or B ports‡ VO = VCC or GND 5.5 V ±0.5 ±10 ±5 (cid:1)A II OE or DIR VI = VCC or GND 5.5 V ±0.1 ±1 ±1 (cid:1)A ICC VI = VCC or GND, IO = 0 5.5 V 4 80 40 (cid:1)A One input at 3.4 V, (cid:0)ICC§ Other inputs at GND or VCC 5.5 V 0.6 1.6 1.5 mA Ci VI = VCC or GND 5 V 4.5 pF Cio VO = VCC or GND 5 V 15 pF †Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms. ‡ For I/O ports, the parameter IOZ includes the input leakage current. §This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or VCC. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

SN54ACT245, SN74ACT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS452E – SEPTEMBER 1994 – REVISED OCTOBER 2002 switching characteristics over recommended operating free-air temperature range, VCC = 5 V ±0.5 V (unless otherwise noted) (see Figure 1) FROM TO TA = 25°C SN54ACT245 SN74ACT245 PPAARRAAMMEETTEERR UUNNIITT (INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX tPLH 1 4 7.5 1 9 1.5 8 AA oorr BB BB oorr AA nnss tPHL 1 4 8 1 10 1 9 tPZH 1 5 10 1 12 1.5 11 OOEE AA oorr BB nnss tPZL 1 5.5 10 1 13 1.5 12 tPHZ 1 5.5 10 1 12 1 11 OOEE AA oorr BB nnss tPLZ 1 5 10 1 12 1.5 11 operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS TYP UNIT Cpd Power dissipation capacitance CL = 50 pF, f = 1 MHz 45 pF PARAMETER MEASUREMENT INFORMATION 2 × VCC TEST S1 500 Ω S1 Open From Output tPLH/tPHL Open Under Test tPLZ/tPZL 2 × VCC CL = 50 pF 500 Ω tPHZ/tPZH Open (see Note A) Output 3 V Control LOAD CIRCUIT (low-level 1.5 V 1.5 V enabling) 0 V tPZL tPLZ 3 V Output Input 1.5 V 1.5 V Waveform 1 ≈VCC 0 V S1 at 2 × VCC 50% VCC VOL + 0.3 V (see Note B) VOL tPLH tPHL tPZH tPHZ Output VOH Waveform 2 VOH Output 50% VCC 50% VCC S1 at Open 50% VCC VOH – 0.3 V VOL (see Note B) ≈0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM www.ti.com 15-Oct-2009 PACKAGING INFORMATION OrderableDevice Status(1) Package Package Pins Package EcoPlan(2) Lead/BallFinish MSLPeakTemp(3) Type Drawing Qty 5962-8766301M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N/AforPkgType 5962-8766301MRA ACTIVE CDIP J 20 1 TBD A42 N/AforPkgType 5962-8766301MSA ACTIVE CFP W 20 1 TBD CallTI N/AforPkgType 5962-8766301SRA ACTIVE CDIP J 20 1 TBD A42 N/AforPkgType 5962-8766301SSA ACTIVE CFP W 20 1 TBD CallTI N/AforPkgType SN74ACT245DBLE OBSOLETE SSOP DB 20 TBD CallTI CallTI SN74ACT245DBR ACTIVE SSOP DB 20 2000 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) SN74ACT245DBRE4 ACTIVE SSOP DB 20 2000 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) SN74ACT245DBRG4 ACTIVE SSOP DB 20 2000 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) SN74ACT245DW ACTIVE SOIC DW 20 25 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) SN74ACT245DWE4 ACTIVE SOIC DW 20 25 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) SN74ACT245DWG4 ACTIVE SOIC DW 20 25 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) SN74ACT245DWR ACTIVE SOIC DW 20 2000 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) SN74ACT245DWRE4 ACTIVE SOIC DW 20 2000 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) SN74ACT245DWRG4 ACTIVE SOIC DW 20 2000 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) SN74ACT245N ACTIVE PDIP N 20 20 Pb-Free CUNIPDAU N/AforPkgType (RoHS) SN74ACT245NE4 ACTIVE PDIP N 20 20 Pb-Free CUNIPDAU N/AforPkgType (RoHS) SN74ACT245NSR ACTIVE SO NS 20 2000 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) SN74ACT245NSRG4 ACTIVE SO NS 20 2000 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) SN74ACT245PW ACTIVE TSSOP PW 20 70 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) SN74ACT245PWE4 ACTIVE TSSOP PW 20 70 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) SN74ACT245PWG4 ACTIVE TSSOP PW 20 70 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) SN74ACT245PWLE OBSOLETE TSSOP PW 20 TBD CallTI CallTI SN74ACT245PWR ACTIVE TSSOP PW 20 2000 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) SN74ACT245PWRE4 ACTIVE TSSOP PW 20 2000 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) SN74ACT245PWRG4 ACTIVE TSSOP PW 20 2000 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) SNJ54ACT245FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N/AforPkgType SNJ54ACT245J ACTIVE CDIP J 20 1 TBD A42 N/AforPkgType SNJ54ACT245W ACTIVE CFP W 20 1 TBD CallTI N/AforPkgType Addendum-Page1

PACKAGE OPTION ADDENDUM www.ti.com 15-Oct-2009 (1)Themarketingstatusvaluesaredefinedasfollows: ACTIVE:Productdevicerecommendedfornewdesigns. LIFEBUY:TIhasannouncedthatthedevicewillbediscontinued,andalifetime-buyperiodisineffect. NRND:Notrecommendedfornewdesigns.Deviceisinproductiontosupportexistingcustomers,butTIdoesnotrecommendusingthispartin anewdesign. PREVIEW:Devicehasbeenannouncedbutisnotinproduction.Samplesmayormaynotbeavailable. OBSOLETE:TIhasdiscontinuedtheproductionofthedevice. (2)EcoPlan-Theplannedeco-friendlyclassification:Pb-Free(RoHS),Pb-Free(RoHSExempt),orGreen(RoHS&noSb/Br)-pleasecheck http://www.ti.com/productcontentforthelatestavailabilityinformationandadditionalproductcontentdetails. TBD:ThePb-Free/Greenconversionplanhasnotbeendefined. Pb-Free(RoHS):TI'sterms"Lead-Free"or"Pb-Free"meansemiconductorproductsthatarecompatiblewiththecurrentRoHSrequirements forall6substances,includingtherequirementthatleadnotexceed0.1%byweightinhomogeneousmaterials.Wheredesignedtobesoldered athightemperatures,TIPb-Freeproductsaresuitableforuseinspecifiedlead-freeprocesses. Pb-Free(RoHSExempt):ThiscomponenthasaRoHSexemptionforeither1)lead-basedflip-chipsolderbumpsusedbetweenthedieand package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible)asdefinedabove. Green(RoHS&noSb/Br):TIdefines"Green"tomeanPb-Free(RoHScompatible),andfreeofBromine(Br)andAntimony(Sb)basedflame retardants(BrorSbdonotexceed0.1%byweightinhomogeneousmaterial) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incomingmaterialsandchemicals.TIandTIsuppliersconsidercertaininformationtobeproprietary,andthusCASnumbersandotherlimited informationmaynotbeavailableforrelease. InnoeventshallTI'sliabilityarisingoutofsuchinformationexceedthetotalpurchasepriceoftheTIpart(s)atissueinthisdocumentsoldbyTI toCustomeronanannualbasis. Addendum-Page2

PACKAGE MATERIALS INFORMATION www.ti.com 5-Aug-2008 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0(mm) B0(mm) K0(mm) P1 W Pin1 Type Drawing Diameter Width (mm) (mm) Quadrant (mm) W1(mm) SN74ACT245DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1 SN74ACT245DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74ACT245NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 SN74ACT245PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 5-Aug-2008 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74ACT245DBR SSOP DB 20 2000 346.0 346.0 33.0 SN74ACT245DWR SOIC DW 20 2000 346.0 346.0 41.0 SN74ACT245NSR SO NS 20 2000 346.0 346.0 41.0 SN74ACT245PWR TSSOP PW 20 2000 346.0 346.0 33.0 PackMaterials-Page2

MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,65 0,15 M 0,22 28 15 0,25 0,09 5,60 8,20 5,00 7,40 Gage Plane 1 14 0,25 A 0°–(cid:1)8° 0,95 0,55 Seating Plane 2,00 MAX 0,05 MIN 0,10 PINS ** 14 16 20 24 28 30 38 DIM A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 4040065/E 12/01 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,65 0,10 M 0,19 14 8 0,15 NOM 4,50 6,60 4,30 6,20 Gage Plane 0,25 1 7 0°–8° A 0,75 0,50 Seating Plane 0,15 1,20 MAX 0,10 0,05 PINS ** 8 14 16 20 24 28 DIM A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 4040064/F 01/97 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN NO. OF A B 18 17 16 15 14 13 12 TERMINALS MIN MAX MIN MAX ** 0.342 0.358 0.307 0.358 19 11 20 (8,69) (9,09) (7,80) (9,09) 20 10 0.442 0.458 0.406 0.458 28 (11,23) (11,63) (10,31) (11,63) 21 9 B SQ 0.640 0.660 0.495 0.560 44 22 8 (16,26) (16,76) (12,58) (14,22) A SQ 23 7 0.739 0.761 0.495 0.560 52 (18,78) (19,32) (12,58) (14,22) 24 6 0.938 0.962 0.850 0.858 68 (23,83) (24,43) (21,6) (21,8) 25 5 1.141 1.165 1.047 1.063 84 (28,99) (29,59) (26,6) (27,0) 26 27 28 1 2 3 4 0.020 (0,51) 0.080 (2,03) 0.010 (0,25) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.045 (1,14) 0.022 (0,54) 0.035 (0,89) 0.050 (1,27) 4040140/D 10/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold plated. E. Falls within JEDEC MS-004 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 5962-8766301M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 8766301M2A SNJ54 ACT245FK 5962-8766301MRA ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-8766301MR A SNJ54ACT245J 5962-8766301MSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-8766301MS A SNJ54ACT245W 5962-8766301SRA ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-8766301SR A SNV54ACT245J 5962-8766301SSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-8766301SS A SNV54ACT245W SN74ACT245DBR ACTIVE SSOP DB 20 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 AD245 & no Sb/Br) SN74ACT245DW ACTIVE SOIC DW 20 25 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 ACT245 & no Sb/Br) SN74ACT245DWR ACTIVE SOIC DW 20 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 ACT245 & no Sb/Br) SN74ACT245DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 ACT245 & no Sb/Br) SN74ACT245DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 ACT245 & no Sb/Br) SN74ACT245N ACTIVE PDIP N 20 20 Pb-Free NIPDAU N / A for Pkg Type -40 to 85 SN74ACT245N (RoHS) SN74ACT245NE4 ACTIVE PDIP N 20 20 Pb-Free NIPDAU N / A for Pkg Type -40 to 85 SN74ACT245N (RoHS) SN74ACT245NSR ACTIVE SO NS 20 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 ACT245 & no Sb/Br) SN74ACT245PW ACTIVE TSSOP PW 20 70 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 AD245 & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN74ACT245PWG4 ACTIVE TSSOP PW 20 70 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 AD245 & no Sb/Br) SN74ACT245PWR ACTIVE TSSOP PW 20 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 AD245 & no Sb/Br) SN74ACT245PWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 AD245 & no Sb/Br) SNJ54ACT245FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 8766301M2A SNJ54 ACT245FK SNJ54ACT245J ACTIVE CDIP J 20 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-8766301MR A SNJ54ACT245J SNJ54ACT245W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-8766301MS A SNJ54ACT245W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54ACT245, SN54ACT245-SP, SN74ACT245 : •Catalog: SN74ACT245, SN54ACT245 •Military: SN54ACT245 •Space: SN54ACT245-SP NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Military - QML certified for Military and Defense Applications •Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 2-Oct-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74ACT245DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1 SN74ACT245DWR SOIC DW 20 2000 330.0 24.4 10.8 13.3 2.7 12.0 24.0 Q1 SN74ACT245NSR SO NS 20 2000 330.0 24.4 8.4 13.0 2.5 12.0 24.0 Q1 SN74ACT245PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.0 1.4 8.0 16.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 2-Oct-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74ACT245DBR SSOP DB 20 2000 367.0 367.0 38.0 SN74ACT245DWR SOIC DW 20 2000 367.0 367.0 45.0 SN74ACT245NSR SO NS 20 2000 367.0 367.0 45.0 SN74ACT245PWR TSSOP PW 20 2000 367.0 367.0 38.0 PackMaterials-Page2

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PACKAGE OUTLINE DB0020A SSOP - 2 mm max height SCALE 2.000 SMALL OUTLINE PACKAGE C 8.2 TYP 7.4 A 0.1 C PIN 1 INDEX AREA SEATING PLANE 18X 0.65 20 1 2X 7.5 5.85 6.9 NOTE 3 10 11 0.38 20X 0.22 5.6 B 0.1 C A B 5.0 NOTE 4 2 MAX (0.15) TYP 0.25 SEE DETAIL A GAGE PLANE 0 -8 0.95 0.05 MIN 0.55 DETA 15AIL A TYPICAL 4214851/B 08/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-150. www.ti.com

EXAMPLE BOARD LAYOUT DB0020A SSOP - 2 mm max height SMALL OUTLINE PACKAGE 20X (1.85) SYMM (R0.05) TYP 1 20X (0.45) 20 SYMM 18X (0.65) 10 11 (7) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 10X SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDE15.000 R MASK DETAILS 4214851/B 08/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DB0020A SSOP - 2 mm max height SMALL OUTLINE PACKAGE 20X (1.85) SYMM (R0.05) TYP 1 20X (0.45) 20 SYMM 18X (0.65) 10 11 (7) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 10X 4214851/B 08/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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PACKAGE OUTLINE DW0020A SOIC - 2.65 mm max height SCALE 1.200 SOIC C 10.63 SEATING PLANE TYP 9.97 A PIN 1 ID 0.1 C AREA 18X 1.27 20 1 13.0 2X 12.6 11.43 NOTE 3 10 11 0.51 20X 7.6 0.31 2.65 MAX B 7.4 0.25 C A B NOTE 4 0.33 TYP 0.10 0.25 SEE DETAIL A GAGE PLANE 0.3 1.27 0 - 8 0.1 0.40 DETAIL A TYPICAL 4220724/A 05/2016 NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.43 mm per side. 5. Reference JEDEC registration MS-013. www.ti.com

EXAMPLE BOARD LAYOUT DW0020A SOIC - 2.65 mm max height SOIC 20X (2) SYMM 1 20 20X (0.6) 18X (1.27) SYMM (R0.05) TYP 10 11 (9.3) LAND PATTERN EXAMPLE SCALE:6X SOOPLEDNEINRG MASK METAL MSOELTDAEL RU NMDAESRK SOOPLEDNEINRG MASK 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4220724/A 05/2016 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DW0020A SOIC - 2.65 mm max height SOIC 20X (2) SYMM 1 20 20X (0.6) 18X (1.27) SYMM 10 11 (9.3) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:6X 4220724/A 05/2016 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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