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  • 型号: SN65LVDS047D
  • 制造商: Texas Instruments
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SN65LVDS047D产品简介:

ICGOO电子元器件商城为您提供SN65LVDS047D由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 SN65LVDS047D价格参考。Texas InstrumentsSN65LVDS047D封装/规格:接口 - 驱动器,接收器,收发器, 驱动器 4/0 LVDS 16-SOIC。您可以下载SN65LVDS047D参考资料、Datasheet数据手册功能说明书,资料中有SN65LVDS047D 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)半导体

描述

IC LVDS QUAD LINE DRIVER 16-SOICLVDS 接口集成电路 Quad LVDS Driver

产品分类

接口 - 驱动器,接收器,收发器

品牌

Texas Instruments

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

接口 IC,LVDS 接口集成电路,Texas Instruments SN65LVDS047D65LVDS

数据手册

点击此处下载产品Datasheet

产品型号

SN65LVDS047D

PCN组件/产地

点击此处下载产品Datasheet

产品目录页面

点击此处下载产品Datasheet

产品种类

LVDS 接口集成电路

传播延迟时间

1.8 ns

供应商器件封装

16-SOIC N

其它名称

296-6909-5

包装

管件

协议

LVDS

单位重量

155.100 mg

双工

-

商标

Texas Instruments

安装类型

表面贴装

安装风格

SMD/SMT

封装

Tube

封装/外壳

16-SOIC(0.154",3.90mm 宽)

封装/箱体

SOIC-16

工作温度

-40°C ~ 85°C

工作电源电压

- 0.3 V to + 13 V

工厂包装数量

40

接收器滞后

-

数据速率

400Mbps

最大工作温度

+ 85 C

最小工作温度

- 40 C

标准包装

40

激励器数量

4 Driver

电压-电源

3 V ~ 3.6 V

电源电压-最大

4 V

电源电压-最小

- 0.3 V

类型

驱动器

系列

SN65LVDS047

输出类型

LVDS

驱动器/接收器数

4/0

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PDF Datasheet 数据手册内容提取

SN65LVDS047 www.ti.com SLLS416B–JUNE2000–REVISEDDECEMBER2003 LVDS QUAD DIFFERENTIAL LINE DRIVER FEATURES The SN65LVDS047 is characterized for operation • >400Mbps(200MHz)SignalingRates from-40°Cto85°C. • Flow-ThroughPinoutSimplifiesPCBLayout D OR PW PACKAGE • 300psMaximumDifferentialSkew (Marked as LVDS047) • PropagationDelayTimes1.8ns(Typical) (TOP VIEW) • 3.3VPowerSupplyDesign EN 1 16 DOUT1– • ±350mVDifferentialSignaling DIN1 2 15 DOUT1+ • HighImpedanceonLVDSOutputsonPower DIN2 3 14 DOUT2+ Down VCC 4 13 DOUT2– • ConformstoTIA/EIA-644LVDSStandard GND 5 12 DOUT3– • IndustrialOperatingTemperatureRange DIN3 6 11 DOUT3+ DIN4 7 10 DOUT4+ (-40°Cto85°C) EN 8 9 DOUT4– • AvailableinSOICandTSSOPPackages functional block diagram DESCRIPTION The SN65LVDS047 is a quad differential linedriver DOUT1+ DIN1 D1 that implements the electrical characteristics of DOUT1– low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels DOUT2+ of 5-V differential standard levels (such as DIN2 D2 EIA/TIA-422B) to reduce the power, increase the DOUT2– switching speeds, and allow operation with a 3.3-V supply rail. Any of the four current-mode drivers will DOUT3+ deliver a minimum differential output voltage DIN3 D3 magnitude of 247 mV into a 100-W load when DOUT3– enabled. DOUT4+ The intended application of this device and signaling DIN4 D4 technique is for point-to-point and multi-drop DOUT4– baseband data transmission over controlled impedance media of approximately 100W . The EN transmission media may be printed-circuit board EN traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other system characteristics. TRUTHTABLE(1) INPUT ENABLES OUTPUTS D EN EN D D IN OUT+ OUT- L L H H LorOPEN H H L X Allotherconditions Z Z (1) H=highlevel,L=lowlevel,X=irrelevant,Z=highimpedance (off) Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2000–2003,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

SN65LVDS047 www.ti.com SLLS416B–JUNE2000–REVISEDDECEMBER2003 Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS VCC VCC 50 W DIN or EN Input 50 W 10 kW Output 7 V 300 kW 7 V ABSOLUTE MAXIMUM RATINGS(1) overoperatingfree-airtemperature(see (2)range(unlessotherwisenoted) UNIT (V ) Supplyvoltage -0.3Vto4V CC V(D ) Inputvoltagerange -0.3Vto(V +0.3V) I IN CC (EN,EN) Enableinputvoltage -0.3Vto(V +0.3V) CC V (D D ) Outputvoltage -0.5Vto(V +0.5V) O OUT+, OUT- CC (D D ) Bus-pin--electrostaticdischarge,see (3) >10kV OUT+, OUT- (D (D ) Shortcircuitduration Continuous OUT+, OUT- Storagetemperaturerange -65°Cto150°C Leadtemperature1,6mm(1/16inch)fromcasefor10seconds 260°C (1) Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperating conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Allvoltagevalues,exceptdifferentialI/Obusvoltages,arewithrespecttonetworkgroundterminal. (3) TestedinaccordancewithMIL-STD-883CMethod3015.7. DISSIPATIONRATINGTABLE T £ 25°C OPERATINGFACTOR(1) T =85°C PACKAGE A A POWERRATING ABOVET =25°C POWERRATING A D 950mW 7.6mW/°C 494mW PW 774mW 6.2mW/°C 402mW (1) Thisistheinverseofthejunction-to-ambientthermalresistancewhenboard-mountedandwithnoair flow. RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT V Supplyvoltage 3 3.3 3.6 V CC T Operatingfree-airtemperature -40 25 85 °C A 2 SubmitDocumentationFeedback

SN65LVDS047 www.ti.com SLLS416B–JUNE2000–REVISEDDECEMBER2003 ELECTRICAL CHARACTERISTICS overrecommendedoperatingfree-airtemperaturerange(see (1)and (2))(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP(3) MAX UNIT V Differentialoutputvoltage 250 310 450 mV OD ChangeinmagnitudeofV for n|V | OD 1 35 |mV| OD complementaryoutputstates Steady-state,common-modeoutput V 1.125 1.17 1.375 V OC(SS) voltage R =100W ,seeFigure1 L Changeinsteady-state nV common-modeoutputvoltage 1 25 |mV| OC(SS) betweenlogicstates V Outputhighvoltage 1.33 1.6 V OH V Outputlowvoltage 0.90 1.02 V OL V Inputhighvoltage 2 V V IH CC V Inputlowvoltage GND 0.8 V IL I Inputhighcurrent V =V or2.5V -10 3 10 µA IH IN CC I Inputlowcurrent V =GNDor0.4V -10 1 10 µA IL IN V Inputclampvoltage I =-18mA -1.5 -0.8 V IK CL Enabled,D =V ,D =0 I Outputshortcircuitcurrent,see (4) IN CC OUT+ -3.1 -9 mA OS VorD =GND,D =0V IN OUT- Differentialoutputshortcircuit I Enabled,V =0V -9 mA OSD current,see (4) OD V =0Vor3.6V,V =0Vor I Power-offleakage O CC -1 1 µA OFF Open EN=0.8VandEN=2V,V = I Output3-statecurrent O -1 1 µA OZ 0VorV CC Noloadsupplycurrent,drivers I D =V orGND 7 mA CC enabled IN CC Loadedsupplycurrent,drivers R =100W allchannels,D = I L IN 20 26 mA CCL enabled V orGND(allinputs) CC Noloadsupplycurrent,drivers D =V orGND,EN=GND, I IN CC 0.5 1.3 mA CC(Z) disabled EN=V CC (1) Currentintodevicepinisdefinedaspositive.Currentoutofthedeviceisdefinedasnegative.Allvoltagesarereferencedtoground, unlessotherwisespecified. (2) TheSN65LVDS047isacurrentmodedeviceandonlyfunctionswithindatasheetspecificationswhenaresistiveloadisappliedtothe driveroutputs,90W to110W typicalrange. (3) Alltypicalvaluesaregivenfor:V =3.3V,T =25°C. CC A (4) Outputshortcircuitcurrent(I )isspecifiedasmagnitudeonly,minussignindicatesdirectiononly. OS SubmitDocumentationFeedback 3

SN65LVDS047 www.ti.com SLLS416B–JUNE2000–REVISEDDECEMBER2003 SWITCHING CHARACTERISTICS overrecommendedoperatingconditions(see (1), (2)and (3))(unlessotherwisenoted) TYP( PARAMETER TESTCONDITIONS MIN MAX UNIT 4) t Differentialpropagationdelay,high-to-low 1.4 1.8 2.8 ns PHL t Differentialpropagationdelay,low-to-high 1.4 1.8 2.8 ns PLH t Differentialpulseskew(t t ),see(5) 50 300 ps SK(p) PHLD- PLHD tSK(o) Channel-to-channelskew,see (6) RL=100W ,,CL=15pF, 40 300 ps t Differentialpart-to-partskew,see (7) seeFigure2andFigure3 1 ns SK(pp) t Differentialpart-to-partskew,see (8) 1.2 ns SK(lim) t Risetime 0.5 1.5 ns r t Falltime 0.5 1.5 ns f t DisabletimehightoZ 5.5 8 ns PHZ tPLZ DisabletimelowtoZ RL=100W ,,CL=15pF, 5.5 8 ns t EnabletimeZtohigh seeFigure4andFigure5 8.5 12 ns PZH t EnabletimeZtolow 8.5 12 ns PZL f Maximumoperatingfrequency,see (9) 250 MHz (MAX) (1) Generatorwaveformforalltestsunlessotherwise:f=1MHz,Z =50W ,t <1ns,andt <1ns. o r f (2) C includesprobeandjigcapacitance. L (3) Allinputvoltagesareforonechannelunlessotherwisespecified.OtherinputsaresettoGND. (4) Alltypicalvaluesaregivenfor:V =3.3V,T =25°C. CC A (5) t |t -t |isthemagnitudedifferenceindifferentialpropagationdelaytimebetweenthepositivegoingedgeandthenegativegoing SK(p) PHL PLH edgeofthesamechannel. (6) t isthedifferentialchannel-to-channelskewofanyeventonthesamedevice. SK(o) (7) t isthedifferentialpart-to-partskew,andisdefinedasthedifferencebetweentheminimumandthemaximumspecifieddifferential SK(pp) propagationdelays.ThisspecificationappliestodevicesatthesameV andwithin5°Cofeachotherwithintheoperatingtemperature CC range. (8) t part-to-partskew,isthedifferentialchannel-to-channelskewofanyeventbetweendevices.Thisspecificationappliestodevices SK(lim) overrecommendedoperatingtemperatureandvoltageranges,andacrossprocessdistribution.t isdefinedas|Min-Max| SK(lim) differentialpropagationdelay. (9) f generatorinputconditions:t =t <1ns(0%to100%),50%dutycycle,0Vto3V.Outputcriteria:dutycycle=45%to55,V > (MAX) r f OD 250mV,allchannelsswitching 4 SubmitDocumentationFeedback

SN65LVDS047 www.ti.com SLLS416B–JUNE2000–REVISEDDECEMBER2003 PARAMETER MEASUREMENT INFORMATION DOUT+ RL/2 VCC DIN D VOC VOD GND S1 RL/2 Driver Enable DOUT– Figure1.DriverV andV TestCircuit OD OC CL DOUT+ Generator DIN D RL 50 W DOUT– Driver Enable CL Figure2.DriverPropagationDelayandTransitionTimeTestCircuit 3 V DIN 1.5 V 1.5 V 0 V tPLH tPHL DOUT– VOH 0 V (Differential) 0 V DOUT+ VOL 80% 80% V(DIFF) 20% 0 V 0 V 20% V(DIFF) = DOUT+ – DOUT– tr tf Figure3.DriverPropagationDelayandTransitionTimeWaveforms SubmitDocumentationFeedback 5

SN65LVDS047 www.ti.com SLLS416B–JUNE2000–REVISEDDECEMBER2003 PARAMETER MEASUREMENT INFORMATION (continued) CL DOUT+ 50 W VCC DIN D GND 50 W 1.2 V EN DOUT– Generator CL EN 50 W 1/4 65LVDS047 Figure4.Driver3-StateDelayTestCircuit 3 V 1.5 V 1.5 V EN When EN = GND or Open 0 V 3 V EN When EN = VCC 1.5 V 1.5 V 0 V tPHZ tPZH VOH DOUT+ When DIN = VCC 50% 50% DOUT– When DIN = GND 1.2 V 1.2 V DOUT+ When DIN = GND 50% 50% DOUT– When DIN = VCC VOL tPLZ tPZL Figure5.Driver3-StateDelayWaveform 6 SubmitDocumentationFeedback

SN65LVDS047 www.ti.com SLLS416B–JUNE2000–REVISEDDECEMBER2003 TYPICAL CHARACTERISTICS OUTPUTHIGHVOLTAGE OUTPUTLOWVOLTAGE vs vs POWERSUPPLYVOLTAGE POWERSUPPLYVOLTAGE 1.36 1.061 TLAo a=d 2 =5 °1C00 W TA = 25°C Load = 100 W V 1.35 − 1.056 ge − V olta 1.34 age h V Volt 1.051 g w Hi 1.33 o put put L 1.046 ut 1.32 ut O O − − L H O O V 1.041 V 1.31 1.30 1.036 3 3.3 3.6 3 3.3 3.6 VCC − Power Supply Voltage − V VCC − Power Supply Voltage − V Figure6. Figure7. OUTPUTSHORTCIRCUITCURRENT DIFFERENTIALOUTPUTVOLTAGE vs vs POWERSUPPLYVOLTAGE POWERSUPPLYVOLTAGE −3.30 350 TA = 25°C TA = 25°C nt − mA −3.25 VVIO = = V 0C VC or GND, e − mV 330 Load = 100 W e g r a Cur −3.20 Volt uit ut 310 c p Cir −3.15 Out ort al Sh nti 290 ut −3.10 ere utp Diff − OOS −3.05 − VOD 270 I −3.00 250 3 3.3 3.6 3 3.3 3.6 VCC − Power Supply Voltage − V VCC − Power Supply Voltage − V Figure8. Figure9. SubmitDocumentationFeedback 7

SN65LVDS047 www.ti.com SLLS416B–JUNE2000–REVISEDDECEMBER2003 TYPICAL CHARACTERISTICS (continued) COMMON-MODEOUTPUTVOLTAGE POWERSUPPLYCURRENT vs vs POWERSUPPLYVOLTAGE FREQUENCY 1.20 60 TA = 25°C TA = 25°C V Load = 100 W Load = 100 W age − 1.18 mA 50 (cid:13)(cid:9)(cid:11)(cid:12)(cid:0)(cid:8)(cid:0)(cid:8)(cid:0)(cid:4)(cid:0)(cid:5)(cid:0)(cid:13)(cid:7)(cid:0)(cid:0)(cid:16)(cid:15)(cid:14)(cid:10)(cid:0)(cid:2)(cid:6)(cid:0)(cid:13) Mode Output Volt 1.16 Supply Current − 3400 (cid:13)(cid:9)(cid:9)(cid:0)(cid:8)(cid:0)(cid:6)(cid:3)(cid:6)(cid:0)(cid:13) All Switching on- 1.14 er m w 20 m po Co − − OC 1.12 ICC 10 V 1.10 0 3 3.3 3.6 0.01 0.1 1 10 100 1000 VCC − Power Supply Voltage − V f − Frequency − MHz Figure10. Figure11. 8 SubmitDocumentationFeedback

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN65LVDS047D ACTIVE SOIC D 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVDS047 & no Sb/Br) SN65LVDS047DG4 ACTIVE SOIC D 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVDS047 & no Sb/Br) SN65LVDS047DR ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVDS047 & no Sb/Br) SN65LVDS047PW ACTIVE TSSOP PW 16 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVDS047 & no Sb/Br) SN65LVDS047PWG4 ACTIVE TSSOP PW 16 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVDS047 & no Sb/Br) SN65LVDS047PWR ACTIVE TSSOP PW 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVDS047 & no Sb/Br) SN65LVDS047PWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 LVDS047 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN65LVDS047DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 SN65LVDS047PWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN65LVDS047DR SOIC D 16 2500 350.0 350.0 43.0 SN65LVDS047PWR TSSOP PW 16 2000 350.0 350.0 43.0 PackMaterials-Page2

None

None

PACKAGE OUTLINE PW0016A TSSOP - 1.2 mm max height SCALE 2.500 SMALL OUTLINE PACKAGE SEATING PLANE C 6.6 TYP 6.2 A 0.1 C PIN 1 INDEX AREA 14X 0.65 16 1 2X 5.1 4.55 4.9 NOTE 3 8 9 0.30 B 4.5 16X 0.19 1.2 MAX 4.3 0.1 C A B NOTE 4 (0.15) TYP SEE DETAIL A 0.25 GAGE PLANE 0.15 0.05 0.75 0.50 0 -8 DETA 20AIL A TYPICAL 4220204/A 02/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153. www.ti.com

EXAMPLE BOARD LAYOUT PW0016A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 16X (1.5) SYMM (R0.05) TYP 1 16X (0.45) 16 SYMM 14X (0.65) 8 9 (5.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 10X SOLDER MASK METAL UNDER SOLDER MASK OPENING METAL SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDE15.000R MASK DETAILS 4220204/A 02/2017 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN PW0016A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 16X (1.5) SYMM (R0.05) TYP 1 16X (0.45) 16 SYMM 14X (0.65) 8 9 (5.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 10X 4220204/A 02/2017 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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