Product Order Technical Tools & Support & Folder Now Documents Software Community SN65HVD82 SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 SN65HVD82 Robust RS-485 Transceiver 1 Features 3 Description • BusI/OProtection This device has robust drivers and receivers for 1 demanding industrial applications. The bus pins are – ±16-kVHBMProtection robust to ESD events, with high levels of protection to – ±12-kVIEC61000-4-2ContactDischarge Human-Body Model, Air-Gap Discharge, and Contact – +4-kVIEC61000-4-4FastTransientBurst Dischargespecifications. • IndustrialTemperatureRange–40°Cto85°C The device combines a differential driver and a • LargeReceiverHysteresis(60mVTypical)for differential receiver, which operate from a single 5-V power supply. The driver differential outputs and the NoiseRejection receiver differential inputs are connected internally to • Low-PowerConsumption form a bus port suitable for half-duplex (two-wire bus) – <1-µAStandbyCurrent communication. The device features a wide common- – <1-mAQuiescentCurrent mode voltage range making the device suitable for multi-point applications over long cable runs. The • SignalingRateOptimizedfor250kbps deviceischaracterizedfrom–40°Cto85°C. • CreateaCustomDesignUsingtheSN65HVD82 WiththeWEBENCH®PowerDesigner DeviceInformation(1) PARTNUMBER PACKAGE BODYSIZE(NOM) 2 Applications SN65HVD82 SOIC(8) 4.90mm×3.91mm • ElectricalMeters (1) For all available packages, see the orderable addendum at • BuildingAutomation theendofthedatasheet. • IndustrialNetworks • SecurityElectronics LogicDiagram(PositiveLogic) 1 R 6 A 2 RE 7 3 B DE 4 D 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

SN65HVD82 SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 www.ti.com Table of Contents 1 Features.................................................................. 1 8.3 FeatureDescription.................................................10 2 Applications........................................................... 1 8.4 DeviceFunctionalModes........................................11 3 Description............................................................. 1 9 ApplicationandImplementation........................ 13 4 RevisionHistory..................................................... 2 9.1 ApplicationInformation............................................13 9.2 TypicalApplication .................................................19 5 PinConfigurationandFunctions......................... 3 10 PowerSupplyRecommendations..................... 21 6 Specifications......................................................... 3 11 Layout................................................................... 21 6.1 AbsoluteMaximumRatings......................................3 6.2 ESDRatings..............................................................3 11.1 LayoutGuidelines.................................................21 6.3 RecommendedOperatingConditions.......................4 11.2 LayoutExample....................................................22 6.4 ThermalInformation..................................................4 12 DeviceandDocumentationSupport................. 23 6.5 ElectricalCharacteristics...........................................5 12.1 DeviceSupport......................................................23 6.6 SwitchingCharacteristics..........................................6 12.2 CommunityResources..........................................23 6.7 TypicalCharacteristics..............................................6 12.3 Trademarks...........................................................23 7 ParameterMeasurementInformation..................7 12.4 ElectrostaticDischargeCaution............................23 12.5 Glossary................................................................23 8 DetailedDescription............................................ 10 13 Mechanical,Packaging,andOrderable 8.1 Overview.................................................................10 Information........................................................... 24 8.2 FunctionalBlockDiagram.......................................10 4 Revision History ChangesfromRevisionA(July2015)toRevisionB Page • AddedWEBENCHlinkstodatasheet................................................................................................................................... 1 • Changedpin6From:BTo:Aandpin7From:ATo:BinFigure19.................................................................................. 15 ChangesfromOriginal(October2012)toRevisionA Page • AddedPinConfigurationandFunctionssection,ESDRatingstable,FeatureDescriptionsection,DeviceFunctional Modes,ApplicationandImplementationsection,PowerSupplyRecommendationssection,Layoutsection,Device andDocumentationSupportsection,andMechanical,Packaging,andOrderableInformationsection .............................. 1 2 SubmitDocumentationFeedback Copyright©2012–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD82

SN65HVD82 www.ti.com SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 5 Pin Configuration and Functions DPackage 16-PinSOIC (TopView) R 1 8 V CC RE 2 7 B DE 3 6 A D 4 5 GND PinFunctions PIN TYPE DESCRIPTION NAME NO. Bus A 6 Driveroutputorreceiverinput(complementarytoB) input/output Bus B 7 Driveroutputorreceiverinput(complementarytoA) input/output D 4 Digitalinput Driverdatainput DE 3 Digitalinput Driverenable,activehigh Reference GND 5 Localdeviceground potential R 1 Digitaloutput Receivedataoutput RE 2 Digitalinput Receiverenable,activelow V 8 Supply 4.5-Vto5.5-Vsupply CC 6 Specifications 6.1 Absolute Maximum Ratings(1) MIN MAX UNIT V Supplyvoltage –0.5 7 V CC VoltagerangeatAorBInputs –18 18 V Inputvoltagerangeatanylogicpin –0.3 5.7 V Voltageinputrange,transientpulse,AandB,through100Ω –100 100 V Receiveroutputcurrent –24 24 mA T Junctiontemperature 170 °C J Continuoustotalpowerdissipation SeeThermalInformation T Storagetemperature –65 150 °C STG (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. 6.2 ESD Ratings VALUE UNIT Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±4000 Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±1500 Electrostatic Machinemodel(MM),JEDECStandard22 ±400 V V (ESD) discharge IEC61000-4-2ESD(ContactDischarge) BusterminalsandGND ±12000 IEC60749-26ESD(HumanBodyModel) BusterminalsandGND ±16000 IEC61000-4-4EMC(FastTransientBurstImmunity) BusterminalsandGND ±4000 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. Copyright©2012–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN65HVD82

SN65HVD82 SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 www.ti.com 6.3 Recommended Operating Conditions MIN NOM MAX UNIT V Supplyvoltage 4.5 5 5.5 V CC V Inputvoltageatanybusterminal(separatelyorcommonmode)(1) –7 12 V I V High-levelinputvoltage(D,DEandREinputs) 2 V V IH CC V Low-levelinputvoltage(D,DEandREinputs) 0 0.8 V IL V Differentialinputvoltage(AandBinputs) –12 12 V ID Outputcurrent,Driver –60 60 mA I O Outputcurrent,Receiver –8 8 mA R Differentialloadresistance 54 60 Ω L C Differentialloadcapacitance 50 pF L 1/t Signalingrate 250 kbps UI Operatingfree-airtemperature(seeApplicationandImplementationsectionforthermal T –40 85 °C A information) T JunctionTemperature –40 150 °C J (1) Thealgebraicconvention,inwhichtheleastpositive(mostnegative)limitisdesignatedasminimumisusedinthisdatasheet. 6.4 Thermal Information SN65HVD82 THERMALMETRIC(1) D(SOIC) UNIT 8PINS R Junction-to-ambientthermalresistance 116.1 °C/W θJA R Junction-to-case(top)thermalresistance 60.8 °C/W θJC(top) R Junction-to-boardthermalresistance 57.1 °C/W θJB ψ Junction-to-topcharacterizationparameter 13.9 °C/W JT ψ Junction-to-boardcharacterizationparameter 56.5 °C/W JB (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. 4 SubmitDocumentationFeedback Copyright©2012–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD82

SN65HVD82 www.ti.com SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 6.5 Electrical Characteristics overrecommendedoperatingconditions(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT SeeFigure5,RL=60Ω,375Ωoneachoutputto–7Vto12V 1.5 V Driverdifferentialoutputvoltage |VOD| magnitude RL=54Ω(RS-485) SeeFigure6 1.5 2 V RL=100Ω(RS-422) 2 2.5 V Changeinmagnitudeofdriver Δ|VOD| differentialoutputvoltage RL=54Ω,CL=50pF SeeFigure6 –0.2 0 0.2 V Steady-statecommon-modeoutput VOC(SS) voltage Centeroftwo27-Ωloadresistors SeeFigure6 1 VCC/2 3 V Changeindifferentialdriveroutput ΔVOC common-modevoltage –0.2 0 0.2 V Peak-to-peakdrivercommon-mode VOC(PP) outputvoltage 850 mV COD Differentialoutputcapacitance 8 pF VIT+ Pvoolstaitgivee-thgroeinsghorledceiverdifferentialinput See(1) –70 -20 mV VIT– Nvoelgtaagtieveth-greosinhgolrdeceiverdifferentialinput –200 –150 See(1) mV Receiverdifferentialinputvoltage VHYS thresholdhysteresis(VIT+–VIT–) 40 60 mV VOH Receiverhigh-leveloutputvoltage IOH=-8mA 4 VCC–0.3 V VOL Receiverlow-leveloutputvoltage IOL=8mA 0.2 0.4 V Driverinput,driverenable,andreceiver II enableinputcurrent –2 2 μA IOZ Receiveroutputhigh-impedancecurrent VO=0VorVCC,REatVCC –10 10 µA IOS Drivershort-circuitoutputcurrent |IOS|withVAorVBfrom–7Vto+12V 150 mA II Businputcurrent(disableddriver) VDCECa=t04.V5to5.5VorVCC=0V, VVII==–172VV –100 –4705 125 μA DriverandReceiverenabled DE=VCC,RE=GND, 900 Noload Driverenabled,receiverdisabled DE=VCC,RE=VCC, 650 Noload Supplycurrent(quiescent) μA ICC Driverdisabled,receiverenabled DE=GND,RE=GND, 650 Noload DE=GND,D=GND, Driverandreceiverdisabled 0.4 2 RE=VCC,Noload Supplycurrent(dynamic) SeeTypicalCharacteristics (1) Underanyspecificconditions,V isassuredtobeatleastV higherthanV . IT+ HYS IT- Copyright©2012–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN65HVD82

SN65HVD82 SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 www.ti.com 6.6 Switching Characteristics overrecommendedoperatingconditions(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT DRIVER t,t Driverdifferentialoutputrise/falltime 400 700 1200 ns r f t ,t Driverpropagationdelay R =54Ω,C =50pF,SeeFigure7 90 700 1000 ns PHL PLH L L t Driverpulseskew,|t –t | 25 200 ns SK(P) PHL PLH t ,t Driverdisabletime 50 500 ns PHZ PLZ Receiverenabled SeeFigure8andFigure9 500 1000 ns t ,t Driverenabletime PZH PZL Receiverdisabled 3 9 μs RECEIVER t,t Receiveroutputrise/falltime 18 30 ns r f t ,t Receiverpropagationdelaytime C =15pF,SeeFigure10 85 195 ns PHL PLH L t Receiverpulseskew,|t –t | 1 15 ns SK(P) PHL PLH t ,t Receiverdisabletime 50 500 ns PLZ PHZ t ,t Driverenabled,SeeFigure11 20 130 ns PZL(1) PZH(1) Receiverenabletime tPZL(2),tPZH(2) Driverdisabled,SeeFigure12 2 8 μs 6.7 Typical Characteristics 5 715 4.5 4 VOL ns) 705 e(V)3.5 me ( utVoltag2.53 ndFallTi 695 utp 2 ea 685 O s Driver 1.15 VOH Driver Ri 675 0.5 0 665 0 10 20 30 40 50 60 70 80 –40 –20 0 20 40 60 80 100 120 Driver OutputCurrent(mA) C003 Temperature(°C) C002 Figure1.DriverOutputVoltagevsDriverOutputCurrent Figure2.DriverRiseandFallTimevsTemperature 25 6 VIT+(VIC=12V) 5 VIT+(VIC=-7V) 20 A) (V) VIT+(VIC=0V) ent(m15 put[R]4 VVISTIT-e-((VrVIiCeIC=s=16-27VV)) Curr Out3 VIT-(VIC=0V) pply10 eiver2 u c S e R 5 1 0 0 0 50 100 150 200 250 300 –250 –230 –210 –190 –170 –150 –130 –110 SignalingRate(kbps) C001 DifferentialInputVoltage[VID](mV) C004 Figure3.SupplyCurrentvsSignalingRate Figure4.ReceiverOutputvsDifferentialInputVoltage 6 SubmitDocumentationFeedback Copyright©2012–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD82

SN65HVD82 www.ti.com SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 7 Parameter Measurement Information Inputgeneratorrateis100kbps,50%dutycycle,riseandfalltimeslessthan6nsec,outputimpedance50 Ω. V 375W±1% CC DE A D 0 V or 3 V VOD 60W±1% + B _ –7 V < V(test) < 12 V 375W±1% S0301-01 Figure5. MeasurementofDriverDifferentialOutputVoltageWithCommon-ModeLoad A VA RL/2 A 0 V or 3 V D VOD B VB B VOC(PP) DVOC(SS) RL/2 V OC C L V OC S0302-01 Figure6. MeasurementofDriverDifferentialandCommon-ModeOutputWithRS-485Load 50% 50% A | : B : | Copyright © 2016, Texas Instruments Incorporated Figure7. MeasurementofDriverDifferentialOutputRiseandFallTimesandPropagationDelays 3 V A 3 V D S1 VO VI 50% 50% B 0 V GeInnepruattor VI 50DWE CLCILnc=l u5d0e ps FFi±x2tu0r%e R±L1%= 110W tPZH 0.5 V 90%VOH and Instrumentation V Capacitance O 50% »0 V t PHZ S0304-01 Dat3Vtotestnon-invertingoutput,Dat0Vtotestinvertingoutput. Figure8. MeasurementofDriverEnableandDisableTimesWithActiveHighOutputandPull-DownLoad Copyright©2012–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN65HVD82

SN65HVD82 SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 www.ti.com Parameter Measurement Information (continued) 3 V RL= 110W »3 V ±1% D A S1 V VI 50% 50% 3 V O 0 V B t t DE PZL PLZ CL= 50 pF±20% »3 V Input Generator VI 50W aCnLd IInncslturudmese Fntixattuiorne VO 50% 10% Capacitance V OL S0305-01 Dat0Vtotestnon-invertingoutput,Dat3Vtotestinvertingoutput. Figure9. MeasurementofDriverEnableandDisableTimesWithActiveLowOutputandPull-upLoad 3 V A Input V 50W R VO VI 50% 50% 0 V Generator I 1.5 V B C = 15 pF±20% tPLH tPHL L V RE 90% 90% OH 0 V VO 50% 50% 10% 10% V C Includes Fixture OL L t t and Instrumentation r f Capacitance S0306-01 Figure10. MeasurementofReceiverOutputRiseandFallTimesandPropagationDelays 3 V V CC DE A 0 V or 3 V D R VO 1 kW±1% S1 B C = 15 pF±20% RE L C Includes Fixture L and Instrumentation GeInnepruattor VI 50W Capacitance 3 V VI 50% 50% 0 V tPZH(1) tPHZ V OH D at 3 V 90% S1 to GND VO 50% »0 V tPZL(1) tPLZ V CC D at 0 V VO 50% S1 to VCC 10% V OL S0307-01 Figure11. MeasurementofReceiverEnable/DisableTimesWithDriverEnabled 8 SubmitDocumentationFeedback Copyright©2012–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD82

SN65HVD82 www.ti.com SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 Parameter Measurement Information (continued) V CC A 0 V or 1.5 V R VO 1 kW±1% S1 B 1.5 V or 0 V RE CL= 15 pF±20% C Includes Fixture L and Instrumentation GeInnepruattor VI 50W Capacitance 3 V VI 50% 0 V t PZH(2) V OH Aat 1.5 V VO 50% B at 0 V S1 to GND GND t PZL(2) V CC Aat 0 V VO 50% B at 1.5 V S1 to V CC V OL S0308-01 Figure12. MeasurementofReceiverEnableTimesWithDriverDisabled Copyright©2012–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SN65HVD82

SN65HVD82 SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 www.ti.com 8 Detailed Description 8.1 Overview The SN65HVD82 device is a half-duplex RS-485 transceiver suitable for data transmission at rates up to 250 kbps over controlled-impedance transmission media (such as twisted-pair cabling). The device features a high level of internal transient protection, making it able to withstand up ESD strikes up to 12 kV (per IEC 61000-4-2) and EFT transients up to 4 kV (per IEC 61000-4-4) without incurring damage. Up to 256 units of SN65HVD82 may share a common RS-485 bus due to the device’s low bus input currents. The device also features a low standbycurrentconsumptionof400nA(typical). 8.2 Functional Block Diagram 1 R 6 RE 2 A 7 DE 3 B D 4 Figure13. LogicDiagram(PositiveLogic) 8.3 Feature Description 8.3.1 ReceiverFailsafe Thedifferentialreceiverisfailsafetoinvalidbusstatescausedby: • openbusconditionssuchasadisconnectedconnector • shortedbusconditionssuchascabledamageshortingthetwisted-pairtogether,or • idlebusconditionsthatoccurwhennodriveronthebusisactivelydriving In any of these cases, the differential receiver will output a failsafe logic High state so that the output of the receiverisnotindeterminate. Receiver failsafe is accomplished by offsetting the receiver thresholds so that the “input indeterminate” range does not include zero volts differential. In order to comply with the RS-422 and RS-485 standards, the receiver output must output a High when the differential input V is more positive than 200 mV, and must output a Low ID when the V is more negative than –200 mV. The receiver parameters which determine the failsafe ID performance are V and V and V . As seen in the Electrical Characteristics table, differential signals more IT+ IT– HYS negative than –200 mV will always cause a Low receiver output. Similarly, differential signals more positive than 200 mV will alwayscauseaHighreceiveroutput. When the differential input signal is close to zero, it will still be above the V threshold, and the receiver output IT+ will be High. Only when the differential input is more negative than V will the receiver output transition to a IT– Low state. So the noise immunity of the receiver inputs during a bus fault condition includes the receiver hysteresisvalueV (theseparationbetweenV andV )aswellasthevalueofV . HYS IT+ IT– IT+ Signals which transition from positive to negative (or from negative to positive) will transition only once, ensuring nospuriousbits. 8.3.2 Low-PowerStandbyMode When both the driver and receiver are disabled (DE transitions to a low state and RE transitions to a high state) the device enters standby mode. If the enable inputs are in this state for a brief time (e.g. less than 100 ns), the device does not enter standby mode. This prevents inadvertently entering standby mode during driver/receiver enabling. Only when the enable inputs are held in this state a sufficient duration (e.g. for 300 ns or more), the device is assured to be in standby mode. In this low-power standby mode, most internal circuitry is powered down, and the steady-state supply current is typically less than 400 nA. When either the driver or the receiver is re-enabled,theinternalcircuitrybecomesactive. 10 SubmitDocumentationFeedback Copyright©2012–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD82

SN65HVD82 www.ti.com SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 8.4 Device Functional Modes Table1.DriverFunctionTable INPUT ENABLE OUTPUTS D DE A B H H H L ActivelydrivebusHigh L H L H ActivelydrivebusLow X L Z Z Driverdisabled X OPEN Z Z Driverdisabledbydefault OPEN H H L ActivelydrivebusHighbydefault Table2.ReceiverFunctionTable DIFFERENTIALINPUT ENABLE OUTPUT V =V –V RE R ID A B V <V L H ReceivevalidbusHigh IT+ ID V <V <V L ? Indeterminatebusstate IT– ID IT+ V <V L L ReceivevalidbusLow ID IT– X H Z Receiverdisabled X OPEN Z Receiverdisabledbydefault Open-circuitbus L H Fail-safehighoutput Short-circuitbus L H Fail-safehighoutput Idle(terminated)bus L H Fail-safehighoutput Copyright©2012–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:SN65HVD82

SN65HVD82 SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 www.ti.com D and REInputs DE Input VCC VCC 100 kW 1 kW 1 kW Input Input 9 V 100 kW 9 V AInput B Input VCC VCC 16 V 16 V R1 R1 R3 R3 Input Input R2 R2 16 V 16 V Aand B Outputs R Output VCC VCC 16 V 5W Output Output 9 V 16 V Figure14. EquivalentInputandOutputSchematicDiagrams 12 SubmitDocumentationFeedback Copyright©2012–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD82

SN65HVD82 www.ti.com SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information 9.1.1 DeviceConfiguration The SN65HVD82 is a half-duplex, 250-kbps, RS-485 transceiver operating from a single 5-V supply. The driver andreceiverenablepinsallowfortheconfigurationofdifferentoperatingmodes. R R R R R R RE A RE A RE A DE B DE B DE B D D D D D D a) Independent driver and b) Combined enable signals for c) Receiver always on receiver enable signals use as directional control pin Copyright © 2016, Texas Instruments Incorporated Figure15. SN65HVD82TransceiverConfigurations Usingindependentenablelinesprovidesthemostflexiblecontrolasitallowsforthedriverandthereceivertobe turned on and off individually. While this configuration requires two control lines, it allows for selective listening intothebustraffic,whetherthedriveristransmittingdataornot. Combiningtheenablesignalssimplifiestheinterfacetothecontrollerbyformingasingle,direction-controlsignal. Thus, when the direction-control line is high, the transceiver is configured as a driver, while for a low the device operatesasareceiver. Tying the receiver-enable to ground and controlling only the driver-enable input, also uses one control line only. Inthisconfigurationanodenotonlyreceivesthedatafromthebus,butalsothedataitsendsandthuscanverify thatthecorrectdatahavebeentransmitted. 9.1.2 Bus– Design An RS-485 bus consists of multiple transceivers connecting in parallel to a bus cable. To eliminate line reflections, each cable end is terminated with a termination resistor, R , whose value matches the characteristic T impedance, Z , of the cable. This method, known as parallel termination, allows for higher data rates over longer 0 cablelength. Copyright©2012–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:SN65HVD82

SN65HVD82 SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 www.ti.com Application Information (continued) R R R R A A RE RE B RT RT B DE DE D D D D A B A B R R D D R RE DE D R RE DE D Copyright © 2016, Texas Instruments Incorporated Figure16. TypicalRS-485NetworkwithSN65HVD82Transceivers Common cables used are unshielded twisted pair (UTP), such as low-cost CAT-5 cable with Z = 100 Ω, and 0 properRS-485cablewithZ =120Ω. 0 Line measurements have shown that making R by up to 10% larger than Z improves signal quality. Typical T 0 cablesizesareAWG22andAWG24. The theoretical maximum bus length is assumed with 4000 ft or 1200 m, and represents the length of an AWG 24 cable whose cable resistance approaches the value of the termination resistance, thus reducing the bus signalbyhalfor6dB. The theoretical maximum number of bus nodes is determined by the ratio of the RS-485 specified maximum of 32 unit loads (UL) and the actual unit load of the applied transceiver. For example, the SN65HVD82 is a 1/8 UL transceiver.Dividing32ULby1/8ULyields256transceiversthatcanbeconnectedtoonebus. 9.1.3 Cable-LengthVersusDataRate There is an inverse relationship between data rate and cable length. That is, the higher the data rate the shorter the cable and conversely the lower the data rate the longer the cable. While most RS-485 systems utilize data rates between 10 kbps and 100 kbps, applications such as e-metering often operate at rates of up to 250 kbps evenatdistancesof4000feetandabove.Thisispossiblebyallowingforsmallsignaljitterofupto5or10%. 10000 5,10,20%Jitter ft - H 1000 T G Conservative N E Characteristics L E L 100 B A C 10 100 1k 10k 100k 1M 10M 100M DATARATE-bps Figure17. CableLengthvsDataRateCharacteristic 14 SubmitDocumentationFeedback Copyright©2012–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD82

SN65HVD82 www.ti.com SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 Application Information (continued) 9.1.4 Stub–Length When connecting a node to the bus, the distance between the transceiver inputs and the cable trunk, known as the stub, should be as short as possible. The reason for this is that a stub presents a non-terminated piece of buslinewhichcanintroducereflectionsiftoolong.Asaruleofthumbtheelectricallengthorround-tripdelayofa stub should be less than one tenth of the driver’s rise time, thus leading to a maximum physical stub length of: L ≤0.1 × t ×v× c,witht asthedriver’s10/90risetime, casthespeedoflight(3 × 108m/sor9.8 ×108ft/s), Stub r r andvasthesignalvelocityofthecable(v=78%)ortrace(v=45%)asafactorof c. Thus,fortheSN65HVD82withaminimumrisetimeof400nsthemaximum cablestublengthyieldsL ≤0.1 × Stub 400×10-9×3108×0.78=9.4mor30.6ft. LS A B R D R RE DE D Figure18. StubLength 9.1.5 3-Vto5-VInterface Interfacing the SN65HVD82 to a 3-V controller is easy. Because the 5-V logic inputs of the transceiver accept 3- V input signals they can be directly connected to the controller I/O. The 5-V receiver output, R, however must be level-shifted via a Schottky diode and a 10-kV resistor to connect to the controller input. When R is high, the diode is reverse biased and the controller supply potential lies at the controller input. When R is low, the diode is forwardbiasedandconducts.Inthiscaseonlythediodeforwardvoltageof0.2Vliesatthecontrollerinput. 3.3V 10 k 5 V BAS70 RxD 1 R VCC 8 0.1µF RCV 2 RE B 7 MCU HVD82 DRV 3 DE A 6 TxD 4 D GND 5 Copyright © 2017,Texas Instruments Incorporated Figure19. 3V–5VInterface 9.1.6 NoiseImmunity The input sensitivity of a standard RS-485 transceiver is ±200 mV. When the differential input voltage, V , is ID greater than +200 mV, the receiver output turns high, for V ≤ 200 mV the receiver outputs low. Bus voltages in ID betweentheselevelscancausethereceiveroutputtogohigh,orlow,oreventogglebetweenlogicstates.Small bus voltages however occur every time during the bus access hand-off from one driver to the next as the low- impedance termination resistors reduce the bus voltage to zero. To prevent receiver output toggling during bus idling, and thus increasing noise immunity, external bias resistors must be applied to create a bus voltage that is greaterthantheinputsensitivityplusanyexpecteddifferentialnoise. Copyright©2012–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:SN65HVD82

SN65HVD82 SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 www.ti.com Application Information (continued) R VHYS-min 60mV VID-mV -80 -20 0 80 Vnoise-max=160mVpp Figure20. SN65HVD82NoiseImmunity The SN65HVD82 transceiver circumvents idle-bus and differential noise issues by providing a positive input threshold of –20 mV and a typical hysteresis of 60 mV. In the case of an idle-bus condition therefore, a differential noise voltage of up to 160 mV can be present without causing the receiver output to change states PP from high to low. This increased noise immunity eliminates the need for idle-bus failsafe bias resistors and allows forlonghauldatatransmissionsinnoisyenvironment. 9.1.7 TransientProtection The bus terminals of the SN65HVD82 transceiver family possess on-chip ESD protection against ±15 kV human body model (HBM) and ±12 kV IEC61000-4-2 contact discharge. As stated in the IEC 61000-4-2 standard, contact discharge is the preferred test method; although IEC air-gap testing is less repeatable than contact testing, air discharge protection levels are inferred from the contact discharge test results. The IEC-ESD test is far more severe than the HBM-ESD test. The 50% higher charge capacitance, CS, and 78% lower discharge resistance,RDoftheIEC-modelproducesignificantlyhigherdischargecurrentsthantheHBM-model. RC RD 40 50M 330(cid:13) 35 (1M) (1.5k) A 30 10kV IEC High-Voltage 150pF Device nt - 25 GePnuelsraetor CS (100pF) UTnedsetr urre 2105 C 10 5 10kV HBM 0 0 50 100 150 200 250 300 Time -ns Copyright © 2016, Texas Instruments Incorporated Figure21. HBMandIEC-ESDModelsandCurrentsinComparison EFTs are usually caused by relay contact bounce or the interruption of inductive loads, while surge transients often results from lightning strikes (direct strike or induced voltages and currents due to an indirect strike), or the switching of power systems including load changes and short circuits switching. These transients are often encounteredinindustrialenvironments,suchasfactoryautomationandpower-gridsystems. 16 SubmitDocumentationFeedback Copyright©2012–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD82

SN65HVD82 www.ti.com SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 Application Information (continued) Figure 22 compares the pulse-power of the EFT and surge transients with the power caused by an IEC-ESD transient. As can be seen the tiny blue blip in the bottom left corner of the left diagram represents the power of a 10-kV ESD transient, which already dwarfs against the significantly higher EFT power spike and certainly against the500-Vsurgetransient.Thistypeoftransientpoweriswellrepresentativeforfactoryenvironmentsinindustrial andprocessautomation.Therightdiagramcomparestheenormouspowerofa6-kVsurgetransient,whichmore likely occurs in e-metering applications of power generating and power grid systems, with the aforementioned 500-V surge transient. Note that the unit of the pulse-power changes from kW to MW, thus making the power of the500-Vsurgetransientalmostdroppingoffthescale. 3.0 2.8 2.6 6kV Surge 2.4 22 2.2 W 20 2.0 M 18 0.5kV Surge r - 1.8 W 16 we 1.6 Power - k 111420 4kV EFT Pulse Po 111...420 e 8 0.8 s ul 6 0.6 P 4 0.4 2 10kV ESD 0.2 0.5kV Surge 0 0 0 5 10 15 20 25 30 35 40 0 5 10 15 20 25 30 35 40 Time -μs Time -μs Figure22. PowerComparisonofESD,EFT,andSurgeTransients In the case of surge transients, their long pulse duration and slowly decreasing pulse power signifies high energy content. The electrical energy of a transient that is dumped onto the transceiver’s internal protections cells is converted into thermal energy, or heat that literally fries the protection cells, thus destroying the transceiver. Figure 23 showcases the large differences in transient energies for single ESD, EFT, and surge transients as well as for an EFTpulsetrain,commonlyappliedduringcompliancetesting. Copyright©2012–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:SN65HVD82

SN65HVD82 SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 www.ti.com Application Information (continued) 1000 100 Surge 10 1 e ul EFTPulseTrain o J y - 0.1 g r e En 0.01 e s ul EFT P 10-3 10-4 ESD 10-5 10-6 0.5 1 2 4 6 8 10 15 PeakPulseVoltage-kV Figure23. ComparisonofTransientEnergies Figure 24 suggests two circuit designs providing protection against surge transients. Table 3 presents the associatedbillofmaterial. Table3.BillofMaterials DEVICE FUNCTION ORDERNUMBER MANUFACTURER XCVR 3.3V,250kbpsRS-485Transceiver SN65HVD82D TI R1,R2 10Ω,Pulse-ProofThick-FilmResistor CRCW0603010RJNEAHP Vishay TVS Bidirectional400WTransientSuppressor CDSOT23-SM712 Bourns TBU1,TBU2 Bidirectional.200mATransientBlockingUnit TBU-CA-065-200-WH Bourns MOV1,MOV2 200V,Metal-OxideVaristor MOV-10D201K Bourns Vcc Vcc Vcc Vcc 10k 10k 0.1(cid:29)F R1 0.1(cid:29)F R1 TBU1 RxD 1 R Vcc 8 RxD 1 R Vcc 8 TVS TVS MOV1 MCU 2 RE B 7 MCU 2 RE B 7 XCVR XCVR DIR 3 DE A 6 DIR 3 DE A 6 TxD 4 D GND 5 TxD 4 D GND 5 MOV2 R2 R2 TBU2 10k 10k Copyright © 2016, Texas Instruments Incorporated Figure24. TransientProtectionAgainstESD,EFT,andSurgeTransients Both circuits are designed for 10-kV ESD and 4-kV EFT transient protection. The left however provides surge protectionof≥ 500-Vtransientsonly,whiletherightprotectioncircuitscanwithstand5-kVsurgetransients. 18 SubmitDocumentationFeedback Copyright©2012–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD82

SN65HVD82 www.ti.com SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 9.2 Typical Application 0.1μF 2 1:2.2 MBR0520L Vcc D2 3 1 IN OUT 5 5VISO TPS76350 SN6501 10μF 0.1μF 10μF 3 2 EN GND 1 GND D1 10μF MBR0520L 4,5 L1 ISO-BARRIER 3.3V N PSU 0.1μF 0.1μF PE 0.1μF 1 16 0.1μF 4.7k 4.7k PE Vcc1 Vcc2 2 7 10 EN1 ISO7241 EN2 8 5 DVcc UCA0RXD 16 6 OUTD IND 11 1 R Vcc 7 R1 XOUT 11 3 14 2 B MSP430 P3.0 INA OUTA RE SN65 6 XIN F2132 P3.1 12 4 INB OUTB 13 3 DEHVD82 6 R2 A 15 5 12 4 DVss UCA0TXD INC OUTC D GND2 4 GND1 GND2 5 TVS 2,8 9,15 RHV CHV Short thick Earth wire or Chassis PE island Protective Earth Ground, R1,R2,TVS: seeTable1 Equipment Safety Ground RHV =1MΩ,2kV high-voltageresistor,TTelectronics,HVC2010 1M0GT3 Floating RS-485Common CHV =4.7nF,2kV high-voltagecapacitor,NOVACAP,1812B472K202NT Figure25. IsolatedBusNodeWithTransientProtection 9.2.1 DesignRequirements ThefollowinglistoutlinessampledesignrequirementsforthetypicalapplicationexamplefoundinFigure25 • RS-485-compliant bus interface (needs differential signal amplitude of at least 1.5 V under fully-loaded conditions–essentially,maximumnumberofnodesconnectedandwithdual120-Ωtermination). • Galvanicisolationofbothsignalandpowersupplylines. • AbletowithstandESDtransientsupto10kV(perIEC61000-4-2)andEFTsupto4kV(perIEC61000-4-4). • Fullcontrolofdataflowonbusinordertopreventcontention(forhalf-duplexcommunication). 9.2.2 DetailedDesignProcedure 9.2.2.1 CustomDesignWithWEBENCH® Tools ClickheretocreateacustomdesignusingtheSN65HVD82devicewiththeWEBENCH® PowerDesigner. 1. Startbyenteringtheinputvoltage(V ),outputvoltage(V ),andoutputcurrent(I )requirements. IN OUT OUT 2. Optimizethedesignforkeyparameterssuchasefficiency,footprint,andcostusingtheoptimizerdial. 3. ComparethegenerateddesignwithotherpossiblesolutionsfromTexasInstruments. The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricingandcomponentavailability. Inmostcases,theseactionsareavailable: • Runelectricalsimulationstoseeimportantwaveformsandcircuitperformance • Runthermalsimulationstounderstandboardthermalperformance Copyright©2012–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:SN65HVD82

SN65HVD82 SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 www.ti.com Typical Application (continued) • ExportcustomizedschematicandlayoutintopopularCADformats • PrintPDFreportsforthedesign,andsharethedesignwithcolleagues GetmoreinformationaboutWEBENCHtoolsatwww.ti.com/WEBENCH. 9.2.2.2 IsolatedBusNodeDesign Many RS-485 networks use isolated bus nodes to prevent the creation of unintended ground loops and their disruptive impact on signal integrity. An isolated bus node typically includes a micro controller that connects to thebustransceiverviaamulti-channel,digitalisolator(Figure25). Powerisolationisaccomplishedusingthepush-pulltransformerdriverSN6501andalow-costLDO,TPS76350 Signal isolation utilizes the quadruple digital isolator ISO7241. Notice that both enable inputs, EN1 and EN2, are pulled-upvia4.7-kΩresistorstolimittheirinputcurrentsduringtransientevents. WhilethetransientprotectionissimilartotheoneinFigure24(leftcircuit),anadditionalhigh-voltagecapacitoris used to divert transient energy from the floating RS-485 common further towards Protective Earth (PE) ground. ThisisnecessaryasnoisetransientsonthebusareusuallyreferredtoEarthpotential. R refers to a high-voltage resistor, and in some applications even a varistor. This resistance is applied to VH preventchargingofthefloatinggroundtodangerouspotentialsduringnormaloperation. Occasionally varistors are used instead of resistors in order to rapidly discharge C , if it is expected that fast HV transientsmightchargeC tohigh-potentials. HV Note that the PE island represents a copper island on the PCB for the provision of a short, thick Earth wire connectingthisislandtoPEgroundattheentranceofthepowersupplyunit(PSU). In equipment designs using a chassis, the PE connection is usually provided through the chassis itself. Typically the PE conductor is tied to the chassis at one end while the high-voltage components, C and R , are HV HV connectingtothechassisattheotherend. 9.2.3 ApplicationCurve Figure26. SN65GVD82DInput(Top),DifferentialOutput(Middle),andROutput(Bottom),250kbps Operation,PRBSDataPattern 20 SubmitDocumentationFeedback Copyright©2012–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD82

SN65HVD82 www.ti.com SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 10 Power Supply Recommendations To ensure reliable operation at all data rates and supply voltages, each supply should be decoupled with a 100- nF ceramic capacitor located as close to the supply pins as possible. This helps to reduce supply voltage ripple present on the outputs of switched-mode power supplies and also helps to compensate for the resistance and inductanceofthePCBpowerplanes. 11 Layout 11.1 Layout Guidelines 11.1.1 DesignandLayoutConsiderationsForTransientProtection On-chipIEC-ESDprotectionisgoodforlaboratoryandportableequipmentbutneversufficientforEFTandsurge transients occurring in industrial environments. Therefore robust and reliable bus node design requires the use of externaltransientprotectiondevices. Because ESD and EFT transients have a wide frequency bandwidth from approximately 3 MHz to 3 GHz, high- frequencylayouttechniquesmustbeappliedduringPCBdesign. InorderforyourPCBdesigntobesuccessfulstartwiththedesignoftheprotectioncircuitinmind. 1. Place the protection circuitry close to the bus connector to prevent noise transients from penetrating your board. 2. Use Vcc and ground planes to provide low-inductance. Note that high-frequency currents follow the path of leastinductanceandnotthepathofleastimpedance. 3. Design the protection components into the direction of the signal path. Do not force the transients currents to divertfromthesignalpathtoreachtheprotectiondevice. 4. Apply 100-nF to 220-nF bypass capacitors as close as possible to the Vcc-pins of transceiver, UART, controllerICsontheboard. 5. Use at least two vias for Vcc and ground connections of bypass capacitors and protection devices to minimizeeffectivevia-inductance. 6. Use 1-kΩ to 10-kΩ pullup or pulldown resistors for enable lines to limit noise currents in theses lines during transientevents. 7. Insertpulse-proofresistorsintotheAandBbuslinesiftheTVSclampingvoltageishigherthanthespecified maximumvoltageofthetransceiverbusterminals.Theseresistorslimittheresidualclampingcurrentintothe transceiverandpreventitfromlatchingup. 8. While pure TVS protection is sufficient for surge transients up to 1kV, higher transients require metal-oxide varistors (MOVs) which reduce the transients to a few hundred volts of clamping voltage, and transient blockingunits(TBUs)thatlimittransientcurrenttosome200mA. Copyright©2012–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:SN65HVD82

SN65HVD82 SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 www.ti.com 11.2 Layout Example 5 Via to ground R C 4 Via to VCC 6 R 1 R MCU 7 R MP J R 5 TVS 6 R SN65HVD82 5 Figure27. SN65HVD82LayoutExample 22 SubmitDocumentationFeedback Copyright©2012–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD82

SN65HVD82 www.ti.com SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 12 Device and Documentation Support 12.1 Device Support 12.1.1 Third-PartyProductsDisclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONEORINCOMBINATIONWITHANYTIPRODUCTORSERVICE. 12.1.2 CustomDesignWithWEBENCH® Tools ClickheretocreateacustomdesignusingtheSN65HVD82devicewiththeWEBENCH® PowerDesigner. 1. Startbyenteringtheinputvoltage(V ),outputvoltage(V ),andoutputcurrent(I )requirements. IN OUT OUT 2. Optimizethedesignforkeyparameterssuchasefficiency,footprint,andcostusingtheoptimizerdial. 3. ComparethegenerateddesignwithotherpossiblesolutionsfromTexasInstruments. The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricingandcomponentavailability. Inmostcases,theseactionsareavailable: • Runelectricalsimulationstoseeimportantwaveformsandcircuitperformance • Runthermalsimulationstounderstandboardthermalperformance • ExportcustomizedschematicandlayoutintopopularCADformats • PrintPDFreportsforthedesign,andsharethedesignwithcolleagues GetmoreinformationaboutWEBENCHtoolsatwww.ti.com/WEBENCH. 12.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.3 Trademarks E2EisatrademarkofTexasInstruments. WEBENCHisaregisteredtrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.4 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. Copyright©2012–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:SN65HVD82

SN65HVD82 SLLSED6B–OCTOBER2012–REVISEDNOVEMBER2017 www.ti.com 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 24 SubmitDocumentationFeedback Copyright©2012–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD82

PACKAGE OPTION ADDENDUM www.ti.com 23-Oct-2017 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN65HVD82D ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HVD82 & no Sb/Br) SN65HVD82DR ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 HVD82 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 23-Oct-2017 Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-Oct-2017 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN65HVD82DR SOIC D 8 2500 330.0 12.5 6.4 5.2 2.1 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 23-Oct-2017 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN65HVD82DR SOIC D 8 2500 340.5 338.1 20.6 PackMaterials-Page2

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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