Product Order Technical Tools & Support & Reference Folder Now Documents Software Community Design SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E SLLS562J–AUGUST2009–REVISEDOCTOBER2017 SNx5HVD308xE Low-Power RS-485 Transceivers, Available in a Small MSOP-8 Package 1 Features These devices are designed to operate with very low supply current, typically 0.3 mA, exclusive of the load. • AvailableinaSmallMSOP-8Package 1 When in the inactive-shutdown mode, the supply • MeetsorExceedstheRequirementsofthe current drops to a few nanoamps, which makes these TIA/EIA-485AStandard devicesidealforpower-sensitiveapplications. • LowQuiescentPower The wide common-mode range and high ESD- – 0.3-mAActiveMode protection levels of these devices makes them suitable for demanding applications such as energy – 1-nAShutdownMode meter networks, electrical inverters, status and • 1/8UnitLoadupto256NodesonaBus command signals across telecom racks, cabled • Bus-PinESDProtectionupto15kV chassis interconnects, and industrial automation • Industry-StandardSN75176Footprint networks where noise tolerance is essential. These devices match the industry-standard footprint of the • FailsafeReceiver(BusOpen,BusShorted, SN75176 device. Power-on-reset circuits keep the BusIdle) outputs in a high-impedance state until the supply • Glitch-FreePower-UpandPower-DownBus voltage has stabilized. A thermal-shutdown function InputsandOutputs protects the device from damage due to system fault conditions. The SN75HVD3082E is characterized for 2 Applications operation from 0°C to 70°C and SN65HVD308xE are characterized for operation from –40°C to 85°C air • EnergyMeterNetworks temperature. The D package version of the • MotorControl SN65HVD3082E has been characterized for • PowerInverters operationfrom–40°Cto105°C. • IndustrialAutomation DeviceInformation(1) • BuildingAutomationNetworks PARTNUMBER PACKAGE BODYSIZE(NOM) • Battery-PoweredApplications SOIC(8) 4.90mm×3.91mm • TelecommunicationsEquipment SN65HVD3082E VSSOP(8) 3.00mm×3.00mm SN65HVD3088E PDIP(8) 9.81mm×6.35mm 3 Description SN75HVD3082E SOIC(8) 4.90mm×3.91mm The SNx5HVD308xE devices are half-duplex SN65HVD3085E VSSOP(8) 3.00mm×3.00mm transceivers designed for RS-485 data bus networks. Powered by a 5-V supply, they are fully compliant (1) For all available packages, see the orderable addendum at withTIA/EIA-485Astandard.Withcontrolledtransition theendofthedatasheet. times, these devices are suitable for transmitting data over long twisted-pair cables. SN65HVD3082E and SN75HVD3082E devices are optimized for signaling rates up to 200 kbps. The SN65HVD3085E device is suitable for data transmission up to 1 Mbps, whereas the SN65HVD3088E device is suitable for applications that require signaling rates up to 20Mbps. SimplifiedSchematic R R R R A A RE RE B RT RT B DE DE D D D D A B A B R R D D R RE DE D R RE DE D 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E SLLS562J–AUGUST2009–REVISEDOCTOBER2017 www.ti.com Table of Contents 1 Features.................................................................. 1 8.3 FeatureDescription.................................................14 2 Applications........................................................... 1 8.4 DeviceFunctionalModes........................................14 3 Description............................................................. 1 9 ApplicationandImplementation........................ 16 4 RevisionHistory..................................................... 2 9.1 ApplicationInformation............................................16 9.2 TypicalApplication .................................................16 5 PinConfigurationandFunctions......................... 3 10 PowerSupplyRecommendations..................... 20 6 Specifications......................................................... 3 11 Layout................................................................... 20 6.1 AbsoluteMaximumRatings......................................3 6.2 ESDRatings..............................................................3 11.1 LayoutGuidelines.................................................20 6.3 RecommendedOperatingConditions.......................4 11.2 LayoutExample....................................................20 6.4 ThermalInformation .................................................4 11.3 ThermalConsiderationsforICPackages.............21 6.5 ElectricalCharacteristics:Driver...............................5 12 DeviceandDocumentationSupport................. 22 6.6 ElectricalCharacteristics:Receiver .........................5 12.1 DeviceSupport......................................................22 6.7 PowerCharacteristics...............................................6 12.2 RelatedLinks........................................................22 6.8 SwitchingCharacteristics:Driver..............................6 12.3 ReceivingNotificationofDocumentationUpdates22 6.9 SwitchingCharacteristics:Receiver..........................7 12.4 CommunityResources..........................................22 6.10 TypicalCharacteristics............................................8 12.5 Trademarks...........................................................22 7 ParameterMeasurementInformation................10 12.6 ElectrostaticDischargeCaution............................22 12.7 Glossary................................................................22 8 DetailedDescription............................................ 14 13 Mechanical,Packaging,andOrderable 8.1 Overview.................................................................14 Information........................................................... 23 8.2 FunctionalBlockDiagram.......................................14 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionI(September2016)toRevisionJ Page • Changed3.3Vto5VontheV pininFigure25............................................................................................................... 18 CC ChangesfromRevisionH(August2015)toRevisionI Page • AddedtexttotheDescription,"TheDpackageversionoftheSN65HVD3082Ehasbeencharacterizedforoperation from-40°Cto105°C."............................................................................................................................................................. 1 • ChangedtheOperatingfree-airtemperatureforSN65HVD3082E(Dpackage)From:MAX=85°CTo:105°Cin RecommendedOperatingConditions ................................................................................................................................... 4 ChangesfromRevisionG(May2009)toRevisionH Page • AddedPinConfigurationandFunctionssection,ESDRatingstable,FeatureDescriptionsection,DeviceFunctional Modes,ApplicationandImplementationsection,PowerSupplyRecommendationssection,Layoutsection,Device andDocumentationSupportsection,andMechanical,Packaging,andOrderableInformationsection .............................. 1 • DeletedDissipationRatingstable.......................................................................................................................................... 1 • AddedstoragetemperatureT toAbsoluteMaximumRatingstable................................................................................... 3 stg • DeletedPackageThermalInformationtable ......................................................................................................................... 6 ChangesfromRevisionF(March2009)toRevisionG Page • AddedGraph-DriverRiseandFallTimevsTemperature.................................................................................................... 8 • AddedIDLEBustotheFunctionTable................................................................................................................................ 14 • AddedReceiverFailsafesection.......................................................................................................................................... 18 2 SubmitDocumentationFeedback Copyright©2009–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E www.ti.com SLLS562J–AUGUST2009–REVISEDOCTOBER2017 5 Pin Configuration and Functions D,P,andDGKPackages 8-PinSOIC,VSSOP,andPDIP TopView R 1 8 VCC RE 2 7 B DE 3 6 A D 4 5 GND PinFunctions PIN TYPE DESCRIPTION NAME NO. A 6 Businput/output Driveroutputorreceiverinput(complementarytoB) B 7 Businput/output Driveroutputorreceiverinput(complementarytoA) D 4 Digitalinput Driverdatainput DE 3 Digitalinput Driverenable,activehigh GND 5 Referencepotential Localdeviceground R 1 Digitaloutput Receivedataoutput RE 2 Digitalinput Receiverenable,activelow V 8 Supply 4.5-Vto5.5-Vsupply CC 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerangeunlessotherwisenoted(1) (2) MIN MAX UNIT Supplyvoltage,V –0.5 7 V CC VoltageatAorB –9 14 V Voltageatanylogicpin –0.3 V +0.3 V CC Receiveroutputcurrent –24 24 mA Voltageinput,transientpulse,AandB,through100Ω(seeFigure20) –50 50 V JunctionTemperature,T 170 °C J Storagetemperature,T 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperating Conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Allvoltagevalues,exceptdifferentialI/Obusvoltages,arewithrespecttonetworkgroundterminal. 6.2 ESD Ratings VALUE UNIT Humanbodymodel(HBM),perANSI/ESDA/JEDECJS- BuspinsandGND ±15000 Electrostatic 001(1) Allpins ±4000 V V (ESD) discharge Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±1000 ElectricalFastTransient/Burst,A,B,andGND(3) ±4000 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. (3) TestedinaccordancewithIEC61000-4-4. Copyright©2009–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E SLLS562J–AUGUST2009–REVISEDOCTOBER2017 www.ti.com 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerangeunlessotherwisenoted(1) MIN NOM MAX UNIT Supplyvoltage,V 4.5 5.5 CC V Voltageatanybusterminal(separatelyorcommonmode),V –7 12 I High-levelinputvoltage(D,DE,orREinputs),V 2 V V IH CC Low-levelinputvoltage(D,DE,orREinputs),V 0 0.8 V IL Differentialinputvoltage,V –12 12 V ID Driver –60 60 Outputcurrent,I mA O Receiver –8 8 Differentialloadresistance,R 54 60 Ω L SN65HVD3082E,SN75HVD3082E 0.2 Signalingrate,1/t SN65HVD3085E 1 Mbps UI SN65HVD3088E 20 SN65HVD3082E(Dpackage) –40 105 SN65HVD3082E(DGKandPpackages), Operatingfree-airtemperature,T –40 85 °C A SN65HVD3085E,SN65HVD3088E SN75HVD3082E 0 70 Junctiontemperature,T –40 130 °C J (1) Thealgebraicconvention,inwhichtheleastpositive(mostnegative)limitisdesignatedasminimumisusedinthisdatasheet. 6.4 Thermal Information SN65HVD3082E,SN75HVD3082E, SN65HVD3082E, SN65HVD3085E,SN65HVD3088E SN65HVD3088E THERMALMETRIC(1) UNIT D(SOIC) DGK(VSSOP) P(PDIP) 8PINS 8PINS 8PINS R Junction-to-ambientthermalresistance 130 180 70 °C/W θJA R Junction-to-case(top)thermalresistance 80 66 80 °C/W θJC(top) R Junction-to-boardthermalresistance 55 110 40 °C/W θJB ψ Junction-to-topcharacterizationparameter 7.9 4.6 17.6 °C/W JT ψ Junction-to-boardcharacterizationparameter 47 73.1 28.3 °C/W JB (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. 4 SubmitDocumentationFeedback Copyright©2009–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E www.ti.com SLLS562J–AUGUST2009–REVISEDOCTOBER2017 6.5 Electrical Characteristics: Driver overrecommendedoperatingconditionsunlessotherwisenoted PARAMETER TESTCONDITIONS MIN TYP(1) MAX UNIT I =0,NoLoad 3 4.3 O R =54Ω(seeFigure8) 1.5 2.3 L |V | Differentialoutputvoltage V OD R =100Ω 2 L V =–7Vto12V(seeFigure9) 1.5 TEST Changeinmagnitudeofdifferential Δ|V | SeeFigure8andFigure9 –0.2 0 0.2 V OD outputvoltage Steady-statecommon-modeoutput V 1 2.6 3 OC(SS) voltage SeeFigure10 V Changeinsteady-statecommon-mode ΔV –0.1 0 0.1 OC(SS) outputvoltage Peak-to-peakcommon-modeoutput V SeeFigure10 500 mV OC(PP) voltage SeereceiverinputcurrentsinElectrical I High-impedanceoutputcurrent OZ Characteristics:Receiver I Inputcurrent D,DE –100 100 µA I I Short-circuitoutputcurrent −7V≤V ≤12V(seeFigure14) –250 250 mA OS O (1) Alltypicalvaluesareat25°Candwitha5-Vsupply. 6.6 Electrical Characteristics: Receiver overrecommendedoperatingconditionsunlessotherwisenoted PARAMETER TESTCONDITIONS MIN TYP(1) MAX UNIT Positive-goingdifferentialinputthreshold V I =–8mA –85 –10 mV IT+ voltage O Negative-goingdifferentialinputthreshold V I =8mA –200 –115 mV IT– voltage O V Hysteresisvoltage(V –V ) 30 mV hys IT+ IT– V High-leveloutputvoltage V =200mV,I =–8mA(seeFigure15) 4 4.6 V OH ID OH V Low-leveloutputvoltage V =–200mV,I =8mA(seeFigure15) 0.15 0.4 V OL ID O I High-impedance-stateoutputcurrent V =0orV ,RE=V –1 1 μA OZ O CC CC V =12V,V =5V 0.04 0.1 IH CC V =12V,V =0V 0.06 0.125 IH CC I Businputcurrent mA I V =–7V,V =5V –0.1 –0.04 IH CC V =–7V,V =0V –0.05 –0.03 IH CC I High-levelinputcurrent,(RE) V =2V –60 –30 μA IH IH I Low-levelinputcurrent,(RE) V =0.8V –60 –30 μA IL IL C Differentialinputcapacitance V =0.4sin(4E6πt)+0.5V,DEat0V 7 pF diff I (1) Alltypicalvaluesareat25°Candwitha5-Vsupply. Copyright©2009–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E SLLS562J–AUGUST2009–REVISEDOCTOBER2017 www.ti.com 6.7 Power Characteristics overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP(1) MAX UNIT DatV oropen,DEatV , Driverandreceiverenabled CC CC 425 900 µA REat0V,Noload Driverenabled,receiver DatV oropen,DEatV , CC CC 330 600 µA disabled REatV ,Noload CC I CC Receiverenabled,driver DatV oropen,DEat0V, CC 300 600 µA disabled REat0V,Noload DatV oropen,DEat0V, Driverandreceiverdisabled CC 0.001 2 µA REatV CC InputtoDisa50%duty ALLHVD3082E 203 cyclesquarewaveatmax ALLHVD3085E 205 P Averagepowerdissipation specifiedsignalrate mW (AVG) R =54ΩV =5.5V,T = L CC J ALLHVD3088E 276 130°C (1) Alltypicalvaluesareat25°Candwitha5-Vsupply. 6.8 Switching Characteristics: Driver overrecommendedoperatingconditionsunlessotherwisenoted PARAMETER TESTCONDITIONS MIN TYP MAX UNIT HVD3082E 700 1300 t Propagationdelaytime,low-to-high-leveloutput R =54Ω,C =50pF PLH L L HVD3085E 150 500 ns t Propagationdelaytime,high-to-low-leveloutput (seeFigure11) PHL HVD3088E 12 20 HVD3082E 500 900 1500 t Differentialoutputsignalrisetime R =54Ω,C =50pF r L L HVD3085E 200 300 ns t Differentialoutputsignalfalltime (seeFigure11) f HVD3088E 7 15 HVD3082E 20 200 R =54Ω,C =50pF t Pulseskew(|t –t |) L L HVD3085E 5 50 ns sk(p) PHL PLH (seeFigure11) HVD3088E 1.4 2 Propagationdelaytime,high-impedance-to- HVD3082E 2500 7000 R =110Ω,REat0V t high-leveloutput L PZH (seeFigure12and HVD3085E 1000 2500 ns t Propagationdelaytime,high-impedance-to-low- PZL Figure13) leveloutput HVD3088E 13 30 Propagationdelaytime,high-level-to-high- HVD3082E 80 200 R =110Ω,REat0V t impedanceoutput L PHZ (seeFigure12and HVD3085E 60 100 ns t Propagationdelaytime,low-level-to-high- PLZ Figure13) impedanceoutput HVD3088E 12 30 Propagationdelaytime,shutdown-to-high-level HVD3082E 3500 7000 t output R =110Ω,REatV PZH(SHDN) L CC HVD3085E 2500 4500 ns t Propagationdelaytime,shutdown-to-low-level (seeFigure12) PZL(SHDN) output HVD3088E 1600 2600 6 SubmitDocumentationFeedback Copyright©2009–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E www.ti.com SLLS562J–AUGUST2009–REVISEDOCTOBER2017 6.9 Switching Characteristics: Receiver overrecommendedoperatingconditionsunlessotherwisenoted PARAMETER TESTCONDITIONS MIN TYP MAX UNIT HVD3082E t Propagationdelaytime,low-to-high- HVD3085E 75 200 ns PLH leveloutput HVD3086E 100 HVD3082E t Propagationdelaytime,high-to-low- CL=15pF(see HVD3085E 79 200 ns PHL leveloutput Figure16) HVD3088E 100 HVD3082E 4 30 t Pulseskew(|t –t |) HVD3085E ns sk(p) PHL PLH HVD3088E 10 tr Outputsignalrisetime VID=–1.5Vto1.5V, 1.5 3 ns tf Outputsignalfalltime CL=15pF(seeFigure16) 1.8 3 ns HVD3082E 5 50 t Outputenabletimetohighlevel HVD3085E ns PZH HVD3088E 30 HVD3082E 10 50 t Outputenabletimetolowlevel HVD3085E ns PZL C =15pF, L DEat3V HVD3088E 30 (seeFigure17and HVD3082E t Outputenabletimefromhighlevel Figure18) HVD3085E 5 50 ns PHZ HVD3088E 30 HVD3082E 8 50 t Outputdisabletimefromlowlevel HVD3085E ns PLZ HVD3088E 30 Propagationdelaytime, t 1600 3500 ns PZH(SHDN) shutdown-to-high-leveloutput C =15pF,DEat0V, L Propagationdelaytime, (seeFigure19) t 1700 3500 ns PZL(SHDN) shutdown-to-low-leveloutput Copyright©2009–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E SLLS562J–AUGUST2009–REVISEDOCTOBER2017 www.ti.com 6.10 Typical Characteristics 80 10 No Load, VCC= 5 V, 60 TA= 25oC 50% Square Wave Input Am 40 mA I- Input Bias Current -I -22000 VCC= 0 V VCC= 5 V I- Supply Current - CC 1 Driver and Receiver Receiver Only -40 -60 0.1 -8 -6 -4 -2 0 2 4 6 8 10 12 1 10 100 VI- Bus Input Voltage - V Signal Rate - kbps Figure1.BusInputCurrent Figure2.SN65HVD3082ERMSSupplyCurrent versusBusInputVoltage versusSignalingRate 100 100 No Load, VCC= 5 V, No Load, TA= 25oC VCC= 5 V, 50% Square Wave Input TA= 25oC A 50% Square Wave Input Supply Current - m 101 Driver and Receiver ply Current - mA 10 Driver and Receiver I- CC Receiver Only - Sup 1 C C I Receiver Only 0.1 1 10 100 1000 Signal Rate - kbps 0.1 Figure3.SN65HVD3085ERMSSupplyCurrent Figure4.SN65HVD3088ERMSSupplyCurrent versusSignalingRate versusSignalRate 5 5 Differential Output Voltage - V 1234....5555234 TVACC= =2 55o CV RL= 120W RL= 60W Receiver Output Voltage - V 1234....5555234 TVVACICC== =2 0 55.o7 CV5 V - D 1 - O 1 O V V 0.5 0.5 0 0 0 10 20 30 40 50 -200-180-160-140-120-100 -80 -60 -40 -20 0 IO- Differential Output Current - mA VID- Differential Input Voltage - V Figure5.DriverDifferentialOutputVoltage Figure6.ReceiverOutputVoltage versusDriverOutputCurrent versusDifferentialInputVoltage 8 SubmitDocumentationFeedback Copyright©2009–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E www.ti.com SLLS562J–AUGUST2009–REVISEDOCTOBER2017 Typical Characteristics (continued) 10 9 s e - n 8 VCC= 4.5 V m Ti all e/F 7 Ris VCC= 5 V 6 VCC= 5.5 V 5 -40 -20 0 20 40 60 80 TA- Temperature -oC Figure7.SN65HVD3088EDriverRiseandFallTime versusTemperature Copyright©2009–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E SLLS562J–AUGUST2009–REVISEDOCTOBER2017 www.ti.com 7 Parameter Measurement Information Test load capacitance includes probe and jig capacitance (unless otherwise specified). Signal generator characteristics: rise and fall time < 6 ns, pulse rate 100 kHz, 50% duty cycle. Z = 50 Ω (unless otherwise O specified). I I A OA 27W I V 0 V or 3 V OD 50 pF 27W B I OB V OC Figure8. DriverTestCircuit,V andV WithoutCommon-ModeLoading OD OC 375W I OA V = -7 V to 12 V V 60W TEST 0 V or 3 V OD I 375W OB V TEST Figure9. DriverTestCircuit,V WithCommon-ModeLoading OD 27W A V -3.25 V A 27W V -1.75 V GeSnigenraatlor 50W B VOC B VOC(PP) DVOC(SS) 50 pF V OC Figure10. DriverV TestCircuitandWaveforms OC 3 V 1.5 V 1.5 V Input 0 V RL= 50W VOD tPLH tPHL Signal CL= 50 pF 90% VOD(H) Generator 50W 0 V Output 10% V OD(L) t t r f Figure11. DriverSwitchingTestCircuitandWaveforms 10 SubmitDocumentationFeedback Copyright©2009–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E www.ti.com SLLS562J–AUGUST2009–REVISEDOCTOBER2017 Parameter Measurement Information (continued) A S1 Output 3 V D 0 V or 3 V B 1.5 V 1.5 V 3 V if TestingAOutput DE 0 V 0V if Testing B Output DE CL= 50 pF RL= 110W tPZH 0.5 V V OH Signal Output 2.5 V Generator 50W VOff0 t PHZ Figure12. DriverEnableandDisableTestCircuitandWaveforms,HighOutput 5 V R = 110W L A S1 D 3 V 0 V or 3 V Output B 1.5 V 1.5 V 0 V if TestingAOutput DE 3V if Testing B Output t 0 V C = 50 pF PZL L t DE PLZ 5 V Output Signal 2.5 V Generator 50W VOL 0.5 V Figure13. DriverEnableandDisableTestCircuitandWaveforms,LowOutput IOS IO V ID V O V O Voltage Source Figure14. DriverShort-Circuit Figure15. ReceiverSwitchingTestCircuitand Waveforms Signal 50W Generator V Input B ID 1.5 V A I 50% O InputA R 0 V B t t PLH PHL V GeSnigenraatlor 50W CL= 15 pF O 90% VOH Output 10% V OL t t r f Figure16. ReceiverSwitchingTestCircuitandWaveforms Copyright©2009–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E SLLS562J–AUGUST2009–REVISEDOCTOBER2017 www.ti.com Parameter Measurement Information (continued) V D CC DE V CC A 54W B 3 V 1 kW RE R 0 V 1.5 V 0 V RE C = 15 pF L t t PZH PHZ Signal 50W VOH Generator V -0.5 V 1.5 V OH R GND Figure17. ReceiverEnableandDisableTestCircuitandWaveforms,DataOutputHigh 0 V D DE V CC A 54W B 3 V R 1 kW RE 5 V 1.5 V 0 V RE CL= 15 pF t t PZL PLZ GeSnigenraatlor 50W R VCC 1.5 V V +0.5 V OH V OL Figure18. ReceiverEnableandDisableTestCircuitandWaveforms,DataOutputLow V CC Switch Down for V = 1.5 V (A) Switch Up for V = -1.5 V 1.5 V or A (A) -1.5 V R 3 V B 1 kW RE 1.5 V CL= 15 pF 0 V RE t PZH(SHDN) t Signal 50W PZL(SHDN) Generator 5 V V OH R 1.5 V V 0 V OL Figure19. ReceiverEnableFromShutdownTestCircuitandWaveforms 12 SubmitDocumentationFeedback Copyright©2009–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E www.ti.com SLLS562J–AUGUST2009–REVISEDOCTOBER2017 Parameter Measurement Information (continued) V TEST 100W 0 V Pulse Generator, 15ms Duration, 15ms 15 ms -VTEST 1% Duty Cycle Figure20. TestCircuitandWaveforms,TransientOvervoltageTest D and RE Input DE Input V V CC CC 50kW 500W 500W Input Input 9 V 9 V 50 kW AInput B Input VCC VCC 16 V 36kW 16 V 36kW 180kW 180kW Input Input 36kW 36kW 16 V 16 V Aand B Output R Output V CC V CC 16 V 5W Output Output 16 V 9 V Figure21. EquivalentInputandOutputSchematicDiagrams Copyright©2009–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E SLLS562J–AUGUST2009–REVISEDOCTOBER2017 www.ti.com 8 Detailed Description 8.1 Overview The SNx5HVD308xE family of half-duplex RS-485 transceivers is suitable for data transmission at rates up to 200 kbps (for SN65HVD3082E and SN75HVD3082E), 1 Mbps (for SN65HVD3085E), or 20 Mbps (for SN65HVD3088E) over controlled-impedance transmission media (such as twisted-pair cabling). Up to 256 units of SNx5HVD308xE may share a common RS-485 bus due to the family’s low bus input currents. The devices alsofeatureahighdegreeofESDprotectionandtypicalstandbycurrentconsumptionof1nA. 8.2 Functional Block Diagram V CC R RE A DE B D GND 8.3 Feature Description The SNx5HVD308xE provides internal biasing of the receiver input thresholds for open-circuit, bus-idle, or short- circuit failsafe conditions. It features a typical hysteresis of 30 mV in order to improve noise immunity. Internal ESD protection circuits protect the transceiver bus terminals against ±15-kV Human Body Model (HBM) electrostaticdischarges. The devices protect themselves against damage due to overtemperature conditions through use a of a thermal shutdown feature. Thermal shutdown is entered at 165°C (nominal) and causes the device to enter a low-power statewithhigh-impedanceoutputs. 8.4 Device Functional Modes When the driver enable pin, DE, is logic high, the differential outputs A and B follow the logic states at data input D.AlogichighatDcausesAtoturnhighandBtoturnlow.Inthiscasethedifferentialoutputvoltagedefinedas V = V – V is positive. When D is low, the output states reverse, B turns high, A becomes low, and V is OD A B OD negative. When DE is low, both outputs turn high-impedance. In this condition the logic state at D is irrelevant. The DE pin has an internal pull-down resistor to ground, thus when left open the driver is disabled (high-impedance) by default. The D pin has an internal pull-up resistor to V , thus, when left open while the driver is enabled, output CC AturnshighandBturnslow. Table1.DriverFunctionTable INPUT ENABLE(1) OUTPUTS(1) FUNCTION D DE A B H H H L ActivelydrivebusHigh L H L H ActivelydrivebusLow X L Z Z Driverdisabled X OPEN Z Z Driverdisabledbydefault OPEN H H L ActivelydrivebusHighbydefault (1) H=highlevel,L=lowlevel,Z=highimpedance,X=irrelevant,?=indeterminate 14 SubmitDocumentationFeedback Copyright©2009–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E www.ti.com SLLS562J–AUGUST2009–REVISEDOCTOBER2017 When the receiver enable pin, RE, is logic low, the receiver is enabled. When the differential input voltage defined as V = V – V is positive and higher than the positive input threshold, V , the receiver output, R, ID A B IT+ turns high. When V is negative and lower than the negative input threshold, V , the receiver output, R, turns ID IT– low.IfV isbetweenV andV theoutputisindeterminate. ID IT+ IT– When RE is logic high or left open, the receiver output is high-impedance and the magnitude and polarity of V ID are irrelevant. Internal biasing of the receiver inputs causes the output to go failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted (short-circuit), or the bus is not actively driven (idlebus). Table2.ReceiverFunctionTable DIFFERENTIALINPUT ENABLE OUTPUT FUNCTION V =V –V RE R ID A B V <V L H ReceivevalidbusHigh IT+ ID V <V <V L ? Indeterminatebusstate IT– ID IT+ V <V L L ReceivevalidbusLow ID IT– X H Z Receiverdisabled X OPEN Z Receiverdisabledbydefault Open-circuitbus L H Fail-safehighoutput Short-circuitbus L H Fail-safehighoutput Idle(terminated)bus L H Fail-safehighoutput Copyright©2009–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E SLLS562J–AUGUST2009–REVISEDOCTOBER2017 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information The SNx5HVD308xE devices are half-duplex RS-485 transceivers commonly used for asynchronous data transmissions.Thedriverandreceiverenablepinsallowfortheconfigurationofdifferentoperatingmodes. R R R R R R RE A RE A RE A DE B DE B DE B D D D D D D Figure22. Half-DuplexTransceiverConfigurations Usingindependentenablelinesprovidesthemostflexiblecontrolasitallowsforthedriverandthereceivertobe turned on and off individually. While this configuration requires two control lines, it allows for selective listening intothebustrafficwhetherthedriveristransmittingdataornot. Combining the enable signals simplifies the interface to the controller by forming a single direction-control signal. In this configuration, the transceiver operates as a driver when the direction-control line is high and as a receiver whenthedirection-controllineislow. Additionally, only one line is required when connecting the receiver-enable input to ground and controlling only the driver-enable input. In this configuration, a node not only receives the data from the bus, but also the data it sendsandcanverifythatthecorrectdatahavebeentransmitted. 9.2 Typical Application An RS-485 bus consists of multiple transceivers connecting in parallel to a bus cable. To eliminate line reflections, each cable end is terminated with a termination resistor, R , whose value matches the characteristic T impedance, Z , of the cable. This method, known as parallel termination, allows for higher data rates over longer 0 cablelength. R R R R A A RE RE B RT RT B DE DE D D D D A B A B R R D D R RE DE D R RE DE D Figure23. TypicalApplicationCircuit 16 SubmitDocumentationFeedback Copyright©2009–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E www.ti.com SLLS562J–AUGUST2009–REVISEDOCTOBER2017 Typical Application (continued) 9.2.1 DesignRequirements RS-485 is a robust electrical standard suitable for long-distance networking that may be used in a wide range of applicationswithvaryingrequirements,suchasdistance,datarate,andnumberofnodes. 9.2.1.1 DataRateandBusLength There is an inverse relationship between data rate and bus length, meaning the higher the data rate, the shorter the cable length; and conversely, the lower the data rate, the longer the cable may be without introducing data errors. While most RS-485 systems use data rates between 10 kbps and 100 kbps, some applications require data rates up to 250 kbps at distances of 4,000 feet and longer. Longer distances are possible by allowing for smallsignaljitterofupto5or10%. 10000 5%, 10%, and 20% Jitter h (ft) 1000 gt Conservative n e Characteristics L e bl 100 a C 10 100 1k 10k 100k 1M 10M 100M Data Rate(bps) Figure24. CableLengthvsDataRateCharacteristic 9.2.1.2 StubLength When connecting a node to the bus, the distance between the transceiver inputs and the cable trunk, known as the stub, must be as short as possible. Stubs present a non-terminated piece of bus line which can introduce reflections as the length of the stub increases. As a general guideline, the electrical length, or round-trip delay, of a stub must be less than one-tenth of the rise time of the driver, thus giving a maximum physical stub length as showninEquation1. L ≤0.1×t ×v×c stub r where: • t isthe10/90risetimeofthedriver r • cisthespeedoflight(3×108m/s) • visthesignalvelocityofthecableortraceasafactorofc (1) 9.2.1.3 BusLoading The RS-485 standard specifies that a compliant driver must be able to driver 32 unit loads (UL), where 1 unit loadrepresentsaloadimpedanceofapproximately12kΩ.BecausetheSNx5HVD308xEisa1/8ULtransceiver, itispossibletoconnectupto256receiverstothebus. Copyright©2009–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E SLLS562J–AUGUST2009–REVISEDOCTOBER2017 www.ti.com Typical Application (continued) 9.2.1.4 ReceiverFailsafe Thedifferentialreceiverisfail-safetoinvalidbusstatescausedby: • openbusconditionssuchasadisconnectedconnector, • shortedbusconditionssuchascabledamageshortingthetwisted-pairtogether,or • idlebusconditionsthatoccurwhennodriveronthebusisactivelydriving In any of these cases, the differential receiver outputs a failsafe logic High state, so that the output of the receiverisnotindeterminate. Receiver failsafe is accomplished by offsetting the receiver thresholds so that the input indeterminate range does not include zero volts differential. To comply with the RS-422 and RS-485 standards, the receiver output must output a High when the differential input V is more positive than +200 mV, and must output a Low when the V ID ID is more negative than –200 mV. The receiver parameters which determine the failsafe performance are V and IT+ V and V . As seen in the table, differential signals more negative than –200 mV will always cause a Low IT– HYS receiver output. Similarly, differential signals more positive than +200 mV will always cause a High receiver output. When the differential input signal is close to zero, it will still be above the V threshold, and the receiver output IT+ is High. Only when the differential input is more negative than V will the receiver output transition to a Low IT– state. So, the noise immunity of the receiver inputs during a bus fault condition includes the receiver hysteresis valueV (theseparationbetweenV andV )aswellasthevalueofV . HYS IT+ IT– IT+ 9.2.2 DetailedDesignProcedure In order to protect bus nodes against high-energy transients, the implementation of external transient protection devicesisnecessary. 5V 100nF 100nF 10kΩ VCC R1 R RxD MCU/ RE A TVS UART DE B DIR D TxD R2 10kΩ GND Copyright © 2017,Texas Instruments Incorporated Figure25. TransientProtectionAgainstESD,EFT,andSurgeTransients Figure 25 suggests a protection circuit against 10-kV ESD (IEC 61000-4-2), 4-kV EFT (IEC 61000-4-4), and 1-kV surge(IEC61000-4-5)transients.Table3showstheassociatedBillofMaterials. Table3.BillofMaterials DEVICE FUNCTION ORDERNUMBER MANUFACTURER XCVR RS-485Transceiver SNx5HVD308xE TI R1,R2 10-Ω,Pulse-ProofThick-FilmResistor CRCW060310RJNEAHP Vishay TVS Bidirectional400-WTransientSuppressor CDSOT23-SM712 Bourns 18 SubmitDocumentationFeedback Copyright©2009–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E www.ti.com SLLS562J–AUGUST2009–REVISEDOCTOBER2017 9.2.2.1 PowerUsageinanRS-485Transceiver Power consumption is a concern in many applications. Power supply current is delivered to the bus load as well as to the transceiver circuitry. For a typical RS-485 bus configuration, the load that an active driver must drive consistsofallofthereceivingnodes,plustheterminationresistorsateachendofthebus. The load presented by the receiving nodes depends on the input impedance of the receiver. The TIA/EIA-485-A standarddefinesaunitloadasallowingupto1mA.Withupto32unitloadsallowedonthebus,thetotalcurrent supplied to all receivers can be as high as 32 mA. The HVD308xE is rated as a 1/8 unit load device. As shown in,thebusinputcurrentislessthan1/8mA,allowingupto256nodesonasinglebus. The current in the termination resistors depends on the differential bus voltage. The standard requires active drivers to produce at least 1.5 V of differential signal. For a bus terminated with one standard 120-Ω resistor at each end, this sums to 25 mA differential output current whenever the bus is active. Typically the HVD308xE can drive more than 25-mA to a 60-Ω load, resulting in a differential output voltage higher than the minimum required bythestandard(seeFigure3). Overall,thetotalloadcurrentcanbe60mAtoaloadedRS-485bus.Thisisinadditiontothecurrentrequiredby the transceiver itself; the HVD308xE circuitry requires only about 0.4 mA with both driver and receiver enabled, and only 0.3 mA with either the driver enabled or with the receiver enabled. In low-power shutdown mode, neitherthedrivernorreceiverisactive,andthesupplycurrentislow. Supply current increases with signaling rate primarily due to the totem pole outputs of the driver (see Figure 2). Whentheseoutputschangestate,thereisamomentwhenboththehigh-sideandlow-sideoutputtransistorsare conducting and this creates a short spike in the supply current. As the frequency of state changes increases, morepowerisused. 9.2.2.2 Low-PowerShutdownMode When both the driver and receiver are disabled (DE low and RE high) the device is in shutdown mode. If the enableinputsareinthisstateforlessthan60ns,thedevicedoesnotentershutdownmode.Thisguardsagainst inadvertentlyenteringshutdownmodeduringdriverorreceiverenabling.Onlywhentheenableinputsareheldin this state for 300 ns or more, the device is assured to be in shutdown mode. In this low-power shutdown mode, most internal circuitry is powered down, and the supply current is typically 1 nA. When either the driver or the receiverisre-enabled,theinternalcircuitrybecomesactive. If only the driver is re-enabled (DE transitions to high) the driver outputs are driven according to the D input after the enable times given by t and t in the driver switching characteristics. If the D input is open PZH(SHDN) PZL(SHDN) when the driver is enabled, the driver outputs defaults to A high and B low, in accordance with the driver failsafe feature. If only the receiver is re-enabled (RE transitions to low) the receiver output is driven according to the state of the bus inputs (A and B) after the enable times given by t and t in the receiver switching PZH(SHDN) PZL(SHDN) characteristics. If there is no valid state on the bus the receiver responds as described in the failsafe operation section. If both the receiver and driver are re-enabled simultaneously, the receiver output is driven according to the state ofthebusinputs(AandB)andthedriveroutputisdrivenaccordingtotheDinput. NOTE The state of the active driver affects the inputs to the receiver. Therefore, the receiver outputsarevalidassoonasthedriveroutputsarevalid. Copyright©2009–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E SLLS562J–AUGUST2009–REVISEDOCTOBER2017 www.ti.com 10 Power Supply Recommendations To ensure reliable operation at all data rates and supply voltages, each supply must be decoupled with a 100-nF ceramic capacitor located as close to the supply pins as possible. This helps to reduce supply voltage ripple present on the outputs of switched-mode power supplies and also helps to compensate for the resistance and inductanceofthePCBpowerplanes. 11 Layout 11.1 Layout Guidelines Robust and reliable bus node design often requires the use of external transient protection devices in order to protect against EFT and surge transients that may occur in industrial environments. Because these transients have a wide frequency bandwidth (from approximately 3 MHz to 3 GHz), high-frequency layout techniques must beappliedduringPCBdesign. • Placetheprotectioncircuitryclosetothebusconnectortopreventnoisetransientsfromenteringtheboard. • UseV andgroundplanestoprovidelow-inductance. CC NOTE High-frequency currents follow the path of least inductance and not the path of least impedance. • Design the protection components into the direction of the signal path. Do not force the transients currents to divertfromthesignalpathtoreachtheprotectiondevice. • Apply 100-nF to 220-nF bypass capacitors as close as possible to the V pins of transceiver, UART, and CC controllerICsontheboard. • Use at least two vias for V and ground connections of bypass capacitors and protection devices to CC minimizeeffectivevia-inductance. • Use 1-kΩ to 10-kΩ pullup or pulldown resistors for enable lines to limit noise currents in these lines during transientevents. • Insert series pulse-proof resistors into the A and B bus lines if the TVS clamping voltage is higher than the specifiedmaximumvoltageofthetransceiverbuspins.Theseresistorslimittheresidualclampingcurrentinto thetransceiverandpreventitfromlatchingup. • While pure TVS protection is sufficient for surge transients up to 1 kV, higher transients require metal-oxide varistors (MOVs) which reduce the transients to a few hundred volts of clamping voltage, and transient blockingunits(TBUs)thatlimittransientcurrentto200mA. 11.2 Layout Example 5 Viatoground R C 4 ViatoVCC 6 R 1 R MCU P 7 R M R 5 J TVS 6 R SN65HVD3082E 5 Figure26. SNx5HVD308xELayoutExample 20 SubmitDocumentationFeedback Copyright©2009–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E www.ti.com SLLS562J–AUGUST2009–REVISEDOCTOBER2017 11.3 Thermal Considerations for IC Packages θ (Junction-to-Ambient Thermal Resistance) is defined as the difference in junction temperature to ambient JA temperaturedividedbytheoperatingpower. θ isnotaconstantandisastrongfunctionof: JA • thePCBdesign(50%variation) • altitude(20%variation) • devicepower(5%variation) θ can be used to compare the thermal performance of packages if the specific test conditions are defined and JA used. Standardized testing includes specification of PCB construction, test chamber volume, sensor locations, and the thermal characteristics of holding fixtures. θ is often misused when it is used to calculate junction JA temperaturesforotherinstallations. TI uses two test PCBs as defined by JEDEC specifications. The low-k board gives average in-use condition thermal performance and consists of a single trace layer 25-mm long and 2-oz thick copper. The high-k board gives best case in-use condition and consists of two 1-oz buried power planes with a single trace layer 25-mm longwith2-ozthickcopper.A4%to50%differencein θ canbemeasuredbetweenthesetwotestcards. JA θ (Junction-to-CaseThermalResistance)isdefinedasdifferenceinjunctiontemperaturetocasedividedbythe JC operating power. It is measured by putting the mounted package up against a copper block cold plate to force heattoflowfromdie,throughthemoldcompoundintothecopperblock. θ is a useful thermal characteristic when a heatsink is applied to package. It is NOT a useful characteristic to JC predict junction temperature as it provides pessimistic numbers if the case temperature is measured in a non- standard system and junction temperatures are backed out. It can be used with θ in 1-dimensional thermal JB simulationofapackagesystem. θ (Junction-to-Board Thermal Resistance) is defined to be the difference in the junction temperature and the JB PCB temperature at the center of the package (closest to the die) when the PCB is clamped in a cold-plate structure.θ isonlydefinedforthehigh-ktestcard. JB θ provides an overall thermal resistance between the die and the PCB. It includes a bit of the PCB thermal JB resistance (especially for BGAs with thermal balls) and can be used for simple 1-dimensional network analysis of packagesystem(seeFigure27). Ambient Node q Calculated CA Surface Node q Calculated/Measured JC Junction q Calculated/Measured JB PC Board Figure27. ThermalResistance Copyright©2009–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E SLLS562J–AUGUST2009–REVISEDOCTOBER2017 www.ti.com 12 Device and Documentation Support 12.1 Device Support 12.1.1 Third-PartyProductsDisclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONEORINCOMBINATIONWITHANYTIPRODUCTORSERVICE. 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstosampleorbuy. Table4.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY SN65HVD3082E Clickhere Clickhere Clickhere Clickhere Clickhere SN75HVD3082E Clickhere Clickhere Clickhere Clickhere Clickhere SN65HVD3085E Clickhere Clickhere Clickhere Clickhere Clickhere SN65HVD3088E Clickhere Clickhere Clickhere Clickhere Clickhere 12.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 12.4 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.5 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.6 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.7 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 22 SubmitDocumentationFeedback Copyright©2009–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

SN65HVD3082E,SN75HVD3082E,SN65HVD3085E,SN65HVD3088E www.ti.com SLLS562J–AUGUST2009–REVISEDOCTOBER2017 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2009–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN65HVD3082ED ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 VP3082 & no Sb/Br) SN65HVD3082EDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 VP3082 & no Sb/Br) SN65HVD3082EDGK ACTIVE VSSOP DGK 8 80 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 85 NWN & no Sb/Br) SN65HVD3082EDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 85 NWN & no Sb/Br) SN65HVD3082EDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 VP3082 & no Sb/Br) SN65HVD3082EDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 VP3082 & no Sb/Br) SN65HVD3082EP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 65HVD3082 & no Sb/Br) SN65HVD3082EPE4 ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type -40 to 85 65HVD3082 & no Sb/Br) SN65HVD3085ED ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 VP3085 & no Sb/Br) SN65HVD3085EDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 VP3085 & no Sb/Br) SN65HVD3085EDGK ACTIVE VSSOP DGK 8 80 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 85 NWK & no Sb/Br) SN65HVD3085EDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 85 NWK & no Sb/Br) SN65HVD3085EDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 VP3085 & no Sb/Br) SN65HVD3088ED ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 VP3088 & no Sb/Br) SN65HVD3088EDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 VP3088 & no Sb/Br) SN65HVD3088EDGK ACTIVE VSSOP DGK 8 80 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 85 NWH & no Sb/Br) SN65HVD3088EDGKG4 ACTIVE VSSOP DGK 8 80 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 85 NWH & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN65HVD3088EDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 85 NWH & no Sb/Br) SN65HVD3088EDGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 85 NWH & no Sb/Br) SN65HVD3088EDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 VP3088 & no Sb/Br) SN65HVD3088EDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 VP3088 & no Sb/Br) SN75HVD3082ED ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 VN3082 & no Sb/Br) SN75HVD3082EDG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 VN3082 & no Sb/Br) SN75HVD3082EDGK ACTIVE VSSOP DGK 8 80 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 NWM & no Sb/Br) SN75HVD3082EDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS Call TI | NIPDAU Level-1-260C-UNLIM 0 to 70 NWM & no Sb/Br) SN75HVD3082EDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 VN3082 & no Sb/Br) SN75HVD3082EDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 VN3082 & no Sb/Br) SN75HVD3082EP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 75HVD3082 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN65HVD3082EDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 SN65HVD3082EDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN65HVD3082EDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN65HVD3085EDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 SN65HVD3085EDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 SN65HVD3085EDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN65HVD3088EDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 SN65HVD3088EDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN75HVD3082EDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 SN75HVD3082EDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2020 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN65HVD3082EDGKR VSSOP DGK 8 2500 350.0 350.0 43.0 SN65HVD3082EDR SOIC D 8 2500 340.5 338.1 20.6 SN65HVD3082EDR SOIC D 8 2500 367.0 367.0 35.0 SN65HVD3085EDGKR VSSOP DGK 8 2500 350.0 350.0 43.0 SN65HVD3085EDGKR VSSOP DGK 8 2500 364.0 364.0 27.0 SN65HVD3085EDR SOIC D 8 2500 340.5 338.1 20.6 SN65HVD3088EDGKR VSSOP DGK 8 2500 364.0 364.0 27.0 SN65HVD3088EDR SOIC D 8 2500 340.5 338.1 20.6 SN75HVD3082EDGKR VSSOP DGK 8 2500 350.0 350.0 43.0 SN75HVD3082EDR SOIC D 8 2500 340.5 338.1 20.6 PackMaterials-Page2

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PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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