Product Sample & Technical Tools & Support & Reference Folder Buy Documents Software Community Design SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 SN65HVD2x Extended Common-Mode RS-485 Transceivers 1 Features 3 Description • Common-ModeVoltageRange(–20Vto25V) The transceivers in the SN65HVD2x family offer 1 performance far exceeding typical RS-485 devices. In MoreThanDoublesTIA/EIA-485Requirement addition to meeting all requirements of the • ReceiverEqualizationExtendsCableLength, TIA/EIA‑485-A standard. The SN65HVD2x family SignalingRate(SN65HVD2[3,4]) operates over an extended range of common-mode • ReducedUnit-Loadforupto256Nodes voltages and has features such as high ESD protection, wide receiver hysteresis, and failsafe • BusI/OProtectiontoOver16-kVHBM operation. This family of devices is ideally suited for • FailsafeReceiverforOpen-Circuit,Short-Circuit, long-cable networks and other applications where the andIdle-BusConditions environmentistooharshforordinarytransceivers. • LowStandbySupplyCurrent1 µA(Maximum) These devices are designed for bidirectional data • MoreThan100mVReceiverHysteresis transmission on multipoint twisted-pair cables. Example applications are digital motor controllers, 2 Applications remote sensors and terminals, industrial process control, security stations, and environmental control • LongCableSolutions systems. – FactoryAutomation These devices combine a 3-state differential driver – SecurityNetworks and a differential receiver that operate from a single – BuildingHVAC 5-V power supply. The driver differential outputs and • SevereElectricalEnvironments the receiver differential inputs are connected internally to form a differential bus port that offers – ElectricalPowerInverters minimum loading to the bus. This port features an – IndustrialDrives extended common-mode voltage range, making the – Avionics device suitable for multipoint applications over long cableruns. DeviceInformation(1) PARTNUMBER PACKAGE BODYSIZE(NOM) SOIC(8) 4.90mm×3.91mm SN65HVD2x PDIP(8) 9.81mm×6.35mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. SN65HVD2xApplicationSpace SN65HVD2xDevicesOperateOveraWider Common-ModeVoltageRange 100 -20V +25V HVD23 SUPER485 HVD20 10 ps Mb HVD24 ate - HVD21 RS485 R g n ali -7 V +12V n Sig 1 -20 V -15 V -10 V -5 V 0 5 V 10 V 15 V 20 V 25 V HVD22 0.1 10 100 1000 Cable Length - m 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 www.ti.com Table of Contents 1 Features.................................................................. 1 10 DetailedDescription........................................... 17 2 Applications........................................................... 1 10.1 Overview...............................................................17 3 Description............................................................. 1 10.2 FunctionalBlockDiagram.....................................17 4 RevisionHistory..................................................... 2 10.3 FeatureDescription...............................................17 10.4 DeviceFunctionalModes......................................19 5 Description(continued)......................................... 4 11 ApplicationandImplementation........................ 22 6 DeviceOptions....................................................... 4 11.1 ApplicationInformation..........................................22 7 PinConfigurationandFunctions......................... 5 11.2 TypicalApplication................................................22 8 Specifications......................................................... 5 12 PowerSupplyRecommendations..................... 24 8.1 AbsoluteMaximumRatings......................................5 13 Layout................................................................... 24 8.2 ESDRatings..............................................................6 13.1 LayoutGuidelines.................................................24 8.3 RecommendedOperatingConditions.......................6 13.2 LayoutExample....................................................25 8.4 ThermalInformation..................................................7 14 DeviceandDocumentationSupport................. 26 8.5 DriverElectricalCharacteristics................................7 8.6 ReceiverElectricalCharacteristics...........................8 14.1 RelatedLinks........................................................26 8.7 DriverSwitchingCharacteristics...............................8 14.2 ReceivingNotificationofDocumentationUpdates26 8.8 ReceiverSwitchingCharacteristics...........................9 14.3 CommunityResources..........................................26 8.9 ReceiverEqualizationCharacteristics......................9 14.4 Trademarks...........................................................26 8.10 PowerDissipation.................................................10 14.5 ElectrostaticDischargeCaution............................26 8.11 TypicalCharacteristics..........................................11 14.6 Glossary................................................................26 9 ParameterMeasurementInformation................12 15 Mechanical,Packaging,andOrderable Information........................................................... 26 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionE(May2010)toRevisionF Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection.................................................................................................. 1 • DeletedOrderingInformationtable;seePOAattheendofthedatasheet........................................................................... 1 • Addedmaximumtemperaturevalue(150°C)to"Storagetemperate,T parameter............................................................ 5 stg ChangesfromRevisionD(April2005)toRevisionE Page • ReplacedtheDissipationRatingtablewiththeTHERMALINFORMATIONtable................................................................. 7 • ChangedI -Addedtestconditionandvaluesperdevicenumber(DRIVERELECTRICALCHARACTERISTICStable)... 7 O • ChangedtheTHERMALCHARACTERISTICStabletoPOWERDISSIPATIONtable....................................................... 10 • AddedtheTESTMODEDRIVERDISABLEsection............................................................................................................ 20 ChangesfromRevisionC(September2003)toRevisionD Page • AddedConditionsnotetotheABSOLUTEMAXIMUMRATINGStable"overoperatingfree-airtemperaturerange (unlessotherwisenoted)"....................................................................................................................................................... 5 • DeletedStoragetemperature,T fromtheABSOLUTEMAXIMUMRATINGStable........................................................... 5 stg • AddedReceiveroutputcurrent,I totheABSOLUTEMAXIMUMRATINGStable............................................................... 5 O 2 SubmitDocumentationFeedback Copyright©2002–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 www.ti.com SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 ChangesfromRevisionB(June2003)toRevisionC Page • AddedtheTHERMALCHARACTERISTICStable................................................................................................................. 7 • AddedtheTHEORYOFOPERATIONsection.................................................................................................................... 17 • AddedtheNOISECONSIDERATIONSFOREQUALIZEDRECEIVERSsection............................................................... 22 ChangesfromRevisionA(March2003)toRevisionB Page • AddedV TypicalValueof0.75V(DRIVERELECTRICALCHARACTERISTICStable)..................................................... 7 IK • DeletedV –VCM=–20Vto25VMinimumvalue(RECEIVERELECTRICALCHARACTERISTICStable)................ 8 IT(F+) • AddedRECEIVEREQUALIZATIONCHARACTERISTICStable........................................................................................... 9 • AddedFigure6,Figure7,andFigure8totheTYPICALCHARACTERISTICS.................................................................. 11 • ChangedAInputcircuitintheEQUIVALENTINPUTANDOUTPUTSCHEMATICDIAGRAMS....................................... 21 • ChangedtheINTEGRATEDRECEIVEREQUALIZATIONUSINGTHESN65HVD23section........................................... 23 ChangesfromOriginal(December2002)toRevisionA Page • Changedt ,t ,t ,andt -Fromamaximumvalueof120toincludetypicalandmaximumvaluesforeach PZH PHZ PZL PLZ entry(RECEIVERSWITCHINGCHARACTERISTICStable)................................................................................................ 9 Copyright©2002–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 www.ti.com 5 Description (continued) The SN65HVD20 device provides high signaling rate (up to 25 Mbps) for interconnecting networks of up to 64 nodes. The SN65HVD21 device allows up to 256 connected nodes at moderate data rates (up to 5 Mbps). The driver output slew rate is controlled to provide reliable switching with shaped transitions which reduce high-frequency noiseemissions. The SN65HVD22 device has controlled driver output slew rate for low radiated noise in emission-sensitive applications and for improved signal quality with long stubs. Up to 256 SN65HVD22 nodes can be connected at signalingratesupto500kbps. The SN65HVD23 device implements receiver equalization technology for improved jitter performance on differentialbusapplicationswithdataratesupto25Mbpsatcablelengthsupto160meters. The SN65HVD24 device implements receiver equalization technology for improved jitter performance on differentialbusapplicationswithdataratesfrom1Mbpsto10Mbpsatcablelengthsupto1000meters. The receivers include a failsafe circuit that provides a high-level output within 250 microseconds after loss of the input signal. The most common causes of signal loss are disconnected cables, shorted lines, or the absence of any active transmitters on the bus. This feature prevents noise from being received as valid data under these faultconditions.ThisfeaturemaybeusedforWired-ORbussignaling. TheSN65HVD2xdevicesarecharacterizedforoperationtemperaturesfrom –40°Cto85°C. 6 Device Options Table1.ProductSelectionGuide PARTNUMBERS CABLELENGTHANDSIGNALINGRATE(1) NODES MARKING SN65HVD20 Upto50mat25Mbps Upto64 D:VP20,P:65HVD20 SN65HVD21 Upto150mat5Mbps(withslewratelimit) Upto256 D:VP21,P:65HVD21 SN65HVD22 Upto1200mat500kbps(withslewratelimit) Upto256 D:VP22,P:65HVD22 SN65HVD23 Upto160mat25Mbps(withreceiverequalization) Upto64 D:VP23,P:65HVD23 SN65HVD24 Upto500mat3Mbps(withreceiverequalization) Upto256 D:VP24,P:65HVD24 (1) DistanceandsignalingratepredictionsbaseduponBelden3105Acableand15%eyepatternjitter. Table2.AvailableOptions PLASTICTHROUGH-HOLE PLASTICSMALL-OUTLINE(1) P-PACKAGE(JEDECMS-001) D-PACKAGE(JEDECMS-012) SN65HVD20P SN65HVD20D SN65HVD21P SN65HVD21D SN65HVD22P SN65HVD22D SN65HVD23P SN65HVD23D SN65HVD24P SN65HVD24D (1) AddRsuffixfortapedandreeledcarriers. 4 SubmitDocumentationFeedback Copyright©2002–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 www.ti.com SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 7 Pin Configuration and Functions DorPPackage 8-PinSOICorPDIP TopView R 1 8 VCC RE 2 7 B DE 3 6 A D 4 5 GND Not to scale PinFunctions PIN I/O DESCRIPTION NAME NO. A 6 Businputandoutput Driveroutputorreceiverinput(complementarytoB) B 7 Businputandoutput Driveroutputorreceiverinput(complementarytoA) D 4 Digitalinput Driverdatainput DE 3 Digitalinput Driverenable,activehigh GND 5 Referencepotential Localdeviceground R 1 Digitaloutput Receivedataoutput RE 2 Digitalinput Receiverenable,activelow VCC 8 Supply 4.5-Vto5.5-Vsupply 8 Specifications 8.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted) (1) MIN MAX UNIT Supplyvoltage(2) –0.5 7 V VoltageatanybusI/Oterminal –27 27 V Voltageinput,transientpulse A,B (through100Ω,seeFigure24) –60 60 V Voltageinput D,DE,RE –0.5 V +0.5 V CC Receiveroutputcurrent –10 10 mA Continuoustotalpowerdissipation SeePowerDissipation Junctiontemperature,T 150 °C J Storagetemperature,T 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Allvoltagevalues,exceptdifferentialI/Obusvoltages,arewithrespecttonetworkgroundterminal. Copyright©2002–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 www.ti.com 8.2 ESD Ratings VALUE UNIT Human-bodymodel(HBM),per Allpinsexcept5,6,and7 ±5000 ANSI/ESDA/JEDECJS-001(1) Pins5,6,and7 ±16000 V Electrostaticdischarge V (ESD) Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±1500 MachineModel(MM) (3) ±200 (1) TestedinaccordancewithJEDECStandard22,TestMethodA114-A. (2) TestedinaccordancewithJEDECStandard22,TestMethodC101. (3) TestedinaccordancewithJEDECStandard22,TestMethodA115-A 8.3 Recommended Operating Conditions MIN NOM MAX UNIT V Supplyvoltage 4.5 5 5.5 V CC VoltageatanybusI/Oterminal A,B –20 25 V V High-levelinputvoltage 2 V V IH CC D,DE,RE V Low-levelinputvoltage 0 0.8 V IL V Differentialinputvoltage AwithrespecttoB –25 25 V ID Driver –110 110 Outputcurrent mA Receiver –8 8 SN65HVD20 6 9 SN65HVD21 8 12 Driverenabled(DEatV ), CC Receiverenabled(REat0V),Noload, SN65HVD22 6 9 V =0VorV I CC SN65HVD23 7 11 SN65HVD24 10 14 SN65HVD20 5 8 SN65HVD21 7 11 Driverenabled(DEatV ), CC Receiverdisabled(REatV ),Noload, SN65HVD22 5 8 mA CC ICC Supplycurrent VI=0VorVCC SN65HVD23 5 9 SN65HVD24 8 12 SN65HVD20 4 7 SN65HVD21 5 8 Driverdisabled(DEat0V), SN65HVD22 4 7 Receiverenabled(REat0V),Noload SN65HVD23 4.5 9 SN65HVD24 5.5 10 Driverdisabled(DEat0V),Receiver AllSN65HVD2x 1 µA disabled(REatV )Dopen CC T Operatingfree-airtemperature(1) –40 85 °C A T Junctiontemperature –40 130 °C J (1) Maximumfree-airtemperatureoperationisallowedaslongasthedevicerecommendedjunctiontemperatureisnotexceeded. 6 SubmitDocumentationFeedback Copyright©2002–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 www.ti.com SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 8.4 Thermal Information SN65HVD2x THERMALMETRIC(1) D(SOIC) P(PDIP) UNIT 8PINS 8PINS R Junction-to-ambientthermalresistance 78.1 52.5 °C/W θJA R Junction-to-case(top)thermalresistance 56.5 57.6 °C/W θJC(top) R Junction-to-boardthermalresistance 50.4 38.6 °C/W θJB ψ Junction-to-topcharacterizationparameter 4.1 19.1 °C/W JT ψ Junction-to-boardcharacterizationparameter 32.6 31.9 °C/W JB (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 8.5 Driver Electrical Characteristics overrecommendedoperatingconditions(unlessotherwisenoted).(1) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT VIK Inputclampvoltage II=–18mA –1.5 0.75 V VO Open-circuitoutputvoltage AorB,Noload 0 VCC V Noload(opencircuit) 3.3 4.2 VCC |VOD(SS)| Steady-statedifferentialoutputvoltage RL=54Ω,SeeFigure9 1.8 2.5 V Withcommon-modeloading,SeeFigure10 1.8 Changeinsteady-statedifferentialoutputvoltage Δ|VOD(SS)| betweenlogicstates SeeFigure9andFigure11 –0.1 0.1 V VOC(SS) Steady-statecommon-modeoutputvoltage SeeFigure9 2.1 2.5 2.9 V Changeinsteady-statecommon-modeoutput ∆VOC(SS) voltage,VOC(H)–VOC(L) SeeFigure9andFigure12 –0.1 0.1 V Peak-to-peakcommon-modeoutputvoltage, VOC(PP) VOC(MAX)–VOC(MIN) RL=54Ω,CL=50pF,SeeFigure9andFigure12 0.35 V VOD(RING) Differentialoutputvoltageoverandundershoot RL=54Ω,CL=50pF,SeeFigure13 10% II Inputcurrent D,DE –100 100 µA VO=–7Vto12V, SN65HVD2[0,3] –400 500 Outputcurrentwithpoweroff. Otherinput=0V SN65HVD2[1,2,4] –100 125 IO Highimpedancestateoutputcurrent. VO=–20Vto25V, SN65HVD2[0,3] –800 1000 µA Otherinput=0V SN65HVD2[1,2,4] –200 250 IOS Short-circuitoutputcurrent VO=–20Vto25V,SeeFigure17 –250 250 mA COD Differentialoutputcapacitance 20 pF (1) AlltypicalvaluesareatV =5Vand25°C. CC Copyright©2002–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 www.ti.com 8.6 Receiver Electrical Characteristics overrecommendedoperatingconditions(unlessotherwisenoted)(1) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT VIT(+) Positive-goingdifferentialinputvoltagethreshold VO=2.4V,IO=–8mA 60 200 SeeFigure18 mV VIT(–) Negative-goingdifferentialinputvoltagethreshold VO=0.4V,IO=8mA –200 –60 VHYS Hysteresisvoltage(VIT+–VIT–) 100 130 mV Positive-goingdifferentialinputfailsafevoltage VCM=–7Vto12V 40 120 200 VIT(F+) threshold SeeFigure23 VCM=–20Vto25V 120 250 mV Negative-goingdifferentialinputfailsafevoltage VCM=–7Vto12V –200 –120 –40 VIT(F–) threshold SeeFigure23 VCM=–20Vto25V –250 –120 mV VIK Inputclampvoltage II=–18mA –1.5 V VOH High-leveloutputvoltage VID=200mV,IOH=–8mA,SeeFigure19 4 V VOL Low-leveloutputvoltage VID=–200mV,IOL=8mA,SeeFigure19 0.4 V VI=–7to12V, SN65HVD2[0,3] –400 500 Otherinput=0V SN65HVD2[1,2,4] –100 125 II(BUS) Businputcurrent(poweronorpoweroff) µA VI=–20to25V, SN65HVD2[0,3] –800 1000 Otherinput=0V SN65HVD2[1,2,4] –200 250 II Inputcurrent RE –100 100 µA SN65HVD2[0,3] 24 RI Inputresistance kΩ SN65HVD2[1,2,4] 96 CID Differentialinputcapacitance VID=0.5+0.4sine(2π×1.5×106t) 20 pF (1) AlltypicalvaluesareatV =5Vand25°C. CC 8.7 Driver Switching Characteristics overrecommendedoperatingconditions(unlessotherwisenoted)(1) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT SN65HVD2[0,3] 6 10 20 tPLH,tPHL Dloiwffe-troe-nhtiigahloauntdpuhtigphro-tpoa-lgoawtiondelay, RSeLe=F5i4guΩre,C1L1=50pF, SN65HVD2[1,4] 20 32 60 ns SN65HVD22 160 280 500 SN65HVD2[0,3] 2 6 12 tr,tf Differentialoutputrisetimeandfalltime RSeLe=F5i4guΩre,C1L1=50pF, SN65HVD2[1,4] 20 40 60 ns SN65HVD22 200 400 600 SN65HVD2[0,3] 40 Propagationdelaytime, tPZH,tPHZ high-impedance-to-high-leveloutputand REat0V,SeeFigure14 SN65HVD2[1,4] 100 ns high-leveloutput-to-high-impedance SN65HVD22 300 SN65HVD2[0,3] 40 Propagationdelaytime, tPZL,tPLZ high-impedance-to-high-leveloutputand REat0V,SeeFigure15 SN65HVD2[1,4] 100 ns high-leveloutput-to-high-impedance SN65HVD22 300 td(standby) Timefromanactivedifferentialoutputtostandby 2 µs Wake-uptimefromstandbytoanactivedifferential REatVCC,SeeFigure16 td(wake) output 8 µs SN65HVD2[0,3] 2 tsk(p) Pulseskew|tPLH–tPHL| SN65HVD2[1,4] 6 ns SN65HVD22 50 (1) AlltypicalvaluesareatV =5Vand25°C CC 8 SubmitDocumentationFeedback Copyright©2002–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 www.ti.com SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 8.8 Receiver Switching Characteristics overrecommendedoperatingconditions(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT tPLH Propagationdelaytime, SN65HVD2[0,3] 16 35 ns low-to-highleveloutputand SeeFigure19 tPHL high-tolowleveloutput SN65HVD2[1,2,4] 25 50 tr Receiveroutputrisetime SeeFigure19 2 4 ns tf Receiveroutputfalltime tPZH Receiveroutputenabletimetohighleveland 90 120 SeeFigure20 ns tPHZ disabletimefromhighlevel 16 35 tPZL Receiveroutputenabletimetolowleveland 90 120 SeeFigure21 ns tPLZ disabletimefromlowlevel 16 35 tr(standby) Timefromanactivereceiveroutputtostandby SeeFigure22,DEat0V 2 µs Wake-uptimefromstandbytoanactivereceiver tr(wake) output SeeFigure22,DEat0V 8 µs tsk(p) Pulseskew|tPLH–tPHL| 5 ns tp(set) Delaytime,busfailtofailsafeset SeeFigure23,pulserate=1kHz 250 350 µs tp(reset) Delaytime,busrecoverytofailsafereset SeeFigure23,pulserate=1kHz 50 ns 8.9 Receiver Equalization Characteristics(1) overrecommendedoperatingconditions(unlessotherwisenoted)(2) PARAMETER TESTCONDITIONS TYP UNIT 0m SN65HVD23 2 ns SN65HVD20 6 100m ns SN65HVD23 3 25Mbps SN65HVD20 15 150m ns SN65HVD23 4 SN65HVD20 27 200m ns SN65HVD23 8 SN65HVD20 22 200m ns SN65HVD23 8 Peudo-randomNRZcodewitha SN65HVD20 34 bitpatternlengthof216–1, 10Mbps 250m ns t Peak-to-peakeye-patternjitter SN65HVD23 15 j(pp) Beldon3105Acable, SeeFigure26 SN65HVD20 49 300m ns SN65HVD23 27 SN65HVD21 128 5Mbps 500m ns SN65HVD24 18 SN65HVD20 93 SN65HVD21 103 3Mbps 500m ns SN65HVD23 90 SN65HVD24 16 SN65HVD21 216 1Mbps 1000m ns SN65HVD24 62 (1) TheSN65HVD20andSN65HVD21donothavereceiverequalization,butarespecifiedforcomparison. (2) AlltypicalvaluesareatV =5V,andtemperature=25°C. CC Copyright©2002–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 www.ti.com 8.10 Power Dissipation PARAMETERS TESTCONDITIONS VALUE UNIT SN65HVD20:25Mbps 295 V =5V,T =25°C, CC J SN65HVD21:5Mbps 260 R =54Ω,C =50pF(driver), L L Typical C =15pF(receiver), SN65HVD22:500kbps 233 mW L 50%Dutycyclesquare-wavesignal, SN65HVD23:25Mbps 302 Driverandreceiverenabled SN65HVD24:5Mbps 267 P Devicepowerdissipation D SN65HVD20:25Mbps 408 V =5.5V,T =125°C, CC J SN65HVD21:5Mbps 342 R =54Ω,C =50pF, Worst L L C =15pF(receiver), SN65HVD22:500kbps 300 mW case L 50%Dutycyclesquare-wavesignal, SN65HVD23:25Mbps 417 Driverandreceiverenabled SN65HVD24:5Mbps 352 Thermalshutdownjunction T 170 °C SD temperature 10 SubmitDocumentationFeedback Copyright©2002–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 www.ti.com SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 8.11 Typical Characteristics 600 150 DE = 0 V DE = 0 V 400 100 A A m 200 m 50 Current - 0 VCC= 0 V Current - 0 VCC= 0 V Pin VCC= 5 V Pin VCC= 5 V Bus 200 Bus 50 400 100 600 150 -30 -20 -10 0 10 20 30 -30 -20 -10 0 10 20 30 BusPinVoltage-V BusPinVoltage-V Figure1.SN65HVD2[0,3]BusPinCurrent Figure2.SN65HVD2[1,2,4]BusPinCurrent vsBusPinVoltage vsBusPinVoltage 75 5 VCC= 5 V, HVD20 DE = RE= VCC, V 4.5 70 LOAD = 54Ω, 50 pF age - 4 VCC= 5.5 V nt - mA 65 HVD22 HVD21 put Volt 3.5 VCC= 5 V upply Curre 5650 erential Out 2.523 - S Diff VCC= 4.5 V ICC 50 ver 1.5 Dri 1 45 - OD 0.5 V 40 0 0.1 1 10 100 0 10 20 30 40 50 60 70 80 Signaling Rate - Mbps IL- Driver Load Current - mA Figure3.SupplyCurrentvsSignalingRate Figure4.DriverDifferentialOutputVoltage vsDriverLoadCurrent 6 30 VCC= 5 V, VIT(-) VIT(+) TA= 25°C, 5 25 VIC= 2.5 V, Cable: Belden 3105A eceiver Output Voltage - V 4321 VVCVCCMMM== = 22 005 VVV VVCVCMCMM== =2 0 20 5V VV Peak-to-Peak Jitter - ns 112050 HVD2H0V=D2253M =b 2p5s Mbps R - VO 0 5 1 0 -0.2 -0.1 0 0.1 0.2 100 120 140 160 180 200 VID-DifferentialInputVoltage-V Cable Length - m Figure5.ReceiverOutputVoltage Figure6.SN65HVD2[0,3]Peak-to-PeakJitter vsDifferentialInputVoltage vsCableLength Copyright©2002–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 www.ti.com Typical Characteristics (continued) 70 130 VCC= 5 V, HVD21: 500 m Cable TA= 25°C, 60 VIC= 2.5 V, HVD21 = 10 Mbps 110 Cable: Belden 3105A Peak-to-Peak Jitter - ns 23450000 HVD23 = 10 MHbpVsD20 = 10 Mbps Peak-to-Peak Jitter - ns 579000 VTVCACIaCbC=l= e=2 :25 5B.°5 CeV Vl,,d,en 3105A 10 30 HVD24: 500 m Cable HVD24 = 10 Mbps 0 10 200 220 240 260 280 300 3 3.5 4 4.5 5 Cable Length - m Signaling Rate - Mbps Figure7.SN65HVD2[0,1,3,4]Peak-to-PeakJitter Figure8.SN65HVD2[1,4]Peak-to-PeakJitter vsCableLength vsSignalingRate 9 Parameter Measurement Information NOTE Test load capacitance includes probe and jig capacitance (unless otherwise specified). Signal generator characteristics: rise and fall time <6 ns, pulse rate 100 kHz, 50% duty cycle,Zo=50Ω (unlessotherwisespecified). II IO 27Ω 0 V or 3 V VOD 50 pF 27Ω IO VOC Figure9. DriverTestCircuit,V andV WithoutCommon-ModeLoading OD OC 375Ω IO VTEST= -20 V to 25 V 0 V or 3 V VOD 60Ω IO 375Ω VTEST Figure10. DriverTestCircuit,V WithCommon-ModeLoading OD 12 SubmitDocumentationFeedback Copyright©2002–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 www.ti.com SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 Parameter Measurement Information (continued) 3 V INPUT 1.5 V 1.5 V 0 V RL= 54Ω VOD tPLH tPHL Signal CL= 50 pF 90% VOD(H) Generator 50Ω OUTPUT 0 V 10% VOD(L) tr tf Figure11. DriverSwitchingTestCircuitandWaveforms 27Ω A VA ≈-3.25 V D Signal B 27Ω VB ≈-1.75 V Generator 50Ω VOC VOC(PP) ∆VOC(SS) 50 pF VOC Figure12. DriverV TestCircuitandWaveforms OC VOD(SS) VOD(RING) V OD(PP) 0 V Differential VOD(RING) VOD(SS) V ismeasuredatfourpointsontheoutputwaveform,correspondingtoovershootandundershootfromthe OD(RING) V andV steadystatevalues. OD(H) OD(L) Figure13. V WaveformandDefinitions OD(RING) A S1 D Output 3 V 0 V or 3 V B DE 1.5 V 1.5 V 3VifTestingAOutput 0 V 0VifTestingBOutput CL= 50 pF RL=110Ω tPZH 0.5 V DE VOH Signal Output 2.5 V Generator 50Ω VOff0 tPHZ Figure14. DriverEnableandDisableTest,HighOutput Copyright©2002–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 www.ti.com Parameter Measurement Information (continued) 5 V RL=110Ω S1 D 3 V 0 V or 3 V Output DE 1.5 V 1.5 V 0VifTestingAOutput 0 V 3VifTestingBOutput CL= 50 pF tPZL DE tPLZ 5 V Signal Output 2.5 V Generator 50Ω VOL 0.5 V Figure15. DriverEnableandDisableTest,LowOutput 3 V DE 1.5 V A 0 V or 3 V D RL= 54Ω CL= 50 pF VOD 0 V td(Wake) td(Standby) B DE V OD 1.5 V 0.2 V Signal Generator 50Ω Figure16. DriverStandbyandWakeTestCircuitandWaveforms IOS VO Voltage Source Figure17. DriverShort-CircuitTest IO VID VO Figure18. ReceiverDCParameterDefinitions 14 SubmitDocumentationFeedback Copyright©2002–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 www.ti.com SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 Parameter Measurement Information (continued) Signal Generator 50Ω VID Input B 1.5 V A IO InputA 50% B R 0 V tPLH tPHL GeSnigenraatlor 50Ω CL= 15 pF VO Output 1.5 V 90% VOH 10% VOL tr tf Figure19. ReceiverSwitchingTestCircuitandWaveforms D VCC DE VCC A 54Ω B 3 V 1 kΩ R 0 V RE 1.5 V CL= 15 pF 0 V RE tPZH tPHZ GeSnigenraatlor 50Ω VOH R 1.5 V VOH-0.5 V GND Figure20. ReceiverEnableTestCircuitandWaveforms,DataOutputHigh D 0 V DE VCC A 54Ω B 3 V 1 kΩ R 5 V RE 1.5 V CL= 15 pF 0 V RE tPZL tPLZ GeSnigenraatlor 50Ω VCC R 1.5 V VOL+0.5 V VOL Figure21. ReceiverEnableTestCircuitandWaveforms,DataOutputLow Copyright©2002–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 www.ti.com Parameter Measurement Information (continued) VCC Switch Down for V(A)= 1.5 V, A Switch Up for V(A) = -1.5 V 1.5 V or R 3 V -1.5 V B 1 kΩ RE 1.5V CL= 15 pF 0 V RE tr(Wake) tr(Standby) Signal Generator 50Ω 5 V VOH R 1.5 V VOH0.5 V VOL+0.5 V 0 V VOL Figure22. ReceiverStandbyandWakeTestCircuitandWaveforms BusDataValidRegion 200 mV BusData -40 mV Transition Region VID -200 mV BusDataValidRegion -1.5 V tp(SET) tp(RESET) VOH R 1.5 V VOL Figure23. ReceiverActiveFailsafeDefinitionsandWaveforms 100Ω VTEST 0 V PulseGenerator, 15ms Duration, 15ms 1.5 ms V TEST 1% Duty Cycle Figure24. TestCircuitandWaveforms,TransientOvervoltageTest 16 SubmitDocumentationFeedback Copyright©2002–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 www.ti.com SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 10 Detailed Description 10.1 Overview The SN65HVD2x family of devices are RS-485 compliant half-duplex transceivers designed for communication rates up to 500 kbps (SN65HVD22), 3 Mbps (SN65HVD24), 5 Mbps (SN65HVD21), or 25 Mpbs (SN65HVD20 and SN65HVD23). The devices feature extended common-mode range support, which provides immunity to larger ground potential differences that can occur between nodes that communicate over longer distances. The SN65HVD23 and the SN65HVD24 devices feature receiver equalization, which reduces the amount of data- dependentjitterthatisintroducedbythehigh-frequencylossesassociatedwithlongcables. 10.2 Functional Block Diagram (VA-VB) : Not High + 120 mV - Bus Input (VA-VB) : Not Low + Invalid Timer - 250 Ps 120 mV 1 Active R Filters 2 RE STANDBY 3 DE 6 A Slew 4 D Rate Control 7 B Copyright © 2016, Texas Instruments Incorporated 10.3 Feature Description The SN65HVD2x family of devices integrates a differential receiver and differential driver with additional features forimprovedperformanceinelectrically-noisy,long-cable,orotherfault-intolerantapplications. The receiver hysteresis (typically 130 mV) is much larger than found in typical RS-485 transceivers. This helps rejectspuriousnoisesignalswhichwouldotherwisecausefalsechangesinthereceiveroutputstate. Slew rate limiting on the driver outputs (SN65HVD2[1,2,4]) reduces the high-frequency content of signal edges. This decreases reflections from bus discontinuities, and allows longer stub lengths between nodes and the main bus line. Designers must consider the maximum signaling rate and cable length required for a specific application,andchoosethetransceiverbestmatchingthoserequirements. When DE is low, the differential driver is disabled, and the A and B outputs are in high-impedance states. When DE is high, the differential driver is enabled, and drives the A and B outputs according to the state of the D inputs. WhenREishigh,thedifferentialreceiveroutputbufferisdisabled,andtheRoutputisinahigh-impedancestate. When RE is low, the differential receiver is enabled, and the R output reflects the state of the differential bus inputsontheAandBpins. Copyright©2002–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 www.ti.com Feature Description (continued) If both the driver and receiver are disabled, (DE low and RE high) then all nonessential circuitry, including auxiliaryfunctionssuchasfailsafeandreceiverequalizationisplacedinalow-powerstandbystate.Thisreduces powerconsumptiontolessthan5µW.Wheneitherenableinputisasserted,thecircuitryagainbecomesactive. In addition to the primary differential receiver, these devices incorporate a set of comparators and logic to implement an active receiver failsafe feature. These components determine whether the differential bus signal is valid. Whenever the differential signal is close to zero volts (neither high nor low), a timer initiates, If the differential input remains within the transition range for more than 250 µs, the timer expires and set the receiver output to the high state. If a valid bus input (high or low) is received at any time, the receiver output reflects the validbusstate,andthetimerisreset. Figure25. SN65HVD22ReceiverOperationWith20-VOffsetonInputSignal k0 H(s) = k0 (1–k1)+ (sk 1+p p1) (1–k2)+ (sk 2+p p2) (1–k3) + (sk 3+p p3) (DC (MpH1z) k1 (MpH2z) k2 (MpH3z) k3 1 2 3 loss) Similarto160mofBelden3105A 0.95 0.25 0.3 3.5 0.5 15 1 Similar to 250m of Belden 3105A 0.9 0.25 0.4 3.5 0.7 12 1 Similar to 500m of Belden 3105A 0.8 0.25 0.6 2.2 1 8 1 Similar to 1000m of Belden 3105A 0.6 0.3 1 3 1 6 1 Signal H(s) Generator Figure26. CableAttenuationModelforJitterMeasurements 18 SubmitDocumentationFeedback Copyright©2002–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 www.ti.com SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 10.4 Device Functional Modes ThedriverandreceiverbehaviorfordifferentinputconditionsareshowninTable3andTable4,respectively. Table3.DriverFunctionTable(1) INPUT ENABLE OUTPUTS DEVICE D DE A B H H H L L H L H SN65HVD2[0,1,2] X L Z Z X OPEN Z Z OPEN H H L H H H L L H L H SN65HVD2[3,4] X L Z Z X OPEN Z Z OPEN H L H (1) Legend:H=highlevel,L=lowlevel,X=don’tcare,Z=highimpedance(off),?=indeterminate Table4.ReceiverFunctionTable(1) DIFFERENTIALINPUT ENABLE OUTPUT V =(V –V ) RE R ID A B 0.2V≤V L H ID –0.2V<V <0.2V L H(2) ID V ≤–0.2V L L ID X H Z X OPEN Z Opencircuit L H ShortCircuit L H Idle(terminated)bus L H (1) H=highlevel,L=lowlevel,Z=highimpedance(off) (2) IfthedifferentialinputV remainswithinthetransitionrangefor ID morethan250µs,theintegratedfailsafecircuitrydetectsabusfault, andsetthereceiveroutputtoahighstate.SeeFigure23. 1 R 6 RE 2 A 7 DE 3 B D 4 Figure27. LogicDiagram Copyright©2002–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 www.ti.com 10.4.1 TestModeDriverDisable IftheinputsignaltotheDpinissuchthat: 1. thesignalhassignalingrateabove4Mbps(fortheSN65HVD21andSN65HVD24), 2. thesignalhassignalingrateabove6Mbps(fortheSN65HVD20andSN65HVD23), 3. thesignalhasaverageamplitudefrom1.2Vto1.6V(1.4V ±200mV),or 4. theaveragesignalamplituderemainsinthisrangefor100µsorlonger, thenthedrivermayactivateatest-modeduringwhichthedriveroutputsaretemporarilydisabled.Thiscancause loss of transmission of data during the period that the device is in the test-mode. The driver is re-enabled and resumes normal operation whenever the above conditions are not true. The device is not damaged by this test mode. Although rare, there are combinations of specific voltage levels and input data patterns within the operating conditions of the SN65HVD2x family which may lead to a temporary state where the driver outputs are disabled foraperiodoftime. Observations: 1. The conditions for inadvertently entering the test mode are dependent on the levels, duration, and duty cycle ofthelogicsignalinputtotheDpin.Operatinginputlevelsarespecifiedasgreaterthan2VforalogicHIGH input, and less than 0.8 V for a logic LOW input. Therefore, a valid steady-state logic input does not cause thedevicetoactivatethetestmode 2. Only input signals with frequency content above 2 MHz (4 Mbps) have a possibility of activating the test mode.Therefore,thisissueshouldnotaffectthenormaloperationoftheSN65HVD22(500kbps). 3. For operating signaling rates of 4 Mbps (or above), the conditions stated above must remain true over a period of: 4 Mbps ×100 µs = 400 bits. Therefore, a normal short message does not inadvertently activate the testmodel. 4. One example of an input signal which may cause the test mode to activate is a clock signal with frequency 3 MHz and 50% duty cycle (symmetric HIGH and LOW half-cycles) with logic HIGH levels of 2.4 V and logic LOW levels of 0.4 V. This signal applied to the D pin as a driver input would meet the criteria listed above, andmaycausethetest-modetoactivate,whichwoulddisablethedriver.Thisexamplesituationmayoccurif theclocksignalisgeneratedfromamicrocontrollerorlogicchipwitha2.7-Vsupply. 20 SubmitDocumentationFeedback Copyright©2002–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 www.ti.com SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 10.4.2 EquivalentInputandOutputSchematicDiagrams REInputs DInputs(HVD20,21,22) DE Input DInputs(HVD23,24) VCC VCC 100 kΩ 1 kΩ 1 kΩ Input Input 100 kΩ 9V 9 V AInput B Input VCC VCC R1 R1 R3 R3 Input Input 29V R2 R2 29 V 29V Aand B Outputs R Output VCC VCC 5Ω Output Output 9 V 29 V Figure28. EquivalentInputandOutputSchematicDiagrams Table5.InputandOutputResistorValues DEVICE R1,R2 R3 SN65HVD2[0,3] 9kΩ 45kΩ SN65HVD2[1,2,4] 36kΩ 180kΩ Copyright©2002–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 www.ti.com 11 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 11.1 Application Information The SN65HVD2x devices are half-duplex RS-485 transceivers that can be used for bidirectional, multipoint communication at various data rates over differential transmission lines. These devices support a wide common- mode range, allowing for robust communication even in the presence of voltage differences between the referencepotentialsofdifferentnodesonanetwork. 11.2 Typical Application Figure 29 shows a typical RS-485 application. Transceivers of different nodes are connected to one another over a shared bus. Twisted-pair cabling with a controlled differential impedance is used, and termination resistances are placed at the two ends of the cable to match the transmission line impedance and minimize signal reflections. R R R R R R RE A RE A RE A DE B DE B DE B D D D D D D Copyright © 2016, Texas Instruments Incorporated Figure29. Half-DuplexTransceiverConfigurations 11.2.1 DesignRequirements As the distances between nodes in an RS-485 network become greater and greater, it becomes more of a challenge to ensure reliable communication. The increased distance often means that the reference (ground) potentials has more of a difference between nodes. These ground potential differences give rise to differences in the common-mode voltages seen by the various transceivers on the bus. Standard RS-485 transceivers are typically specified to operate over a common-mode voltage from –7 V to 12 V, which may be insufficient for larger distances. The SN65HVD2x family of devices extends this range to –20 V to 25 V, allowing for greater communicationdistancesbetweennodes. Increased cable lengths can lead to increased jitter, especially in links operating at high data rates. This increased jitter is due to the attenuation of the cable, which tends to increase with frequency. Having unequal loss between higher and lower frequencies causes the RS-485 signal to distort, adding some timing deviation (jitter)totheedgecrossingsoftheRS-485data.Ifthejitteramplitudeexceedsthejittertoleranceofthereceiving MCU or UART, then bit errors are likely to result in the link. However, jitter can be reduced for a given link throughtheuseofreceiverequalization. 11.2.2 DetailedDesignProcedure 11.2.2.1 NoiseConsiderationsforEqualizedReceivers The simplest way of overcoming the effects of cable losses is to increase the sensitivity of the receiver. If the maximum attenuation of frequencies of interest is 20 dB, increasing the receiver gain by a factor of ten compensates for the cable. However, this means that signal and noise are amplified. Therefore, the receiver with higher gain is more sensitive to noise and it is important to minimize differential noise coupling to the equalized receiver. 22 SubmitDocumentationFeedback Copyright©2002–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 www.ti.com SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 Typical Application (continued) Differential noise is crated when conducted or radiated noise energy generates more voltage on one line of the differential pair than the other. For this to occur from conducted or electric far-field noise, the impedance to groundofthelinesmustdiffer. For noise frequency out to 50 MHz, the input traces can be treated as a lumped capacitance if the receiver is approximately 10 inches or less from the connector. Therefore, matching impedance of the lines is accomplished bymatchingthelumpedcapacitanceofeach. The primary factors that affect the capacitance of a trace are in length, thickness, width, dielectric material, distance from the signal return path, stray capacitance, and proximity to other conductors. It is difficult to match each of the variables for each line of the differential pair exactly, but a reasonable effort to do so keeps the lines balancedandlesssusceptibletodifferentialnoisecoupling. Another source of differential noise is from near-field coupling. In this situation, an assumption of equal noise- source impedance cannot be made as in the far-field. Familiarly known as crosstalk, more energy from a nearby signal is coupled to one line of the differential pair. Minimization of this differential noise is accomplished by keeping the signal pair close together and physical separation from high-voltage, high-current, or high-frequency signals. Insummary,followtheseguidelinesinboardlayoutforkeepingdifferentialnoisetoaminimum. • Keepthedifferentialinputtracesshort. • Matchthelength,physicaldimensions,androutingofeachlineofthepair. • Keepthelinesclosetogether. • Matchcomponentsconnectedtoeachline. • Separatetheinputsfromhigh-voltage,high-frequency,orhigh-currentsignals. 11.2.3 ApplicationCurves Figure 30 illustrates the benefits of integrated receiver equalization as implemented in the SN65HVD23 transceiver. In this test setup, a differential signal generator applied a signal voltage at one end of the cable, whichwasBelden3105Atwisted-pairshieldedcable.Thetestsignalwasapseudo-randombitstream(PRBS)of nonreturn-to-zero (NRZ) data. Channel 1 (top) shows the eye-pattern of the differential voltage at the receiver inputs(afterthecableattenuation).Channel2(bottom)showstheoutputofthereceiver. Figure 31 illustrates the benefits of integrated receiver equalization as implemented in the SN65HVD24 transceiver. In this test setup, a differential signal generator applied a signal voltage at one end of the cable, whichwasBelden3105Atwisted-pairshieldedcable.Thetestsignalwasapseudo-randombitstream(PRBS)of nonreturn-to-zero (NRZ) data. Channel 1 (top) shows the eye-pattern of the bit stream. Channel 2 (middle) shows the eye-pattern of the differential voltage at the receiver inputs (after the cable attenuation). Channel 3 (bottom)showstheoutputofthereceiver. Copyright©2002–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 www.ti.com Typical Application (continued) Figure30.SN65HVD23ReceiverPerformanceat25Mbps Figure31.SN65HVD24ReceiverPerformanceat5Mbps Over150MeterCable Over500MeterCable 12 Power Supply Recommendations To ensure reliable operation at all data rates and supply voltages, each supply must be decoupled with a 100-nF ceramic capacitor placed as close to the supply pins as possible. This helps to reduce supply voltage ripple present on the outputs of switched-mode power supplies and also helps to compensate for the resistance and inductanceofthePCBpowerplanes. 13 Layout 13.1 Layout Guidelines In addition to the guidelines on differential trace matching given in Detailed Design Procedure, the layout guidelinesbelowmustbefollowed: • Route power and ground nets as planes rather than traces, and keep their widths as large as possible to minimizeresistanceandinductancewhilemaximizingparasiticcapacitance. • If external components (like transient voltage suppression diodes) are used for transient protection, place them close to the connector port and within the path of the signal lines. Make sure component capacitances aresmallenoughnottoimpacttheRS-485signalingatthechosendatarate. • Small-valued series pulse-proof resistances can be used to provide additional immunity to transients. This is needed to limit input currents if the clamping voltages of external transient protection devices exceed the absolute maximum ratings of the transceiver. These resistances must be less than 10 Ω so that the RS-485 signalisnotoverlyattenuated. 24 SubmitDocumentationFeedback Copyright©2002–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 www.ti.com SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 13.2 Layout Example Viatoground R C ViatoVCC R R MCU R MP J R TVS R SN65HVD2x Figure32. SN65HVD2xLayoutExample Copyright©2002–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

SN65HVD20,SN65HVD21,SN65HVD22,SN65HVD23,SN65HVD24 SLLS552F–DECEMBER2002–REVISEDNOVEMBER2016 www.ti.com 14 Device and Documentation Support 14.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstosampleorbuy. Table6.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY SN65HVD20 Clickhere Clickhere Clickhere Clickhere Clickhere SN65HVD21 Clickhere Clickhere Clickhere Clickhere Clickhere SN65HVD22 Clickhere Clickhere Clickhere Clickhere Clickhere SN65HVD23 Clickhere Clickhere Clickhere Clickhere Clickhere SN65HVD24 Clickhere Clickhere Clickhere Clickhere Clickhere 14.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 14.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 14.4 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 14.5 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 14.6 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 15 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 26 SubmitDocumentationFeedback Copyright©2002–2016,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD20 SN65HVD21 SN65HVD22 SN65HVD23 SN65HVD24

PACKAGE OPTION ADDENDUM www.ti.com 9-May-2017 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN65HVD20D ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP20 & no Sb/Br) SN65HVD20DG4 ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP20 & no Sb/Br) SN65HVD20DR ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP20 & no Sb/Br) SN65HVD20P ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type -40 to 85 65HVD20 (RoHS) SN65HVD21D ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP21 & no Sb/Br) SN65HVD21DG4 ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP21 & no Sb/Br) SN65HVD21DR ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP21 & no Sb/Br) SN65HVD21DRG4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP21 & no Sb/Br) SN65HVD21P ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type -40 to 85 65HVD21 (RoHS) SN65HVD21PE4 ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type -40 to 85 65HVD21 (RoHS) SN65HVD22D ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP22 & no Sb/Br) SN65HVD22DG4 ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP22 & no Sb/Br) SN65HVD22DR ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP22 & no Sb/Br) SN65HVD22DRG4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP22 & no Sb/Br) SN65HVD22P ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type -40 to 85 65HVD22 (RoHS) SN65HVD22PE4 ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type -40 to 85 65HVD22 (RoHS) SN65HVD23D ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP23 & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 9-May-2017 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN65HVD23DG4 ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP23 & no Sb/Br) SN65HVD23DR ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP23 & no Sb/Br) SN65HVD23DRG4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP23 & no Sb/Br) SN65HVD23P ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type -40 to 85 65HVD23 (RoHS) SN65HVD24D ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP24 & no Sb/Br) SN65HVD24DG4 ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP24 & no Sb/Br) SN65HVD24DR ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP24 & no Sb/Br) SN65HVD24DRG4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP24 & no Sb/Br) SN65HVD24P LIFEBUY PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type -40 to 85 65HVD24 (RoHS) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 9-May-2017 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2016 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN65HVD20DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN65HVD21DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN65HVD22DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN65HVD23DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN65HVD24DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2016 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN65HVD20DR SOIC D 8 2500 340.5 338.1 20.6 SN65HVD21DR SOIC D 8 2500 340.5 338.1 20.6 SN65HVD22DR SOIC D 8 2500 340.5 338.1 20.6 SN65HVD23DR SOIC D 8 2500 340.5 338.1 20.6 SN65HVD24DR SOIC D 8 2500 340.5 338.1 20.6 PackMaterials-Page2

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