Product Sample & Technical Tools & Support & Reference Folder Buy Documents Software Community Design SN65HVD11-HT SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 SN65HVD11-HT 3.3-V RS-485 Transceiver 1 Features 2 Applications • OperatesWitha3.3-VSupply • Down-HoleDrilling 1 • Bus-PinESDProtectionExceeds16-kVHuman- • HighTemperatureEnvironments BodyModel(HBM) • DigitalMotorControls • 1/8Unit-LoadOptionAvailable(upto256Nodes • UtilityMeters onBus) • Chassis-to-ChassisInterconnects • OptionalDriverOutputTransitionTimesfor • ElectronicSecurityStations SignalingRates (1)of1Mbps,10Mbps,and • IndustrialProcessControls 32Mbps • BuildingAutomation • BasedonANSITIA/EIA-485-A • Point-of-Sale(POS)TerminalsandNetworks • Bus-PinShortCircuitProtectionFrom –7Vto12V 3 Description • Open-Circuit,Idle-Bus,andShorted-BusFail-Safe The SN65HVD11-HT device combines a 3-state Receiver differential line driver and differential input line • Glitch-FreePower-UpandPower-DownProtection receiver that operates with a single 3.3-V power forHot-PluggingApplications supply. It is designed for balanced transmission lines • SN75176Footprint and meets or exceeds ANSI TIA/EIA-485-A and ISO 8482:1993, with the exception that the thermal • SupportsExtremeTemperatureApplications: shutdownisremoved.Thisdifferentialbustransceiver – ControlledBaselines is a monolithic integrated circuit designed for – OneAssemblyandTestSites bidirectional data communication on multipoint bus- transmission lines. The driver and receiver have – OneFabricationSites active-high and active-low enables, respectively, that – AvailableinExtreme(–55°C/210°C) can be externally connected together to function as TemperatureRange (2) directioncontrol. – ExtendedProductLifeCycles The driver differential outputs and receiver differential – ExtendedProduct-ChangeNotifications inputs connect internally to form a differential input/ – ProductTraceability output (I/O) bus port that is designed to offer minimum loading to the bus when the driver is – TexasInstruments'HighTemperature disabledorV =0. CC ProductsUseHighlyOptimizedSilicon(Die) SolutionsWithDesignandProcess DeviceInformation(1) EnhancementstoMaximizePerformanceOver PARTNUMBER PACKAGE BODYSIZE(NOM) ExtendedTemperatures. SOIC(8) 4.90mm×3.91mm CFP(8)(2) 6.90mm×5.65mm SN65HVD11-HT CFP(8)(3) 6.90mm×5.65mm CDIPSB(8) 11.81mm×7.49mm (1) For all available packages, see the orderable addendum at (1) Thesignalingrateofalineisthenumberofvoltage theendofthedatasheet. transitionsthataremadepersecondexpressedintheunits (2) HKJPackage bitspersecond(bps). (2) Customtemperaturerangesavailable (3) HKQPackage TypicalApplicationDiagram R R R R RE A A RE DE B RT RT B DE D D A B A B D D R R D D R RE DE D R RE DE D 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

SN65HVD11-HT SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 www.ti.com Table of Contents 1 Features.................................................................. 1 8.2 FunctionalBlockDiagram.......................................19 2 Applications........................................................... 1 8.3 FeatureDescription.................................................19 3 Description............................................................. 1 8.4 DeviceFunctionalModes........................................19 4 RevisionHistory..................................................... 2 9 ApplicationandImplementation........................ 21 9.1 ApplicationInformation............................................21 5 PinConfigurationandFunctions......................... 3 9.2 TypicalApplication..................................................22 6 Specifications......................................................... 4 10 PowerSupplyRecommendations..................... 25 6.1 AbsoluteMaximumRatings......................................4 11 Layout................................................................... 25 6.2 ESDRatings..............................................................5 6.3 RecommendedOperatingConditions.......................5 11.1 LayoutGuidelines.................................................25 6.4 ThermalInformation..................................................5 11.2 LayoutExample....................................................25 6.5 DriverElectricalCharacteristics................................6 11.3 ThermalConsiderations........................................26 6.6 ReceiverElectricalCharacteristics...........................7 12 DeviceandDocumentationSupport................. 27 6.7 DriverSwitchingCharacteristics...............................8 12.1 CommunityResources..........................................27 6.8 ReceiverSwitchingCharacteristics...........................9 12.2 Trademarks...........................................................27 6.9 TypicalCharacteristics............................................12 12.3 ElectrostaticDischargeCaution............................27 7 ParameterMeasurementInformation................14 12.4 Glossary................................................................27 8 DetailedDescription............................................ 19 13 Mechanical,Packaging,andOrderable Information........................................................... 27 8.1 Overview.................................................................19 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionE(June2012)toRevisionF Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection ................................................................................................. 1 2 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT www.ti.com SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 5 Pin Configuration and Functions D,JD,orHKJPackage 8-PinSOIC,PDIP,orCFP HKQPackage TopView 8-PinCFP TopView R 1 8 VCC 8 1 RE 2 7 B VCC R DE 3 6 A B RE D 4 5 GND A DE GND D 5 4 PinFunctions PIN SOIC, TYPE DESCRIPTION NAME HKQ PDIP A 6 6 Businput/output Driveroutputorreceiverinput(complementarytoB) B 7 7 Businput/output Driveroutputorreceiverinput(complementarytoA) D 4 4 Digitalinput Driverdatainput DE 3 3 Digitalinput Active-highdriverenable Reference GND 5 5 Localdeviceground potential R 1 1 Digitaloutput Receivedataoutput RE 2 2 Digitalinput Active-lowreceiverenable V 8 8 Supply 3-Vto3.6-Vsupply CC BareDieInformation BACKSIDE BONDPAD DIETHICKNESS BACKSIDEFINISH POTENTIAL METALLIZATIONCOMPOSITION 15mils. Siliconwithbackgrind GND Cu-Ni-Pd BondPadCoordinatesinMicrons-RevA DESCRIPTION(1) PADNUMBER a b c d R 1 69.3 372.15 185.3 489.15 ~RE 2 388.75 71.5 503.75 186.5 DNC 3 722.4 55.4 839.4 172.4 DNC 4 891.4 55.4 1008.4 172.4 DE 5 1174.8 71.5 1289.8 186.5 DNC 6 1754.35 65.4 1869.35 180.4 DNC 7 1907.35 65.4 2022.35 180.4 D 8 2280.55 69.5 2395.55 184.5 DNC 9 2733.5 371.5 2848.5 486.5 GND 10 2691 1693.1 2808 1810.1 GND 11 2535 1693.1 2652 1810.1 DNC 12 2253.45 1685.65 2368.45 1800.65 A 13 1961.55 1693.1 2078.55 1810.1 B 14 799.55 1693.1 916.55 1810.1 DNC 15 498.35 1681.2 613.35 1796.2 VCC 16 244.8 1668.5 359.8 1783.5 (1) DNC=DoNotConnect Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 www.ti.com BondPadCoordinatesinMicrons-RevA(continued) DESCRIPTION(1) PADNUMBER a b c d VCC 17 91.8 1668.5 206.8 1783.5 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT V Supplyvoltage –0.3 6 V CC VoltageatAorB –9 14 V InputvoltageatD,DE,R,orRE –0.5 V +0.5 V CC Voltageinput,transientpulse,AandB,through100Ω(see –50 50 V Figure20) I Receiveroutputcurrent –11 11 mA O Continuoustotalpowerdissipation SeeThermalInformation (1) Allvoltagevalues,exceptdifferentialI/Obusvoltages,arewithrespecttonetworkgroundterminal. 4 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT www.ti.com SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 6.2 ESD Ratings VALUE UNIT A,B,andGND ±16000 Electrostatic Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) V Allpins ±4000 V (ESD) discharge Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±1000 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions MIN NOM MAX UNIT V Supplyvoltage 3 3.6 V CC V orV Voltageatanybusterminal(separatelyorcommon-mode) –7(1) 12 V I IC V High-levelinputvoltage D,DE,RE 2 V V IH CC V Low-levelinputvoltage D,DE,RE 0 0.8 V IL V Differentialinputvoltage Figure16 –12 12 V ID Driver –60 I High-leveloutputcurrent mA OH Receiver –8 Driver 60 I Low-leveloutputcurrent mA OL Receiver 8 R Differentialloadresistance 54 60 Ω L C Differentialloadcapacitance 50 pF L Signalingrate 10 Mbps T =–55°Cto125°C 129 A T (2) Operatingjunctiontemperature T =175°C 179 °C J A T =210°C 214 A (1) Thealgebraicconvention,inwhichtheleast-positive(most-negative)limitisdesignatedasminimum,isusedinthisdatasheet. (2) SeeThermalInformationtableforinformationregardingthisspecification. 6.4 Thermal Information SN65HVD11-HT THERMALMETRIC(1) D(SOIC) JD(CDIPSB) HKJ(CFP) HKQ(CFP) UNIT 8PINS 8PINS 8PINS 8PINS R Junction-to-ambientthermalresistance 101.5 73.9 N/A 170 °C/W θJA R Junction-to-case(top)thermalresistance 53.6 N/A N/A 6.2 °C/W θJC(top) R Junction-to-boardthermalresistance 45.1 39.8 N/A 195 °C/W θJB ψ Junction-to-topcharacterizationparameter 4.8 6.9 N/A 3.8 °C/W JT ψ Junction-to-boardcharacterizationparameter 41.8 49.2 N/A 146.8 °C/W JB R Junction-to-case(bottom)thermalresistance N/A 9.1 6.2 N/A °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 www.ti.com 6.5 Driver Electrical Characteristics overrecommendedoperatingconditions(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT VIK Inputclampvoltage II=–18mA –1.5 V IO=0 2 VCC |VOD| Dvoiflfteargeentialoutput RL=54Ω,SeeFigure10 1 V Vtest=–7Vto12V, 1 SeeFigure11 Changeinmagnitude Δ|VOD| ofdifferentialoutput VSteeestF=ig–u7reV1to01a2ndV,Figure11 –0.2 0.2 V voltage Peak-to-peakcommon VOC(PP) modeoutputvoltage SeeFigure12 400 mV Steady-statecommon VOC(SS) modeoutputvoltage SeeFigure12 1.4 2.5 V Changeinsteady-state ΔVOC(SS) commonmodeoutput SeeFigure12 –0.06 0.06 V voltage High-impedanceoutput IOZ current Seereceiverinputcurrents TA=–55°Cto125°C –100 0 Input D TA=175°C(1) –100 3 II current TA=210°C(2) –100 3 μA DE 0 100 Shortcircuitoutput IOS current –7V≤VO≤12V –250 250 mA C(OD) Dcaifpfearceitnatniacleoutput VDOED==00V.4sin(4E6πt)+0.5V, 18 pF RE=VCC, T12A5=°C–55°Cto 11 15.5 Dand Receiverdisabled DE=VCC, anddriverenabled TA=175°C(1) 11.5 17.5 mA Noload TA=210°C(2) 14 18 RE=VCC, Receiverdisabled T12A5=°C–55°Cto 2.5 20 ICC Supplycurrent DDE==VC0CV,, a(sntadnddrbivye)rdisabled TA=175°C(1) 20 150 μA Noload TA=210°C(2) 175 450 RE=0V, TA=–55°Cto 11 15.5 125°C Dand Receiverenabledand DE=VCC, driverenabled TA=175°C(1) 11 17.5 mA Noload TA=210°C(2) 11 18 (1) MinimumandmaximumparametersarecharacterizedforoperationatT =175°Cbutmaynotbeproductiontestedatthattemperature. A Productiontestlimitswithstatisticalguardbandsareusedtoensurehightemperatureperformance. (2) MinimumandmaximumparametersarecharacterizedforoperationatT =210°Cbutmaynotbeproductiontestedatthattemperature. A Productiontestlimitswithstatisticalguardbandsareusedtoensurehightemperatureperformance. 6 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT www.ti.com SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 6.6 Receiver Electrical Characteristics overrecommendedoperatingconditions(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT Positive-goinginput VIT+ thresholdvoltage IO=–8mA –0.01 V Negative-going VIT– inputthreshold IO=8mA –0.2 V voltage TA=–55°Cto125°C 35 Vhys H(VyITs+te–rVesITis–)voltage TA=175°C(1) 41 mV TA=210°C(2) 41 Enable-inputclamp VIK voltage II=–18mA –1.5 V VOH Hvoigltha-gleeveloutput VSIeDe=F2ig0u0rem1V6,IOH=–8mA, 2.4 V VOL Lvoolwta-gleeveloutput VSIeDe=F–ig2u0r0em16V,IOL=8mA, 0.4 V High-impedance IOZ stateoutputcurrent VO=0orVCC,RE=VCC –1 1 μA TA=–55°Cto125°C 0.075 0.11 VAorVB=12V TA=175°C(1) 0.1 0.15 TA=210°C(2) 0.1 0.15 TA=–55°Cto125°C 0.085 0.13 VVACCor=V0BV=12V, TA=175°C(1) 0.12 0.16 Otherinput TA=210°C(2) 0.12 0.16 II Businputcurrent at0V TA=–55°Cto125°C –0.1 –0.05 mA VAorVB=–7V TA=175°C(1) –0.3 –0.15 TA=210°C(2) –0.3 –0.15 TA=–55°Cto125°C –0.1 –0.05 VVACCor=V0BV=–7V, TA=175°C(1) –0.3 –0.15 TA=210°C(2) –0.3 –0.15 TA=–55°Cto125°C –30 0 IIH Hcuigrrhe-nlet,veRlEinput VIH=2V TA=175°C(1) –30 3 μA TA=210°C(2) –30 3 Low-levelinput IIL current,RE VIL=0.8V –30 0 μA TA=–55°Cto125°C 15 CID Dcaifpfearceitnatniacleinput VDIED=at00.4Vsin(4E6πt)+0.5V, TA=175°C(1) 18 pF TA=210°C(2) 18 RE=0V, Receiver TA=–55°Cto125°C 5 8 DandDE=0V, enabledand TA=175°C(1) 7.5 8.5 mA Noload driverdisabled TA=210°C(2) 7.5 10 RE=VCC, Receiver TA=–55°Cto125°C 2.5 20 ICC Supplycurrent DDE==VC0CV,, ddirsivaebrleddisaanbdled TA=175°C(1) 12.5 200 μA Noload (standby) TA=210°C(2) 175 450 RE=0V, Receiver TA=–55°Cto125°C 11 15.5 DandDE=VCC, enabledand TA=175°C(1) 11.5 17.5 mA Noload driverenabled TA=210°C(2) 14 18 (1) MinimumandmaximumparametersarecharacterizedforoperationatT =175°Cbutmaynotbeproductiontestedatthattemperature. A Productiontestlimitswithstatisticalguardbandsareusedtoensurehightemperatureperformance. (2) MinimumandmaximumparametersarecharacterizedforoperationatT =210°Cbutmaynotbeproductiontestedatthattemperature. A Productiontestlimitswithstatisticalguardbandsareusedtoensurehightemperatureperformance. Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 www.ti.com 6.7 Driver Switching Characteristics overrecommendedoperatingconditions(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT Propagationdelaytime,low- tPLH to-high-leveloutput 18 25 40 ns Propagationdelaytime,high- tPHL to-low-leveloutput 18 25 40 ns TA=–55°Cto125°C 10 21 30 tr Dtimiffeerentialoutputsignalrise RL=54Ω, TA=175°C(1) 10 22 30 ns CL=50pF, TA=210°C(2) 10 22 30 SeeFigure13 TA=–55°Cto125°C 10 21 30 tf Dtimiffeerentialoutputsignalfall TA=175°C(1) 10 22 30 ns TA=210°C(2) 10 22 30 tsk(p) Pulseskew(|tPHL–tPLH|) 2.5 ns tsk(pp)(3) Part-to-partskew(tPHLortPLH) 11 ns Propagationdelaytime,high- RL=110Ω, tPZH impedancetohigh-level RE=0V, 55 ns output SeeFigure14 Propagationdelaytime,high- tPHZ leveltohigh-impedance 55 ns output Propagationdelaytime,high- RL=110Ω, tPZL impedancetolow-leveloutput RE=0V, 55 ns SeeFigure15 Propagationdelaytime,low- tPLZ leveltohigh-impedance 75 ns output Propagationdelaytime, RL=110Ω, tPZH standbytohigh-leveloutput RE=3V, 6 μs SeeFigure14 Propagationdelaytime, RL=110Ω, tPZL standbytolow-leveloutput RE=3V, 6 μs SeeFigure15 (1) MinimumandmaximumparametersarecharacterizedforoperationatT =175°Cbutmaynotbeproductiontestedatthattemperature. A Productiontestlimitswithstatisticalguardbandsareusedtoensurehightemperatureperformance. (2) MinimumandmaximumparametersarecharacterizedforoperationatT =210°Cbutmaynotbeproductiontestedatthattemperature. A Productiontestlimitswithstatisticalguardbandsareusedtoensurehightemperatureperformance. (3) t isthemagnitudeofthedifferenceinpropagationdelaytimesbetweenanyspecifiedterminalsoftwodeviceswhenbothdevices sk(pp) operatewiththesamesupplyvoltages,atthesametemperature,andhaveidenticalpackagesandtestcircuits. 8 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT www.ti.com SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 6.8 Receiver Switching Characteristics overrecommendedoperatingconditions(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT Propagationdelaytime,low-to-high- tPLH leveloutput 30 55 70 ns tPHL Plervoeplaoguatptiount delaytime,high-to-low- VCILD==1–51.p5FV, to1.5V, 30 55 70 ns SeeFigure17 tsk(p) Pulseskew(|tPHL–tPLH|) 4 ns tsk(pp)(1) Part-to-partskew 15 ns TA=–55°Cto 1 3 5 125°C tr Outputsignalrisetime TA=175°C(2) 1 4 5 ns CL=15pF, TA=210°C(3) 1 4 5 SeeFigure17 TA=–55°Cto 1 3 5 125°C tf Outputsignalfalltime TA=175°C(2) 1 4 5 ns TA=210°C(3) 1 4 5 tPZH(3) Outputenabletimetohighlevel 15 ns tPZL(3) Outputenabletimetolowlevel CL=15pF,DE=3V, 15 ns tPHZ Outputdisabletimefromhighlevel SeeFigure18 20 ns tPLZ Outputdisabletimefromlowlevel 15 ns tPZH(1) Phirgohp-alegvaetiloonudtpeulatytime,standby-to- CL=15pF,DE=0, 6 μs tPZL(1) Plorwo-pleavgealtioountpduetlaytime,standby-to- SeeFigure19 6 μs (1) t isthemagnitudeofthedifferenceinpropagationdelaytimesbetweenanyspecifiedterminalsoftwodeviceswhenbothdevices sk(pp) operatewiththesamesupplyvoltages,atthesametemperature,andhaveidenticalpackagesandtestcircuits. (2) MinimumandmaximumparametersarecharacterizedforoperationatT =175°Cbutmaynotbeproductiontestedatthattemperature. A Productiontestlimitswithstatisticalguardbandsareusedtoensurehightemperatureperformance. (3) MinimumandmaximumparametersarecharacterizedforoperationatT =210°Cbutmaynotbeproductiontestedatthattemperature. A Productiontestlimitswithstatisticalguardbandsareusedtoensurehightemperatureperformance. Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 www.ti.com xxx 1000000 s) 100000 r u o H ( e ElectromigrationFailMode Lif d e at m sti E 10000 WirebondFailMode 1000 110 120 130 140 150 160 170 180 190 200 210 ContinuousT (°C) J (1) Seedatasheetforabsolutemaximumandminimumrecommendedoperatingconditions. (2) Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life). (3) Thepredictedoperatinglifetimevs.junctiontemperatureisbasedonreliabilitymodelingusingelectromigrationasthe dominantfailuremechanismaffectingdevicewearoutforthespecificdeviceprocessanddesigncharacteristics. (4) WirebondfailmodeapplicableforDpackageonly. (5) Wirebondlifeapproaches0hours<200°CwhichisonlytrueoftheHDdevice. Figure1. SN65HVD11SJD/SKGDA/SHKJ/SHKQ/HD OperatingLifeDeratingChart 10 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT www.ti.com SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 375W±1% Y -7 V < V < 12 V (TEST) D 60W V 0 or 3 V OD ±1% Z DE 375W±1% Input V 50W Generator 50% t (diff) pZH V (high) OD 1.5 V 0 V t (diff) pZL -1.5 V V (low) OD Note: Thetimet (x)isthemeasurefromDEtoV (x).V isvalidwhenitisgreaterthan1.5V. pZL OD OD Figure2. DriverEnableTimeFromDetoV OD Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 www.ti.com 6.9 Typical Characteristics 70 90 TA= 25°C RL= 54W 80 TA= 25°C REat VCC CL= 50 pF VCC= 3.6 V 70 DE at 0 V mA DE at VCC 60 RMS Supply Current− 5600 VCC= 3 V Bus InpAut Current−m −1234510000000 VCC= 0 VVCC= 3.3 V −CC 40 VCC= 3.3 V I−I −20 I −30 −40 −50 30 −60 0 2.5 5 7.5 10 −7−6−5−4−3−2−10 1 2 3 4 5 6 7 8 9101112 Signaling Rate−Mbps VI−Bus Input Voltage−V Figure3.RMSSupplyCurrentvsSignalingRate Figure4.BusInputCurrentvsBusInputVoltage 150 200 mA 100 TDAE =a t2 5V°CCC A 180 TDAE =a t2 5V°CCC − D at VCC m 160 D at 0 V utput Current 500 VCC= 3.3 V put Current− 111024000 VCC= 3.3 V −High-Level O −−15000 Low-Level Out 468000 IOH−150 −IOL 20 0 −200 −20 −4 −2 0 2 4 6 −4 −2 0 2 4 6 8 VOH−Driver High-Level Output Voltage−V VOL−Driver Low-Level Output Voltage−V Figure5.High-LevelOutputCurrentvsDriverHigh-Level Figure6.Low-LevelOutputCurrentvsDriverLow-Level OutputVoltage OutputVoltage 2.5 −40 TA= 25°C 2.4 VCC=3.3V −35 DE at VCC –V 2.3 VTest=12V mA DRL a=t V5C4CW ut − −30 alOutp 22..12 Current −25 erenti 2.0 utput −20 V–DriverDiffOD 111...789 −Driver OIO −−1150 1.6 −5 1.5 0 -100 -50 0 50 100 150 200 250 0 0.50 1 1.50 2 2.50 3 3.50 TA–Free-AirTemperature–°C VCC−Supply Voltage−V Figure7.DriverDifferentialOutputvsFree-AirTemperature Figure8.DriverOutputCurrentvsSupplyVoltage 12 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT www.ti.com SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 Typical Characteristics (continued) 600 500 s 400 n − e m iT 300 e bl a n E 200 100 0 -7 -2 3 8 13 V(TEST)−Common-Mode Voltage−V Figure9.EnableTimevsCommonModeVoltage (SeeFigure2) Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 www.ti.com 7 Parameter Measurement Information V CC II DEA IOA 0 or 3 V VOD 54Ω±1% B I OB V I V V OB OA Figure10. DriverV TestCircuitandVoltageandCurrentDefinitions OD 375Ω±1% VCC DE A D 0 or 3 V VOD 60Ω±1% + B _ −7 V < V(test)< 12 V 375Ω±1% Figure11. DriverV WithCommonModeLoadingTestCircuit OD A VA VCC 27Ω ±1% DE B VB A Input D VOC(PP) ∆VOC(SS) 27Ω ±1% B VOC CL= 50 pF±20% VOC A. Input:PRR = 500 kHz, 50% Duty Cycle, tr<6ns, tf<6ns, ZO= 50Ω B. CLIncludes fixture and instrumentation capacitance Figure12. TestCircuitandDefinitionsforDriverCommonModeOutputVoltage 3 V VCC DE CL = 50 pF ±20% VI 1.5 V 1.5 V A D VOD CL Includes Fixture tPLH tPHL GeInnepruattor VI 50 W B R± L1 %= 54 W aCnadp aIncsittarunmceentation 0 V 90% 90% 0 V ≈ 2 V VOD 10% 10% ≈ –2 V tr tf Generator: PRR = 500 kHz, 50% Duty Cycle, tr <6 ns, tf <6 ns, Zo = 50 W Figure13. DriverSwitchingTestCircuitandVoltageWaveforms 14 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT www.ti.com SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 Parameter Measurement Information (continued) 3 V A S1 3 V D VO VI 1.5 V 1.5 V B 0 V DE 0.5 V CL = 50 pF ±20% RL = 110 W tPZH GeInnepruattor VI 50 W CL Includes Fixture ± 1% VOH and Instrumentation Capacitance VO 2.3 V ≈ 0 V tPHZ Generator: PRR = 500 kHz, 50% Duty Cycle, tr <6 ns, tf <6 ns, Zo = 50 W Figure14. DriverHigh-LevelEnableandDisableTimeTestCircuitandVoltageWaveforms 3 V RL = 110 Ω ≈ 3 V ± 1% A S1 VI 1.5 V 1.5 V D 3 V VO 0 V B DE tPZL tPLZ Input CL = 50 pF ±20% ≈ 3 V Generator VI 50 W 0.5 V aCndL IInncslturudmese nFtixattuiorne VO 2.3 V Capacitance VOL Generator: PRR = 500 kHz, 50% Duty Cycle, tr <6 ns, tf <6 ns, Zo = 50 W Figure15. DriverLow-LevelOutputEnableandDisableTimeTestCircuitandVoltageWaveforms IA A VA R IO VID B VA + VB VIC VB IB VO 2 Figure16. ReceiverVoltageandCurrentDefinitions Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 www.ti.com Parameter Measurement Information (continued) A Input R VO Generator VI 50 W B 1.5 V CL = 15 pF ±20% RE 0 V CL Includes Fixture and Instrumentation Capacitance Generator: PRR = 500 kHz, 50% Duty Cycle, tr <6 ns, tf <6 ns, Zo = 50 W 3 V VI 1.5 V 1.5 V 0 V tPLH tPHL VOH 90% 90% VO 1.5 V 1.5 V 10% 10% VOL tr tf Figure17. ReceiverSwitchingTestCircuitandVoltageWaveforms 3 V 3 V 0 V or 3 V D DE A R VO 1 kW ± 1% SA1 B CL = 15 pF ±20% RE B CL Includes Fixture and Instrumentation Input Capacitance Generator VI 50 W Generator: PRR = 500 kHz, 50% Duty Cycle, tr <6 ns, tf <6 ns, Zo = 50 W 3 V VI 1.5 V 1.5 V 0 V tPZH(1) tPHZ VOH D at 3 V VOH –0.5 V S1 to B VO 1.5 V ≈ 0 V tPZL(1) tPLZ ≈ 3 V D at 0 V VO 1.5 V S1 to A VOL +0.5 V VOL Figure18. ReceiverEnableandDisableTimeTestCircuitandVoltageWaveformsWithDriversEnabled 16 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT www.ti.com SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 Parameter Measurement Information (continued) 3 V A A 0 V or 1.5 V R VO 1 kW ± 1% S1 B 1.5 V or 0 V RE CL = 15 pF ±20% B CL Includes Fixture and Instrumentation Input Capacitance Generator VI 50 W Generator: PRR = 100 kHz, 50% Duty Cycle, tr <6 ns, tf <6 ns, Zo = 50 W 3 V VI 1.5 V 0 V tPZH(2) VOH A at 1.5 V B at 0 V VO 1.5 V S1 to B GND tPZL(2) 3 V A at 0 V B at 1.5 V VO 1.5 V S1 to A VOL Figure19. ReceiverEnableTimeFromStandby(DriverDisabled) 0 V or 3 V RE A R B 100 W ± 1% Pulse Generator, 15 m s Duration, + D 1% Duty Cycle _ tr, tf ≤ 100 ns DE 3 V or 0 V NOTE: This test is conducted to test survivability only. Data stability at the R output is not specified. Figure20. TestCircuit,TransientOvervoltageTest Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 www.ti.com Parameter Measurement Information (continued) D and REInputs DE Input VCC VCC 100 kΩ 1 kΩ 1 kΩ Input Input 9V 100 kΩ 9V A Input B Input VCC VCC 16V 16V R1 R1 R3 R3 Input Input R2 R2 16V 16V A and B Outputs R Output VCC VCC 16V 5Ω Output Output 9V 16V R1/R2 = 36 kΩ R3 = 180 kΩ Figure21. EquivalentInputandOutputSchematicDiagrams 18 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT www.ti.com SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 8 Detailed Description 8.1 Overview The SN65HVD11-HT device is a 3.3 V, half-duplex, RS-485 transceiver available in 3 speed grades suitable for datatransmissionupto32Mbps,10Mbps,and1Mbps,respectively. The device has active-high driver enables and active-low receiver enables. A standby current of less than 5µAcanbeachievedbydisablingbothdriverandreceiver. 8.2 Functional Block Diagram 8.3 Feature Description Internal ESD protection circuits protect the transceiver bus terminals against ±16-kV Human Body Model (HBM) electrostaticdischargesand±4-kVelectricalfasttransients(EFT)accordingtoIEC61000-4-4. The SN65HVD11-HT half-duplex device provides internal biasing of the receiver input thresholds for open-circuit, bus-idle,orshortcircuitfailsafeconditions,andatypicalreceiverhysteresisof35mV. 8.4 Device Functional Modes When the driver enable pin, DE, is logic high, the differential outputs A and B follow the logic states at data input D.AlogichighatDcausesAtoturnhighandBtoturnlow.Inthiscasethedifferentialoutputvoltagedefinedas V = V – V is positive. When D is low, the output states reverse, B turns high, A becomes low, and V is OD A B OD negative. When DE is low, both outputs turn high-impedance. In this condition the logic state at D is irrelevant. The DE pin has an internal pulldown resistor to ground; thus, when left open, the driver is disabled (high-impedance) by default.TheDpinhasaninternalpullupresistortoV ;thus,whenleftopenwhilethedriverisenabled,outputA CC turnshighandBturnslow. Table1.DriverFunctions(1) INPUT ENABLE OUTPUTS FUNCTION D DE A B H H H L ActivelydrivebusHigh L H L H ActivelydrivebusLow X L Z Z Driverdisabled X OPEN Z Z Driverdisabledbydefault OPEN H H L ActivelydrivebusHighbydefault (1) H=highlevel;L=lowlevel;Z=highimpedance;X=irrelevant;?=indeterminate Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 www.ti.com When the receiver enable pin, RE, is logic low, the receiver is enabled. When the differential input voltage defined as V = V – V is positive and higher than the positive input threshold, V , the receiver output, R, ID A B IT+ turns high. When V is negative and lower than the negative input threshold, V , the receiver output, R, turns ID IT– low.IfV isbetweenV andV ,theoutputisindeterminate. ID IT+ IT– When RE is logic high or left open, the receiver output is high-impedance and the magnitude and polarity of V ID are irrelevant. Internal biasing of the receiver inputs causes the output to go failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted (short-circuit), or the bus is not actively driven (idlebus). Table2.ReceiverFunctions(1) DIFFERENTIALINPUT ENABLE OUTPUT FUNCTION V =V –V RE R ID A B V >V L H ReceivevalidbusHigh ID IT+ V <V <V L ? Indeterminatebusstate IT– ID IT+ V <V L L ReceivevalidbusLow ID IT– X H Z Receiverdisabled X OPEN Z Receiverdisabledbydefault Open-circuitbus L H Fail-safehighoutput Shortcircuitbus L H Fail-safehighoutput (1) H=highlevel;L=lowlevel;Z=highimpedance;X=irrelevant;?=indeterminate 8.4.1 Low-PowerStandbyMode When both the driver and receiver are disabled (DE low and RE high) the device is in standby mode. If the enable inputs are in this state for less than 60 ns, the device does not enter standby mode. This guards against inadvertently entering standby mode during driver or receiver enabling. Only when the enable inputs are held in thisstatefor300nsormore,thedeviceisassuredtobeinstandbymode.Inthislow-powerstandbymode,most internalcircuitryispowereddown,andthesupplycurrentistypicallylessthan1 µA.Wheneitherthedriverorthe receiverisreenabled,theinternalcircuitrybecomesactive. 20 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT www.ti.com SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information The SN65HVD11-HT is a half-duplex RS-485 transceiver commonly used for asynchronous data transmissions. Thedriverandreceiverenablepinsallowfortheconfigurationofdifferentoperatingmodes. R R R R R R RE A RE A RE A DE B DE B DE B D D D D D D a) Independent driver and b) Combined enable signals for c) Receiver always on receiver enable signals use as directional control pin Figure22. Half-DuplexTransceiverConfigurations a. Using independent enable lines provides the most flexible control as it allows for the driver and the receiver to be turned on and off individually. While this configuration requires two control lines, it allows for selective listeningintothebustraffic,whetherthedriveristransmittingdataornot. b. Combining the enable signals simplifies the interface to the controller by forming a single direction-control signal. In this configuration, the transceiver operates as a driver when the direction-control line is high, and asareceiverwhenthedirection-controllineislow. c. Only one line is required when connecting the receiver-enable input to ground and controlling only the driver- enable input. In this configuration, a node not only receives the data from the bus, but also the data it sends andcanverifythatthecorrectdatahavebeentransmitted. Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 www.ti.com 9.2 Typical Application An RS-485 bus consists of multiple transceivers connected in parallel to a bus cable. To eliminate line reflections, each cable end is terminated with a termination resistor, R , whose value matches the characteristic T impedance, Z , of the cable. This method, known as parallel termination, allows for higher data rates over a 0 longercablelength. R R R R A A RE RE B RT RT B DE DE D D D D A B A B R R D D R RE DE D R RE DE D Figure23. TypicalRS-485NetworkWithHalf-DuplexTransceivers 9.2.1 DesignRequirements RS-485 is a robust electrical standard suitable for long-distance networking that may be used in a wide range of applicationswithvaryingrequirements,suchasdistance,datarate,andnumberofnodes. 9.2.1.1 DataRateandBusLength There is an inverse relationship between data rate and bus length, meaning the higher the data rate, the shorter the cable length; and conversely, the lower the data rate, the longer the cable may be without introducing data errors. While most RS-485 systems use data rates between 10 kbps and 100 kbps, some applications require data rates up to 250 kbps at distances of 4000 feet and longer. Longer distances are possible by allowing for smallsignaljitterofupto5or10%. 10000 5%, 10%, and 20% Jitter h (ft) 1000 gt Conservative n e Characteristics L e bl 100 a C 10 100 1k 10k 100k 1M 10M 100M Data Rate(bps) Figure24. CableLengthvsDataRateCharacteristic 22 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT www.ti.com SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 Typical Application (continued) 9.2.1.2 StubLength When connecting a node to the bus, the distance between the transceiver inputs and the cable trunk, known as the stub, should be as short as possible. Stubs present a nonterminated piece of bus line which can introduce reflections as the length of the stub increases. As a general guideline, the electrical length, or round-trip delay, of a stub should be less than one-tenth of the rise time of the driver, thus giving a maximum physical stub length as showninEquation1. L ≤0.1×t ×v×c (STUB) r where • t isthe10/90risetimeofthedriver r • visthesignalvelocityofthecableortraceasafactorofc • cisthespeedoflight(3×108m/s) (1) Per Equation 1, Table 3 lists the maximum cable-stub lengths for the minimum-driver output rise-times of the SN65HVD1xfull-duplexfamilyoftransceiversforasignalvelocityof78%. Table3.MaximumStubLength MINIMUMDRIVEROUTPUT MAXIMUMSTUBLENGTH DEVICE RISETIME(ns) (m) (ft) SN65HVD11-HT 10 0.23 0.75 9.2.1.3 BusLoading The RS-485 standard specifies that a compliant driver must be able to driver 32 unit loads (UL), where 1 unit load represents a load impedance of approximately 12 kΩ. Because the SN65HVD11-HT and HVD12 are each 1/8 UL transceivers, it is possible to connect up to 256 receivers to the bus. The SN65HVD11-HT is a 1/4 UL transceiver,andupto64receiversmaybeconnectedtothebus. 9.2.1.4 ReceiverFailsafe ThedifferentialreceiversoftheSN65HVD11-HTarefailsafetoinvalidbusstatescausedby: • Openbusconditions,suchasadisconnectedconnector • Shortedbusconditions,suchascabledamageshortingthetwisted-pairtogether • Idlebusconditionsthatoccurwhennodriveronthebusisactivelydriving. In any of these cases, the differential receiver will output a failsafe logic High state so that the output of the receiverisnotindeterminate. Receiver failsafe is accomplished by offsetting the receiver thresholds such that the input indeterminate range does not include zero volts differential. To comply with the RS-422 and RS-485 standards, the receiver output mustoutputaHighwhenthedifferentialinputV ismorepositivethan200mV,andmustoutputaLowwhenV ID ID ismorenegativethan–200mV.ThereceiverparameterswhichdeterminethefailsafeperformanceareV and IT(+) V . As shown in Receiver Electrical Characteristics, differential signals more negative than –200 mV will IT(–) always cause a Low receiver output, and differential signals more positive than 200 mV will always cause a High receiveroutput. When the differential input signal is close to zero, it is still above the maximum V threshold of –10 mV, and IT(+) thereceiveroutputwillbeHigh. 9.2.2 DetailedDesignProcedure To protect bus nodes against high-energy transients, the implementation of external transient protection devices is therefore necessary. Figure 25 shows a protection circuit against 10-kV ESD (IEC 61000-4-2), 4-kV EFT (IEC 61000-4-4),and1-kVsurge(IEC61000-4-5)transients. Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 www.ti.com Vcc Vcc 10k 0.1μF R1 RxD 1 R Vcc 8 TVS MCU 2 RE A 7 XCVR DIR 3 DE B 6 TxD 4 D GND 5 R2 10k Figure25. TransientProtectionAgainstESD,EFT,andSurgeTransients Table4.BillofMaterials DEVICE FUNCTION ORDERNUMBER MANUFACTURER 3.3-V,full-duplexRS-485 XCVR SN65HVD11-HT TI transceiver 10-Ω,pulse-proof,thick-film R1,R2 CRCW0603010RJNEAHP Vishay resistor Bidirectional400-W TVS CDSOT23-SM712 Bourns transientsuppressor 9.2.3 ApplicationCurve Figure 26 demonstrates operation of the SN65HVD11-HT at a signaling rate of 250 kbps. Two SN65HVD11-HT transceivers are used to transmit data through a 2000 foot (600 m) segment of Commscope 5524 category 5e+ twisted pair cable. The bus is terminated at each end by a 100-Ω resistor, matching the cable characteristic impedance. Driver Input Driver Output Receiver Input Receiver Output Figure26. SN65HVD11-HTInputandOutputThrough2000FeetofCable 24 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT www.ti.com SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 10 Power Supply Recommendations To assure reliable operation at all data rates and supply voltages, each supply must be buffered with a 100-nF ceramic capacitor located as close to the supply pins as possible. The TPS76333 linear voltage regulator is suitableforthe3.3-Vsupply. 11 Layout 11.1 Layout Guidelines On-chip IEC-ESD protection is sufficient for laboratory and portable equipment but never sufficient for EFT and surgetransientsoccurringinindustrialenvironments.Therefore,robustandreliablebusnodedesignrequiresthe useofexternaltransientprotectiondevices. Because ESD and EFT transients have a wide frequency bandwidth from approximately 3 MHz to 3 GHz, high- frequencylayouttechniquesmustbeappliedduringPCBdesign. 1. Placetheprotectioncircuitryclosetothebusconnectortopreventnoisetransientsfromenteringtheboard. 2. Use V and ground planes to provide low-inductance. High-frequency currents follow the path of least CC inductanceandnotthepathofleastimpedance. 3. Design the protection components into the direction of the signal path. Do not force the transient currents to divertfromthesignalpathtoreachtheprotectiondevice. 4. Apply 100-nF to 220-nF bypass capacitors as close as possible to the V pins of transceiver, UART, and CC controllerICsontheboard. 5. Use at least two vias for V and ground connections of bypass capacitors and protection devices to CC minimizeeffectivevia-inductance. 6. Use 1-kΩ to 10-kΩ pullup or pulldown resistors for enable lines to limit noise currents in these lines during transientevents. 7. Insert pulse-proof series resistors into the A and B bus lines if the TVS clamping voltage is higher than the specified maximum voltage of the transceiver bus terminals. These resistors limit the residual clamping currentintothetransceiverandpreventitfromlatchingup. 8. While pure TVS protection is sufficient for surge transients up to 1 kV, higher transients require metal-oxide varistors (MOVs) which reduce the transients to a few hundred volts of clamping voltage, and transient blockingunits(TBUs)thatlimittransientcurrenttolessthan1mA. 11.2 Layout Example 5 Via to ground R C 4 Via to VCC 6 R 1 R MCU 7 R MP 5 J R TVS 6 R XCVR 5 Figure27. SN65HVD11-HTLayoutExample Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 www.ti.com 11.3 Thermal Considerations R (Junction-to-AmbientThermalResistance) isdefinedasthedifferenceinjunctiontemperaturetoambient θJA temperaturedividedbytheoperatingpower. R isnot aconstantandisastrongfunctionof: θJA • thePCBdesign(50%variation) • altitude(20%variation) • devicepower(5%variation) R can be used to compare the thermal performance of packages if the specific test conditions are defined and θJA used. Standardized testing includes specification of PCB construction, test chamber volume, sensor locations, and the thermal characteristics of holding fixtures. θ is often misused when it is used to calculate junction JA temperaturesforotherinstallations. TI uses two test PCBs as defined by JEDEC specifications. The low-k board gives average in-use condition thermal performance, and it consists of a single copper trace layer 25-mm long and 2-oz thick. The high-k board gives best case in-use condition, and it consists of two 1-oz buried power planes with a single copper trace layer 25-mmlongand2-ozthick.A4%to50%differencein θ canbemeasuredbetweenthesetwotestcards. JA R (Junction-to-Case Thermal Resistance) is defined as difference in junction temperature to case divided θJC by the operating power. It is measured by putting the mounted package up against a copper block cold plate to forceheattoflowfromdie,throughthemoldcompoundintothecopperblock. R is a useful thermal characteristic when a heatsink is applied to package. It is not a useful characteristic to θJC predict junction temperature because it provides pessimistic numbers if the case temperature is measured in a nonstandard system and junction temperatures are backed out. It can be used with θ in 1-dimensional thermal JB simulationofapackagesystem. R (Junction-to-Board Thermal Resistance) is defined as the difference in the junction temperature and the θJB PCB temperature at the center of the package (closest to the die) when the PCB is clamped in a cold-plate structure.θ isonlydefinedforthehigh-ktestcard. JB R provides an overall thermal resistance between the die and the PCB. It includes a bit of the PCB thermal θJB resistance(especiallyforBGA’swiththermalballs)andcanbeusedforsimple1-dimensionalnetworkanalysisof packagesystem,seeFigure28. Figure28. ThermalResistance 26 SubmitDocumentationFeedback Copyright©2008–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD11-HT

SN65HVD11-HT www.ti.com SLLS934F–NOVEMBER2008–REVISEDNOVEMBER2015 12 Device and Documentation Support 12.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.2 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.3 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.4 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2008–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 27 ProductFolderLinks:SN65HVD11-HT

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN65HVD11HD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 175 HD11 & no Sb/Br) SN65HVD11SHKJ ACTIVE CFP HKJ 8 1 TBD Call TI N / A for Pkg Type -55 to 210 SN65HVD11S HKJ SN65HVD11SHKQ ACTIVE CFP HKQ 8 1 TBD AU N / A for Pkg Type -55 to 210 HVD11S HKQ SN65HVD11SJD ACTIVE CDIP SB JDJ 8 1 TBD POST-PLATE N / A for Pkg Type -55 to 210 SN65HVD11SJD SN65HVD11SKGDA ACTIVE XCEPT KGD 0 130 Green (RoHS Call TI N / A for Pkg Type -55 to 210 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN65HVD11-HT : •Catalog: SN65HVD11 NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product Addendum-Page 2

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PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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