ICGOO在线商城 > 分立半导体产品 > 晶体管 - FET,MOSFET - 单 > SIE832DF-T1-E3
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SIE832DF-T1-E3产品简介:
ICGOO电子元器件商城为您提供SIE832DF-T1-E3由Vishay设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 SIE832DF-T1-E3价格参考。VishaySIE832DF-T1-E3封装/规格:晶体管 - FET,MOSFET - 单, 表面贴装 N 沟道 40V 50A(Tc) 5.2W(Ta),104W(Tc) 10-PolarPAK®(S)。您可以下载SIE832DF-T1-E3参考资料、Datasheet数据手册功能说明书,资料中有SIE832DF-T1-E3 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | |
描述 | MOSFET N-CH 40V 50A 10-POLARPAKMOSFET 40V 50A 104W |
产品分类 | FET - 单分离式半导体 |
FET功能 | 标准 |
FET类型 | MOSFET N 通道,金属氧化物 |
Id-连续漏极电流 | 23.6 A |
品牌 | Vishay / SiliconixVishay Siliconix |
产品手册 | |
产品图片 | |
rohs | RoHS 合规性豁免无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 晶体管,MOSFET,Vishay / Siliconix SIE832DF-T1-E3TrenchFET® |
数据手册 | |
产品型号 | SIE832DF-T1-E3SIE832DF-T1-E3 |
Pd-PowerDissipation | 5.2 W |
Pd-功率耗散 | 5.2 W |
RdsOn-漏源导通电阻 | 5.5 mOhms |
Vds-漏源极击穿电压 | 40 V |
Vgs-Gate-SourceBreakdownVoltage | +/- 20 V |
Vgs-栅源极击穿电压 | 20 V |
上升时间 | 260 ns |
下降时间 | 55 ns |
不同Id时的Vgs(th)(最大值) | 3V @ 250µA |
不同Vds时的输入电容(Ciss) | 3800pF @ 20V |
不同Vgs时的栅极电荷(Qg) | 77nC @ 10V |
不同 Id、Vgs时的 RdsOn(最大值) | 5.5 毫欧 @ 14A,10V |
产品目录页面 | |
产品种类 | MOSFET |
供应商器件封装 | 10-PolarPAK®(S) |
其它名称 | SIE832DF-T1-E3TR |
典型关闭延迟时间 | 35 ns |
功率-最大值 | 104W |
包装 | 带卷 (TR) |
商标 | Vishay / Siliconix |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
导通电阻 | 5.5 mOhms |
封装 | Reel |
封装/外壳 | 10-PolarPAK®(S) |
封装/箱体 | PolarPAK-10 |
工厂包装数量 | 3000 |
晶体管极性 | N-Channel |
最大工作温度 | + 150 C |
最小工作温度 | - 55 C |
标准包装 | 3,000 |
汲极/源极击穿电压 | 40 V |
漏极连续电流 | 23.6 A |
漏源极电压(Vdss) | 40V |
特色产品 | http://www.digikey.com/cn/zh/ph/Vishay/PolarPAK_N.html |
电流-连续漏极(Id)(25°C时) | 50A (Tc) |
通道模式 | Enhancement |
配置 | Single |
零件号别名 | SIE832DF-E3 |
SiE832DF Vishay Siliconix N-Channel 40-V (D-S) MOSFET FEATURES PRODUCT SUMMARY • Halogen-free According to IEC 61249-2-21 I (A)a D Definition Silicon Package (cid:129) TrenchFET® Power MOSFET VDS (V) RDS(on) (Ω) Limit Limit Qg (Typ.) (cid:129) Ultra Low Thermal Resistance Using Top- 0.0055 at VGS = 10 V 103 50 Exposed PolarPAK® Package for Double- 40 25 nC Sided Cooling 0.007 at VGS = 4.5 V 91 50 (cid:129) Leadframe-Based New Encapsulated Package Package Drawing - Die Not Exposed www.vishay.com/doc?73398 - Same Layout Regardless of Die Size (cid:129) Low Q /Q Ratio Helps Prevent Shoot-Through gd gs PolarPAK 10 9 8 7 6 (cid:129) 100 % Rg and UIS Tested D G S S D 6 7 8 9 10 (cid:129) Compliant to RoHS directive 2002/95/EC APPLICATIONS (cid:129) VRM D D D S G D (cid:129) Point-of-Load (cid:129) Synchronous Rectification G D G S S D 5 4 3 2 1 1 2 3 4 5 Top View Bottom View S Top surface is connected to pins 1, 5, 6, and 10 N-Channel MOSFET Ordering Information: SiE832DF-T1-E3 (Lead (Pb)-free) For Related Documents SiE832DF-T1-GE3 (Lead (Pb)-free and Halogen-free) www.vishay.com/ppg?74414 ABSOLUTE MAXIMUM RATINGS T = 25 °C, unless otherwise noted A Parameter Symbol Limit Unit Drain-Source Voltage VDS 40 V Gate-Source Voltage VGS ± 20 103 (Silicon Limit) T = 25 °C C 50a (Package Limit) Continuous Drain Current (TJ = 150 °C) TC = 70 °C ID 50a TA = 25 °C 23.6b, c TA = 70 °C 18.9b, c A Pulsed Drain Current I 80 DM Continuous Source-Drain Diode Current TC = 25 °C I 50a TA = 25 °C S 4.3b, c Single Pulse Avalanche Current L = 0.1 mH IAS 35 Avalanche Energy EAS 61 mJ T = 25 °C 104 C T = 70 °C 66 Maximum Power Dissipation TCA = 25 °C PD 5.2b, c W TA = 70 °C 3.3b, c Operating Junction and Storage Temperature Range TJ, Tstg - 55 to 150 °C Soldering Recommendations (Peak Temperature)d, e 260 Notes: a. Package limited is 50 A. b. Surface Mounted on 1" x 1" FR4 board. c. t = 10 s. d. See Solder Profile (www.vishay.com/doc?73257). The PolarPAK is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components. Document Number: 74414 www.vishay.com S09-1338-Rev. C, 13-Jul-09 1
SiE832DF Vishay Siliconix THERMAL RESISTANCE RATINGS Parameter Symbol Typical Maximum Unit Maximum Junction-to-Ambienta, b t ≤ 10 s RthJA 20 24 Maximum Junction-to-Case (Drain Top)a Steady State RthJC (Drain) 1 1.2 °C/W Maximum Junction-to-Case (Source)a, c RthJC (Source) 2.8 3.4 Notes: a. Surface Mounted on 1" x 1" FR4 board. b. Maximum under Steady State conditions is 68 °C/W. c. Measured at source pin (on the side of the package). SPECIFICATIONS T = 25 °C, unless otherwise noted J Parameter Symbol Test Conditions Min. Typ. Max. Unit Static Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 µA 40 V VVGDSS (tThe) mTepmerpaeturaretu Creo Cefofiecfifeicnitent ΔVΔGVSD(tSh/)T/TJJ ID = 250 µA -4 63..91 mV/°C Gate-Source Threshold Voltage VGS(th) VDS = VGS , ID = 250 µA 1.5 2.2 3.0 V Gate-Source Leakage IGSS VDS = 0 V, VGS = ± 20 V ± 100 nA Zero Gate Voltage Drain Current IDSS VDS =V 4D0S V =, V40G SV ,= V 0G VS, = T 0J =V 55 °C 110 µA On-State Drain Currenta ID(on) VDS ≥ 5 V, VGS = 10 V 25 A Drain-Source On-State Resistancea RDS(on) VVGGSS == 41.05 VV,, IIDD == 1142 AA 00..00004568 00..0000575 Ω Forward Transconductancea gfs VDS = 15 V, ID = 13.6 A 86 S Dynamicb Input Capacitance Ciss 3800 Output Capacitance Coss VDS = 20 V, VGS = 0 V, f = 1 MHz 510 pF Reverse Transfer Capacitance Crss 160 Total Gate Charge Qg VDS = 20 V, VGS = 10 V, ID = 20 A 51 77 25 38 nC Gate-Source Charge Qgs VDS = 20 V, VGS = 4.5 V, ID = 20 A 12 Gate-Drain Charge Qgd 7 Gate Resistance Rg f = 1 MHz 1.1 1.7 Ω Turn-On Delay Time td(on) 45 70 Rise Time tr VDD = 20 V, RL = 2 Ω 260 400 Turn-Off Delay Time td(off) ID ≅ 10 A, VGEN = 4.5 V, Rg = 1 Ω 35 55 Fall Time tf 55 85 Turn-On Delay Time td(on) 15 25 ns Rise Time tr VDD = 20 V, RL = 2 Ω 30 45 Turn-Off Delay Time td(off) ID ≅ 10 A, VGEN = 10 V, Rg = 1 Ω 35 55 Fall Time tf 10 15 Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS TC = 25 °C 50 A Pulse Diode Forward Currenta ISM 80 Body Diode Voltage VSD IS = 10 A 0.8 1.2 V Body Diode Reverse Recovery Time trr 85 130 ns Body Diode Reverse Recovery Charge Qrr I = 10 A, dI/dt = 100 A/µs, T = 25 °C 110 170 nC Reverse Recovery Fall Time ta F J 64 ns Reverse Recovery Rise Time tb 21 Notes: a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 % b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com Document Number: 74414 2 S09-1338-Rev. C, 13-Jul-09
SiE832DF Vishay Siliconix TYPICAL CHARACTERISTICS 25°C, unless otherwise noted 80 20 VGS = 10 V thru 4 V 16 60 ) A ( t n e r r u C n i a r D - D 40 ) A ( t n e r r u C n i a r D - D 182 TC = 125 °C I 20 I 4 TC = 25 °C VG S = 3 V TC = - 55 °C 0 0 0.0 0.4 0.8 1.2 1.6 2.0 1.5 2.0 2.5 3.0 3.5 4.0 VD S - Drain-to-Source Voltage (V) VG S - Gate-to-Source Voltage (V) Output Characteristics Transfer Characteristics 0.008 4500 Ciss 0.007 3600 ) ( ecnatsiseR-nO-)no(S 00..000065 VG S = 4.5 V VG S = 10 V ) F p ( e c n a t i c a p a C - C 12780000 D R 0.004 900 Coss Crss 0.003 0 0 20 40 60 80 0 8 16 24 32 40 ID - Drain Current (A) VD S - Drain-to-Source Voltage (V) On-Resistance vs. Drain Current Capacitance 10 1.8 ID = 20 A ID = 14 A )V( eatlV ecruoS-ot-etaG go-S 468 VDS = 20 V VDS = 32 V Re c n a t s i s e R - n O - ) S n o ( D ) d e z i l a m r o N ( 1111....0246 VGS = 10 V, 4.5 V G 2 V 0.8 0 0.6 0 10 20 30 40 50 60 - 50 - 25 0 25 50 75 100 125 150 Qg - Total Gate Charge (nC) TJ - Junction Temperature (°C) Gate Charge On-Resistance vs. Junction Temperature Document Number: 74414 www.vishay.com S09-1338-Rev. C, 13-Jul-09 3
SiE832DF Vishay Siliconix TYPICAL CHARACTERISTICS 25°C, unless otherwise noted 100 0.012 Ω) e ( ID = 14 A c na 0.010 ) A ( t n e r r u C TJ = 150 °C tsiseR-nO e 0.008 e c r u o S 10 cruoS-o 0.006 TA = 125 °C - t-n S ia I rD TJ = 25 °C -)no(S 0.004 TA = 25 °C D R 1 0.002 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 2 4 6 8 10 VS D - Source-to-Drain Voltage (V) VG S - Gate-to-Source Voltage (V) Source-Drain Diode Forward Voltage On-Resistance vs. Gate-to-Source Voltage 2.8 50 2.6 ID = 250 µA 40 2.4 V ( V ) S)ht(G 22..02 )W( rewoP 2300 1.8 1.6 10 1.4 1.2 0 - 50 - 25 0 25 50 75 100 125 150 0.01 0.1 1 10 100 1000 TJ - Temperature (°C) Time (s) Threshold Voltage Single Pulse Power, Junction-to-Ambient 100 Limited by RDS(on)* 10 1 ms )A t(n 10 ms e urr C n 1 100 ms ia Dr -D TA = 25 °C 1 s I Single Pulse 10 s 0.1 DC BVDSS Limited 0.01 0.01 0.1 1 10 100 VDS - Drain-to-Source Voltage (V) * VGS minimum VGS at which RDS(on)isspecified Safe Operating Area, Junction-to-Ambient www.vishay.com Document Number: 74414 4 S09-1338-Rev. C, 13-Jul-09
SiE832DF Vishay Siliconix TYPICAL CHARACTERISTICS 25°C, unless otherwise noted 120 120 100 100 ) A ( t n e r r u C n i a r D - ID 468000 ) W ( n o i t a p i s s i D r e w o P 468000 Package Limited 20 20 0 0 0 25 50 75 100 125 150 25 50 75 100 125 150 TC - Case Temperature (°C) TC - Case Temperature (°C) Current Derating* Power Derating, Junction-to-Case * The power dissipation P is based on T = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper D J(max) dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. Document Number: 74414 www.vishay.com S09-1338-Rev. C, 13-Jul-09 5
SiE832DF Vishay Siliconix TYPICAL CHARACTERISTICS 25°C, unless otherwise noted 2 1 f f E d e z i l a m t n e i s n a r T e v i t c e e c n a d e p m I l a m r e h T 0.1 000D.0..u215ty Cycle = 0.5 NPo DteMs : t1 r o N 1. Duty Cyclet,2 D = t1 0.02 t2 2. Per Unit Base = Rt hJA = 55 °C/W Single Pulse 3. TJ M - TA = PDMZthJA(t) 4. Surface Mounted 0.01 10-4 10-3 10-2 10-1 1 10 100 600 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Ambient 2 1 d e z i l a m t n e i s n a r T e v i t c e f f E e c n a d e p m I l a m r e h T 0.1 00D..1u2ty Cycle = 0.5 0.05 r o N 0.02 Single Pulse 0.01 10-4 10-3 10-2 10-1 1 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Case (Drain Top) 2 1 f e z i t n e i s n a r T e v i t c e f E d l a m e c n a d e m I l a m r e T p h 0.1 000D...021u5ty Cycle = 0.5 N r o 0.02 Single Pulse 0.01 10-4 10-3 10-2 10-1 1 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Source Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?74414. www.vishay.com Document Number: 74414 6 S09-1338-Rev. C, 13-Jul-09
Package Information Vishay Siliconix PolarPAK(cid:1) (Option S) Product datasheet/information page contain M4 M4 links to applicable package drawing. 10 9 8 7 6 5 T D G S S D (cid:1) 3 T T4 T1 T2 E1 E VIEW A M3 M2 M3 3 T M1 (cid:1) D G S S D 5 c T 1 2 3 4 5 A (Top View) 6 7 8 9 10 (cid:1) (cid:1) D S S G D H1 b3 H1 b1 H4 H3 b2 H2 b1 Z P1 4 D1 K D 1 K A1 4 P1 K b4 b4 DETAIL Z D S S G D b5 b5 b5 5 4 3 2 1 VIEW A (Bottom View) Document Number: 73398 www.vishay.com 10-Jun-05 1
Package Information Vishay Siliconix MILLIMETERS INCHES Dim Min Nom Max Min Nom Max A 0.75 0.80 0.85 0.030 0.031 0.033 A1 0.00 − 0.05 0.000 − 0.002 b1 0.48 0.58 0.68 0.019 0.023 0.027 b2 0.41 0.51 0.61 0.016 0.020 0.024 b3 2.19 2.29 2.39 0.086 0.090 0.094 b4 0.89 1.04 1.19 0.035 0.041 0.047 b5 0.23 0.33 0.43 0.009 0.013 0.017 c 0.20 0.25 0.30 0.008 0.010 0.012 D 6.00 6.15 6.30 0.236 0.242 0.248 D1 5.74 5.89 6.04 0.226 0.232 0.238 E 5.01 5.16 5.31 0.197 0.203 0.209 E1 4.75 4.90 5.05 0.187 0.193 0.199 H1 0.23 − − 0.009 − − H2 0.45 − 0.56 0.020 − 0.022 H3 0.31 0.41 0.51 0.012 0.016 0.020 H4 0.45 − 0.56 0.020 − 0.022 K1 4.22 4.37 4.52 0.166 0.172 0.178 K4 0.24 − − 0.009 − − M1 4.30 4.50 4.70 0.169 0.177 0.185 M2 3.43 3.58 3.73 0.135 0.141 0.147 M3 0.22 − − 0.009 − − M4 0.05 − − 0.002 − − P1 0.15 0.20 0.25 0.006 0.008 0.010 T1 3.48 3.64 4.10 0.137 0.143 0.150 T2 0.56 0.76 0.95 0.22 0.030 0.037 T3 1.20 − − 0.051 − − T4 3.90 − − 0.154 − − T5 0 0.18 0.36 0.000 0.007 0.014 (cid:1) 0(cid:1) 10(cid:1) 12(cid:1) 0(cid:1) 10(cid:1) 12(cid:1) ECN: S−51049—Rev. B, 13-Jun-05 DWG: 5947 Note: Millimeters govern over inches www.vishay.com Document Number: 73398 2 10-Jun-05
Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR PolarPAK® Option L and S 7.300 (0.287) 0.510 0.510 (0.020) (0.020) 0.410 0.955 (0.016) 0.955 (0.038) (0.038) 0.895 (0.035) 08) 08) + 14 27 32 51 6.0. 4.0. ( ( 0.895 (0.035) 0.580 2.290 0.580 (0.023) (0.090) (0.023) 0.510 (0.020) Recommended Minimum for PolarPAK Option L and S Dimensions in mm/(In ches) No External Traces within Broken Lines Dot indicates Gate Pin (Part Marking) E T O Return to Index N N O I T A C I L P P A www.vishay.com Document Number: 73491 6 Revision: 21-Jan-08
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