New Product Si1422DH Vishay Siliconix N-Channel 12 V (D-S) MOSFET FEATURES PRODUCT SUMMARY • Halogen-free According to IEC 61249-2-21 VDS (V) RDS(on) (Ω) ID (A)a Qg (Typ.) Definition 0.026 at VGS = 4.5 V 4 (cid:129) TrenchFET® Power MOSFET 12 0.030 at VGS = 2.5 V 4 7.5 nC (cid:129) 100 % Rg Tested (cid:129) Compliant to RoHS Directive 2002/95/EC 0.036 at V = 1.8 V 4 GS APPLICATIONS (cid:129) Load Switch, PA Switch and Battery Switch for Portable Devices SOT-363 (cid:129) High Frequency dc-to-dc Converters SC-70 (6-LEADS) (cid:129) Low On-Resistance Switching D D 1 6 D Marking Code D 2 5 D AO XXY Y Lot Traceability G G 3 4 S and Date Code Part # Code Top View S Ordering Information: Si1422DH-T1-GE3 (Lead (Pb)-free and Halogen-free) N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS T = 25 °C, unless otherwise noted A Parameter Symbol Limit Unit Drain-Source Voltage V 12 DS V Gate-Source Voltage V ± 8 GS T = 25 °C 4a F T = 70 °C 4a F Continuous Drain Current (T = 150 °C) I J T = 25 °C D 4b, c A T = 70 °C 4b, c A A Pulsed Drain Current I 20 DM T = 25 °C 2.3a F Continuous Source-Drain Diode Current I T = 25 °C S 1.3b, c A TF = 25 °C 2.8 TF = 70 °C 1.8 Maximum Power Dissipation P W T = 25 °C D 1.56b, c A T = 70 °C 1.0b, c A Operating Junction and Storage Temperature Range TJ, Tstg - 55 to 150 °C Soldering Recommendations (Peak Temperature) 260 THERMAL RESISTANCE RATINGS Parameter Symbol Typical Maximum Unit Maximum Junction-to-Ambientb, d t ≤ 5 s R 60 80 thJA °C/W Maximum Junction-to-Foot (Drain) Steady State R 34 45 thJF Notes: a. T = 25 °C, package limited. F b. Surface mounted on 1" x 1" FR4 board. c. t = 5 s. d. Maximum under steady state conditions is 125 °C/W. Document Number: 66701 www.vishay.com S10-1287-Rev. A, 31-May-10 1

New Product Si1422DH Vishay Siliconix SPECIFICATIONS T = 25 °C, unless otherwise noted J Parameter Symbol Test Conditions Min. Typ. Max. Unit Static Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 µA 12 V VDS Temperature Coefficient ΔVDS/TJ 11 ID = 250 µA mV/°C VGS(th) Temperature Coefficient ΔVGS(th)/TJ - 2.7 Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 µA 0.4 1.0 V Gate-Source Leakage IGSS VDS = 0 V, VGS = ± 8 V ± 100 nA VDS = 12 V, VGS = 0 V 1 Zero Gate Voltage Drain Current IDSS µA VDS = 12 V, VGS = 0 V, TJ = 55 °C 10 On-State Drain Currenta ID(on) VDS ≥ 5 V, VGS = 4.5 V 15 A VGS = 4.5 V, ID = 5.1 A 0.021 0.026 Drain-Source On-State Resistancea RDS(on) VGS = 2.5 V, ID = 4.7 A 0.024 0.030 Ω VGS = 1.8 V, ID = 2.5 A 0.029 0.036 Forward Transconductancea gfs VDS = 10 V, ID = 5.1 A 30 S Dynamicb Input Capacitance Ciss 725 Output Capacitance Coss VDS = 6 V, VGS = 0 V, f = 1 MHz 195 pF Reverse Transfer Capacitance Crss 90 Total Gate Charge Qg VDS = 6 V, VGS = 8 V, ID = 9 A 13.1 20 7.5 12 nC Gate-Source Charge Qgs VDS = 6 V, VGS = 4.5 V, ID = 9 A 1.1 Gate-Drain Charge Qgd 0.8 Gate Resistance Rg f = 1 MHz 0.5 2.5 5 Ω Turn-On Delay Time td(on) 10 15 Rise Time tr VDD = 6 V, RL = 0.83 Ω 10 15 Turn-Off Delay Time td(off) ID ≅ 7.2 A, VGEN = 4.5 V, Rg = 1 Ω 20 30 Fall Time tf 10 15 ns Turn-On Delay Time td(on) 5 10 Rise Time tr VDD = 6 V, RL = 0.83 Ω 10 15 Turn-Off Delay Time td(off) ID ≅ 7.2 A, VGEN = 8 V, Rg = 1 Ω 20 30 Fall Time tf 10 15 Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS TC = 25 °C 4 A Pulse Diode Forward Current ISM 20 Body Diode Voltage VSD IS = 7.2 A, VGS = 0 V 0.8 1.2 V Body Diode Reverse Recovery Time trr 15 30 ns Body Diode Reverse Recovery Charge Qrr 4 8 nC I = 7.2 A, dI/dt = 100 A/µs, T = 25 °C F J Reverse Recovery Fall Time ta 8 ns Reverse Recovery Rise Time tb 7 Notes: a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com Document Number: 66701 2 S10-1287-Rev. A, 31-May-10

New Product Si1422DH Vishay Siliconix TYPICAL CHARACTERISTICS 25°C, unless otherwise noted 20 10 VGS=5Vthru2V 16 8 A) A) ( ( ent 12 VGS=1.5V ent 6 Curr Curr TC=25 °C n n ai ai Dr 8 Dr 4 - - D D I I TC=125 °C 4 2 VGS=1V 0 0 TC=- 55 °C 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0.0 0.3 0.6 0.9 1.2 1.5 VDS-Drain-to-SourceVoltage(V) VGS-Gate-to-SourceVoltage(V) Output Characteristics Transfer Characteristics 0.06 1000 Ciss 0.05 800 Ω) ( nce 0.04 pF) a ( sist VGS=1.8V nce 600 e a n-R 0.03 VGS=2.5V acit O p - Ca 400 S(on) 0.02 VGS=4.5V C - Coss D R 200 0.01 Crss 0 0 0 4 8 12 16 20 0 2 4 6 8 10 12 ID-DrainCurrent(A) VDS-Drain-to-SourceVoltage(V) On-Resistance vs. Drain Current Capacitance 8 1.5 ID=9A VDS=6V 1.4 ID=5.1 A VGS=2.5V,1.8V V) - Gate-to-SourceVoltage(S 246 VDS=3V VDS=9.6V R- On-ResistanceDS(on)(Normalized) 01111.....90123 VGS=4.5V G V 0.8 0 0.7 0 3 6 9 12 15 - 50 - 25 0 25 50 75 100 125 150 Qg-TotalGateCharge(nC) TJ-JunctionTemperature(°C) Gate Charge On-Resistance vs. Junction Temperature Document Number: 66701 www.vishay.com S10-1287-Rev. A, 31-May-10 3

New Product Si1422DH Vishay Siliconix TYPICAL CHARACTERISTICS 25°C, unless otherwise noted 100 0.06 ID=5.1A 0.05 Ω) nt(A) 10 ance( 0.04 TJ=125 °C Curre Resist 0.03 - Source 1 TJ=150 °C TJ=25 °C - On-on) 0.02 TJ=25 °C S S( I RD 0.01 0.1 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0 1 2 3 4 5 VSD-Source-to-DrainVoltage(V) VGS-Gate-to-SourceVoltage(V) Soure-Drain Diode Forward Voltage On-Resistance vs. Gate-to-Source Voltage 0.8 30 0.7 25 ID=250μA 0.6 20 V) W) (GS(th) 0.5 Power ( 15 V 0.4 10 0.3 5 0.2 0 - 50 - 25 0 25 50 75 100 125 150 0.001 0.01 0.1 1 10 100 1000 TJ- Temperature(°C) Time (s) Threshold Voltage Single Pulse Power, Junction-to-Ambient 100 LimitedbyRDS(on)* 10 100μs A) ( nt urre 1ms C 1 n 10ms ai Dr - 100ms ID 0.1 TA=25 °C 1s,10s SinglePulse DC BVDSSLimited 0.01 0.1 1 10 100 VDS-Drain-to-SourceVoltage(V) *VGS>minimumVGSatwhichRDS(on)isspecified Safe Operating Area, Junction-to-Ambient www.vishay.com Document Number: 66701 4 S10-1287-Rev. A, 31-May-10

New Product Si1422DH Vishay Siliconix TYPICAL CHARACTERISTICS 25°C, unless otherwise noted 10 3.0 2.5 8 urrent(A) 6 pation (W) 2.0 C si 1.5 Drain 4 PackageLimited er Dis - ow 1.0 D P I 2 0.5 0 0.0 0 25 50 75 100 125 150 25 50 75 100 125 150 TC-CaseTemperature(°C) TF -Foot Temperature(°C) Current Derating* Power Derating * The power dissipation P is based on T = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper D J(max) dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. Document Number: 66701 www.vishay.com S10-1287-Rev. A, 31-May-10 5

New Product Si1422DH Vishay Siliconix TYPICAL CHARACTERISTICS 25°C, unless otherwise noted 1 DutyCycle=0.5 nt e Transiance 0.2 ctivemped 0.1 Notes: edEffeermalI 0.1 0.05 PDM zh maliT t1 Nor 0.02 1.DutyCyclet,2D= t1 t2 2.PerUnitBase=RthJA=125 °C/W 3.TJM-TA=PDMZthJA(t) SinglePulse 4.SurfaceMounted 0.01 10-4 10-3 10-2 10-1 1 10 100 1000 SquareWavePulseDuration(s) Normalized Thermal Transient Impedance, Junction-to-Ambient 1 DutyCycle=0.5 nt e Transiance 0.2 ctivemped 0.1 EffemalI 0.1 0.05 eder zh aliT 0.02 m or N SinglePulse 0.01 10-4 10-3 10-2 10-1 1 10 SquareWavePulseDuration(s) Normalized Thermal Transient Impedance, Junction-to-Foot Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?66701. www.vishay.com Document Number: 66701 6 S10-1287-Rev. A, 31-May-10

Package Information Vishay Siliconix (cid:1)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:7)(cid:7)(cid:8)(cid:3)(cid:9)(cid:10)(cid:11)(cid:12)(cid:1) (cid:13)(cid:14)(cid:9)(cid:9)(cid:14)(cid:13)(cid:10)(cid:15)(cid:10)(cid:16)(cid:1) (cid:14)(cid:17)(cid:2)(cid:18)(cid:10)(cid:1) Dim Min Nom Max Min Nom Max 6 5 4 A 0.90 – 1.10 0.035 – 0.043 E1 E A1 – – 0.10 – – 0.004 1 2 3 A2 0.80 – 1.00 0.031 – 0.039 b 0.15 – 0.30 0.006 – 0.012 -B- c 0.10 – 0.25 0.004 – 0.010 e b D 1.80 2.00 2.20 0.071 0.079 0.087 e1 E 1.80 2.10 2.40 0.071 0.083 0.094 D -A- E1 1.15 1.25 1.35 0.045 0.049 0.053 c e 0.65BSC 0.026BSC A2 A e1 1.20 1.30 1.40 0.047 0.051 0.055 L 0.10 0.20 0.30 0.004 0.008 0.012 L 7(cid:1)Nom 7(cid:1)Nom A1 ECN: S-03946—Rev. B, 09-Jul-01 DWG: 5550 Document Number: 71154 www.vishay.com 06-Jul-01 1

AN815 Vishay Siliconix (cid:1) Single-Channel LITTLE FOOT SC-70 6-Pin MOSFET Copper Leadframe Version Recommended Pad Pattern and Thermal Performance INTRODUCTION EVALUATION BOARDS (cid:1) SINGLE SC70-6 The new single 6-pin SC-70 package with a copper leadframe enables improved on-resistance values and enhanced The evaluation board (EVB) measures 0.6 inches by thermal performance as compared to the existing 3-pin and 0.5 inches. The copper pad traces are the same as in Figure 2. 6-pin packages with Alloy 42 leadframes. These devices are The board allows examination from the outer pins to 6-pin DIP intended for small to medium load applications where a connections, permitting test sockets to be used in evaluation miniaturized package is required. Devices in this package testing. See Figure 3. come in a range of on-resistance values, in n-channel and p-channel versions. This technical note discusses pin-outs, package outlines, pad patterns, evaluation board layout, and thermal performance for the single-channel version. 52 (mil) BASIC PAD PATTERNS 6 5 4 See Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix 96 (mil) MOSFETs, (http://www.vishay.com/doc?72286) for the basic 71 (mil) pad layout and dimensions. These pad patterns are sufficient for the low to medium power applications for which this package is intended. Increasing the drain pad pattern yields a 1 2 3 26 (mil) reduction in thermal resistance and is a preferred footprint. 13 (mil) The availability of four drain leads rather than the traditional single drain lead allows a better thermal path from the package 0, 0 (mil) to the PCB and external environment. 18 (mil) 26 (mil) PIN-OUT 16 (mil) Figure 1 shows the pin-out description and Pin 1 FIGURE 2. SC-70 (6 leads) Single identification.The pin-out of this device allows the use of four pins as drain leads, which helps to reduce on-resistance and junction-to-ambient thermal resistance. SOT-363 SC-70 (6-LEADS) The thermal performance of the single 6-pin SC-70 has been measured on the EVB, comparing both the copper and D 1 6 D Alloy 42 leadframes. This test was first conducted on the traditional Alloy 42 leadframe and was then repeated using the D 2 5 D 1-inch2 PCB with dual-side copper coating. G 3 4 S Top View FIGURE 1. For package dimensions see outline drawing SC-70 (6-Leads) (http://www.vishay.com/doc?71154) Document Number: 71334 www.vishay.com 12-Dec-03 1

AN815 Vishay Siliconix Front of Board SC70-6 Back of Board SC70-6 vishay.com FIGURE 3. THERMAL PERFORMANCE Junction-to-Foot Thermal Resistance COOPER LEADFRAME (Package Performance) Room Ambient 25 (cid:1)C Elevated Ambient 60 (cid:1)C The junction to foot thermal resistance is a useful method of T (cid:2)T T (cid:2)T comparing different packages thermal performance. PD(cid:1) J(mRax(cid:1)) A PD(cid:1) J(mRax(cid:1)) A JA JA A helpful way of presenting the thermal performance of the PD(cid:1) 15012oC4o(cid:2)C(cid:3)2W5oC PD(cid:1) 15012oC4o(cid:2)C(cid:3)6W0oC 6tr-aPdiinti oSnCa-l 7A0l locoy p4p2e rv elerasidofnra.me device is to compare it to the PD(cid:1) 1.01W PD(cid:1) 726mW As can be seen from the calculations above, the compact 6-pin SC-70 copper leadframe LITTLE FOOT power MOSFET can Thermal performance for the 6-pin SC-70 measured as handle up to 1 W under the stated conditions. junction-to-foot thermal resistance, where the “foot” is the drain lead of the device at the bottom where it meets the PCB. The junction-to-foot thermal resistance is typically 40(cid:2)C/W in Testing the copper leadframe and 163(cid:2)C/W in the Alloy 42 leadframe To further aid comparison of copper and Alloy 42 leadframes, — a four-fold improvement. This improved performance is Figure 5 illustrates single-channel 6-pin SC-70 thermal obtained by the enhanced thermal conductivity of copper over performance on two different board sizes and two different pad Alloy 42. patterns. The measured steady-state values of R(cid:1)JA for the two leadframes are as follows: LITTLE FOOT 6-PIN SC-70 Power Dissipation Alloy 42 Copper The typical R(cid:1)JA for the single 6-pin SC-70 with copper leadframe is 103(cid:2)C/W steady-state, compared with 212(cid:2)C/W 1) Minimum recommended pad pattern on 329.7(cid:2)C/W 208.5(cid:2)C/W the EVB board V (see Figure 3. for the Alloy 42 version. The figures are based on the 1-inch2 FR4 test board. The following example shows how the thermal 2m)a Ixnidmuusmtry c sotpapnedra brdo t1h- isnicdhe2s .PCB with 211.8(cid:2)C/W 103.5(cid:2)C/W resistance impacts power dissipation for the two different The results indicate that designers can reduce thermal leadframes at varying ambient temperatures. resistance (R(cid:1) ) by 36% simply by using the copper JA ALLOY 42 LEADFRAME leadframe device rather than the Alloy 42 version. In this example, a 121(cid:2)C/W reduction was achieved without an Room Ambient 25 (cid:1)C Elevated Ambient 60 (cid:1)C increase in board area. If increasing in board size is feasible, a further 105(cid:2)C/W reduction could be obtained by utilizing a PD(cid:1) TJ(mRax(cid:1))(cid:2)TA PD(cid:1) TJ(mRax(cid:1))(cid:2)TA 1-inch2 square PCB area. JA JA The copper leadframe versions have the following suffix: PD(cid:1) 15021oC2o(cid:2)C(cid:3)2W5oC PD(cid:1) 15021oC2o(cid:2)C(cid:3)2W5oC Single: Si14xxEDH PD(cid:1) 590mW PD(cid:1) 425mW DCuoaml:plementary: SSii1159xxxxEEDDHH www.vishay.com Document Number: 71334 2 12-Dec-03

AN815 Vishay Siliconix 400 250 320 200 W) W) C/ C/ e ( 240 e ( 150 c c an Alloy an st 42 st Alloy esi esi 42 R 160 R 100 al al m m her Copper her T T 80 50 Copper 0 0 10-5 10-4 10-3 10-2 10-1 1 10 100 1000 10-5 10-4 10-3 10-2 10-1 1 10 100 1000 Time (Secs) Time (Secs) FIGURE 4. Leadframe Comparison on EVB FIGURE 5. Leadframe Comparison on Alloy 42 1-inch2 PCB Document Number: 71334 www.vishay.com 12-Dec-03 3

Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR SC-70: 6-Lead 0.067 (1.702) 6 8) 2 4 0 6 0. 0. ( 0.096 (2.438) 0.045 (1.143) 0.016 0.026 0.010 (0.406) (0.648) (0.241) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Return to Index E T O N N O I T A C I L P P A www.vishay.com Document Number: 72602 18 Revision: 21-Jan-08

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