SG1844/SG1845/SG3844/SG3845 Current Mode PWM Controller D escription Features The SG1844/45 family of control ICs provides all the  Optimized for Off-Line Control required featur es to implement off-line Fixed  Low Start-Up Current (<1mA) Frequency, Current-mode switching power supplies  Automatic Feed Forward Compensation with a minimum number of external components.  Trimmed Oscillator Current-mode architecture demonstrates improved line  Discharge Current regulation, improved load regulation, pulse-by pulse  Pulse-By-Pulse Current Limiting current limiting a nd inherent protection of the power  Enhanced Load Response Characteristics supply output swi tch.  Undervoltage Lockout with 6V Hysteresis The Bandgap r eference is trimmed to ±1% over (SG1844 only) temperature. Os cillator discharge current is trimmed to  Double Pulse Suppression less than ±10%. The SG1844/45 has under-voltage  High-Current Totem-Pole Output lockout, current-limiting circuitry and start-up current of less than 1mA. The totem-pole output is optimized to  Internally Trimmed Bandgap Reference drive the gate of a power MOSFET. The output is low  500kHz Operation in the off state to provide direct interface to an N-  Under-voltage Lockout channel device. Both operate up to a maximum duty SG1844 - 16 Volts cycle range of ze ro to <50% due to an internal toggle SG1845 - 8.4 Volts flip-flop which blanks the output off every other clock  Low Shoot-through Current <75mA Over cycle. The SG1844/45 is specified for operation over Temperature the full military ambient temperature range of -55°C to 125°C. The SG3844/45 is designed for the commercial Application r ange of 0°C to 70°C. Available to MIL-STD-883 Available to DSCC – Standard Microcircuit Drawing (SMD) SGR1844/45 Rad-Tolerant Version Available Product Highlight R ST I AC ST INPUT Vcc SG3844 Figure 1 · Product Highlight November 2014 Rev. 1.7 www.microsemi.com 1 © 2014 Microsemi Corporation- Analog Mixed Signal Group

Current Mode PWM Controller Connection Diagrams and Ordering Information Ambient Type Packaging Package Part Number Connection Diagram Temperature Type COM VREF SG3844M VFB VCC I OUTPUT 8-PIN PLASTIC SENSE 0°C to 70°C M DUAL INLINE PDIP RT/CT GND PACKAGE M PACKAGE (Top View) SG3845M M Package: RoHS / Pb-free 100% Matte Tin Lead Finish SG1844Y COM VREF SG1845Y VFB VCC 8-PIN ISENSE OUTPUT SG1844Y-883B -55°C to CERAMIC R /C GND Y CERDIP T T 125°C DUAL INLINE PACKAGE SG1845Y-883B Y PACKAGE (Top View) SG1844Y-DESC PbSn Tin Lead Finish SG1845Y-DESC COM V REF 8-PIN SMALL SG3844DM VFB VCC OUTLINE ISENSE OUTPUT 0°C to 70°C DM SOIC INTEGRATED RT/CT GND CIRCUIT DM PACKAGE SG3845DM (Top View) RoHS / Pb-free 100% Matte Tin Lead Finish COM VREF N.C. N.C. SG3844D VFB VCC 14-PIN SMALL N.C. VC 0°C to 70°C D OUTLINE SOIC ISENSE OUT UT INTEGRATED N.C. GND CIRCUIT RT/CT WR GND SG3845D D PACKAGE (Top View) RoHS / Pb-free 100% Matte Tin Lead Finish 2

Connection Diagrams and Ordering Information Ambient Packaging Package Part Number Connection Diagram Temperature Type SG1844J COM VREF N.C. N.C. SG1845J VFB VCC 14-PIN SG1844J-883B N.C. VC -55°C to J CERAMIC CERDIP ISENSE OUTPUT 125°C DUAL INLINE SG1845J-883B N.C. GND PACKAGE RT/CT PGND SG1844J-DESC J PACKAGE (Top View) SG1845J-DESC PbSn Lead Finish COM VREF 10-PIN SG1844F-DESC ISEVNFSBE VVCCC RT/CT OUTPUT -55°C to CERAMIC PGND GND F FLAT PACK 125°C FLAT PACK F PACKAGE PACKAGE (Top View) SG1845F-DESC PbSn Lead Finish SG1844L 3 2 1 2019 1.N.C. 11. N.C. 2.N.C. 12. SG1845L 4 18 3.COM. 13. GND 4.N.C. 14. N.C. 5 17 5.VFB 15. OUT UT Ceramic 6 16 6.N.C. 16. N.C. SG1844L-883B 7 15 7.ISENSE 17. Vc -55°C to L 20-Pin (LCC) 8 14 89..RNT.C/C.T 1189.. NVc.Cc. 125°C CERAMIC Leadless 10. N.C. 20. VREF SG1845L-883B Chip Carrier 9 10 1112 13 L PACKAGE (Top View) SG1844L-DESC PbSn Lead Finish SG1845L-DESC Notes: 1. Contact factory for DESC part availability. 2. All parts are viewed from the top. 3. Available in Tape & Reel. Append the letters “TR” to the part number. (i.e. SG3844D-TR) 4. Hermetic Packages J, F, L, & Y use Pb37/Sn63 hot solder lead finish, contact factory for availability of RoHS versions. 3

Current Mode PWM Controller 1 - 2 Absolute Maximum Ratings Parameter Value Units Supply Voltage (Low Impedance Source) 30 V Output Current (Peak) ±1 A Output Current (Continuous) 350 mA Output Energy (Capacitive Load) 5 µJ Analog Inputs (V , I ) -0.3 to +6.3 V FB SENSE Error Amplifier Output Sink Current 10 mA Operating Junction Temperature Hermetic (J, Y, F, L Packages) 150 °C Plastic (M, D, DM Packages) 150 °C Storage Temperature Range -65 to +150 °C Lead Temperature (Soldering, 10 Seconds) 300 °C RoHS / Pb-free Peak Package Solder Reflow Temp. (40 second 260 (+0, -5) °C max. exposure) Notes: 1. Exceeding these ratings could cause damage to the device. 2. All voltages are with respect to Pin 5. All currents are positive into the specified terminal. Thermal Data Parameter Value Units M Package: Thermal Resistance-Junction to Ambient, θ 95 °C/W JA DM Package: Thermal Resistance-Junction to Ambient, θ 165 °C/W JA D Package: Thermal Resistance-Junction to Ambient, θ 120 °C/W JA Y Package: Thermal Resistance-Junction to Case, θ 30 °C/W JC Thermal Resistance-Junction to Ambient, θ 130 °C/W JA J Package Thermal Resistance-Junction to Case, θ 30 °C/W JC Thermal Resistance-Junction to Ambient, θ 80 °C/W JA F Package Thermal Resistance-Junction to Case, θ 80 °C/W JC Thermal Resistance-Junction to Ambient, θ 145 °C/W JA L Package Thermal Resistance-Junction to Case, θ 35 °C/W JC Thermal Resistance-Junction to Ambient, θ 120 °C/W JA Notes: Junction Temperature Calculation: T = T + (P x θ ). J A D JA The θ numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient JA airflow. 4

Recommended Operating Conditions3 Recommended Operating Conditions3 Recommended Operating Conditions Symbol Parameter Units Min. Typ. Max. V Supply Voltage Range 30 V S I Output Current (Peak) ±1 A PK I Output Current (Continuous) 200 m A OUT Analog Inputs (Pin 2, Pin 3) 0 2.6 V EA Error Amp Output Sink Current 5 m A ISNK OSC Oscillator Frequency Range 0.1 500 kHz FR R Oscillator Timing Resistor 0.52 150 kΩ T C Oscillator Timing Capacitor 0.001 1.0 µF T Operating Ambient Temperature Range: SG1844/45 -55 12 5 °C SG3844/45 0 70 °C Note: 3. Range over which the device is functional. Electrical Characteristics Unless otherwise specified, these specifications apply over the operating ambient temperatures for SG1844/SG1845 with -55°C ≤ TA ≤ 125°C, SG3844/SG3845 with 0°C ≤ TA ≤ 70°C, VCC = 15V (Note 7), R = 10kΩ, and C = 3.3nF. Low duty cycle pulse testing techniques are used which maintains T T junction and case temperatures equal to the ambient temperature. SG1844/SG1845 SG3844/SG3845 Symbol Parameter Test Conditions Units Min. Typ. Max Min. Typ. Max Reference Section V Output Voltage T = 25°C, I = 1mA 4.95 5.00 5.05 4.90 5.00 5.10 V REF J O VREG Line Regulation 12V ≤ VIN ≤ 25V 6 20 6 20 mV IREG Load Regulation 1 ≤ IO ≤ 20mA 6 25 6 25 mV Temperature Stability4 0.2 0.4 0.2 0.4 mV/°C Line, Load, Total Output Variation4 4.90 5.10 4.82 5.18 V Temperature 10Hz ≤ f ≤ 10kHz, T V Output Noise Voltage4 J 50 50 µV N = 25°C Long Term Stability4 TA = 125°C, 1000hrs 5 25 5 25 mV V Output Short Circuit -30 -100 -180 -30 -100 -180 mA REFISC Oscillator Section f Initial Accuracy8 T = 25°C 47 52 57 47 52 57 kHz J f Voltage Stability 12V ≤ V ≤ 25V .02 1 0.2 1 % REG CC Temperature Stability4 T ≤ T ≤ T 5 5 % MIN A MAX OSC Amplitude V (Peak to Peak) 1.7 1.7 V PP RT/CT IDSG Discharge Current TJ = 25°C 7.8 8.3 9.1 7.5 8.4 9.3 mA TMIN ≤ T A ≤ TMAX 6.8 9.3 7.2 9.5 mA 5

Current Mode PWM Controller SG1844/SG1845 SG3844/SG3845 Symbol Parameter Test Conditions Units Min. Typ. Max Min. Typ. Max Error Amplifier Section EAIH Input Voltage VCOMP = 2.5V 2.45 2.50 2.55 2.42 2.50 2.58 V EAIIB Input Bias Current -0.3 -1 -0.3 -2 µA A Open Loop Gain 2V ≤ V ≤ 4V 65 90 65 90 dB VOL O EA Unity Gain Bandwidth4 T = 25°C 0.7 1 0.7 1 MHz BW J Power Supply PSRR 12V ≤ V ≤ 25V 60 70 60 70 dB Rejection Ratio CC V = 2.7V, V = EA Output Sink Current VFB COMP 2 6 2 6 mA SNK 1.1V V = 2.3V, V = EA Output Source Current VFB COMP -0.5 -0.8 -0.5 -0.8 mA SRC 5V V = 2.3V, R = 15k EA V High VFB L 5 6 5 6 V VOH OUT to GND V = 2.7V, R = 15k EA V Low VFB L 0.7 1.1 0.7 1.1 V VOL OUT to V REF Current Sense Section CSAVOL Gain5 & 6 2.85 3 3.15 2.85 3 3.15 V/V Maximum Input Signal5 VCOMP = 5V 0.9 1 1.1 0.9 1 1.1 V Power Supply PSRR 12V ≤ V ≤ 25V 70 70 dB Rejection Ratio CC CSIIB Input Bias Current -2 -10 -2 -10 µA CSDELAY Delay to Output4 150 300 150 300 ns Output Section I = 20mA 0.1 0.4 0.1 0.4 V SINK VOL Output Low Level I = 200mA 1.5 2.2 1.5 2.2 V SINK I = 200mA 13 13.5 13 13.5 V SOURCE VOH Output High Level I = 200mA 12 13.5 12 13.5 V SOURCE RS Rise Time4 T = 25°C, C = 1nF 50 150 50 150 ns J L FT Fall Time4 T = 25°C, C = 1nF 50 150 50 150 ns J L Under-Voltage Lockout Section 1844 15 16 17 14.5 16 17.5 V UVLO Start Threshold 1845 7.8 8.4 9.0 7.8 8.4 9.0 V Min. Operation Voltage 1844 9 10 11 8.5 10 11.5 V V SMIN After Turn-On 1845 7.0 7.6 8.3 7.0 7.6 8.2 V PWM Section DCMAX Maximum Duty Cycle 46 48 50 46 48 50 % DCMIN Minimum Duty Cycle 0 0 % Power Consumption Section 6

Block Diagram SG1844/SG1845 SG3844/SG3845 Symbol Parameter Test Conditions Units Min. Typ. Max Min. Typ. Max IS Start-Up Current 0.5 1 0.5 1 mA Operating Supply I V = V = 0V 11 17 11 17 mA Current FB ISENSE Z V Zener Voltage I = 25mA 34 34 V CC CC Note: 4. These parameters, although guaranteed, are not 100% tested in production. 5. Parameter measured at trip point of latch with V = 0. VFB 6. Gain defined as: A = ∆V / ∆V ; 0 ≤ V ≤ 0.8V COMP ISENSE ISENSE 7. Adjust V above the start threshold before setting at 15V. CC 8. Output frequency equals one half of oscillator frequency. Block Diagram V * CC 34 V UVLO 5 V VREF S / R 5.0 V REF GROUND** 50 mA 16V (1844) 6V (1844) 8.4 (1845) 0.8V (1845) INTERNAL BIAS 2.5 V VREF VC* GOOD LOGIC R /C OSCILLATOR T T T OUTPUT ERROR AMP 2R S POWER GROUND** R PWM VFB R 1 V LATCH COMP CURRENT SENSE CURRENT SENSE COMPARATOR * - VCC and VC are internally connected for 8-pin packages. ** - POWER GROUND and GROUND are internally connected for 8-pin packages. Figure 2 · Block Diagram 7

Current Mode PWM Controller Characteristic Curves 2 10.0 0 VIN = 1 5V age - (V) 9.6 SG1844 %) -2 Duty Cycle = 50% um Operating Volt 889...482 Frequency Drift - ( ---864 m ni Mi 8.0 SG1845 -10 -75 -50 25 0 25 50 75 100 125 -75 -50 25 0 25 50 75 100 125 Junction Temperature - (°C) Junction Temperature - (°C) Figure 3 · Dropout Voltage vs. Temperature Figure 4 · Oscillator Temperature Stability 220 0.7 S) SG1844 n 200 ay - ( A) 0.6 el 180 m ent Sense D 160 VPIN3 = 1 .1V Up Current - ( 00..45 Curr 140 Start- 0.3 120 SG1845 0.2 -75 -50 25 0 25 50 75 100 125 -75 -50 -25 0 25 50 75 100 125 Junction Temperature - (°C) Junction Temperature - (°C) Figure 5 · Current Sense to Output Delay vs. Figure 6 · Start-Up Current vs. Temperature Temperature 5.02 8.32 5.01 SG1845 e Voltage - (V) 5.00 VCC = 15V nce Voltage - (V) 888...232608 enc 4.99 ere 8.24 Refer Ref 8.22 4.98 8.20 8.18 -75 -50 -25 0 25 50 75 100 125 -75 -50 -25 0 25 50 75 100 125 Junction Temperature - (°C) Junction Temperature - (°C) Figure 7 · Reference Voltage vs. Temperature Figure 8 · Start-Up Voltage Threshold vs. Temperature 8

Characteristic Curves 16.08 8.2 16.06 mA) 8.0 ge - (V) 16.04 SG1844 urrent - ( 7.8 a C olt e V g Up 16.02 char 7.6 art Dis St or at 16.00 cill 7.4 s O 15.98 7.2 -75 -50 -25 0 25 50 75 100 125 -75 -50 -25 0 25 50 75 100 125 Junction Temperature - (°C) Junction Temperature - (°C) Figure 9 · Start-Up Voltage Threshold vs. Temperature Figure 10 · Oscillator Discharge Current vs. Temperature 2.5 1.0 0.9 Voltage - (V) 12..50 -55°C +25°C+125°C e Threshold - (V) 0000....6857 125°C25°C-55°C ation 1.0 Sens 0.4 Satur DutyV CINy =c le1 5< V5% urrent 0.3 0.5 C 0.2 0.1 0 0 100 200 300 400 500 1.0 2.0 3.0 4.0 5.0 Output Current - (mA) Error Amp Output Voltage - (V) Figure 12 · Current Sense Threshold vs. Error Amplifier Figure 11 · Output Saturation Voltage vs. Output Output Current and Temperature (Sink Transistor) 4.0 VIN = 15 V Duty Cycle < 5% age - (V) 3.0 -55°C +125°C+25°C olt V on 2.0 +25°C ati Satur +125°C 1.0 0 100 200 300 400 500 Output Current - (mA) Figure 13 · Output Saturation Voltage vs. Output Current and Temperature (Source Transistor) 9

Current Mode PWM Controller Application Information The oscillator of the 1844/45 family of PWM's is programmed by the external timing components (R , C ) as T T shown in Figure 14. V REF R T R /C T T C T GND 1.86 F ≈ Where RT≥ 5 kΩ RC T T Figure 14 · Oscillator Timing Circuit 100 ) Ω 100nF47nF 22nF 10nF 4.7nF 2.2nF1nF k - ( T R 10 1 100 1k 10k 100k 1M Oscillator Frequency - (Hz) Figure 15 · Oscillator Frequency vs. R for various C T T 10

Typical Application Circuits Typical Application Circuits Pin numbers referenced are for 8-pin package and pin numbers in parenthesis are for 14-pin package. V V CC IN 7 (12) 7 (11) Q 1 6 (10) SG1844/45 I 5 (8) PK R 3 (5) 1.0V I = PK(MAX) R S C RS Figure 16 · Current Sense Spike Suppression The RC low-pass filter will eliminate the leading edge current spike caused by parasitic of Power MOSFET. V V CC IN 7 (12) 7 (11) Q R1 1 SG1844/45 6 (10) 5 (8) RS 3 (5) Figure 17 · MOSFET Parasitic Oscillations A resistor (R1) in series with the MOSFET gate reduce overshoot and ringing caused by the MOSFET input capacitance and any inductance in series with the gate drive. (Note: It is very important to have a low inductance ground path to insure correct operation of the I.C. This can be done by making the ground paths as short and as wide as possible.) 11

Current Mode PWM Controller I B VC + R2 VIN VC1 _ R1 II R2 VC 7 (11) VC1 C1 R2 SG1844/45 Q1 6 (10) R1 5 (8) 3 (5) RS Figure 18 · Bipolar Transistor Drive The 1844/45 output stage can provide negative base current to remove base charge of power transistor (Q ) 1 for faster turn off. This is accomplished by adding a capacitor (C ) in parallel with a resistor (R ). The resistor 1 1 (R ) is to limit the base current during turn on. 1 VCC VIN Isolation Boundary 7 (12) 7 (11) Q1 6 (10) VGS Waveforms + SG1844/45 0 _ 5 (8) 50% DC R + 3 (5) _0 C RS NS NP 25% DC IPK = V (PIN3 1R)S – 1.4 ( NNPS ) Figure 19 · Isolated MOSFET Drive Current transformers can be used where isolation is required between PWM and Primary ground. A drive transformer is then necessary to interface the PWM output with the MOSFET. 12

Typical Application Circuits V IN V CC 7 (12) 8 (14) 7 (11) 4 (7) Q1 6 (10) 2 (3) SG1844/45 1 (1) 148 R2 5 (8) 4 N 1 2N2907 3 (5) C R1 5 (9) R S 1 IPK =andVR 1S V1 W=her1 e . 4, 13 0-+ ≤0 .VR2113 ≤RR 121.0 V tSOFTSTAWRTh =e r-eIn ,V1[2 VR=c2 1]0+.5CR1RR21+RR22 R2 R2 Figure 20 · Adjustable Buffered Reduction of Clamp Level with Softstart Softstart and adjustable peak current can be done with the external circuitry shown above. 8 (14) RA 8 4 6 SG1844/45 555 3 4 (7) RB TIMER 2 C 1 5 (9) 1.44 To other f = (RA + 2RB) C SG1844/45 f = RB RA + 2RB Figure 21 · External Duty Cycle Clamp and Multi-Unit Synchronization Precision duty cycle limiting for a duty cycle of <50%, as well as synchronizing several 1844/45's is possible with the above circuitry. 13

Current Mode PWM Controller 5 V 2.8 V 7 (11) 1.1 V R T _ 6 (10) + C T SG1844/45 Discharge Id = 8.2 mA Current Figure 22 · Oscillator Connection The oscillator is programmed by the values selected for the timing components R and C. Refer to T T application information for calculation of the component values. 2.5 V SG1844/45 0.5 mA 2 (3) Ri 1 (1) RF Rf 10K Figure 23 · Error Amplifier Connection Error amplifier is capable of sourcing and sinking current up to 0.5mA. 14

PACKAGE OUTLINE DIMENSIONS PACKAGE OUTLINE DIMENSIONS Controlling dimensions are in inches, metric equivalents are shown for general information. MILLIMETERS INCHES Dim MIN MAX MIN MAX A 1.35 1.75 0.053 0.069 D A1 0.10 0.25 0.004 0.010 A2 1.25 1.52 0.049 0.060 b 0.33 0.51 0.013 0.020 c 0.19 0.25 0.007 0.010 H E D 4.83 5.21 0.189 0.205 E 5.79 6.20 0.228 0.244 e 1.27 BSC 0.050 BSC H 3.81 4.01 0.150 0.158 e L 0.40 1.27 0.016 0.050 θ 0 8 0 8 A2 A *LC .010 0.004 *Lead Coplanarity b c L A1 Note: 1. Dimensions do not include mold flash or protrusions; these shall not exceed 0.155mm (.006”) on any side. Lead dimension shall not include solder coverage Figure 24 · DM 8-Pin SOIC Package Dimensions MILLIMETERS INCHES Dim MIN MAX MIN MAX A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.004 0.010 D A2 1.25 1.52 0.049 0.060 b 0.33 0.51 0.013 0.020 14 8 c 0.19 0.25 0.007 0.010 H E D 8.54 8.74 0.336 0.344 11 7 E 5.79 6.20 0.228 0.244 e 1.27 BSC 0.050 BSC L e b H 3.81 4.01 0.150 0.158 L 0.40 1.27 0.016 0.050 θ 0 8 0 8 A2 A *LC .010 0.004 A1 c *Lead Coplanarity Note: 1. Dimensions do not include mold flash or protrusions; these shall not exceed 0.155mm (.006”) on any side. Lead dimension shall not include solder coverage Figure 25 · D 14-Pin SOIC Package Dimensions 15

Current Mode PWM Controller PACKAGE OUTLINE DIMENSIONS MILLIMETERS INCHES D Dim MIN MAX MIN MAX A 5.08 0.200 A2 3.30 Typ. 1.30 Typ. E1 b 0.38 0.51 0.145 0.020 b2 0.76 1.65 0.030 0.065 1 c 0.20 0.38 0.008 0.015 D 10.16 0.400 b2 E 7.62 BSC 0.300 BSC E e 2.54 BSC 0.100 BSC E1 6.10 6.86 0.240 0.270 A2 A L 3.05 0.120 θ 0 15 0 15 c L Note: 1. Dimensions do not include mold flash or protrusions; these H e θ shall not exceed 0.155mm (.006”) on any side. Lead b dimension shall not include solder coverage. Figure 26 · M 8-Pin PDIP Package Dimensions 16

PACKAGE OUTLINE DIMENSIONS PACKAGE OUTLINE DIMENSIONS MILLIMETERS INCHES Dim MIN MAX MIN MAX D A 4.32 5.08 0.170 0.200 8 5 b 0.38 0.51 0.015 0.020 b2 1.04 1.65 0.045 0.065 E c 0.20 0.38 0.008 0.015 11 4 D 9.52 10.29 0.375 0.405 E 5.59 7.11 0.220 0.280 e 2.54 BSC 0.100 BSC eA b2 eA 7.37 7.87 0.290 0.310 H 0.63 1.78 0.025 0.070 A L 3.18 4.06 0.125 0.160 α - 15° - 15° Q 0.51 1.02 0.020 0.040 Q L c Note: H e SEATING Dimensions do not include protrusions; these shall not PLANE α b exceed 0.155mm (.006”) on any side. Lead dimension shall not include solder coverage. Figure 27 · Y 8-Pin CERDIP Package Dimensions MILLIMETERS INCHES Dim MIN MAX MIN MAX D A 4.32 5.08 0.170 0.200 14 8 b 0.38 0.51 0.015 0.020 b2 1.04 1.65 0.045 0.065 E c 0.20 0.38 0.008 0.015 11 7 D 19.30 19.94 0.760 0.785 E 5.59 7.11 0.220 0.280 e 2.54 BSC 0.100 BSC eA eA 7.37 7.87 0.290 0.310 H 0.63 1.78 0.025 0.070 Q A b2 L 3.18 4.06 0.125 0.160 α - 15° - 15° c L Q 0.51 1.02 0.020 0.040 H e b θ Note: Dimensions do not include protrusions; these shall not exceed 0.155mm (.006”) on any side. Lead dimension shall not include solder coverage. Figure 28 · J 14-Pin CERDIP Package Dimensions 17

Current Mode PWM Controller PACKAGE OUTLINE DIMENSIONS MILLIMETERS INCHES Dim MIN MAX MIN MAX A 1.45 1.70 0.057 0.067 b 0.25 0.483 0.010 0.019 b c 0.102 0.152 0.004 0.006 6 5 D - 7.37 - 0.290 7 4 8 3 D E 6.04 6.40 0.238 0.252 9 2 E1 - 6.91 - 0.272 10 1 e 1.27 BSC 0.050 BSC e E S1 L 6.35 9.40 0.250 0.370 E1 Q 0.51 1.02 0.020 0.040 L L S1 0.20 0.38 0.008 0.015 Note: A Q c 1. Lead No. 1 is identified by tab on lead or dot on cover. 2. Leads are within 0.13mm (.0005”) radius of the true position (TP) at maximum material condition. 3. Dimension “e” determines a zone within which all body and lead irregularities lie. Figure 29 · F 10-Pin Ceramic Flatpack Package Dimensions E3 D MILLIMETERS INCHES Dim MIN MAX MIN MAX D/E 8.64 9.14 0.340 0.360 E3 - 8.128 - 0.320 E e 1.270 BSC 0.050 BSC B1 0.635 TYP 0.025 TYP L 1.02 1.52 0.040 0.060 A 1.626 2.286 0.064 0.090 h 1.016 TYP 0.040 TYP A L2 L A1 8 A1 1.372 1.68 0.054 0.066 A2 - 1.168 - 0.046 3 L2 1.91 2.41 0.075 0.95 B3 0.203R 0.008R 1 Note: All exposed metalized area shall be gold plated 60 micro-inch minimum thickness over nickel plated unless 13 otherwise specified in purchase order. h A2 18 e B3 B1 Figure 30 · L 20-Pin Leadless Chip Carrier Package Dimensions 18

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