® RT8299A 3A, 24V, 500kHz Synchronous Step-Down Converter General Description Features 3V to 24V Input Voltage Range The RT8299A is a high efficiency, monolithic synchronous  3A Output Current step-down DC/DC converter with internal power MOSFETs.  Internal N-MOSFETs It achieves 3A of continuous output current over a wide  Current Mode Control input supply range from 3V to 24V with excellent load and  Fixed Frequency Operation : 500kHz line regulation. Current mode operation provides fast  Output Adjustable from 0.8V to 15V transient response and eases loop stabilization. Cycle-  Up to 95% Efficiency by-cycle current limit provides protection against shorted  Stable with Low ESR Ceramic Output Capacitors outputs and soft-start eliminates input current surge during  Cycle-by-Cycle Over Current Protection start-up. Thermal shutdown provides reliable, fault tolerant  Input Under Voltage Lockout operation. The low current shutdown mode provides output  Output Under Voltage Protection disconnection, enabling easy power management in battery  Thermal Shutdown Protection powered systems.  SOP-8 (Exposed Pad) and 10-Lead WDFN Packages  Ordering Information RoHS Compliant and Halogen Free  RT8299A Applications Package Type SP : SOP-8 (Exposed Pad-Option 1) Industrial and Commercial Low Power Systems  QW: WDFN-10L 3x3 (W-Type) Computer Peripherals  Lead Plating System LCD Monitors and TVs  Z : ECO (Ecological Element with Green Electronics/Appliances Halogen Free and Pb free)  Point of Load Regulation for High Performance DSPs,  Note : FPGAs, and ASICs Richtek products are :  RoHS compliant and compatible with the current require- Pin Configurations ments of IPC/JEDEC J-STD-020. (TOP VIEW)  Suitable for use in SnPb or Pb-free soldering processes. BOOT 8 VCC VIN 2 7 PGOOD GND SW 3 6 EN 9 GND 4 5 FB SOP-8 (Exposed Pad) FB 1 10 GND PGOOD 2 D 9 SW EN 3 N 8 SW G VCC 4 7 VIN BOOT 5 11 6 VIN WDFN-10L 3x3 Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS8299A-03 October 2014 www.richtek.com 1

RT8299A Marking Information RT8299AZSP RT8299AZQW RT8299AZSP : Product Number 83 : Product Code RT8299A YMDNN : Date Code 83 YM YMDNN : Date Code ZSPYMDNN DNN Typical Application Circuit RT8299A VIN VIN BOOT CIN 10µF x 2 0.1µF CBOOT L Chip Enable EN SW VOUT R1 RT VCC FB COUT 1µF CVCC PGODD Power Good R2 GND Table 1. Recommended Component Selection VOUT (V) R1 (k) R2 (k) RT (k) L (H) COUT (F) 1.2 15 30 50 2 22 x 2 2.5 25.5 12 40 3.6 22 x 2 3.3 16 5.1 30 4.7 22 x 2 5 27 5.1 18 6.8 22 x 2 Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS8299A-03 October 2014 2

RT8299A Functional Pin Description Pin No. SOP-8 Pin Name Pin Function WDFN-10L 3x3 (Exposed Pad) Bootstrap for High Side Gate Driver. Connect a 0.1F or greater 1 5 BOOT ceramic capacitor from BOOT to SW pin. Supply Input Voltage. Must bypass with a suitably large ceramic 2 6, 7 VIN capacitor. 3 8, 9 SW Switch Node. Connect to external LC filter. 4, 9 10, 11 Ground. The exposed pad must be soldered to a large PCB and GND (Exposed Pad) (Exposed Pad) connected to GND for maximum power dissipation. Feedback Input. This pin is connected to the converter output. It is used to set the output of the converter to regulate to the 5 1 FB desired value via an external resistive divider. The feedback reference voltage is 0.8V typically. Enable Input. A logic high enables the converter; a logic low forces the RT8299A into shutdown mode, reducing the supply 6 3 EN current to less than 3A. Attach this pin to VIN with a 100k pull up resistor for automatic startup. Power Good Indicator with Open Drain. A 100k pull-high 7 2 PGOOD resistor is needed. The output of this pin is pulled to low when the FB is lower than 0.75V; otherwise it is high impedance. 8 4 VCC Bias Supply. Function Block Diagram VIN Current Sense Ramp Amplifier - Comparator Generator + 5k EN - Regulator BOOT 2V + 3V Oscillator S Q 500kHz VCC Driver + R Q Reference + - PWM FB - Comparator Error Amplifier SW OC Limit PGOOD 300k 30pF Clamp PGOOD Generator 1pF GND Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS8299A-03 October 2014 www.richtek.com 3

RT8299A Absolute Maximum Ratings (Note 1) Supply Input Voltage, V --------------------------------------------------------------------------------------------−0.3 to 26V  IN Switching Voltage, SW ----------------------------------------------------------------------------------------------−0.6 to (V + 0.3V)  IN < 20ns--------------------------------------------------------------------------------------------------------------------−5V to 30V BOOT to SW -----------------------------------------------------------------------------------------------------------−0.3 to 6V  All Other Pins ----------------------------------------------------------------------------------------------------------−0.3 to 6V  Power Dissipation, P @ T = 25°C  D A SOP-8 (Exposed Pad) -----------------------------------------------------------------------------------------------1.333W WDFN-10L 3x3---------------------------------------------------------------------------------------------------------1.429W Package Thermal Resistance (Note 2)  SOP-8 (Exposed Pad), θ ------------------------------------------------------------------------------------------75°C/W JA SOP-8 (Exposed Pad), θ -----------------------------------------------------------------------------------------15°C/W JC WDFN-10L 3x3, θ ---------------------------------------------------------------------------------------------------70°C/W JA WDFN-10L 3x3, θ ---------------------------------------------------------------------------------------------------8.2°C/W JC Lead Temperature (Soldering, 10 sec.)---------------------------------------------------------------------------260°C  Junction Temperature------------------------------------------------------------------------------------------------150°C  Storage Temperature Range ----------------------------------------------------------------------------------------−65°C to 150°C  ESD Susceptibility (Note 3)  HBM (Human Body Mode) ------------------------------------------------------------------------------------------2kV MM (Machine Mode)--------------------------------------------------------------------------------------------------200V Recommended Operating Conditions (Note 4) Supply Voltage, V ---------------------------------------------------------------------------------------------------3V to 24V  IN Junction Temperature Range----------------------------------------------------------------------------------------−40°C to 125°C  Ambient Temperature Range----------------------------------------------------------------------------------------−40°C to 85°C  Electrical Characteristics (VIN = 12V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Shutdown Current ISHDN VEN = 0V -- -- 3 A Supply Current VEN = 3V, VFB = 1V -- 1 -- mA Upper Switch On Resistance -- 100 -- m Lower Switch On Resistance -- 100 -- m Switch Leakage V = 0V, V = 0V or 12V -- 0 10 A EN SW Current Limit I V V = 4.8V -- 5.5 -- A LIM BOOT SW Oscillator Frequency f V = 0.75V 425 500 575 kHz OSC FB Short Circuit Frequency V = 0V -- 150 -- kHz FB Maximum Duty Cycle DMAX VFB = 0.8V -- 93 -- % Minimum On-Time tON -- 100 -- ns Feedback Voltage VFB 3V  VIN  24V 788 800 812 mV EN Input Logic-High VIH 2 -- 5.5 V Threshold Voltage Logic-Low VIL -- -- 0.4 Under Voltage Lockout Threshold VUVLO VIN Rising -- 2.8 -- V Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS8299A-03 October 2014 4

RT8299A Parameter Symbol Test Conditions Min Typ Max Unit Under Voltage Lockout Threshold VUVLO -- 300 -- mV Hysteresis VOUT Rising, with Respect to VFB -- 90 -- Power Good Threshold % VOUT Falling, with Respect to VFB -- 70 -- VCC Regulator -- 5 -- V VCC Load Regulation ICC = 5mA 4 -- 4 % Soft-Start Period tSS -- 2 -- ms Thermal Shutdown TSD -- 150 -- C Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA= 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS8299A-03 October 2014 www.richtek.com 5

RT8299A Typical Operating Characteristics Efficiency vs. Load Current Reference Voltage vs. Input Voltage 100 0.810 90 0.808 80 ) 0.806 V cy (%) 567000 VVVIIINNN === 514V2.5VV Voltage ( 000...888000024 en VIN = 23V e ci 40 nc 0.798 Effi 30 ere 0.796 ef 20 R 0.794 10 0.792 VOUT = 3.3V IOUT = 0.3A 0 0.790 0.01 0.1 1 10 3 6 9 12 15 18 21 24 Load Current (A) Input Voltage (V) Reference Voltage vs. Temperature Output Voltage vs. Load Current 0.810 3.400 3.380 0.806 3.360 ) V ) age ( 0.802 ge (V 33..332400 VVIINN == 52V3V Volt olta 3.300 VIN = 12V nce 0.798 ut V 3.280 efere Outp 3.260 R 0.794 3.240 3.220 VIN = 12V VOUT = 3.3V 0.790 3.200 -50 -25 0 25 50 75 100 125 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 2.25 Temperature (°C) Load Current (A) Output Voltage vs. Load Current Frequency vs. Input Voltage 1.230 530 1.222 520 1.214 ge (V) 11..129086 VVVIIINNN === 315V2VVV kHz) 1 510 olta 1.190 cy ( 500 V n ut 1.182 ue utp 1.174 req 490 O F 1.166 480 1.158 VOUT = 1.2V VOUT = 3.3V, IOUT = 0.3A 1.150 470 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 3 6 9 12 15 18 21 24 Load Current (A) Input Voltage (V) Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS8299A-03 October 2014 6

RT8299A Frequency vs. Temperature Current Limit vs. Temperature 550 7.0 540 6.5 530 6.0 ) 1 520 ) z A cy (kH 550100 Limit ( 55..05 en nt u 490 e eq urr 4.5 r 480 C F VIN = 12V 4.0 470 VIN = 5VV 460 VIN = 3V 3.5 VIN = 23V VOUT = 1.2V, IOUT = 0.3A VIN = 12V, VOUT = 3.3V 450 3.0 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 Temperature (°C) Temperature (°C) Load Transient Response Switching VOUT (5mV/Div) VOUT (100mV/Div) VSW (10V/Div) IOUT (2A/Div) IL (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 1.5A to 3A VIN = 12V, VOUT = 3.3V, IOUT = 3A Time (100μs/Div) Time (1μs/Div) Switching Power On from V IN VOUT VIN (5mV/Div) (10V/Div) VSW VOUT (10V/Div) (2V/Div) IL IL (2A/Div) (5A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 1.5A VIN = 12V, VOUT = 3.3V, IOUT = 3A Time (1μs/Div) Time (10ms/Div) Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS8299A-03 October 2014 www.richtek.com 7

RT8299A Power Off from V Power On from EN IN VIN VEN (10V/Div) (5V/Div) VOUT VOUT (2V/Div) (2V/Div) IL IL (5A/Div) (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 3A VIN = 12V, VOUT = 3.3V, IOUT = 3A Time (5ms/Div) Time (5ms/Div) Power Off from EN VEN (5V/Div) VOUT (2V/Div) IL (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 3A Time (5ms/Div) Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS8299A-03 October 2014 8

RT8299A Application Information The RT8299A is a synchronous high voltage buck converter Chip Enable Operation that can support the input voltage range from 3V to 24V The EN pin is the chip enable input. Pulling the EN pin and the output current can be up to 3A. low (<0.4V) will shutdown the device. During shutdown mode, the RT8299A quiescent current drops to lower than Output Voltage Setting 3μA. Driving the EN pin high (>2V, < 5.5V) will turn on the The resistive divider allows the FB pin to sense the output device again. For external timing control (e.g.RC), the EN voltage as shown in Figure 1. pin can also be externally pulled high by adding a R * EN VOUT resistor and CEN* capacitor from the VIN pin (see Figure 5). R1 An external MOSFET can be added to implement digital FB control on the EN pin when no system voltage above 2.5V RT8299A R2 is available, as shown in Figure 3. In this case, a 100kΩ GND pull-up resistor, R , is connected between VIN pin and EN the EN pin. MOSFET Q1 will be under logic control to pull Figure 1. Output Voltage Setting down the EN pin. The output voltage is set by an external resistive voltage dVivOiUdTer = a cVcFoBrd1ingR to1 the following equation : VIN 1R0E0Nk CIN VINRT829B9OASOWT CBOOLT VOUT  R2 EN Q1 R1 COUT where V is the feedback reference voltage (0.8V typ.). FB Chip Enable FB VCC C R R2 External Bootstrap Diode 100k GND PGOOD VCC Connect a 100nF low ESR ceramic capacitor between the BOOT pin and SW pin. This capacitor provides the Figure 3. Enable Control Circuit for Logic Control with gate driver voltage for the high side MOSFET. Low Voltage It is recommended to add an external bootstrap diode To prevent enabling circuit when V is smaller than the IN between an external 5V and BOOT pin for efficiency V target value, a resistive voltage divider can be placed OUT improvement when input voltage is lower than 5.5V or duty between the input voltage and ground and connected to ratio is higher than 65% .The bootstrap diode can be a the EN pin to adjust IC lockout threshold, as shown in low cost one such as IN4148 or BAT54. The external 5V Figure 4. For example, if an 8V output voltage is regulated can be a 5V fixed input from system or a 5V output of the from a 12V input voltage, the resistor R can be selected EN2 RT8299A. Note that the external boot voltage must be to set input lockout threshold larger than 8V. lower than 5.5V 5V 1V2IVN CIN VIN BOOT CBOOT V8OVUT REN 10µF RT8299A 100k x 2 L SW EN BOOT REN2 R1 COUT VCC FB RT8299A 0.1µF C R 100k R2 SW GND PGOOD VCC Figure 2. External Bootstrap Diode Figure 4. The Resistors can be Selected to Set IC Lockout Threshold Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS8299A-03 October 2014 www.richtek.com 9

RT8299A Under Voltage Protection C and C Selection IN OUT For the RT8299A, it provides Hiccup Mode Under Voltage The input capacitance, C is needed to filter the IN, Protection (UVP). When the FB voltage drops below half trapezoidal current at the source of the high side MOSFET. of the feedback reference voltage, V , the UVP function To prevent large ripple current, a low ESR input capacitor FB will be triggered and the RT8299A will shut down for a sized for the maximum RMS current should be used. The period of time and then recover automatically. The Hiccup RMS current is given by : Mode UVP can reduce input current in short-circuit IRMS = IOUT(MAX) VOUT VIN 1 conditions. VIN VOUT This formula has a maximum at V = 2V , where Inductor Selection IN OUT I = I / 2. This simple worst case condition is The inductor value and operating frequency determine the RMS OUT commonly used for design because even significant ripple current according to a specific input and output deviations do not offer much relief. voltage. The ripple current ΔI increases with higher V L IN and decreases with higher inductance. Choose a capacitor rated at a higher temperature than IL =VfOULT1VVOIUNT rmeeqeutir seidz.e Soer vheeriaglh ct arepqauciirtoerms emntasy i na ltshoe bdee spiganra.lleled to Having a lower ripple current reduces not only the ESR For the input capacitor, two 10μF low ESR ceramic losses in the output capacitors but also the output voltage capacitors are recommended. ripple. High frequency with small ripple current can achieve The selection of C is determined by the required ESR OUT highest efficiency operation. However, it requires a large to minimize voltage ripple. inductor to achieve this goal. Moreover, the amount of bulk capacitance is also a key For the ripple current selection, the value of ΔIL = 0.24(IMAX) for COUT selection to ensure that the control loop is stable. will be a reasonable starting point. The largest ripple Loop stability can be checked by viewing the load transient current occurs at the highest VIN. To guarantee that the response as described in a later section. ripple current stays below the specified maximum, the The output ripple, ΔV , is determined by : OUT inductor value should be chosen according to the following equation : VOUT ILESR8fC1OUT L = VOUT 1 VOUT      fIL(MAX)  VIN(MAX) The output ripple will be highest at the maximum input The inductor's current rating (caused a 40°C temperature voltage since ΔI increases with input voltage. Multiple L rising from 25°C ambient) should be greater than the capacitors placed in parallel may be needed to meet the maximum load current and its saturation current should ESR and RMS current handling requirement. Dry tantalum, be greater than the short circuit peak current limit. Please special polymer, aluminum electrolytic and ceramic see Table 2 for the inductor selection reference. capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR value. Table 2. Suggested Inductors for Typical However, it provides lower capacitance density than other Application Circuit types. Although Tantalum capacitors have the highest Component Dimensions capacitance density, it is important to only use types that Series Supplier (mm) pass the surge test for use in switching power supplies. TDK VLF10045 10 x 9.7 x 4.5 Aluminum electrolytic capacitors have significantly higher TDK SLF12565 12.5 x 12.5 x 6.5 ESR. However, it can be used in cost-sensitive applications TAIYO NR8040 8 x 8 x 4 for ripple current rating and long term reliability YUDEN considerations. Ceramic capacitors have excellent low Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS8299A-03 October 2014 10

RT8299A ESR characteristics but can have a high voltage coefficient to return V to its steady-state value. During this OUT and audible piezoelectric effects. The high Q of ceramic recovery time, V can be monitored for overshoot or OUT capacitors with trace inductance can also lead to significant ringing that would indicate a stability problem. ringing. EMI Consideration Higher values, lower cost ceramic capacitors are now Since parasitic inductance and capacitance effects in PCB becoming available in smaller case sizes. Their high ripple circuitry would cause a spike voltage on SW pin when current, high voltage rating and low ESR make them ideal high side MOSFET is turned-on/off, this spike voltage on for switching regulator applications. However, care must SW may impact on EMI performance in the system. In be taken when these capacitors are used at input and order to enhance EMI performance, there are two methods output. When a ceramic capacitor is used at the input to suppress the spike voltage. One is to place an R-C and the power is supplied by a wall adapter through long snubber between SW and GND and make them as close wires, a load step at the output can induce ringing at the as possible to the SW pin (see Figure 5). Another method input, V . At best, this ringing can couple to the output IN is adding a resistor R * in series with the bootstrap and be mistaken as loop instability. At worst, a sudden BOOT capacitor, C . But this method will decrease the driving inrush of current through the long wires can potentially BOOT capability to the high side MOSFET. It is strongly cause a voltage spike at V large enough to damage the IN recommended to reserve the R-C snubber during PCB part. layout for EMI improvement. Moreover, reducing the SW Checking Transient Response trace area and keeping the main power in a small loop will be helpful on EMI performance. For detailed PCB layout The regulator loop response can be checked by looking guide, please refer to the section of Layout Consideration. at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, V immediately shifts by an amount OUT equal to ΔI (ESR) also begins to charge or discharge LOAD C generating a feedback error signal for the regulator OUT RBOOT* VIN CIN VIN BOOT CBOOT 10µF x 2 RT8299A REN* L SW VOUT EN CEN* RS* R1 CS* COUT VCC FB C R R2 100k GND PGOOD VCC * : Optional Figure 5. Reference Circuit with Snubber and Enable Timing Control Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS8299A-03 October 2014 www.richtek.com 11

RT8299A Thermal Considerations 1.50 For continuous operation, do not exceed the maximum W) 1 1.40 Four-Layer PCB 1.30 operation junction temperature 125°C. The maximum n ( 1.20 o WDFN-10L 3x3 power dissipation depends on the thermal resistance of ati 1.10 p 1.00 IC package, PCB layout, the rate of surroundings airflow si 0.90 s Di 0.80 and temperature difference between junction to ambient. er 0.70 SOP-8 (Exposed Pad) The maximum power dissipation can be calculated by w 0.60 o P 0.50 following formula : m 0.40 u P = (T − T ) / θ m 0.30 D(MAX) J(MAX) A JA xi 0.20 a Where T is the maximum operation junction M 0.10 J(MAX) 0.00 temperature , T is the ambient temperature and the θ is A JA 0 25 50 75 100 125 the junction to ambient thermal resistance. Ambient Temperature (°C) Figure 6. Derating Curves for RT8299A Packages For recommended operating condition specifications of the RT8299A, the maximum junction temperature is 125°C and T is the ambient temperature. The junction to ambient Layout Consideration A thermal resistance, θ , is layout dependent. For SOP-8 Follow the PCB layout guidelines for optimal performance JA (Exposed Pad) packages, the thermal resistance, θ , is of the RT8299A. JA 75°C/W on a standard JEDEC 51-7 four-layer thermal  Keep the traces of the main current paths as short and test board. For WDFN-10L 3x3 packages, the thermal wide as possible. resistance, θ , is 70°C/W on a standard JEDEC 51-7 JA  Put the input capacitor as close as possible to the device four-layer thermal test board. The maximum power pins (VIN and GND). dissipation at T = 25°C can be calculated by the following A formulas :  LX node is with high frequency voltage swing and should be kept at small area. Keep analog components away P = (125°C − 25°C) / (75°C/W) = 1.333W for D(MAX) from the LX node to prevent stray capacitive noise pick- SOP-8 (Exposed Pad) package up. P = (125°C − 25°C) / (70°C/W) = 1.429W for D(MAX)  Connect feedback network behind the output capacitors. WDFN-10L 3x3 package Keep the loop area small. Place the feedback components near the RT8299A. The maximum power dissipation depends on the operating ambient temperature for fixed TJ(MAX) and thermal  Connect all analog grounds to a common node and then resistance, θ . For the RT8299A package, the derating connect the common node to the power ground behind JA curves in Figure 6 allow the designer to see the effect of the output capacitors. rising ambient temperature on the maximum power  An example of PCB layout guide is shown in Figure 7 for dissipation. reference. Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS8299A-03 October 2014 12

RT8299A The CVCC component must be connected as close to the device as possible. GND VIN SW GND Input capacitor must CVCC be placed as close CIN to the IC as possible. BOOT 8 VCC RPG VOUT VSIWN 23 GND 67 EPNGOOD REN VVCICN 9 R1 CS* GND 4 5 FB The REN component must be connected to RS* R2 VOUT VIN. COUT GND SW should be connected to inductor by The feedback components wide and short trace. Keep sensitive must be connected as close components away from this trace. to the device as possible. Figure 7. PCB Layout Guide Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS8299A-03 October 2014 www.richtek.com 13

RT8299A Outline Dimension H A M EXPOSED THERMAL PAD Y (Bottom of Package) J X B F C I D Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.000 0.152 0.000 0.006 J 5.791 6.200 0.228 0.244 M 0.406 1.270 0.016 0.050 X 2.000 2.300 0.079 0.091 Option 1 Y 2.000 2.300 0.079 0.091 X 2.100 2.500 0.083 0.098 Option 2 Y 3.000 3.500 0.118 0.138 8-Lead SOP (Exposed Pad) Plastic Package Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS8299A-03 October 2014 14

RT8299A D2 D L E E2 SEE DETAIL A 1 e b 2 1 2 1 A A3 A1 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 2.950 3.050 0.116 0.120 D2 2.300 2.650 0.091 0.104 E 2.950 3.050 0.116 0.120 E2 1.500 1.750 0.059 0.069 e 0.500 0.020 L 0.350 0.450 0.014 0.018 W-Type 10L DFN 3x3 Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. DS8299A-03 October 2014 www.richtek.com 15