® RT8251 5A, 24V, 570kHz Step-Down Converter General Description Features The RT8251 is a monolithic step-down switch mode (cid:122)(cid:122)(cid:122)(cid:122)(cid:122) Wide Operating Input Voltage Range : 4.75V to 24V converter with a built-in internal power MOSFET. It achieves (cid:122)(cid:122)(cid:122)(cid:122)(cid:122) Adjustable Output Voltage Range : 0.8V to 15V 5A continuous output current over a wide input supply (cid:122)(cid:122)(cid:122)(cid:122)(cid:122) Output Current up to 5A range with excellent load and line regulation. Current mode (cid:122)(cid:122)(cid:122)(cid:122)(cid:122) 25μμμμμA Low Shutdown Current operation provides fast transient response and eases loop (cid:122)(cid:122)(cid:122)(cid:122)(cid:122) Internal Power MOSFET : 70mΩΩΩΩΩ stabilization. (cid:122)(cid:122)(cid:122)(cid:122)(cid:122) High Efficiency up to 95% 570kHz Fixed Switching Frequency (cid:122)(cid:122)(cid:122)(cid:122)(cid:122) The RT8251 provides protection functions such as Stable with Low ESR Output Ceramic Capacitors (cid:122)(cid:122)(cid:122)(cid:122)(cid:122) cycle-by-cycle current limiting and thermal shutdown. In Thermal Shutdown Protection shutdown mode, the regulator draws 25μA of supply (cid:122)(cid:122)(cid:122)(cid:122)(cid:122) Cycle-By-Cycle Over Current Protection (cid:122)(cid:122)(cid:122)(cid:122)(cid:122) current. Programmable soft-start minimizes the inrush RoHS Compliant and Halogen Free (cid:122)(cid:122)(cid:122)(cid:122)(cid:122) supply current and the output overshoot at initial startup. The RT8251 requires a minimum number of external Applications components. The RT8251 is available in WQFN-16L 3x3 and SOP-8 (Exposed Pad) packages. Distributed Power Systems (cid:122) Battery Charger (cid:122) Pin Configurations (cid:122) DSL Modems Pre-regulator for Linear Regulators (TOP VIEW) (cid:122) N N W W VI VI S S Ordering Information 16 15 14 13 VIN 1 12 SW RT8251 VIN 2 11 SW Package Type GND VIN 3 10 SW QW : WQFN-16L 3x3 (W-Type) 17 GND 4 9 BOOT SP : SOP-8 (Exposed Pad-Option 1) 5 6 7 8 Lead Plating System B P N S F M E S G : Green (Halogen Free and Pb Free) O C Note : Richtek products are : WQFN-16L 3x3 (cid:96) RoHS compliant and compatible with the current require- BOOT 8 SS ments of IPC/JEDEC J-STD-020. VIN 2 7 EN (cid:96) Suitable for use in SnPb or Pb-free soldering processes. GND SW 3 6 COMP 9 GND 4 5 FB SOP-8 (Exposed Pad) Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS8251-04 February 2013 www.richtek.com 1

RT8251 Marking Information RT8251GQW RT8251GSP GE= : Product Code RT8251GSP : Product Number RT8251 GE=YM YMDNN : Date Code YMDNN : Date Code GSPYMDNN DNN Typical Application Circuit 1, 2, 3, VIN 15, 16 VIN BOOT 9 4.75V to 24V CIN CBOOT L Chip Enable 10µF x 2 7 EN RT8251SW 10 to 14 1D00nF 4.7µH V3O.3UVT/5A R1 CSS 8 SS FB 5 B540C 30.9k COUT E10xpnoFsed Pad (174), 6 2C.2CnF 2R2Ck 1R02k 22µF x 2 GND COMP CP (Open) Figure 1. Typical Application Circuit for WQFN-16L 3x3 VIN 2 VIN BOOT 1 4.75V to 24V CIN CBOOT 10µF x 2 RT8251 SW 3 100nF L VOUT Chip Enable 7 EN D 4.7µH R1 3.3V/5A B540C 30.9k 8 SS 5 COUT C10SnSF Exposed Pad(94), GND FB 6 2.C2CnF 2R2Ck 1R02k 22µF x 2 COMP CP NC Figure 2. Typical Application Circuit for SOP-8 (Exposed Pad) Table 1. Recommended Component Selection VOUT (V) R1 (kΩ) R2 (kΩ) RC (kΩ) CC (nF) L1 (μH) COUT (μF) 15 182 10 51 1 22 44 10 115 10 43 1.2 10 44 8 91 10 39 1.5 10 44 5 52.3 10 30 1.5 6.8 44 3.3 30.9 10 22 2.2 4.7 44 2.5 21.5 10 16 2.2 4.7 44 1.8 12.4 10 13 2.2 2.2 44 1.2 4.99 10 13 2.2 2.2 44 Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS8251-04 February 2013 2

RT8251 Functional Pin Description Pin No. SOP-8 Pin Name Pin Function WQFN-16L 3x3 (Exposed Pad) Power Input. VIN supplies the power to the IC, as well as the step-down converter switches. Connect VIN with a 4.75V to 24V 1, 2, 3, 15, 16 2 VIN power source. Connect VIN to GND with a capacitor that the capacitance is large enough to eliminate noise on the input to the IC. Ground. This pin is the voltage reference for the regulated output voltage. For this reason, care must be taken in its layout. This 4, 4, node should be placed outside of the D1 to CIN ground path to GND 17 (Exposed Pad) 9 (Exposed Pad) prevent switching current spikes from inducing voltage noise into the part. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Feedback Input. An external resistor divider from the output to 5 5 FB GND, tapped to the FB pin, sets the output voltage. Compensation Node. This node is the output of the transconductance error amplifier and the input to the current 6 6 COMP comparator. Frequency compensation is done at this node by connecting a series R-C to ground. Enable Input. EN is a digital input that turns the regulator on or off. Drive EN higher than 1.4V to turn on the regulator, lower 7 7 EN than 0.4V to turn it off. For automatic startup, leave EN unconnected. Soft-Start Control Input. SS controls the soft start period. Connect a capacitor (≧10nF) from SS to GND to set the 8 8 SS soft-start period. A 10nF capacitor sets the Soft-Start period to 1ms. Bootstrap. This capacitor C is needed to drive the power BOOT switch’s gate above the supply voltage. It is connected between the SW and BS pins to form a floating supply across the power 9 1 BOOT switch driver. The voltage across C is about 5V and is BOOT supplied by the internal +5V supply when the SW pin voltage is low. Power Switching Output. SW is the switching node that supplies 10, 11, 12, 13, power to the output. Connect the output LC filter from SW to the 3 SW 14 output load. Note that a capacitor is required from SW to BOOT to power the high-side switch. Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS8251-04 February 2013 www.richtek.com 3

RT8251 Function Block Diagram VIN Current Sense VCC Internal Oscillator Slope Comp Amplifier Regulator 570kHz + VA 1µA - VA VCC Foldback 10k EN - Control BOOT 1.1V + 0.4V + Shutdown SW 3V - Logic Comparator + UV VCC Comparator - Current GND 10µA Comparator 0.8V + SS +EA - Gm = 820µA/V FB COMP Absolute Maximum Ratings (Note 1) Supply Voltage, V ------------------------------------------------------------------------------------------−0.3V to 26V (cid:122) IN Switching Voltage, V -------------------------------------------------------------------------------------−0.3V to (V + 0.3V) (cid:122) SW IN BOOT Voltage, V ---------------------------------------------------------------------------------------(V − 0.3V) to (V + 6V) (cid:122) BOOT SW SW All Other Pins -------------------------------------------------------------------------------------------------−0.3V to 6V (cid:122) Power Dissipation, P @ T = 25°C (cid:122) D A WQFN-16L 3x3 -----------------------------------------------------------------------------------------------1.471W SOP-8 (Exposed Pad) --------------------------------------------------------------------------------------1.333W Package Thermal Resistance (Note 2) (cid:122) WQFN-16L 3x3, θ ------------------------------------------------------------------------------------------68°C/W JA WQFN-16L 3x3, θ -----------------------------------------------------------------------------------------7.5°C/W JC SOP-8 (Exposed pad), θ ---------------------------------------------------------------------------------75°C/W JA SOP-8 (Exposed Pad), θ --------------------------------------------------------------------------------15°C/W JC Junction Temperature----------------------------------------------------------------------------------------150°C (cid:122) Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------260°C (cid:122) Storage Temperature Range -------------------------------------------------------------------------------−65°C to 150°C (cid:122) ESD Susceptibility (Note 3) (cid:122) HBM (Human Body Model)---------------------------------------------------------------------------------2kV Recommended Operating Conditions (Note 4) Supply Voltage, V ------------------------------------------------------------------------------------------4.75V to 24V (cid:122) IN Enable Voltage, V -----------------------------------------------------------------------------------------0V to 5.5V (cid:122) EN Junction Temperature Range-------------------------------------------------------------------------------−40°C to 125°C (cid:122) Ambient Temperature Range-------------------------------------------------------------------------------−40°C to 85°C (cid:122) Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS8251-04 February 2013 4

RT8251 Electrical Characteristics (VIN = 12V, TA = 25°C unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Feedback Reference Voltage V 4.75V ≦ V ≦ 24V 0.784 0.8 0.816 V FB IN High-Side Switch-On Resistance RDS(ON)1 -- 70 -- mΩ Low-Side Switch-On Resistance RDS(ON)2 -- 15 -- Ω High-Side Switch Leakage VEN = 0V, VSW = 0V -- -- 10 μA Current Limit I Duty = 85%; V = 4.8V -- 6.8 -- A LIM BOOT−SW Current Sense Transconductance GCS Output Current to VCOMP -- 4.6 -- A/V Error Amplifier Tansconductance gm ΔIC = ±10μA -- 920 -- μA/V Oscillator Frequency fSW 420 570 720 kHz Short Circuit Oscillation Frequency V = 0V -- 185 -- kHz FB Maximum Duty Cycle DMAX VFB = 0.7V -- 85 -- % Minimum On-Time tON -- 100 -- ns UVLO Threshold Rising -- 4.1 -- V UVLO Threshold Hysteresis -- 200 -- mV Logic Low VIL -- -- 0.4 EN Input Voltage V Logic High VIH 1.4 -- 5.5 Enable Pull Up Current VEN = 0V -- 1 -- μA Shutdown Current ISHDN VEN = 0V -- 25 -- μA Quiescent Current I V = 2V, V = 1V -- 0.8 1 mA Q EN FB Soft-Start Current ISS VSS = 0V -- 10 -- μA Soft-Start Period CSS = 10nF -- 1 -- ms Thermal Shutdown TSD -- 150 -- °C Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA= 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS8251-04 February 2013 www.richtek.com 5

RT8251 Typical Operating Characteristics Efficiency vs. Load Current Efficiency vs. Load Current 100 100 VIN = 12V 90 VIN = 12V 90 VIN = 24V 80 VIN = 24V 80 70 70 %) %) y ( 60 y( 60 c c n 50 n 50 e e Effici 40 Effici 40 30 30 20 20 10 10 VOUT = 3.3V VOUT = 5V 0 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 Load Current (A) Load Current (A) Output Voltag Deviation vs. Load Current Output Voltage Deviation vs. Input Voltage 2 2 VIN = 24V IOUT = 5A %) 1 1.5 VIN = 12V %) 1 1.5 IOUT = 3A n ( 1 VIN = 5V n ( 1 IOUT = 0A o o ati ati vi 0.5 vi 0.5 e e D D e 0 e 0 g g a a olt -0.5 olt -0.5 V V ut -1 ut -1 p p Out -1.5 Out -1.5 VOUT = 3.3V VOUT = 3.3V -2 -2 0.001 0.01 0.1 1 10 4 6.5 9 11.5 14 16.5 19 21.5 24 Input Voltage (V) Load Current (A) Quiescent Current vs. Temperature Reference Voltage vs. Temperature 1.2 0.816 1 0.811 ) A ) m V nt ( 0.8 ge ( 0.806 e a Curr 0.6 Volt 0.801 nt ce e n c 0.4 e 0.796 s r e e ui ef Q 0.2 R 0.791 VIN = 12V VIN = 12V 0 0.786 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 Temperature (°C) Temperature (°C) Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS8251-04 February 2013 6

RT8251 Switching Frequency vs. Input Voltage Switching Frequency vs. Temperature 610 630 1 1 z) 1 600 z) 1 610 H H k k y ( 590 c ( 590 c n n e e u VIN = 12V u q q 580 e 570 Fre g Fr ng 570 hin 550 VIN = 24V ci c wit wit S 560 S 530 VOUT = 3.3V, IOUT = 1A VOUT = 3.3V, IOUT = 1A 550 510 4 6.5 9 11.5 14 16.5 19 21.5 24 -50 -25 0 25 50 75 100 125 Input Voltage (V) Temperature (°C) Current Limit vs. Duty Cycle Output Ripple 9.3 VOUT (10mV/Div) 8.7 ) A nt ( 8.1 urre 7.5 (10VVS/WDiv) C k a e 6.9 P 6.3 ISW VVIONU =T =1 23V.3V (2A/Div) IOUT = 5A 5.7 0 10 20 30 40 50 60 70 80 90 100 Time (1μs/Div) Duty Cycle (%) Load Transient Response Load Transient Response VIN = 12V, VOUT = 3.3V VIN = 12V, VOUT = 3.3V IOUT = 0A to 5A IOUT = 2.5A to 5A VOUT VOUT (200mV/Div) (200mV/Div) IOUT IOUT (2A/Div) (2A/Div) Time (100μs/Div) Time (100μs/Div) Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS8251-04 February 2013 www.richtek.com 7

RT8251 Power On from EN Power Off from EN VEN VEN (5V/Div) (5V/Div) VOUT VOUT (2V/Div) (2V/Div) VIN = 12V, VOUT = 3.3V, IOUT = 5A VIN = 12V, VOUT = 3.3V, IOUT = 5A Time (250μs/Div) Time (25μs/Div) Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS8251-04 February 2013 8

RT8251 Application Information Soft-Start The RT8251 is an asynchronous high voltage buck converter that can support the input voltage range from The RT8251 contains an external soft-start clamp that 4.75V to 24V and the output current can be up to 5A. gradually raises the output voltage. The soft-start timming can be set by the external capacitor between SS pin and Output Voltage Setting GND. The chip provides a 10μA charge current for the The resistive divider allows the FB pin to sense the output external capacitor. If 10nF capacitor is used to set the voltage as shown in Figure 3. soft-start time, its period will be 1ms (typ.). VOUT Chip Enable Operation The EN pin is the chip enable input. Pull the EN pin low R1 FB (<0.4V) will shutdown the device. During shutdown mode, RT8251 R2 the RT8251 quiescent current drops to lower than 25μA. GND Drive the EN pin to high ( >1.4V, < 5.5V) will turn on the device again. If the EN pin is open, it will be pulled to high Figure 3. Output Voltage Setting by internal circuit. For external timing control (e.g.RC), The output voltage is set by an external resistive divider the EN pin can also be externally pulled to High by adding according to the following equation : a100kΩ or greater resistor from the VIN pin (see Figure 5). ⎛ R1⎞ VOUT = VFB⎜1+ ⎟ Inductor Selection ⎝ R2⎠ The inductor value and operating frequency determine the Where V is the feedback reference voltage (0.8V typ.). FB ripple current according to a specific input and output External Bootstrap Diode voltage. The ripple current ΔILincreases with higher VIN and decreases with higher inductance. Connect a 100nF low ESR ceramic capacitor between the BOOT pin and SW pin. This capacitor provides the ΔIL =⎡⎢⎣VfO×ULT⎤⎥⎦×⎡⎢⎣1−VVOIUNT⎤⎥⎦ gate driver voltage for the high side MOSFET. Having a lower ripple current reduces not only the ESR It is recommended to add an external bootstrap diode losses in the output capacitors but also the output voltage between an external 5V and the BOOT pin for efficiency ripple. High frequency with small ripple current can achieve improvement when input voltage is lower than 5.5V or duty highest efficiency operation. However, it requires a large cycle is higher than 65%. The bootstrap diode can be a inductor to achieve this goal. low cost one such as 1N4148 or BAT54. For the ripple current selection, the value of ΔI = 0.24(I ) L MAX The external 5V can be a 5V fixed input from system or a will be a reasonable starting point. The largest ripple current 5V output of the RT8251. occurs at the highest V . To guarantee that the ripple IN current stays below the specified maximum, the inductor 5V value should be chosen according to the following equation : BOOT L =⎡⎢ VOUT ⎤⎥×⎡⎢1− VOUT ⎤⎥ ⎣f×ΔIL(MAX)⎦ ⎣ VIN(MAX)⎦ RT8251 100nF The inductor 's current rating (caused a 40°C temperature SW rising from 25°C ambient) should be greater than the Figure 4. External Bootstrap Diode maximum load current and its saturation current should be greater than the short circuit peak current limit. Please see Table 2 for the inductor selection reference. Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS8251-04 February 2013 www.richtek.com 9

RT8251 Table 2. Suggested Inductors for Typical The output ripple, ΔV , is determined by : OUT Application Circuit ⎡ 1 ⎤ Component ΔVOUT ≤ΔIL⎢⎣ESR+8fCOUT⎥⎦ Series Dimensions (mm) Supplier The output ripple will be highest at the maximum input TDK SLF10165 10.1x10.1x7 voltage since ΔI increases with input voltage. Multiple TAIYO YUDEN NR10050 10x9.8x5 L capacitors placed in parallel may be needed to meet the TDK VLF12060 12x11.7x6 ESR and RMS current handling requirement. Dry tantalum, special polymer, aluminum electrolytic and ceramic Diode Selection capacitors are all available in surface mount packages. When the power switch turns off, the path for the current Special polymer capacitors offer very low ESR value. is through the diode connected between the switch output However, it provides lower capacitance density than other and ground. This forward biased diode must have a types. Although Tantalum capacitors have the highest minimum voltage drop and recovery times. Schottky diode capacitance density, it is important to only use types that is recommended and it should be able to handle those pass the surge test for use in switching power supplies. current. The reverse voltage rating of the diode should be Aluminum electrolytic capacitors have significantly higher greater than the maximum input voltage, and current rating ESR. However, it can be used in cost-sensitive applications should be greater than the maximum load current. For for ripple current rating and long term reliability more detail please refer to Table 4. considerations. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient C and C Selection IN OUT and audible piezoelectric effects. The high Q of ceramic The input capacitance, C , is needed to filter the IN capacitors with trace inductance can also lead to significant trapezoidal current at the source of the high side MOSFET. ringing. To prevent large ripple current, a low ESR input capacitor sized for the maximum RMS current should be used. The Higher values, lower cost ceramic capacitors are now RMS current is given by : becoming available in smaller case sizes. Their high ripple IRMS = IOUT(MAX) VOUT VIN −1 current, high voltage rating and low ESR make them ideal VIN VOUT for switching regulator applications. However, care must This formula has a maximum at V = 2V , where be taken when these capacitors are used at input and IN OUT I = I /2. This simple worst-case condition is output. When a ceramic capacitor is used at the input RMS OUT commonly used for design because even significant and the power is supplied by a wall adapter through long deviations do not offer much relief. wires, a load step at the output can induce ringing at the input, V . At best, this ringing can couple to the output Choose a capacitor rated at a higher temperature than IN and be mistaken as loop instability. At worst, a sudden required. Several capacitors may also be paralleled to inrush of current through the long wires can potentially meet size or height requirements in the design. cause a voltage spike at V large enough to damage the IN For the input capacitor, two 10μF low ESR ceramic part. capacitors are recommended. For the recommended capacitor, please refer to table 3 for more detail. Checking Transient Response The selection of C is determined by the required ESR The regulator loop response can be checked by looking OUT to minimize voltage ripple. at the load transient response. Switching regulators take several cycles to respond to a step in load current. When Moreover, the amount of bulk capacitance is also a key a load step occurs, V immediately shifts by an amount for C selection to ensure that the control loop is stable. OUT OUT equal to ΔI (ESR) also begins to charge or discharge Loop stability can be checked by viewing the load transient LOAD C generating a feedback error signal for the regulator response as described in a later section. OUT Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS8251-04 February 2013 10

RT8251 to return V to its steady-state value. During this snubber between SW and GND and make them as close OUT recovery time, V can be monitored for overshoot or as possible to the SW pin (see Figure 5). Another method OUT ringing that would indicate a stability problem. is to add a resistor in series with the bootstrap capacitor, C . But this method will decrease the driving capability BOOT EMI Consideration to the high-side MOSFET. It is strongly recommended to Since parasitic inductance and capacitance effects in PCB reserve the R-C snubber during PCB layout for EMI circuitry would cause a spike voltage on the SW pin when improvement. Moreover, reducing the SW trace area and high-side MOSFET is turned-on/off, this spike voltage on keeping the main power in a small loop will be helpful on SW may impact on EMI performance in the system. In EMI performance. For detailed PCB layout guide, please order to enhance EMI performance, there are two methods refer to the section of Layout Consideration. to suppress the spike voltage. One is to place an R-C VIN 2 VIN BOOT 1 RBOOT* 4.75V to 24V CIN CBOOT L REN* 10µF x 2 RT8251 SW 3 100nF 4.7µH VOUT Chip Enable 7 3.3V/5A EN D CEN* RS* B540C R1 COUT CS* 30.9k 22µF x 2 8 SS 5 FB C10SnSF Exposed Pad(94),GND COMP 6 2.C2CnF 2R2Ck 1R02k * : Optional NCCP Figure 5. Reference Circuit with Snubber and Enable Timing Control Thermal Considerations For continuous operation, do not exceed the maximum P = (125°C − 25°C) / (75°C/W) = 1.333W for D(MAX) operation junction temperature 125°C. The maximum PSOP-8 power dissipation depends on the thermal resistance of P = (125°C − 25°C) / (68°C/W) = 1.471W for D(MAX) IC package, PCB layout, the rate of surroundings airflow WQFN and temperature difference between junction to ambient. (min.copper area PCB layout) The maximum power dissipation can be calculated by following formula : P = (125°C − 25°C) / (49°C/W) = 2.04W for D(MAX) P = (T − T ) / θ PSOP-8 (70mm2copper area PCB layout) D(MAX) J(MAX) A JA The thermal resistance θ of SOP-8 (Exposed Pad) is Where T is the maximum operation junction JA J(MAX) temperature , T is the ambient temperature and the θ is determined by the package architecture design and the A JA PCB layout design. However, the package architecture the junction to ambient thermal resistance. design had been designed. If possible, it's useful to For recommended operating conditions specification of increase thermal performance by the PCB layout copper RT8251, the maximum junction temperature is 125°C. The design. The thermal resistance θ can be decreased by JA junction to ambient thermal resistance θ is layout JA adding copper area under the exposed pad of SOP-8 dependent. For PSOP-8 and WQFN packages, the thermal (Exposed Pad) package. resistance θ are 75°C/W and 68°C/W on the standard JA As shown in Figure 6, the amount of copper area to which JEDEC 51-7 four-layers thermal test board. The maximum power dissipation at T = 25°C can be calculated by the SOP-8 (Exposed Pad) is mounted affects thermal A performance. When mounted to the standard following formula : Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS8251-04 February 2013 www.richtek.com 11

RT8251 SOP-8 (Exposed Pad) pad (Figure 6a), θ is 75°C/W. JA Adding copper area of pad under the SOP-8 (Exposed Pad) (Figure 6.b) reduces the θ to 64°C/W. Even further, JA increasing the copper area of pad to 70mm2 (Figure 6.e) reduces the θ to 49°C/W. JA The maximum power dissipation depends on operating (a) Copper Area = (2.3 x 2.3) mm2, θ = 75°C/W JA ambient temperature for fixed T and thermal J(MAX) resistance θ . For RT8251 packages, the derating curves JA in Figure 7 and Figure 8 allow the designer to see the effect of rising ambient temperature on the maximum power dissipation allowed. 2.2 Four Layer PCB 2.0 1.8 ) n (W 1.6 C70omppme2r Area (b) Copper Area = 10mm2, θJA = 64°C/W patio 11..24 3500mmmm22 si 10mm2 s 1.0 Di Min.Layout r 0.8 e w 0.6 o P 0.4 0.2 0.0 (c) Copper Area = 30mm2 , θ = 54°C/W 0 25 50 75 100 125 JA Ambient Temperature (°C) Figure 7. Derating Curves for PSOP-8 Package 1.6 1 Four Layer PCB W) 1.4 n ( o 1.2 ati (d) Copper Area = 50mm2 , θJA = 51°C/W p si 1.0 s WQFN-16L 3x3 Di r 0.8 we o 0.6 P m 0.4 u m xi 0.2 a M 0.0 0 15 30 45 60 75 90 105 120 135 (e) Copper Area = 70mm2 , θ = 49°C/W JA Ambient Temperature (°C) Figure 6. Themal Resistance vs. Copper Area Layout Figure 8. Derating Curves for WQFN Package Design Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS8251-04 February 2013 12

RT8251 Layout Consideration (cid:96) Connect feedback network behind the output capacitors. Follow the PCB layout guidelines for optimal performance Keep the loop area small. Place the feedback of the RT8251. components near the RT8251. (cid:96) Keep the traces of the main current paths as short and (cid:96) Connect all analog grounds to a command node and wide as possible. then connect the command node to the power ground behind the output capacitors. (cid:96) Put the input capacitor as close as possible to the device pins (VIN and GND). (cid:96) Examples of PCB layout guide are shown in Figure 9 and Figure 10 for reference. (cid:96) LX node is with high frequency voltage swing and should be kept at small area. Keep analog components away from the LX node to prevent stray capacitive noise pick- up. Input capacitor must be placed as close as to the IC as possible. COUT GND CIN D CS RS L N N W W VI VI S S VOUT 16 15 14 13 VIN 1 12 SW VIN 2 11 SW SW should be connected GND to inductor by Wide and VIN 3 10 SW 17 short trace. Keep sensitive GND 4 9 BOOT CBOOT components away from 5 6 7 8 this trace. B P N S F M E S O C R1 R2 RC CSS VOUT CP CC GND The feedback components must be connected as close to the device as possible. Figure 9. PCB Layout Guide for WQFN Package Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS8251-04 February 2013 www.richtek.com 13

RT8251 The feedback components GND VIN SW GND must be connected as close to the device as possible. Input capacitor must CBOOT CSS CC be placed as close CIN BOOT 8 SS to the IC as possible. D VIN 2 GND 7 EN CP RC SW 3 6 COMP CS RS GND 4 9 5 FB R1 R2 L VOUT COUT VOUT GND SW should be connected to inductor by wide and short trace. Keep sensitive components away from this trace. Figure 10. PCB Layout Guide for PSOP-8 Package Table 3. Suggested Capacitors for C and C IN OUT Location Component Supplier Part No. Capacitance (μF) Case Size C MURATA GRM31ER61E226K 22 1210 IN C TDK C4535X5R1E226M 22 1812 IN C TAIYO YUDEN TMK325BJ226MM 22 1210 IN C MURATA GRM32ER61C476M 47 1210 OUT C MURATA GRM31CR60J476M 47 1206 OUT C TDK C3216X5R0J476M 47 1206 OUT C TAIYO YUDEN LMK316BJ476MM 47 1206 OUT Table 4. Suggested Diode Component Supplier Part No. V (V) I (A) Package RRM OUT DIODES B540C 40 5 SMC ON MBRS540T3 40 5 SMC Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS8251-04 February 2013 14

RT8251 Outline Dimension SEE DETAIL A D D2 L 1 E E2 1 1 e b 2 2 A DETAIL A A3 Pin #1 ID and Tie Bar Mark Options A1 Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 2.950 3.050 0.116 0.120 D2 1.300 1.750 0.051 0.069 E 2.950 3.050 0.116 0.120 E2 1.300 1.750 0.051 0.069 e 0.500 0.020 L 0.350 0.450 0.014 0.018 W-Type 16L QFN 3x3 Package Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS8251-04 February 2013 www.richtek.com 15

RT8251 H A M EXPOSED THERMAL PAD Y (Bottom of Package) J X B F C I D Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.000 0.152 0.000 0.006 J 5.791 6.200 0.228 0.244 M 0.406 1.270 0.016 0.050 X 2.000 2.300 0.079 0.091 Option 1 Y 2.000 2.300 0.079 0.091 X 2.100 2.500 0.083 0.098 Option 2 Y 3.000 3.500 0.118 0.138 8-Lead SOP (Exposed Pad) Plastic Package Richtek Technology Corporation 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. www.richtek.com DS8251-04 February 2013 16