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RT7257AHZSP产品简介:
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参数 | 数值 |
产品目录 | 集成电路 (IC) |
描述 | IC REG BUCK SYNC ADJ 3A 8SOP |
产品分类 | |
品牌 | Richtek USA Inc |
数据手册 | http://www.richtek.com/download_ds.jsp?s=771 |
产品图片 | |
产品型号 | RT7257AHZSP |
PWM类型 | 电流模式 |
rohs | 无铅 / 符合限制有害物质指令(RoHS)规范要求 |
RoHS指令信息 | http://www.richtek.com/download.jsp?t=UyUyRmFzc2V0cyUyRjIwMDklMkYwNiUyRjE3JTJGcGFnZTY1MTYwenRpeGIucGRmJTNEJTNEJTNE%0AR0w5NTI1LUMtLVBiLWZyZWUrUHJvZHVjdCsrR3JlZW4rUHJvZHVjdCtTdGF0ZW1lbnQrMDkwNjE2%0AQw%3D%3D |
产品系列 | - |
供应商器件封装 | 8-SOP-EP |
其它名称 | 1028-1090-6 |
包装 | Digi-Reel® |
同步整流器 | 是 |
安装类型 | 表面贴装 |
封装/外壳 | 8-SOIC(0.154",3.90mm 宽)裸焊盘 |
工作温度 | -40°C ~ 85°C |
标准包装 | 1 |
电压-输入 | 4.5 V ~ 18 V |
电压-输出 | 0.8 V ~ 15 V |
电流-输出 | 3A |
类型 | 降压(降压) |
输出数 | 1 |
输出类型 | 可调式 |
频率-开关 | 340kHz |
Design Sample & Tools Buy ® RT7257A 3A, 18V, 340kHz Synchronous Step-Down Converter General Description Features The RT7257A is a high efficiency, monolithic synchronous ±±±±±1.5% High Accuracy Reference Voltage step-down DC/DC converter that can deliver up to 3A 4.5V to 18V Input Voltage Range output current from a 4.5V to 18V input supply. The 3A Output Current RT7257A's current mode architecture and external Integrated N-MOSFET Switches compensation allow the transient response to be Current Mode Control optimized over a wide input range and loads. Cycle-by- Fixed Frequency Operation : 340kHz cycle current limit provides protection against shorted Output Adjustable from 0.8V to 15V outputs, and soft-start eliminates input current surge during Up to 95% Efficiency start-up. The RT7257A also provides under voltage Programmable Soft-Start protection and thermal shutdown protection. The low Stable with Low ESR Ceramic Output Capacitors current (<3μA) shutdown mode provides output Cycle-by-Cycle Over Current Protection disconnection, enabling easy power management in Input Under Voltage Lockout battery-powered systems. The RT7257A is available in Output Under Voltage Protection an SOP-8 (Exposed Pad) package. Thermal Shutdown Protection RoHS Compliant and Halogen Free Ordering Information Applications RT7257A Wireless AP/Router Package Type SP : SOP-8 (Exposed Pad-Option 1) Set-Top-Box Lead Plating System Industrial and Commercial Low Power Systems Z : ECO (Ecological Element with LCD Monitors and TVs Halogen Free and Pb free) Green Electronics/Appliances H : UVP Hiccup Point of Load Regulation of High-Performance DSPs L : UVP Latch-Off Pin Configurations Note : Richtek products are : (TOP VIEW) RoHS compliant and compatible with the current require- BOOT 8 SS ments of IPC/JEDEC J-STD-020. VIN 2 7 EN GND Suitable for use in SnPb or Pb-free soldering processes. SW 3 6 COMP 9 GND 4 5 FB Marking Information SOP-8 (Exposed Pad) RT7257AxZSP : Product Number RT7257Ax x : H or L ZSPYMDNN YMDNN : Date Code Copyright © 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS7257A-04 October 2016 www.richtek.com 1
RT7257A Typical Application Circuit VIN 2 VIN BOOT 1 4.5V to 18V CIN CBOOT L 10µF x 2 RT7257A 0.1µF 10µH SW 3 VOUT 3.3V REN 100k 7 R1 EN 75k 8 5 COUT SS FB 22µF x 2 CSS CC RC R2 0.1µF 4, 9 (Exposed Pad) 6 4.7nF 12k 24k GND COMP CP Open Table 1. Suggested Components Selection V (V) R1 (k) R2 (k) R (k) C (nF) L (H) C (F) OUT C C OUT 8 27 3 24 4.7 22 22 x 2 5 62 11.8 18 4.7 15 22 x 2 3.3 75 24 12 4.7 10 22 x 2 2.5 25.5 12 8.2 4.7 6.8 22 x 2 1.5 10.5 12 3.6 4.7 3.6 22 x 2 1.2 12 24 3 4.7 3.6 22 x 2 1 3 12 2.7 4.7 3.6 22 x 2 Functional Pin Description Pin No. Pin Name Pin Function Bootstrap for High Side Gate Driver. Connect a 0.1F or greater ceramic 1 BOOT capacitor from BOOT to SW pins. Input Supply Voltage, 4.5V to 18V. Must bypass with a suitable large ceramic 2 VIN capacitor. 3 SW Switch Node. Connect this pin to an external L-C filter. 4, Ground. The exposed pad must be soldered to a large PCB and connected to GND 9 (Exposed Pad) GND for maximum power dissipation. Feedback Input. It is used to regulate the output of the converter to a set value 5 FB via an external resistive voltage divider. Compensation Node. COMP is used to compensate the regulation control 6 COMP loop. Connect a series RC network from COMP to GND. In some cases, an additional capacitor from COMP to GND is required. Enable Input Pin. A logic high enables the converter; a logic low forces the 7 EN RT7257A into shutdown mode reducing the supply current to less than 3A. Attach this pin to VIN with a 100k pull up resistor for automatic startup. Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor 8 SS from SS to GND to set the soft-start period. A 0.1F capacitor sets the soft-start period to 13.5ms. Copyright © 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS7257A-04 October 2016 2
RT7257A Function Block Diagram VIN Internal Regulator Oscillator Current Sense Shutdown Slope Comp Amplifier Comparator VA VCC Foldback + RSENSE VA 1.2V + Control - - 0.4V + BOOT Lockout - S Q 110m Comparator UV 5k Comparator SW EN - + 2.5V + - R Q 90m Current GND Comparator VCC 6µA 0.8V + SS +EA - FB COMP Copyright © 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS7257A-04 October 2016 www.richtek.com 3
RT7257A Absolute Maximum Ratings (Note 1) Supply Input Voltage, VIN ----------------------------------------------------------------------------------------- −0.3V to 20V Switch Voltage, SW ------------------------------------------------------------------------------------------------ −0.3V to (V + 0.3V) IN <10ns ------------------------------------------------------------------------------------------------------------------ −5V to 25V V − V ---------------------------------------------------------------------------------------------------------- −0.3V to 6V BOOT SW Other Pins Voltage ------------------------------------------------------------------------------------------------- −0.3V to 20V Power Dissipation, P @ T = 25°C D A SOP-8 (Exposed Pad) --------------------------------------------------------------------------------------------- 1.333W Package Thermal Resistance (Note 2) SOP-8 (Exposed Pad), θ ---------------------------------------------------------------------------------------- 75°C/W JA SOP-8 (Exposed Pad), θ --------------------------------------------------------------------------------------- 15°C/W JC Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------- 260°C Junction Temperature----------------------------------------------------------------------------------------------- 150°C Storage Temperature Range -------------------------------------------------------------------------------------- −65°C to 150°C ESD Susceptibility (Note 3) HBM (Human Body Model)---------------------------------------------------------------------------------------- 2kV Recommended Operating Conditions (Note 4) Supply Input Voltage, VIN ----------------------------------------------------------------------------------------- 4.5V to 18V Junction Temperature Range-------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range-------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VIN= 12V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Shutdown Supply Current V = 0V -- 0.5 3 A EN Supply Current V = 3 V, V = 0.9V -- 0.8 1.2 mA EN FB Reference Voltage V 4.5V V 18V 0.788 0.8 0.812 V REF IN Error Amplifier G I = ±10A -- 940 -- A/V Transconductance EA C High Side Switch R -- 110 -- m On-Resistance DS(ON)1 Low Side Switch R -- 90 -- m On-Resistance DS(ON)2 High Side Switch Leakage V = 0V, V = 0V -- 0 10 A Current EN SW Upper Switch Current Limit Min. Duty Cycle, V V = 4.8V -- 5.1 -- A BOOT SW COMP to Current Sense G -- 4.7 -- A/V Transconductance CS Oscillation Frequency f 300 340 380 kHz OSC1 Short Circuit Oscillation f V = 0V -- 100 -- kHz Frequency OSC2 FB Maximum Duty Cycle D V = 0.7V -- 93 -- % MAX FB Minimum On Time t -- 100 -- ns ON Copyright © 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS7257A-04 October 2016 4
RT7257A Parameter Symbol Test Conditions Min Typ Max Unit Logic-High VIH 2.7 -- 18 EN Input Voltage V Logic-Low VIL -- -- 0.4 Input Under Voltage Lockout Threshold VUVLO VIN Rising 3.8 4.2 4.5 V Input Under Voltage Lockout Hysteresis V -- 320 -- mV UVLO Soft-Start Current ISS VSS = 0V -- 6 -- A Soft-Start Period tSS CSS = 0.1F -- 13.5 -- ms Thermal Shutdown T -- 150 -- C SD Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA= 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Copyright © 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS7257A-04 October 2016 www.richtek.com 5
RT7257A Typical Operating Characteristics Efficiency vs. Load Current Output Voltage vs. Input Voltage 100 3.34 90 3.33 80 VIN = 4.5V ) 3.32 %) 70 VVIINN == 1127VV e (V 3.31 ncy ( 5600 Voltag 3.30 Efficie 3400 utput 3.29 O 3.28 20 3.27 10 VOUT = 3.3V VIN = 4.5V to 17V, VOUT = 3.3V, IOUT = 1A 0 3.26 0.01 0.1 1 10 4 6 8 10 12 14 16 18 Load Current (A) Input Voltage (V) Output Voltage vs. Temperature Output Voltage vs. Output Current 3.34 3.50 3.33 3.45 ge (V) 33..3312 ge (V) 33..3450 VVIINN == 41.25VV olta 3.30 olta 3.30 VIN = 17V V V put 3.29 put 3.25 ut ut O 3.28 O 3.20 3.27 3.15 VIN = 12V, VOUT = 3.3V, IOUT = 1A VOUT = 3.3V 3.26 3.10 -50 -25 0 25 50 75 100 125 0 0.5 1 1.5 2 2.5 3 Temperature (°C) Output Current (A) Switching Frequency vs. Input Voltage Switching Frequency vs. Temperature 380 370 z) 1 370 z) 1 360 H H k 360 k y ( y ( 350 c c n 350 n e e 340 u u q 340 q e e Fr Fr 330 g 330 g n n hi hi 320 c 320 c wit wit S 310 S 310 VOUT = 3.3V, IOUT = 0.5A VIN = 12V, VOUT = 3.3V, IOUT = 0.5A 300 300 4.5 7 9.5 12 14.5 17 -50 -25 0 25 50 75 100 125 Input Voltage (V) Temperature (°C) Copyright © 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS7257A-04 October 2016 6
RT7257A Current Limit vs. Temperature Load Transient Response 8 7 VOUT (100mV/Div) ) A 6 mit ( Li 5 nt e urr 4 C IOUT (2A/Div) 3 VIN = 12V, VOUT = 3.3V VIN = 12V, VOUT = 3.3V, IOUT = 0.2A to 3A 2 -50 -25 0 25 50 75 100 125 Time (250μs/Div) Temperature (°C) Load Transient Response Switching VOUT (10mV/Div) VOUT (100mV/Div) VSW (10V/Div) IOUT (2A/Div) IL (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 1.5A to 3A VIN = 12V, VOUT = 3.3V, IOUT = 3A Time (250μs/Div) Time (1μs/Div) Power On from VIN Power Off from VIN VIN VIN (5V/Div) (5V/Div) VOUT VOUT (2V/Div) (2V/Div) IL IL (2A/Div) (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 3A VIN = 12V, VOUT = 3.3V, IOUT = 3A Time (5ms/Div) Time (5ms/Div) Copyright © 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS7257A-04 October 2016 www.richtek.com 7
RT7257A Power On from EN Power Off from EN VEN VEN (5V/Div) (5V/Div) VOUT VOUT (2V/Div) (2V/Div) IL IL (2A/Div) (2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 2A VIN = 12V, VOUT = 3.3V, IOUT = 2A Time (5ms/Div) Time (5ms/Div) Copyright © 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS7257A-04 October 2016 8
RT7257A Application Information Output Voltage Setting Soft-Start The resistive divider allows the FB pin to sense the output The RT7257A provides soft-start function. The soft-start voltage as shown in Figure 1. function is used to prevent large inrush current while converter is being powered-up. The soft-start timing can VOUT be programmed by the external capacitor between SS and R1 GND. An internal current source ISS (6μA) charges an FB external capacitor to build a soft-start ramp voltage. The RT7257A R2 VFB voltage will track the internal ramp voltage during soft- GND start interval. The typical soft start time is calculated as follows : Figure 1. Output Voltage Setting Soft-Start time t = 0.8CSS, if C capacitor SS SS I SS 0.80.1 The output voltage is set by an external resistive voltage is 0.1F, then soft-start time = ≒ 13.5ms 6 divider according to the following equation : R1 VOUT = VREF1 Chip Enable Operation R2 The EN pin is the chip enable input. Pulling the EN pin Where V is the reference voltage (0.8V typ.). REF low (<0.4V) will shutdown the device. During shutdown mode, the RT7257A quiescent current drops to lower than External Bootstrap Diode 3μA. Driving the EN pin high (>2.5V, < 18V) will turn on Connect a 0.1μF low ESR ceramic capacitor between the the device again. For external timing control, the EN pin BOOT pin and SW pin. This capacitor provides the gate can also be externally pulled high by adding a R resistor EN driver voltage for the high side MOSFET. and C capacitor from the VIN pin (see Figure 3). EN It is recommended to add an external bootstrap diode EN REN between an external 5V and BOOT pin for efficiency VIN EN improvement when input voltage is lower than 5.5V or duty RT7257A CEN ratio is higher than 65% .The bootstrap diode can be a GND low cost one such as IN4148 or BAT54. The external 5V can be a 5V fixed input from system or a 5V output of the Figure 3. Enable Timing Control RT7257A. Note that the external boot voltage must be An external MOSFET can be added to implement digital lower than 5.5V control on the EN pin when no system voltage above 2.5V 5V is available, as shown in Figure 4. In this case, a 100kΩ pull-up resistor, R , is connected between V and the EN IN EN pin. MOSFET Q1 will be under logic control to pull BOOT down the EN pin. RT7257A 100nF SW REN 100k VIN EN Figure 2. External Bootstrap Diode EN Q1 RT7257A GND Figure 4. Digital Enable Control Circuit Copyright © 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS7257A-04 October 2016 www.richtek.com 9
RT7257A Under Voltage Protection Over Temperature Protection The RT7257A features an Over Temperature Protection Hiccup Mode (OTP) circuitry to prevent from overheating due to For the RT7257AH, it provides Hiccup Mode Under Voltage excessive power dissipation. The OTP will shut down Protection (UVP). When the V voltage drops below 0.4V, FB switching operation when junction temperature exceeds the UVP function will be triggered to shut down switching 150°C. Once the junction temperature cools down by operation. If the UVP condition remains for a period, the approximately 20°C, the converter will resume operation. RT7257AH will retry automatically. When the UVP To maintain continuous operation, the maximum junction condition is removed, the converter will resume operation. temperature should be lower than 125°C. The UVP is disabled during soft-start period. Hiccup Mode Inductor Selection The inductor value and operating frequency determine the ripple current according to a specific input and output voltage. The ripple current ΔI increases with higher V L IN VOUT and decreases with higher inductance. (2V/Div) IL =VfOULT1VVOIUNT Having a lower ripple current reduces not only the ESR ILX losses in the output capacitors but also the output voltage (2A/Div) ripple. High frequency with small ripple current can achieve IOUT = Short the highest efficiency operation. However, it requires a large inductor to achieve this goal. Time (50ms/Div) Figure 5. Hiccup Mode Under Voltage Protection For the ripple current selection, the value of ΔIL= 0.24(IMAX) will be a reasonable starting point. The largest ripple Latch-Off Mode current occurs at the highest V . To guarantee that the IN For the RT7257AL, it provides Latch-Off Mode Under ripple current stays below the specified maximum, the Voltage Protection (UVP). When the FB voltage drops inductor value should be chosen according to the following below half of the feedback reference voltage, VFB, UVP equation : will be triggered and the RT7257AL will shutdown in Latch- L = VOUT 1 VOUT Off Mode. In shutdown condition, the RT7257AL can be fIL(MAX) VIN(MAX) reset by EN pin or power input VIN. The inductor's current rating (caused a 40°C temperature Latch-Off Mode rising from 25°C ambient) should be greater than the maximum load current and its saturation current should be greater than the short circuit peak current limit. Please VOUT see Table 2 for the inductor selection reference. (2V/Div) Table 2. Suggested Inductors for Typical Application Circuit Component Dimensions ILX Supplier Series (mm) (2A/Div) TDK VLF10045 10 x 9.7 x 4.5 TDK SLF12565 12.5 x 12.5 x 6.5 IOUT = Short TAIYO Time (250μs/Div) NR8040 8 x 8 x 4 YUDEN Figure 6. Latch-Off Mode Under Voltage Protection Copyright © 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS7257A-04 October 2016 10
RT7257A C and C Selection Thermal Considerations IN OUT The input capacitance, C is needed to filter the For continuous operation, do not exceed the maximum IN, trapezoidal current at the source of the high side MOSFET. operation junction temperature 125°C. The maximum To prevent large ripple current, a low ESR input capacitor power dissipation depends on the thermal resistance of sized for the maximum RMS current should be used. The IC package, PCB layout, the rate of surroundings airflow approximate RMS current equation is given : and temperature difference between junction to ambient. IRMS = IOUT(MAX) VOUT VIN 1 The maximum power dissipation can be calculated by VIN VOUT following formula : This formula has a maximum at V = 2V , where IN OUT P = (T − T ) / θ D(MAX) J(MAX) A JA I = I / 2. This simple worst case condition is RMS OUT Where T is the maximum operation junction commonly used for design because even significant J(MAX) temperature , T is the ambient temperature and the θ is deviations do not offer much relief. A JA the junction to ambient thermal resistance. Choose a capacitor rated at a higher temperature than For recommended operating conditions specification of required. Several capacitors may also be paralleled to RT7257A, the maximum junction temperature is 125°C. meet size or height requirements in the design. The junction to ambient thermal resistance θ is layout For the input capacitor, two 10μF low ESR ceramic JA dependent. For SOP-8 (Exposed Pad) package, the capacitors are suggested. For the suggested capacitor, thermal resistance θ is 75°C/W on the standard JEDEC JA please refer to Table 3 for more details. 51-7 four-layers thermal test board. The maximum power The selection of COUT is determined by the required ESR dissipation at TA = 25°C can be calculated by following to minimize voltage ripple. formula : Moreover, the amount of bulk capacitance is also a key P = (125°C − 25°C) / (75°C/W) = 1.333W D(MAX) for COUT selection to ensure that the control loop is stable. (min.copper area PCB layout) Loop stability can be checked by viewing the load transient P = (125°C − 25°C) / (49°C/W) = 2.04W D(MAX) response as described in a later section. (70mm2copper area PCB layout) The output ripple, ΔV , is determined by : OUT The thermal resistance θ of SOP-8 (Exposed Pad) is 1 JA VOUT ILESR8fCOUT determined by the package architecture design and the The output ripple will be the highest at the maximum input PCB layout design. However, the package architecture voltage since ΔI increases with input voltage. Multiple design had been designed. If possible, it's useful to L increase thermal performance by the PCB layout copper capacitors placed in parallel may be needed to meet the design. The thermal resistance θ can be decreased by ESR and RMS current handling requirement. Higher values, JA adding copper area under the exposed pad of SOP-8 lower cost ceramic capacitors are now becoming available (Exposed Pad) package. in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator As shown in Figure 7, the amount of copper area to which applications. However, care must be taken when these the SOP-8 (Exposed Pad) is mounted affects thermal capacitors are used at input and output. When a ceramic performance. When mounted to the standard capacitor is used at the input and the power is supplied SOP-8 (Exposed Pad) pad (Figure 7.a), θ is 75°C/W. JA by a wall adapter through long wires, a load step at the Adding copper area of pad under the SOP-8 (Exposed output can induce ringing at the input, VIN. At best, this Pad) (Figure 7.b) reduces the θJA to 64°C/W. Even further, ringing can couple to the output and be mistaken as loop increasing the copper area of pad to 70mm2 (Figure 7.e) instability. At worst, a sudden inrush of current through reduces the θ to 49°C/W. JA the long wires can potentially cause a voltage spike at V large enough to damage the part. IN Copyright © 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS7257A-04 October 2016 www.richtek.com 11
RT7257A The maximum power dissipation depends on operating ambient temperature for fixed T and thermal J(MAX) resistance θ . The Figure 8 of derating curves allows the JA designer to see the effect of rising ambient temperature on the maximum power dissipation allowed. 2.2 Four-Layer PCB (a) Copper Area = (2.3 x 2.3) mm2, θ = 75°C/W 2.0 JA 1.8 ) W n ( 1.6 C70omppme2r Area atio 1.4 50mm2 p 1.2 30mm2 ssi 1.0 10mm2 Di Min.Layout r 0.8 e w 0.6 o P 0.4 0.2 (b) Copper Area = 10mm2, θJA = 64°C/W 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 8. Derating Curve of Maximum Power Dissipation (c) Copper Area = 30mm2 , θ = 54°C/W JA (d) Copper Area = 50mm2 , θ = 51°C/W JA (e) Copper Area = 70mm2 , θ = 49°C/W JA Figure 7. Themal Resistance vs. Copper Area Layout Design Copyright © 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS7257A-04 October 2016 12
RT7257A Layout Consideration SW node is with high frequency voltage swing and Follow the PCB layout guidelines for optimal performance should be kept at small area. Keep analog components of the RT7257A. away from the SW node to prevent stray capacitive noise pick-up. Keep the traces of the main current paths as short and wide as possible. Connect feedback network behind the output capacitors. Keep the loop area small. Place the feedback Put the input capacitor as close as possible to the device components near the RT7257A. pins (VIN and GND). An example of PCB layout guide is shown in Figure 9 for reference. GND VIN SW GND VIN The feedback components must be connected as close Ibnep pulta ccaepda caitso rc lmosues t CIN CBOOT CSS REN tCoC the device as possible. BOOT 8 SS to the IC as possible. L VIN 2 GND 7 EN CP RC VOUT SW 3 6 COMP 9 R1 GND 4 5 FB R2 VOUT COUT GND SW node is with high frequency voltage swing and should be kept at small area. Keep analog components away from the SW node to prevent stray capacitive noise pick-up Figure 9. PCB Layout Guide Table 3. Suggested Capacitors for C and C IN OUT Location Component Supplier Part No. Capacitance (F) Case Size C MURATA GRM31CR61E106K 10 1206 IN C TDK C3225X5R1E106K 10 1206 IN C TAIYO YUDEN TMK316BJ106ML 10 1206 IN C MURATA GRM31CR60J476M 47 1206 OUT C TDK C3225X5R0J476M 47 1210 OUT C MURATA GRM32ER71C226M 22 1210 OUT C TDK C3225X5R1C22M 22 1210 OUT Copyright © 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. DS7257A-04 October 2016 www.richtek.com 13
RT7257A Outline Dimension H A M EXPOSED THERMAL PAD Y (Bottom of Package) J X B F C I D Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.000 0.152 0.000 0.006 J 5.791 6.200 0.228 0.244 M 0.406 1.270 0.016 0.050 X 2.000 2.300 0.079 0.091 Option 1 Y 2.000 2.300 0.079 0.091 X 2.100 2.500 0.083 0.098 Option 2 Y 3.000 3.500 0.118 0.138 8-Lead SOP (Exposed Pad) Plastic Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. www.richtek.com DS7257A-04 October 2016 14